JP2004145279A - Electronic circuit, method for driving electronic circuit, electrooptical device, method for driving electrooptical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic circuit whose yield and aperture rate can be improved by reducing the number of transistors to be used, and to provide a method for driving the electronic circuit, an electrooptical device, a method for driving the electrooptical device, and an electronic apparatus. <P>SOLUTION: A pixel circuit 20 is constituted of a driving transistor Q1, a transistor Q2, a switching transistor Q3, and a holding capacitor Co. A driving voltage supplying transistor Qv is connected between a first power source line VL1 which supplies a driving voltage Vdd for driving the driving transistor Q1 and an voltage supplying line Lo extended along the direction of the row of the pixel circuit 20 provided at the right end side of an active matrix section 12. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electronic circuit, a method for driving an electronic circuit, an electro-optical device, a method for driving an electro-optical device, and an electronic apparatus.
[0002]
[Prior art]
In recent years, an electro-optical device including a plurality of electro-optical elements widely used as a display device is required to have high definition or a large screen, and in response to this, each of the plurality of electro-optical elements is driven. Of the active matrix drive type electro-optical device provided with the pixel circuit for the passive drive type electro-optical device is increasing. However, in order to achieve higher definition or a larger screen, it is necessary to precisely control each of the electro-optical elements. For that purpose, it is necessary to compensate for the characteristic variation of the active elements constituting the pixel circuit.
[0003]
As a method of compensating for variations in characteristics of active elements, for example, a display device including a pixel circuit including a diode-connected transistor for compensating for variations in characteristics has been proposed (for example, see Patent Document 1).
[0004]
[Patent Document 1] JP-A-11-272233
[Problems to be solved by the invention]
By the way, a pixel circuit for compensating for variations in characteristics of active elements is generally constituted by four or more transistors, which leads to a reduction in yield and aperture ratio.
[0006]
One object of the present invention is to solve the above problems, and it is possible to reduce the number of transistors constituting a pixel circuit or a unit circuit, an electronic circuit, a driving method of an electronic circuit, an electro-optical device, An object of the present invention is to provide a driving method of an electro-optical device and an electronic apparatus.
[0007]
[Means for Solving the Problems]
The first electronic circuit of the present invention is an electronic circuit including a plurality of unit circuits, includes a first power supply line, and each of the plurality of unit circuits is connected in series to an electronic element, and A first transistor connected to one power supply line, a second transistor for controlling conduction between a drain of the first transistor and a gate of the first transistor, and a conduction state of the first transistor. A current source that outputs a data current for setting, and a third transistor that controls conduction between the first transistor and at least a part of a period during which the third transistor is in an on state Wherein the first power supply line is electrically disconnected from a driving voltage, and the first power supply line is electrically disconnected from the first power supply line during at least a part of a period in which the third transistor is off. Between the serial electronic device, wherein the current corresponding to the conductive state of the first transistor which is set by the data current to the first transistor.
In the above electronic circuit, “controlling conduction between the drain of the first transistor and the gate of the first transistor” means that the drain of the first transistor and the gate of the first transistor are connected to each other. Is not only directly connected electrically, but also includes a case where the third transistor and the like are electrically connected via an element such as another transistor or a wiring.
[0008]
A second electronic circuit according to the present invention is an electronic circuit including a plurality of unit circuits, wherein a first power supply line and a potential of the first power supply line are set to a plurality of potentials, or And a control circuit that controls supply and cutoff of a drive voltage to a power supply line, wherein each of the plurality of unit circuits is connected in series to the electronic element and the first power supply line. A first transistor connected to the first transistor, a second transistor for controlling conduction between a drain of the first transistor and a gate of the first transistor, and setting a conduction state of the first transistor. And a third transistor for controlling conduction between the first transistor and the first transistor, wherein at least a part of the period in which the third transistor is in the off state is the same as the previous one. Between the first power supply line and the electronic device, wherein the current corresponding to the conductive state of the first transistor which is set by the data current to the first transistor.
[0009]
In the above electronic circuit, the “drain” is a relative relationship between the potentials of two terminals sandwiching a channel of the first transistor when a data current flows through the first transistor and a conductivity type of the first transistor. Is determined by For example, when the first transistor is a p-type, a terminal having a lower potential among the two terminals of the first transistor is referred to as a “drain”, and when the first transistor is an n-type, A terminal having a higher potential among the two terminals of the first transistor is referred to as a “drain”.
In the above electronic circuit, the “electronic element” is, for example, an electro-optical element, a resistance element, a diode, or the like.
[0010]
A third electronic circuit according to the present invention is an electronic circuit including a plurality of unit circuits, each of the plurality of unit circuits having a first terminal, a second terminal, and a first control terminal. A first transistor, a third terminal, and a fourth terminal, wherein the third terminal is connected to the first control terminal, and an electric connection between the second terminal and the third terminal; A third transistor having a second transistor for controlling electrical connection, a fifth terminal and a sixth terminal, the third terminal having the fifth terminal connected to the first terminal, and a seventh terminal And an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal, and wherein the first terminal includes the plurality of units. Connected to a first power supply line together with the first terminal of another unit circuit of the circuit, and the potential of the first power supply line is changed to a plurality of potentials. Set, or includes a control circuit for controlling the supply and cutoff of the drive voltage to the first power supply line.
[0011]
The first transistor, the first terminal, the second terminal, and the first control terminal are, for example, a driving transistor Q1, a source of the driving transistor Q1, It corresponds to the drain of the driving transistor Q1 and the gate of the driving transistor Q1.
[0012]
The second transistor, the third terminal, the fourth terminal, and the second control terminal correspond to the transistor Q2, the source of the transistor Q2, the drain of the transistor Q2, and the gate of the transistor Q2, respectively.
Further, the third transistor, the fifth terminal, the sixth terminal, and the third control terminal correspond to the switching transistor Q3, the source of the switching transistor Q3, the drain of the switching transistor Q3, and the gate of the switching transistor Q3, respectively. are doing.
The capacitive element, the seventh terminal, and the eighth terminal correspond to the holding capacitor Co, the first electrode La of the holding capacitor Co, and the second electrode Lb of the holding capacitor Co, respectively.
According to this, it is possible to configure a unit circuit in which the number of transistors used is reduced as compared with the conventional one.
[0013]
A fourth electronic circuit according to the present invention is an electronic circuit including a plurality of unit circuits, each of the plurality of unit circuits having a first terminal, a second terminal, and a first control terminal. A first transistor, a third terminal, and a fourth terminal, wherein the third terminal is connected to the first control terminal, and an electric connection between the second terminal and the fourth terminal; A third transistor having a second transistor for controlling electrical connection, a fifth terminal and a sixth terminal, the third terminal having the fifth terminal connected to the first terminal, and a seventh terminal And an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal, and wherein the first terminal includes the plurality of units. A first power supply line connected to the first terminal of another unit circuit of the circuit, and the eighth terminal is connected to the plurality of unit circuits. Connected to a second power supply line held at a predetermined potential together with the eighth terminal of another unit circuit, to set the potential of the first power supply line to a plurality of potentials, or And a control circuit for controlling supply and cutoff of the drive voltage to the power supply.
According to this, a unit circuit can be configured by reducing the number of transistors to be used as compared with the conventional one, and further, the voltage can be stably held in the capacitor.
[0014]
In the above electronic circuit, the transistors included in each of the unit circuits are only the first transistor, the second transistor, and the third transistor.
According to this, the number of transistors to be used can be reduced by one as compared with the conventional one to form a unit circuit.
In the above electronic circuit, an electronic element is connected to the second terminal.
According to this, the electronic element can be controlled by a circuit using one less transistor than the conventional one.
In the above electronic circuit, the electronic element may be a current driving element.
According to this, the current driving element can be controlled by a circuit using one less transistor than the conventional one.
In the above electronic circuit, the control circuit is a fourth transistor including a ninth terminal and a tenth terminal, the ninth terminal is connected to the drive voltage, and the tenth terminal is It may be connected to the first power supply line.
According to this, the control circuit can be easily configured.
[0015]
A first method for driving an electronic circuit according to the present invention is a method for driving an electronic circuit including a plurality of unit circuits, wherein the electronic circuit includes a first power supply line, and each of the plurality of unit circuits includes: A first transistor connected in series to the electronic element and connected to the first power supply line; and a second transistor for controlling conduction between a drain of the first transistor and a gate of the first transistor. A transistor, a current source that outputs a data current for setting a conduction state of the first transistor, and a third transistor that controls conduction between the first transistor and the third transistor. A first step of supplying the data current to the first transistor as an on state, setting a conduction state of the first transistor, and turning off the third transistor; Flowing a current between the first power supply line and the electronic element in accordance with the conduction state of the first transistor, wherein the data current of the first step is transmitted to the first element. The first power supply line is electrically disconnected from a driving voltage during at least a part of a period of supplying to the one transistor, and the at least one part of a period during which the second step is performed is performed during the second step. The driving voltage is applied to one of the drain and the source of the one transistor via the first power supply line.
[0016]
A second method for driving an electronic circuit according to the present invention includes a first transistor having a first terminal, a second terminal, and a first control terminal, and a third terminal and a fourth terminal. A second transistor having the third terminal connected to the first control terminal and the fourth terminal connected to the second terminal; a fifth transistor and a sixth terminal; And a third transistor having the first terminal connected to the fifth terminal, a seventh terminal and an eighth terminal, wherein the seventh terminal is connected to the first control terminal. A plurality of unit circuits each including a terminal and a capacitor connected to the third terminal, wherein the first terminal is a first unit together with the first terminal of a series of unit circuits of the plurality of unit circuits. A method for driving an electronic circuit connected to a power supply line, wherein the first power supply line is electrically disconnected from a drive voltage. By electrically disconnecting the first terminal of the series of unit circuits from the drive voltage and turning on the third transistor of the series of unit circuits, the first transistor An amount of charge corresponding to a current level of a current flowing through the capacitor is held in the capacitive element, a voltage corresponding to the amount of charge is applied to the first control terminal, and the first terminal and the second terminal are connected to each other. Setting a conduction state between the first terminal of the series of unit circuits and electrically connecting the first terminal of the series of unit circuits to the drive voltage. ,including.
[0017]
A method for driving a third electronic circuit according to the present invention includes a first transistor having a first terminal, a second terminal, and a first control terminal, and a third terminal and a fourth terminal. A second transistor having the third terminal connected to the first control terminal and the fourth terminal connected to the second terminal, a fifth terminal and a sixth terminal, A third transistor having the first terminal connected to the fifth terminal, a seventh terminal and an eighth terminal, wherein the seventh terminal is the first control terminal. And a plurality of unit circuits each including a capacitor connected to the third terminal, wherein the first terminal is a first unit together with the first terminal of a series of unit circuits of the plurality of unit circuits. The eighth terminal is connected to a power supply line, and the eighth terminal is an eighth terminal of a series of unit circuits of the plurality of unit circuits. A method for driving an electronic circuit both connected to a second power supply line, wherein the first terminal of the series of unit circuits is electrically disconnected from the drive voltage by electrically disconnecting the first power supply line from a drive voltage. By electrically disconnecting from the driving voltage, and by turning on the third transistor of the series of unit circuits, the amount of charge according to the current level of the current flowing through the first transistor is reduced. Holding a capacitor, applying a voltage corresponding to the amount of charge to the first control terminal, and setting a conduction state between the first terminal and the second terminal; Turning off a third transistor and electrically connecting the first terminal of the series of unit circuits to the drive voltage.
According to the above electronic circuit driving method, the number of transistors in the unit circuit can be reduced as much as possible.
[0018]
A first electro-optical device of the present invention includes a plurality of scanning lines, a plurality of data lines, a plurality of first power lines, and a plurality of unit circuits, each of the plurality of unit circuits being: A first transistor connected in series to the electro-optical element and connected to a corresponding first power supply line among the first power supply lines; and a drain of the first transistor and the first transistor. A second transistor for controlling conduction with a gate, and controlling conduction between the first transistor and a corresponding data line among the plurality of data lines, via a corresponding one of the plurality of scanning lines. A third transistor controlled by a scan signal supplied to the first power supply line during a period in which at least a part of the third transistor is on. From While the data transistor supplied from the corresponding data line flows through the first transistor to set the conduction state of the first transistor and the third transistor to be in the off state In at least a part of the period, the drive voltage is applied to one of the drain and the source of the first transistor, and between the corresponding first power supply line and the electro-optical element, A current according to the conduction state of the first transistor set by the data current flows.
[0019]
In the above electro-optical device, “controlling conduction between the drain of the first transistor and the gate of the first transistor” means “the drain of the first transistor and the gate of the first transistor”. Is directly connected electrically, and also includes a case where the third transistor and the like are electrically connected via an element such as another transistor or the corresponding data line or the like.
[0020]
A second electro-optical device according to the present invention is an electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits, wherein each of the plurality of unit circuits is a first unit. A first transistor having a first terminal, a second terminal, and a first control terminal; and a third transistor having a third terminal, a fourth terminal, and a second control terminal. A second transistor having a terminal connected to the third terminal, a fifth terminal, a sixth terminal, and a third control terminal, wherein the fifth terminal is connected to the first terminal; A third terminal in which the sixth terminal is connected to one of the plurality of data lines, and the third control terminal is connected to one of the plurality of scan lines. , A seventh terminal and an eighth terminal, wherein the seventh terminal is the first control terminal and the third terminal Connected to a first power supply line together with the first terminals of the other unit circuits of the plurality of unit circuits, and a potential of the first power supply line. Is set to a plurality of potentials, or a control circuit is provided for controlling the supply and cutoff of the drive voltage to the power supply line.
[0021]
A third electro-optical device according to the present invention is an electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits, wherein each of the plurality of unit circuits is a first unit. A first transistor having a first terminal, a second terminal, and a first control terminal; and a third transistor having a third terminal, a fourth terminal, and a second control terminal. A third transistor connected to the terminal, a second transistor controlling an electrical connection between the second terminal and the fourth terminal, a fifth terminal, a sixth terminal, and a third control terminal; A fifth terminal connected to the first terminal, a sixth terminal connected to one of the plurality of data lines, and a third control terminal. Has a third transistor connected to one of the plurality of scanning lines, a seventh terminal and an eighth terminal, A seventh terminal includes a capacitor connected to the first control terminal and the third terminal, and the first terminal is connected to the first unit of the other unit circuits of the plurality of unit circuits. A second power supply line connected to a first power supply line held at a predetermined potential together with the eighth terminal of another unit circuit of the plurality of unit circuits; A control circuit is provided for setting the potential of the first power supply line to a plurality of potentials, or controlling supply and cutoff of a drive voltage to the first power supply line.
In the above electro-optical device, the number of transistors in the unit circuit can be reduced as much as possible.
[0022]
In the electro-optical device described above, it is preferable that the transistors included in each of the unit circuits are only the first transistor, the second transistor, and the third transistor.
[0023]
In the above electro-optical device, the control circuit is a fourth transistor including a ninth terminal and a tenth terminal, the ninth terminal is connected to the drive voltage, and the tenth terminal is Preferably, it is connected to the first power supply line.
[0024]
According to this, the control circuit can be easily configured.
In the above electro-optical device, the electro-optical element may be, for example, an EL element. Among them, a current driving element such as an organic EL element is preferable.
[0025]
A first method for driving an electro-optical device according to the present invention is a method for driving an electro-optical device, wherein the electro-optical device includes a plurality of scanning lines, a plurality of data lines, and a plurality of first power lines. , A plurality of unit circuits, each of the plurality of unit circuits being connected in series to an electro-optical element and being connected to a corresponding first power supply line among the first power supply lines. , A second transistor for controlling conduction between the drain of the first transistor and a gate of the first transistor, and a corresponding data line among the first transistor and the plurality of data lines A third transistor controlled by a scanning signal supplied through a corresponding scanning line among the plurality of scanning lines, wherein the third transistor is turned on and the corresponding First A first transistor for setting a conduction state of the first transistor by flowing a data current supplied from the corresponding data line to the first transistor in a state where the power supply line is electrically disconnected from the drive voltage; And in a state where the third transistor is off and the drive voltage is applied to one of the drain and source of the first transistor via the corresponding first power supply line, A second step of flowing a current between the corresponding first power supply line and the electro-optical element according to the conduction state of the first transistor set by the data current. And
[0026]
According to a second method for driving an electro-optical device of the present invention, a first transistor having a first terminal, a second terminal, and a first control terminal; a third terminal; a fourth terminal; A second transistor having a second control terminal, a third terminal connected to the first control terminal, and a fourth terminal connected to the second terminal; A third transistor having a first terminal, a sixth terminal, and a third control terminal, wherein the first terminal is connected to the fifth terminal, a seventh terminal and an eighth terminal. A plurality of unit circuits, each of which includes a capacitive element whose seventh terminal is connected to the first control terminal and the third terminal, and an electro-optical element connected to the second terminal. , The sixth terminal is connected to one of the plurality of data lines, and the third control terminal is connected to one of the plurality of scanning lines. A driving method for an electro-optical device, wherein the first terminal is connected to a first power supply line together with the first terminals of the other unit circuits of the plurality of unit circuits, By electrically disconnecting the first power supply line from the driving voltage, the first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third terminal of the series of unit circuits is electrically disconnected. Is turned on, the amount of charge corresponding to the current level of the current flowing through the first transistor is held in the capacitive element, and the voltage corresponding to the amount of charge is controlled by the first control. Setting a conduction state between the first terminal and the second terminal by applying a voltage to the first terminal and turning off the third transistor; 1 terminal is connected to the first terminal. Through the power line and a step of electrically connecting to the driving voltage.
[0027]
According to a third method for driving an electro-optical device of the present invention, a first transistor having a first terminal, a second terminal, and a first control terminal; a third terminal; a fourth terminal; A second transistor having a second control terminal, a third terminal connected to the first control terminal, and a fourth terminal connected to the second terminal; A third transistor having a first terminal, a sixth terminal, and a third control terminal, wherein the first terminal is connected to the fifth terminal, a seventh terminal and an eighth terminal. A plurality of unit circuits, each including a capacitor whose seventh terminal is connected to the first control terminal and the third terminal, and an electro-optical element connected to the second terminal. Wherein the sixth terminal is connected to one of a plurality of data lines, and the third control terminal is connected to a plurality of scanning lines. One scanning line, the first terminal is connected to a first power supply line together with the first terminal of another unit circuit of the plurality of unit circuits, and the eighth terminal is connected to the plurality of unit circuits. A driving method of an electro-optical device connected to a second power supply line together with the eighth terminal of another unit circuit of the unit circuit, wherein the first power supply line is electrically disconnected from a driving voltage. By electrically disconnecting the first terminal of the series of unit circuits from the drive voltage and turning on the third transistor of the series of unit circuits, The amount of charge corresponding to the current level of the flowing current is held in the capacitor, and a voltage corresponding to the amount of charge is applied to the first control terminal, so that the first terminal and the second terminal Set the conduction state with the terminal And step, as well as to the third transistor in the OFF state of, and a step of electrically connecting said first terminal of said series of unit circuits to the driving voltage through the first power line.
[0028]
According to the above-described method of driving an electro-optical device, it is possible to compensate for variations in characteristics of a transistor that determines a current or a voltage to be supplied to an electro-optical element, and to reduce the number of transistors included in a pixel circuit as much as possible.
[0029]
A first electronic device according to the present invention is characterized by mounting the above electronic circuit.
The above electronic circuit can be used for an active drive unit having an active function, such as a display unit or a memory unit of the electronic device.
[0030]
According to a second aspect of the invention, there is provided a second electronic apparatus including the above-described electro-optical device.
Since the above-described electro-optical device can control the state of the electro-optical element with high precision and has a high aperture ratio, it is possible to provide an electronic apparatus having a display unit with excellent display quality.
Further, in the above-described electro-optical device, the number of transistors constituting the pixel circuit is reduced as much as possible, so that the manufacturing cost can be suppressed.
[0031]
BEST MODE FOR CARRYING OUT THE INVENTION
(1st Embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block circuit diagram showing a circuit configuration of an organic EL display as an electro-optical device. FIG. 2 is a block circuit diagram showing a circuit configuration of the display panel unit and the data line driving circuit. FIG. 3 is a circuit diagram of the pixel circuit. FIG. 4 is a timing chart for explaining a driving method of the pixel circuit.
[0032]
The organic EL display 10 includes a signal generation circuit 11, an active matrix unit 12, a scanning line driving circuit 13, a data line driving circuit 14, and a power line control circuit 15. The signal generation circuit 11, the scanning line drive circuit 13, the data line drive circuit 14, and the power supply line control circuit 15 of the organic EL display 10 may be constituted by independent electronic components. For example, the signal generation circuit 11, the scanning line drive circuit 13, the data line drive circuit 14, and the power supply line control circuit 15 may each be configured by a one-chip semiconductor integrated circuit device. Further, all or a part of the signal generation circuit 11, the scanning line driving circuit 13, the data line driving circuit 14, and the power supply line control circuit 15 are constituted by a programmable IC chip, and the functions thereof are implemented by software written in the IC chip. It may be realized in a realistic manner.
[0033]
The signal generation circuit 11 generates a scanning control signal and a data control signal for displaying an image on the active matrix unit 12 based on image data from an external device (not shown). Then, the signal generation circuit 11 outputs the scan control signal to the scan line drive circuit 13 and outputs the data control signal to the data line drive circuit 14. Further, the signal generation circuit 11 outputs a timing control signal to the power supply line control circuit 15.
[0034]
As shown in FIG. 2, the active matrix section 12 has M data lines Xm (m = 1 to M; m is a natural number) extending along the column direction and extending along the row direction. The pixel circuit 20 has a plurality of unit circuits disposed at positions corresponding to intersections with N scanning lines Yn (n = 1 to N; n is a natural number). One electronic circuit is formed by the plurality of pixel circuits 20.
[0035]
That is, the pixel circuits 20 are arranged in a matrix by being connected to the data lines Xm extending in the column direction and the scanning lines Yn extending in the row direction. . Each pixel circuit 20 is connected to a first power supply line VL1 extending in parallel with the scanning line Yn. Each first power supply line VL1 is driven by a voltage supply line Lo that supplies a drive voltage Vdd as a drive voltage extending along the column direction of the pixel circuit 20 disposed on the right end side of the active matrix unit 12. It is connected via a voltage supply transistor Qv.
[0036]
As shown in FIG. 2, the pixel circuit 20 has an organic EL element 21 as an electro-optical element or an electronic element in which a light emitting layer is made of an organic material. When the drive voltage supply transistor Qv is turned on, the pixel circuit 20 is supplied with the drive voltage Vdd via the first power supply line VL1. In addition, a transistor described later arranged and formed in each pixel circuit 20 is configured by a TFT (thin film transistor).
[0037]
The scanning line driving circuit 13 selects one of the N scanning lines Yn provided in the active matrix unit 12 based on the scanning control signal output from the signal generation circuit 11, and selects one of the scanning lines. A scan signal is output to the selected scan line.
[0038]
The data line driving circuit 14 includes a plurality of single line drivers 23 as shown in FIG. Each single line driver 23 is connected to a corresponding data line Xm provided in the active matrix unit 12. The data line drive circuit 14 generates data currents Idata1, Idata2,..., IdataM based on the data control signal output from the signal generation circuit 11, respectively. Then, the data line driving circuit 14 outputs the generated data currents Idata1, Idata2,..., IdataM to the respective pixel circuits 20 via the data lines Xm. When the internal state of the pixel circuit 20 is set according to the data currents Idata1, Idata2,..., IdataM, the current levels of the data currents Idata1, Idata2,. The driving current Iel supplied to the organic EL element 21 is controlled according to the driving current.
[0039]
The power supply line control circuit 15 is connected to the gate of the drive voltage supply transistor Qv via a power supply line control line F. The power supply line control circuit 15 generates and supplies a power supply line control signal SFC that determines the on / off state of the drive voltage supply transistor Qv based on the timing control signal output from the signal generation circuit 11.
Then, when the drive voltage supply transistor Qv is turned on, the drive voltage Vdd is supplied to the first power supply line VL1, and the drive voltage Vdd is supplied to the pixel circuit 20 connected to the first power supply line VL1. Is done.
[0040]
Next, the pixel circuit 20 of the organic EL display 10 will be described below.
As shown in FIG. 3, the pixel circuit 20 includes a driving transistor Q1, a transistor Q2, a switching transistor Q3, and a holding capacitor Co.
[0041]
The conductivity type of drive transistor Q1 is p-type (p-channel). The conductivity types of the transistor Q2 and the switching transistor Q3 are n-type (n-channel).
[0042]
The drive transistor Q1 has its drain connected to the anode of the organic EL element 21 and the drain of the transistor Q2. The cathode of the organic EL element 21 is grounded. The source of the transistor Q2 is connected to the gate of the driving transistor Q1. The gate of the transistor Q2 is connected to the second sub-scanning line Yn2 together with the gate of the transistor Q2 of another pixel circuit 20 arranged along the row direction of the active matrix section 12.
[0043]
The gate of the driving transistor Q1 is connected to the first electrode La of the holding capacitor Co, and the second electrode Lb of the holding capacitor Co is connected to the source of the driving transistor Q1.
[0044]
The source of the driving transistor Q1 is connected to the source of the switching transistor Q3. The drain of the switching transistor Q3 is connected to the data line Xm. The gate of the switching transistor Q3 is connected to the first sub-scanning line Yn1. Note that the first sub-scanning line Yn1 and the second sub-scanning line Yn2 constitute a scanning line Yn.
[0045]
The source of the driving transistor Q1 is connected to the first power supply line VL1 together with the source of the driving transistor Q1 of another pixel circuit 20. The first power supply line VL1 is connected to a drain serving as a tenth terminal of the driving voltage supply transistor Qv. The source as the ninth terminal of the driving voltage supply transistor Qv is connected to the voltage supply line Lo.
[0046]
The conductivity type of the driving voltage supply transistor Qv is p-type (p-channel). The drive voltage supply transistor Qv responds to a power supply line control signal SFC supplied from the power supply line control circuit 15 via the power supply line control line F to electrically disconnect (OFF) and electrically connect (OFF). (ON state). When the drive voltage supply transistor Qv is turned on, the drive voltage Vdd is supplied to the drive transistor Q1 of each pixel circuit 20 connected to the first power supply line VL1 to which the drive voltage supply transistor Qv is connected.
[0047]
Next, a driving method of the pixel circuit 20 configured as described above will be described with reference to FIG. In FIG. 4, the drive cycle Tc means a cycle in which the luminance of the organic EL element 21 is updated once each, and usually corresponds to a frame cycle.
[0048]
First, as shown in FIG. 4, a data current Idata is supplied from the data line drive circuit 14. In this state, the first scanning signal SC1 for turning on the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, a second scanning signal SC2 for turning on the transistor Q2 is supplied from the scanning line driving circuit 13 to the gate of the transistor Q2 via the second sub-scanning line Yn2.
[0049]
As a result, the switching transistor Q3 and the transistor Q2 are turned on. Then, the data current Idata flows via the driving transistor Q1. As a result, the charge amount corresponding to the data current Idata is held in the holding capacitor Co, and the conduction state between the source and the drain of the drive transistor Q1 is set according to the gate voltage Vo corresponding to the charge amount.
[0050]
Thereafter, a first scanning signal SC1 for turning off the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, a second scan signal SC2 for turning off the transistor Q2 is supplied from the scan line drive circuit 13 to the gate of the transistor Q2 via the second sub-scan line Yn2.
[0051]
As a result, the switching transistor Q3 and the transistor Q2 are turned off, and the data line Xm and the driving transistor Q1 are electrically disconnected.
Note that at least during the period when the data current Idata is being supplied to the drive transistor Q1, the drive voltage supply transistor Qv turns off the drive voltage supply transistor Qv supplied from the power supply line control circuit 15 The supply of the SFC turns off the state.
[0052]
Subsequently, a power supply line control signal Sv for turning on the drive voltage supply transistor Qv is supplied from the power supply line control circuit 15 to the gate of the drive voltage supply transistor Qv via the power supply line control line F. Then, the drive voltage supply transistor Qv is turned on, and the drive voltage Vdd is supplied to the source of the drive transistor Q1.
[0053]
Thereby, the drive current Iel according to the conduction state set by the data current is supplied to the organic EL element 21, and the organic EL element 21 emits light. At this time, in order to make the drive current Iel substantially equal to the data current Idata, it is preferable that the drive transistor Q1 is set to be driven in a saturation region.
By using the data current Idata as the data signal as described above, variations in various parameters of the electrical characteristics of the driving transistor Q1, such as the threshold voltage and the gain coefficient, can be compensated for each driving transistor Q1.
Until the driving voltage supply transistor Qv is turned off, the organic EL element 21 continues to emit light at a luminance corresponding to the data current Idata.
As described above, the pixel circuit 20 can use one fewer transistor than a conventional pixel circuit that requires four transistors. Therefore, the yield and aperture ratio in the manufacture of the transistors of the pixel circuit 20 can be improved.
[0054]
According to the electronic circuit and the electro-optical device of the above embodiment, the following features can be obtained.
[0055]
(1) In the present embodiment, the pixel circuit 20 is configured by the driving transistor Q1, the transistor Q2, the switching transistor Q3, and the holding capacitor Co. Then, a first power supply line VL1 for supplying a drive voltage Vdd for driving the drive transistor Q1 and a voltage supply extending along the column direction of the pixel circuit 20 provided on the right end side of the active matrix section 12 The driving voltage supply transistor Qv was connected to the line Lo.
[0056]
With this configuration, the number of transistors used in the pixel circuit 20 can be reduced as compared with the conventional one. Therefore, it is possible to provide the organic EL display 10 having the pixel circuit suitable for improving the yield and the aperture ratio in the manufacture of the transistor.
[0057]
(2nd Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG. In the present embodiment, the same components as those in the above-described first embodiment have the same reference numerals, and a detailed description thereof will be omitted.
[0058]
FIG. 5 is a block circuit diagram illustrating a circuit configuration of the active matrix unit 12a and the data line driving circuit 14 of the organic EL display 10 according to the present embodiment. FIG. 6 is a circuit diagram of the pixel circuit 30 provided in the active matrix section 12a.
[0059]
In the active matrix section 12, a second power supply line VL2 is provided in parallel with the first power supply line VL1. As shown in FIG. 6, each of the plurality of second power supply lines VL2 is connected to the holding capacitor Co of each pixel circuit 30 and to the voltage supply line Lo.
[0060]
As shown in FIG. 6, the pixel circuit 30 includes a driving transistor Q1, a transistor Q2, a switching transistor Q3, and a holding capacitor Co.
[0061]
The drive transistor Q1 has its drain connected to the anode of the organic EL element 21 and the drain of the transistor Q2. The cathode of the organic EL element 21 is grounded. The source of the transistor Q2 is connected to the gate of the driving transistor Q1 and to the first electrode of the holding capacitor Co. The gate of the transistor Q2 is connected to the second sub-scanning line Yn2.
[0062]
The second electrode Lb of the holding capacitor Co is connected to the second power supply line VL2. As a result, the drive voltage Vdd, which is a constant voltage, is constantly and independently supplied to the holding capacitor Co independently of the on / off state of the drive voltage supply transistor Qv.
By connecting the second electrode Lb of the holding capacitor Co to the second power supply line VL2 in this manner, when the data current Idata is supplied to the drive transistor Q1, and when a drive voltage is applied to the source of the drive transistor Q1. At times, it is possible to suppress the fluctuation of the voltage generated in the holding capacitor Co.
As a result, the pixel circuit 30 can obtain the same effect as the above-described first embodiment, and can control the luminance gradation of the organic EL element 21 more accurately than in the above-described first embodiment. can do.
[0063]
The source of the driving transistor Q1 is connected to the first power supply line VL and to the source of the switching transistor Q3. The drain of the switching transistor Q3 is connected to the data line Xm. The gate of the switching transistor Q3 is connected to the first sub-scanning line Yn1.
[0064]
Next, a method of driving the pixel circuit 30 configured as described above will be described.
First, the data current Idata is supplied from the data line drive circuit 14. In this state, the first scanning signal SC1 for turning on the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, a second scanning signal SC2 for turning on the transistor Q2 is supplied from the scanning line driving circuit 13 to the gate of the transistor Q2 via the second sub-scanning line Yn2.
[0065]
Then, the switching transistor Q3 and the transistor Q2 are turned on. Then, the data current Idata passes through the driving transistor Q1 and the transistor Q2, and the charge corresponding to the data current Idata is held in the holding capacitor Co.
[0066]
As a result, the conduction state between the source and the drain of the driving transistor Q1 is set.
[0067]
Thereafter, a first scanning signal SC1 for turning off the switching transistor Q3 is supplied from the scanning line driving circuit 13 to the gate of the switching transistor Q3 via the first sub-scanning line Yn1. At this time, a second scan signal SC2 for turning off the transistor Q2 is supplied from the scan line drive circuit 13 to the gate of the transistor Q2 via the second sub-scan line Yn2. As a result, the switching transistor Q3 and the transistor Q are turned off, and the data line Xm and the driving transistor Q1 are electrically disconnected.
Note that at least during the period when the data current Idata is being supplied to the drive transistor Q1, the drive voltage supply transistor Qv turns off the drive voltage supply transistor Qv supplied from the power supply line control circuit 15 The supply of the SFC turns off the state.
[0068]
Subsequently, a power supply line control signal Sv for turning on the drive voltage supply transistor Qv is supplied from the power supply line control circuit 15 to the gate of the drive voltage supply transistor Qv via the power supply line control line F. Then, the drive voltage supply transistor Qv is turned on, and the drive voltage Vdd is supplied to the source of the drive transistor Q1. At this time, since the drive voltage Vdd is constantly and independently supplied to the second electrode Lb of the holding capacitor Co regardless of the on / off state of the drive voltage supply transistor Qv, the drive voltage Vdd corresponds to the data current Idata. This occurs in the holding capacitor Co when the charge amount is held in the holding capacitor Co and when the drive voltage supply transistor Qv is turned on to supply the drive current Iel from the drive transistor Q1 to the organic EL element 21. Voltage fluctuation can be suppressed. Therefore, the drive current Iel according to the voltage Vo held by the holding capacitor Co is supplied to the organic EL element.
[0069]
(Third embodiment)
Next, application of the electronic apparatus of the organic EL display 10 as the electro-optical device described in the first or second embodiment will be described with reference to FIGS. The organic EL display 10 can be applied to various electronic devices such as a mobile personal computer, a mobile phone, and a digital camera.
[0070]
FIG. 7 is a perspective view showing the configuration of a mobile personal computer. 7, a personal computer 70 includes a main body 72 having a keyboard 71 and a display unit 73 using the organic EL display 10.
Also in this case, the display unit 73 using the organic EL display 10 exhibits the same effect as the embodiment. As a result, it is possible to provide the mobile personal computer 70 including the organic EL display 10 that can control the luminance gradation of the organic EL element 21 with high accuracy and can improve the yield and the aperture ratio.
[0071]
FIG. 8 is a perspective view illustrating a configuration of a mobile phone. In FIG. 8, a mobile phone 80 includes a plurality of operation buttons 81, an earpiece 82, a mouthpiece 83, and a display unit 84 using the organic EL display 10. Also in this case, the display unit 84 using the organic EL display 10 exhibits the same effect as the above-described embodiment. As a result, it is possible to provide a mobile phone 80 including the organic EL display 10 capable of controlling the luminance gradation of the organic EL element 21 with high accuracy and improving the yield and the aperture ratio.
[0072]
The embodiments of the present invention are not limited to the above embodiments, but may be implemented as follows.
In the above-described embodiment, the conductivity type of the drive transistor Q1 of the pixel circuits 20 and 30 is set to be p-type (p-channel), and the conductivity type of each of the transistor Q2 and the switching transistor Q3 is set to be n-type (n-channel). . Then, the drain of the driving transistor Q1 was connected to the anode of the organic EL element 21. Further, the cathode of the organic EL element 21 was grounded.
[0073]
This may be set so that the conductivity type of the driving transistor Q1 is n-type (n-channel) and the conductivity types of the switching transistor Q3 and the transistor Q2 are p-type (p-channel).
In the above embodiment, the anode is a pixel electrode and the cathode is a common electrode common to a plurality of pixel electrodes. However, the cathode may be a pixel electrode and the common electrode may be an anode.
[0074]
In the above-described first and second embodiments, the gate of the switching transistor Q3 included in the pixel circuit is connected to the first sub-scanning line Yn1. Further, the gate of the transistor Q2 was connected to the second sub-scanning line Yn2. The first sub-scanning line Yn1 and the second sub-scanning line Yn2 constituted the scanning line Yn.
On the other hand, as shown in FIGS. 9 and 10, the transistor Q2 and the switching transistor Q3 can be controlled by the common scanning signal SC1.
Thus, the number of scanning lines provided for one pixel circuit is one, the number of wirings per pixel circuit can be reduced, and the aperture ratio can be improved.
[0075]
In the above embodiment, the drive voltage supply transistor Qv is used as a control circuit for controlling the supply of the drive voltage Vdd to the pixel circuit.
A switch capable of switching between a low potential and a high potential may be provided instead of the drive voltage supply transistor Qv. Further, a voltage follower circuit including a buffer circuit or a source follower circuit may be used as the control circuit in order to improve the driving capability. By doing so, the drive voltage Vdd can be quickly supplied to the pixel circuit.
[0076]
In the above embodiment, the voltage supply line Lo is provided on the right end side of the active matrix section 12, but is not limited thereto. For example, the voltage supply line Lo may be provided on the left end side of the active matrix section 12.
The voltage supply line Lo may be provided on the same side as the scanning line drive circuit 13 with respect to the active matrix section 12.
The power supply line control circuit 15 may be provided on the same side as the scanning line drive circuit 13 with respect to the active matrix section 12.
[0077]
In the above-described embodiment, an example in which the present invention is applied to an organic EL element has been described. May be embodied as a unit circuit for driving the electro-optical element. The present invention may be embodied in a storage element such as a RAM (in particular, an MRAM).
[Brief description of the drawings]
FIG. 1 is a block circuit diagram illustrating a circuit configuration of an organic EL display according to a first embodiment.
FIG. 2 is a block circuit diagram illustrating a circuit configuration of a display panel unit and a data line driving circuit according to the first embodiment.
FIG. 3 is a circuit diagram of a pixel circuit according to the first embodiment.
FIG. 4 is a timing chart for explaining a driving method of the pixel circuit according to the first embodiment.
FIG. 5 is a block circuit diagram illustrating a circuit configuration of a display panel unit and a data line driving circuit according to a second embodiment.
FIG. 6 is a circuit diagram of a pixel circuit according to a second embodiment.
FIG. 7 is a perspective view showing a configuration of a mobile personal computer for explaining a third embodiment.
FIG. 8 is a perspective view showing a configuration of a mobile phone for explaining a third embodiment.
FIG. 9 is a circuit diagram for explaining another example of a pixel circuit.
FIG. 10 is a circuit diagram illustrating another example of a pixel circuit.
[Explanation of symbols]
Co Holding capacitor Q1 as capacitance element Driving transistor Q2 as first transistor Transistor Q3 as second transistor Switching transistor Qv as third transistor Control circuit or driving voltage supply transistor Vdd as fourth transistor Drive voltage VL1 First power supply line VL2 Second power supply line Xm Data line Yn Scanning line 10 Organic EL display 20, 30 as electro-optical device Pixel circuit 21 as unit circuit 21 As electronic element, electro-optical element or current driving element Organic EL device 70 Personal computer 80 as electronic device Cellular phone as electronic device

Claims (23)

An electronic circuit including a plurality of unit circuits,
Including a first power line,
Each of the plurality of unit circuits is connected in series to an electronic element and connected to the first power supply line;
A second transistor for controlling conduction between a drain of the first transistor and a gate of the first transistor;
A current source that outputs a data current for setting a conduction state of the first transistor, and a third transistor that controls conduction between the first transistor and
The first power supply line is electrically disconnected from a driving voltage during at least a part of a period in which the third transistor is in an on state,
In at least a part of a period in which the third transistor is in an off state, the third transistor set between the first power supply line and the electronic element by the data current in the first transistor is provided. An electronic circuit, wherein a current flows according to a conduction state of one transistor. An electronic circuit including a plurality of unit circuits,
A first power line;
A control circuit for controlling the potential of the first power supply line,
Each of the plurality of unit circuits is connected in series to an electronic element and connected to the first power supply line;
A second transistor for controlling conduction between a drain of the first transistor and a gate of the first transistor;
A current source that outputs a data current for setting a conduction state of the first transistor, and a third transistor that controls conduction between the first transistor and
In at least a part of a period in which the third transistor is in an off state, the third transistor set between the first power supply line and the electronic element by the data current in the first transistor is provided. An electronic circuit, wherein a current flows according to a conduction state of one transistor. An electronic circuit including a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor having a first terminal, a second terminal, and a first control terminal;
A third terminal having a third terminal and a fourth terminal, wherein the third terminal is connected to the first control terminal, and controls an electrical connection between the second terminal and the third terminal; Two transistors,
A third transistor having a fifth terminal and a sixth terminal, the third transistor having the first terminal connected to the fifth terminal;
The first terminal is connected to a first power supply line together with the first terminals of other unit circuits of the plurality of unit circuits,
An electronic circuit, comprising: a control circuit that sets the potential of the first power supply line to a plurality of potentials, or controls supply and cutoff of a drive voltage to the first power supply line. An electronic circuit including a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor having a first terminal, a second terminal, and a first control terminal;
A third terminal having a third terminal and a fourth terminal, wherein the third terminal is connected to the first control terminal, and controls an electrical connection between the second terminal and the third terminal; Two transistors,
A third transistor, having a fifth terminal and a sixth terminal, wherein the first terminal is connected to the fifth terminal;
A capacitor having a seventh terminal and an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal;
The first terminal is connected to a first power supply line together with the first terminals of other unit circuits of the plurality of unit circuits,
An electronic circuit, comprising: a control circuit that sets the potential of the first power supply line to a plurality of potentials, or controls supply and cutoff of a drive voltage to the first power supply line. An electronic circuit including a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor having a first terminal, a second terminal, and a first control terminal;
A third terminal having a third terminal and a fourth terminal, wherein the third terminal is connected to the first control terminal, and controls an electrical connection between the second terminal and the third terminal; Two transistors,
A third transistor, having a fifth terminal and a sixth terminal, wherein the first terminal is connected to the fifth terminal;
A capacitor having a seventh terminal and an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal;
The first terminal is connected to a first power supply line together with the first terminals of other unit circuits of the plurality of unit circuits,
The eighth terminal is connected to a second power supply line held at a predetermined potential together with the eighth terminals of the other unit circuits of the plurality of unit circuits,
An electronic circuit, comprising: a control circuit that sets the potential of the first power supply line to a plurality of potentials, or controls supply and cutoff of a drive voltage to the first power supply line. The electronic circuit according to any one of claims 1 to 5,
The electronic circuit according to claim 1, wherein the transistors included in each of the unit circuits are only the first transistor, the second transistor, and the third transistor. The electronic circuit according to any one of claims 3 to 6,
An electronic circuit, wherein an electronic element is connected to the second terminal. The electronic circuit according to any one of claims 1 to 7,
An electronic circuit, wherein the electronic element is a current driving element. The electronic circuit according to any one of claims 2 to 5,
The control circuit is a fourth transistor having a ninth terminal and a tenth terminal,
An electronic circuit, wherein the ninth terminal is connected to the drive voltage, and the tenth terminal is connected to the first power supply line. A method for driving an electronic circuit including a plurality of unit circuits,
The electronic circuit includes:
Including a first power line,
Each of the plurality of unit circuits is connected in series to an electronic element and connected to the first power supply line;
A second transistor for controlling conduction between a drain of the first transistor and a gate of the first transistor;
A current source that outputs a data current for setting a conduction state of the first transistor, and a third transistor that controls conduction between the first transistor and
A first step of turning on the third transistor, supplying the data current to the first transistor, and setting a conductive state of the first transistor;
Turning off the third transistor, and flowing a current between the first power supply line and the electronic element according to the conduction state of the first transistor,
Electrically disconnecting the first power supply line from a driving voltage during at least a part of a period of supplying the data current to the first transistor in the first step;
Applying the driving voltage to one of the drain and the source of the first transistor via the first power supply line during at least a part of the period in which the second step is being performed;
A method for driving an electronic circuit, comprising: A first transistor having a first terminal, a second terminal, and a first control terminal;
A second transistor having a third terminal and a fourth terminal, the third terminal being connected to the first control terminal, and the fourth terminal being connected to the second terminal; When,
A third transistor, having a fifth terminal and a sixth terminal, wherein the first terminal is connected to the fifth terminal;
A plurality of unit circuits each including a seventh terminal and an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal;
A method for driving an electronic circuit, wherein the first terminal is connected to a first power supply line together with the first terminal of a series of unit circuits of the plurality of unit circuits,
By electrically disconnecting the first power supply line from the driving voltage, the first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third terminal of the series of unit circuits is electrically disconnected. By turning on the transistor, a charge amount corresponding to a current level of a current flowing through the first transistor is held in the capacitor, and a voltage corresponding to the charge amount is stored in the first control transistor. Applying a voltage to a terminal to set a conduction state between the first terminal and the second terminal;
Turning off the third transistor and electrically connecting the first terminal of the series of unit circuits to the drive voltage;
A method for driving an electronic circuit, comprising: A first transistor having a first terminal, a second terminal, and a first control terminal;
A second transistor having a third terminal and a fourth terminal, the third terminal being connected to the first control terminal, and the fourth terminal being connected to the second terminal; When,
A third transistor, having a fifth terminal and a sixth terminal, wherein the first terminal is connected to the fifth terminal;
A plurality of unit circuits each including a seventh terminal and an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal;
The first terminal is connected to a first power supply line together with the first terminals of a series of unit circuits of the plurality of unit circuits,
A method for driving an electronic circuit, wherein the eighth terminal is connected to a second power supply line together with the eighth terminal of a series of unit circuits of the plurality of unit circuits,
By electrically disconnecting the first power supply line from the driving voltage, the first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third terminal of the series of unit circuits is electrically disconnected. When the transistor is turned on, a charge corresponding to a current level of a current flowing through the first transistor is held in the capacitor, and a voltage corresponding to the charge is used for the first control. Applying a voltage to a terminal to set a conduction state between the first terminal and the second terminal;
Turning off the third transistor and electrically connecting the first terminals of the series of unit circuits to the drive voltage. Multiple scan lines;
Multiple data lines,
A plurality of first power lines;
And a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor connected in series to the electro-optical element and connected to a corresponding first power supply line among the first power supply lines;
A second transistor for controlling conduction between the drain of the first transistor and a gate of the first transistor;
A third transistor that controls conduction between the first transistor and a corresponding data line among the plurality of data lines, and is controlled by a scan signal supplied through a corresponding scan line among the plurality of scan lines; And a transistor,
In at least a part of the period in which the third transistor is on,
The corresponding first power supply line is electrically disconnected from the drive voltage, and the data current supplied from the corresponding data line flows through the first transistor, thereby setting the conduction state of the first transistor. And
In at least a part of the period in which the third transistor is off,
The drive voltage is applied to one of the drain and the source of the first transistor, and the first voltage set by the data current between the corresponding first power supply line and the electro-optical element. A current corresponding to the conduction state of one transistor flows;
An electro-optical device comprising: An electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor having a first terminal, a second terminal, and a first control terminal;
A second transistor having a third terminal, a fourth terminal, and a second control terminal, wherein the third terminal is connected to the first control terminal;
A fifth terminal, a sixth terminal, and a third control terminal, wherein the fifth terminal is connected to the first terminal, and wherein the sixth terminal is one of the plurality of data lines. A third transistor connected to one data line, wherein the third control terminal is connected to one of a plurality of scanning lines;
A capacitor having a seventh terminal and an eighth terminal, wherein the seventh terminal is connected to the first control terminal and the third terminal;
An electro-optical element connected to the second terminal;
The first terminal is connected to a first power supply line together with the first terminals of other unit circuits of the plurality of unit circuits,
An electro-optical device, comprising: a control circuit that sets a potential of the first power supply line to a plurality of potentials, or controls supply and cutoff of a drive voltage to the power supply line. An electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor having a first terminal, a second terminal, and a first control terminal;
A third terminal, a fourth terminal, and a second control terminal, wherein the third terminal is connected to the first control terminal, and the second terminal and the fourth terminal are connected to each other; A second transistor for controlling an electrical connection;
A fifth terminal, a sixth terminal, and a third control terminal, wherein the first terminal is connected to the fifth terminal, and the sixth terminal is one of the plurality of data lines. A third transistor connected to one data line, wherein the third control terminal is connected to one of a plurality of scanning lines;
A capacitor having a seventh terminal and an eighth terminal, wherein the seventh terminal includes a capacitor connected to the first control terminal and the third terminal;
The first terminal is connected to a first power supply line together with the first terminals of other unit circuits of the plurality of unit circuits,
The eighth terminal is connected to a second power supply line held at a predetermined potential together with the eighth terminals of the other unit circuits of the plurality of unit circuits,
An electro-optical device, comprising: a control circuit that sets a potential of the first power supply line to a plurality of potentials, or controls supply and cutoff of a drive voltage to the first power supply line. The electro-optical device according to any one of claims 13 to 15,
The electro-optical device according to claim 1, wherein transistors included in each of the unit circuits are only the first transistor, the second transistor, and the third transistor. The electro-optical device according to claim 14 or 15,
The control circuit is a fourth transistor having a ninth terminal and a tenth terminal,
An electro-optical device, wherein the ninth terminal is connected to the drive voltage, and the tenth terminal is connected to the first power supply line. The electro-optical device according to any one of claims 13 to 17,
An electro-optical device, wherein the electro-optical element is an EL element. A method for driving an electro-optical device, comprising:
The electro-optical device,
Multiple scan lines;
Multiple data lines,
A plurality of first power lines;
And a plurality of unit circuits,
Each of the plurality of unit circuits,
A first transistor connected in series to the electro-optical element and connected to a corresponding first power supply line among the first power supply lines;
A second transistor for controlling conduction between the drain of the first transistor and a gate of the first transistor;
A third transistor that controls conduction between the first transistor and a corresponding data line among the plurality of data lines, and is controlled by a scan signal supplied through a corresponding scan line among the plurality of scan lines; And a transistor,
Flowing a data current supplied from the corresponding data line to the first transistor in a state where the third transistor is on and the corresponding first power supply line is electrically disconnected from a driving voltage; A first step of setting a conduction state of the first transistor,
In a state where the third transistor is off and the drive voltage is applied to one of the drain and source of the first transistor through the corresponding first power supply line, the third transistor is turned off. A second step of flowing a current between the first power supply line and the electro-optical element in accordance with the conduction state of the first transistor set by the data current;
A method for driving an electro-optical device, comprising: A first transistor having a first terminal, a second terminal, and a first control terminal;
A third terminal, a fourth terminal, and a second control terminal, wherein the third terminal is connected to the first control terminal, and the fourth terminal is connected to the second terminal. A second transistor connected;
A third transistor having a fifth terminal, a sixth terminal, and a third control terminal, wherein the first terminal is connected to the fifth terminal;
A capacitor having a seventh terminal and an eighth terminal, wherein the seventh terminal is connected to the first control terminal and the third terminal;
An electro-optical element connected to the second terminal;
A plurality of unit circuits including
The sixth terminal is connected to one of a plurality of data lines;
The third control terminal is connected to one of the plurality of scanning lines;
A method for driving an electro-optical device, wherein the first terminal is connected to a first power supply line together with the first terminals of other unit circuits of the plurality of unit circuits,
By electrically disconnecting the first power supply line from the driving voltage, the first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third terminal of the series of unit circuits is electrically disconnected. Is turned on, the amount of charge corresponding to the current level of the current flowing through the first transistor is held in the capacitive element, and the voltage corresponding to the amount of charge is controlled by the first control. Setting a conduction state between the first terminal and the second terminal by applying a voltage to the first terminal;
Turning off the third transistor and electrically connecting the first terminal of the series of unit circuits to the drive voltage via the first power supply line. For driving an electro-optical device. A first transistor having a first terminal, a second terminal, and a first control terminal;
A third terminal, a fourth terminal, and a second control terminal, wherein the third terminal is connected to the first control terminal, and the fourth terminal is connected to the second terminal. A second transistor connected;
A third transistor having a fifth terminal, a sixth terminal, and a third control terminal, wherein the first terminal is connected to the fifth terminal;
A capacitor having a seventh terminal and an eighth terminal, wherein the seventh terminal is connected to the first control terminal and the third terminal;
An electro-optical element connected to the second terminal;
A plurality of unit circuits including
The sixth terminal is connected to one of a plurality of data lines;
The third control terminal is connected to one of the plurality of scanning lines;
The first terminal is connected to a first power supply line together with the first terminals of the other unit circuits of the plurality of unit circuits,
A method of driving an electro-optical device, wherein the eighth terminal is connected to a second power supply line together with the eighth terminal of another unit circuit of the plurality of unit circuits,
By electrically disconnecting the first power supply line from the driving voltage, the first terminal of the series of unit circuits is electrically disconnected from the driving voltage, and the third terminal of the series of unit circuits is electrically disconnected. When the transistor is turned on, a charge corresponding to a current level of a current flowing through the first transistor is held in the capacitor, and a voltage corresponding to the charge is used for the first control. Applying a voltage to a terminal to set a conduction state between the first terminal and the second terminal;
Turning off the third transistor and electrically connecting the first terminal of the series of unit circuits to the drive voltage via the first power supply line. For driving an electro-optical device. An electronic device comprising the electronic circuit according to claim 1. An electronic apparatus comprising the electro-optical device according to claim 13.

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