JP5103742B2 - THIN FILM TRANSISTOR DEVICE, ITS MANUFACTURING METHOD, THIN FILM TRANSISTOR ARRAY AND THIN FILM TRANSISTOR DISPLAY - Google Patents

Description

  The present invention relates to a thin film transistor device, a thin film transistor array, a thin film transistor display, and a method for manufacturing the thin film transistor device used in an image display device or the like.

  A thin film transistor (Thin Film Transistor: TFT) of amorphous silicon (a-Si) or polysilicon (poly-Si) is manufactured on a glass substrate on the basis of a transistor using a semiconductor material itself as a substrate and integrated circuit technology, and a liquid crystal display Has been applied.

  In such a display, normal display is performed only in the pixel electrode portion. In a normal liquid crystal display, since the areas of wirings and TFTs (the gate electrode 2, the source electrode 4, and the drain electrode 5 in the figure) are relatively small, they are hidden in the black matrix 17 (see FIG. 19). . However, when the pixel becomes small, the area of the wiring and TFT becomes relatively large, resulting in a decrease in the aperture ratio. The same applies to the reflective liquid crystal display. FIG. 20 shows a conventional liquid crystal display, which is viewed from the upper side of the drawing. The transparent electrode 14 is directly above the pixel electrode 11, and the gate electrode 2, the source electrode 4, and the drain electrode are directly below the black matrix 17. 5 or the like TFTs are arranged and shielded by the black matrix 17. The aperture ratio is the ratio of the area of pixel electrode / (pixel electrode + black matrix).

  In order to reduce the influence of such wiring and TFT, it is effective to provide the upper pixel electrode 12 on the wiring and TFT through the interlayer insulating film 7 (see Non-Patent Document 1). FIG. 20 shows a conventional liquid crystal display having a structure in which an upper pixel electrode 12 is formed on the surface of a capacitor upper electrode 8 via a via hole portion 9 as viewed from the upper side of the drawing. The upper pixel electrode 12 has a structure that shields TFTs such as the gate electrode 2, the source electrode 4, and the drain electrode 5 and faces the transparent counter electrode 14. The aperture ratio is a structure that expands.

  However, there is a problem that a complicated process of forming the interlayer insulating film 7 and forming the upper pixel electrode 12 through the via hole portion 9 after forming the hole is required (see FIG. 21).

  FIG. 21 is an explanatory view of the manufacturing process. In the process of forming the via hole 9, an additional process such as forming the via hole 9 after forming the interlayer insulating film 7 and opening the hole occurs (FIG. 21). 21 (d) to (e)).

  In recent years, organic semiconductors and oxide semiconductors have appeared, and it has been shown that TFTs can be produced at a low temperature of 200 ° C. or lower, and expectations for flexible displays using plastic substrates are increasing. Here, the thin film transistor device means a device including a TFT for driving a pixel and wiring and capacitors for assisting the TFT.

The known literature is described below.
Liquid Crystal Display Technology-Active Matrix LCD-edited by Shoichi Matsumoto p. 136

  The present invention has been made in view of the state of the related art, and an object of the present invention is to provide a thin film transistor device that has a simple structure and reduces the influence of wiring and TFTs and is suitable for a flexible display.

  The invention according to claim 1 of the present invention includes a gate electrode formed on an insulating substrate, a gate wiring connected to the gate electrode, a capacitor lower electrode, a capacitor wiring connected to the gate electrode, and a gate formed thereon A drain electrode, a drain wiring connected to the drain electrode, a source electrode, and a pixel electrode connected to the drain electrode are disposed on the insulating film, and a semiconductor layer is disposed so as to include at least a gap between the source electrode and the drain electrode. The thin film transistor device is characterized in that the pixel electrode is thicker than each of the drain electrode, the drain wiring, and the source electrode.

  The invention according to claim 2 of the present invention is the thin film transistor device according to claim 1, characterized in that a portion other than the pixel electrode is filled with an insulating material up to the height of the surface of the pixel electrode.

  According to the second aspect, the possibility of being affected by the drain electrode and the drain wiring can be further reduced by filling the drain electrode, the drain wiring and the source electrode with an insulator.

  The invention according to claim 3 of the present invention has an upper pixel electrode that is electrically connected to the pixel electrode and extends over the part of the insulator and the pixel electrode. This is a thin film transistor device.

  According to a third aspect of the present invention, the aperture ratio can be increased by having the upper pixel electrode that is electrically connected to the pixel electrode and spreads on the insulator.

  The invention according to claim 4 of the present invention is the thin film transistor device according to any one of claims 1 to 3, wherein the semiconductor layer is an organic semiconductor or an oxide semiconductor.

  According to a fourth aspect of the present invention, the organic layer or the oxide semiconductor is used for the semiconductor layer, so that the film formation temperature can be reduced, and a lightweight and flexible plastic substrate can be used.

  According to a fifth aspect of the present invention, there is provided a thin film transistor array in which a plurality of thin film transistor devices according to any one of the first to fourth aspects are arranged in a matrix on an insulating substrate. A thin film transistor array in which each thin film transistor device is electrically connected by the gate wiring, the drain wiring, and the capacitor wiring.

  In the invention of claim 5, it can be used as a back plate of a display having a plurality of pixels.

  The invention according to claim 6 of the present invention is a thin film transistor display using the thin film transistor array according to claim 5 on an insulating substrate, wherein a plurality of thin film transistor devices of the thin film transistor array include the gate wiring and drain wiring. And a thin film transistor display which is electrically connected by a capacitor wiring.

  According to the sixth aspect of the present invention, the display is not limited to the liquid crystal display, and can be used for other displays such as an electrophoretic display.

The invention according to claim 7 of the present invention includes a step of forming a gate electrode made of a conductive film, a gate wiring, a capacitor lower electrode, and a capacitor wiring on an insulating substrate, and a step of forming a gate insulating film thereon, Next, forming a drain electrode, a drain wiring, a source electrode, and a pixel electrode made of a conductive film on the gate insulating film, and forming a semiconductor layer on the gate insulating film so as to be in contact with the source electrode and the drain electrode A method of manufacturing a thin film transistor device comprising: filling a portion other than the pixel electrode with an insulator; and forming an upper pixel electrode connected to the pixel electrode and extending on the insulator and the pixel electrode. the method of forming the pixel electrodes, a screen printing der is, the thickness of the pixel electrode, the drain electrode, the drain wire, the source electrode A method for producing a thicker thin film transistor device according to claim than the thickness of.

  According to a seventh aspect of the present invention, the method for forming the pixel electrode is screen printing. Thick electrodes can be easily formed by screen printing.

  The invention according to claim 8 of the present invention is the method of manufacturing a thin film transistor device according to claim 7, wherein the drain wiring, the drain electrode, and the source electrode are screen-printed simultaneously with the pixel electrode.

  According to the eighth aspect of the present invention, by utilizing the characteristics of screen printing, the pixel electrode can be thickened and the drain wiring, drain electrode, and source electrode can be thinned in the same printing.

  The invention according to claim 9 of the present invention is the method of manufacturing a thin film transistor device according to claim 7 or 8, wherein the method of filling with the insulator is screen printing.

  According to the ninth aspect, the embedding with the insulator can be easily performed by screen printing.

  The invention according to claim 10 of the present invention is the method of manufacturing a thin film transistor device according to any one of claims 7 to 9, wherein the step of forming the upper pixel electrode is screen printing.

  According to the tenth aspect, the upper pixel electrode can be easily formed by screen printing.

  As can be understood from the above description, the present invention has the following effects. First, by making the pixel electrode thicker than the drain electrode, drain wiring, and source electrode, filling the area other than the pixel electrode with an insulator, and providing the upper pixel electrode, the display is less susceptible to the potential of the drain electrode and drain wiring. Can be a back plate. In addition, by using an organic semiconductor or an oxide semiconductor as a semiconductor, a deposition temperature can be reduced and a flexible display can be manufactured. Further, the pixel electrode, the drain electrode, the drain wiring, the source wiring, the insulator, and the upper pixel electrode can be easily manufactured by screen printing.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings used below, the scale is not accurately drawn for easy understanding.

A first embodiment will be described. An example of the thin film transistor device according to the first embodiment of the present invention is shown in FIG. FIG. 1A is a plan view showing one pixel region of a thin film transistor array, and FIG. 1B shows a side sectional view taken along line AA ′. As shown in FIG. 1, in the thin film transistor device 50 according to the first embodiment, a gate wiring 2 ′ is connected to the gate electrode 2 of the TFT, a drain wiring 5 ′ is connected to the drain electrode 5, and a pixel electrode is connected to the source electrode 4. 11 and a capacitor wiring 10 ′ is connected to the capacitor lower electrode 10. Further, a semiconductor layer 6 is formed so as to connect the source electrode 4 and the drain electrode 5. The TFT is temporarily turned on by the scanning voltage applied to the gate wiring 2 ′, the signal voltage at that time (applied to the drain wiring 5 ′) is written into the pixel electrode 11, and charges are accumulated in the capacitor. The potential is maintained even after the TFT is turned off. When this TFT device (the thin film transistor device of the present invention) is used as a back plate, the display maintains a display state determined by the potential of the pixel electrode 11.

  Another example is shown in FIG. One pixel region of the thin film transistor device 50 is shown, FIG. 6A is a plan view, and FIG. 6B is a side sectional view taken along line D-D ′. The difference from FIG. 1 is that a semiconductor layer 6 formed so as to connect the source 4 and the drain 5 is formed below the source electrode 4 and the drain electrode 5. Even in this case, the same operation as in FIG. 1 is realized.

  A feature of this embodiment is that the pixel electrode 11 is thicker than the drain electrode 5, the drain wiring 5 ′, and the source electrode 4. Specifically, it is important that the pixel electrode 11 is 5 μm thicker than the drain electrode 5, the drain wiring 5 ′, and the source electrode 4. The value of 5 μm is about the same thickness as the cell gap in the case of a liquid crystal display. When a solid such as a film with an electrophoretic capsule is bonded, the display medium and the drain electrode 5, the drain wiring 5 ′, the source electrode 4 is a distance that can prevent short circuit with 4.

  For example, in the liquid crystal display shown in FIG. 13, the distance from the pixel electrode 11 to the counter electrode 14 is about 5 μm, whereas the distance from the drain electrode 5 or the like to the counter electrode 14 is about 10 μm. The influence on the display is reduced, and the potential of the pixel electrode 11 almost determines the display state. In the electrophoretic display of FIG. 16, the adhesive layer 18 / electrophoresis capsule 16 layer / counter electrode 14 / counter substrate 13 are bonded to the TFT device, so that the adhesive layer contacts only the pixel electrode 11, It does not contact the drain electrode 5 or the like. Therefore, the potential of the drain electrode 5 has no effect, and the display state is determined only by the potential of the pixel electrode 11.

  In order to use as a back plate of such a display, a TFT array (thin film transistor array) in which a plurality of pixels are connected in a matrix as shown in FIG. In the thin film transistor array 80 of FIG. 12, a plurality of thin film transistor devices 50 (16 × 4 × 4 in the figure) are arranged.

  Moreover, as a manufacturing method for realizing the first embodiment, the steps as shown in FIGS. 4A to 4G are used. First, a gate electrode, a gate wiring, a capacitor lower electrode, and a capacitor wiring are formed on a substrate (see FIG. 4A). Next, a gate insulating film is formed on the entire surface (see FIG. 4B). Further, after forming a drain electrode, a drain wiring, and a source electrode (see FIG. 4C), a pixel electrode is formed (see FIG. 4D). Finally, a semiconductor layer is formed (see FIG. 4E).

  Alternatively, the steps as shown in FIGS. 9A to 9G are used. First, a gate electrode, a gate wiring, a capacitor lower electrode, and a capacitor wiring are formed on a substrate (see FIG. 9A). Next, a gate insulating film is formed on the entire surface (see FIG. 9B). Further, a semiconductor layer is formed (see FIG. 9C). After forming the drain electrode, the drain wiring, and the source electrode (see FIG. 9D), the pixel electrode is formed (see FIG. 9E).

  As the insulating substrate 1, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether sulfone (PES), polyimide (PI), polyetherimide (PEI), polystyrene (PS), polyvinyl chloride (PVC), Plastics such as polyethylene (PE), polypropylene (PP), and nylon (Ny) can be used. As the gate electrode 2, the gate wiring 2 ′, the capacitor lower electrode 10, and the capacitor wiring 10 ′, a metal such as Al, Cr, Au, Ag, Ni, Cu, Mo, or a transparent conductive film such as ITO may be used. it can. As a manufacturing method, a method of forming by photolithography + etching after vapor deposition or sputtering film formation is common, but other methods may be used. As the gate insulating film 3, an organic insulating film such as polyvinylphenol, epoxy, or polyimide, or an inorganic insulating film such as SiO2, SiN, SiON, or Al2O3 can be used. As the production method, spin-coating, die-coating, ink-jet or the like can be used in the case of a solvent-soluble organic substance, and sputtering, vapor deposition, laser ablation or the like can be used in other cases. As the drain electrode 5, drain wiring 5 ′, and source electrode 4, the same material and the same method as the gate electrode 2 can be used, and screen printing, flexographic printing, gravure printing, offset printing, reverse printing, and the like are used. Can do. When printing is used, Ag ink, Ni ink, Cu ink, or the like can be used. The pixel electrode 11 needs to be formed thick, and screen printing is preferable. As the semiconductor layer 6, organic semiconductors such as polythiophene derivatives, polyphenylene vinylene derivatives, polythienylene vinylene derivatives, polyallylamine derivatives, polyacetylene derivatives, acene derivatives, oligothiophene derivatives, InGaZnO-based, ZnGaO-based, InZnO-based, InO-based, An oxide semiconductor such as a GaO-based material, a SnO-based material, or a mixture thereof can be used. As the production method, spin-coating, die-coating, ink-jet or the like can be used in the case of a solvent-soluble organic substance, and sputtering, vapor deposition, laser ablation or the like can be used in other cases.

  In particular, when screen printing is used for both the drain electrode 5 and the like and the pixel electrode 11, they can be formed by the same screen printing by appropriately selecting conditions (see FIGS. 5A to 5F). First, the gate electrode 2, the gate wiring 2 ', the capacitor lower electrode 10, and the capacitor wiring 10' are formed on the substrate 1 (see FIG. 5A). Next, the gate insulating film 3 is formed on the entire surface (see FIG. 5B). Further, the drain electrode 5, the drain wiring 5 ', the source electrode 4, and the pixel electrode 11 are formed (see FIG. 5C). Finally, the semiconductor layer 6 is formed (see FIG. 5D).

  Or the process of Fig.10 (a)-(f) may be sufficient. First, the gate electrode 2, the gate wiring 2 ', the capacitor lower electrode 10, and the capacitor wiring 10' are formed on the substrate 1 (see FIG. 10A). Next, the gate insulating film 3 is formed on the entire surface (see FIG. 10B). Further, a semiconductor layer 6 is formed (see FIG. 10C). Finally, the drain electrode 5, the drain wiring 5 ', the source electrode 4, and the pixel electrode 11 are formed (see FIG. 10D).

  It will be described with reference to FIG. 11 that electrodes having different thicknesses can be formed simultaneously by a single screen printing. FIG. 11 is a graph showing the relationship between the line width (horizontal axis) and the printed film thickness (vertical axis). In screen printing, the thickness generally varies with the line width. When the line width is very thin, the line width is thin, and as the line width increases, the line width increases. By utilizing this characteristic, by setting the line width of the drain electrode 5, the drain wiring 5 ′, and the source electrode 4 to, for example, a, and the width of the pixel electrode 11 to, for example, b, the thin drain electrode 5, the drain wiring 5 ′, The source electrode 4 and the thick pixel electrode 11 can be formed simultaneously.

Next, a second embodiment will be described. An example of a thin film transistor device according to the second embodiment of the present invention is shown in FIG. FIG. 2A is a plan layout view showing one pixel region of the thin film transistor array, and FIG. 2B is a side sectional view taken along line BB ′. As can be seen from a comparison with FIG. 1, FIG. 2 shows a portion other than the pixel electrode 11 of FIG.

  Another example is shown in FIG. FIG. 7A is a plan layout showing one pixel region of the thin film transistor array, and FIG. 7B is a side sectional view taken along line E-E ′. As can be seen from a comparison with FIG. 6, FIG. 7 is obtained by filling a portion other than the pixel electrode 11 of FIG. 6 with an insulator 7.

  That is, the feature of this embodiment is that the pixel electrode 11 is thicker than the drain electrode 5, the drain wiring 5 ′, and the source electrode 4, and the portion other than the pixel electrode 11 is filled with the insulator 7.

  For example, in the liquid crystal display of FIG. 13, the pixel electrode 11 drives the liquid crystal, whereas the drain electrode 5, the drain wiring 5 ', and the source wiring 4 are hidden under the thick insulator 7, and the influence is small. Further, in the electrophoretic display of FIG. 16, the adhesive layer 18 / electrophoretic capsule layer 16 / counter electrode 14 / counter substrate 13 are bonded to the TFT device so that the adhesive layer 18 contacts only the pixel electrode 11. .

  In order to use as a back plate of such a display, a TFT array in which a plurality of pixels are connected in a matrix as shown in FIG. 12 is used.

  In addition, as a manufacturing method for realizing the second embodiment, processes as shown in FIGS. 4A to 4G are used. 4A to 4E are the same as those in the first embodiment. As an additional step, the portion other than the pixel electrode 11 is filled with the insulator 7 (see FIG. 4F).

  Alternatively, the steps as shown in FIGS. 9A to 9G are used. 9A to 9E are the same as those in the first embodiment. As an additional step, the portion other than the pixel electrode 11 is filled with the insulator 7 (see FIG. 9F).

  As the insulator 7, polyvinyl phenol, epoxy, polyimide, or the like can be used. As the production method, screen printing is suitable.

  Alternatively, the steps as shown in FIGS. 5A to 5F are used. 5A to 5D are the same as those in the first embodiment. As an additional step, portions other than the pixel electrode 11 are filled with the insulator 7 (see FIG. 5E).

  Alternatively, steps as shown in FIGS. 10A to 10F are used. 10A to 10D are the same as those in the first embodiment. As an additional step, the portion other than the pixel electrode 11 is filled with the insulator 7 (FIG. 10E).

  Next, a third embodiment will be described. An example of a thin film transistor device according to the third embodiment of the present invention is shown in FIG. FIG. 3A is a plan view showing one pixel region of the thin film transistor array, and FIG. 3B shows a cross-sectional view taken along line C-C ′. As can be seen from a comparison with FIG. 2, FIG. 3 shows an insulator 7 and an upper pixel electrode 12 that extends over the pixel electrode 11 in contact with the pixel electrode 11 of FIG. 2.

  Another example is shown in FIG. FIG. 8A is a plan view showing one pixel region of the thin film transistor array, and FIG. 8B shows a cross-sectional view taken along line F-F ′. As can be seen from a comparison with FIG. 7, FIG. 8 shows an insulator 7 and an upper pixel electrode 12 that extends over the pixel electrode 11 in contact with the pixel electrode 11 of FIG. 7.

  That is, the feature of this embodiment is that the pixel electrode 11 is thicker than the drain electrode 5, the drain wiring 5 ′, and the source electrode 4, and the portion other than the pixel electrode 11 is filled with the insulator 7, and further the upper pixel electrode 12 is formed.

  For example, in the liquid crystal display of FIG. 15, since the upper pixel electrode 12 covers the drain electrode 5, the drain wiring 5 ′, and the source wiring 4, the aperture ratio (ratio of the upper pixel electrode 12 in the pixel) is high. While becoming larger, the influence of the drain electrode 5 etc. can be eliminated. In the electrophoretic display of FIG. 18, the adhesive layer 18 / electrophoretic capsule layer 16 / counter electrode 14 / counter substrate 13 are bonded to the TFT device, so that the adhesive layer 18 contacts the upper pixel electrode 12. The aperture ratio is large.

  In order to use as a back plate of such a display, a TFT array in which a plurality of pixels are connected in a matrix as shown in FIG. 12 is used.

  In addition, as a manufacturing method for realizing the third embodiment, processes as shown in FIGS. 4A to 4G are used. 4A to 4F are the same as those in the second embodiment. As an additional step, the upper pixel electrode 12 is formed (see FIG. 4G).

  Alternatively, the steps as shown in FIGS. 9A to 9G are used. 9A to 9F are the same as those in the second embodiment. As an additional step, the upper pixel electrode 12 is formed (see FIG. 9G).

  As the upper pixel electrode 12, a metal such as Al, Cr, Au, Ag, Ni, or Cu, a transparent conductive film such as ITO, or the like can be used. As a manufacturing method, methods such as photolithography and etching after film formation such as vapor deposition and sputtering are possible, but screen printing of Ag ink, Ni ink, Cu ink, or the like is preferable.

  Alternatively, the steps as shown in FIGS. 5A to 5F are used. 5A to 5E are the same as those in the second embodiment. As an additional step, the upper pixel electrode 12 is formed (see FIG. 5F).

  Alternatively, steps as shown in FIGS. 10A to 10F are used. FIGS. 10A to 10E are the same as those in the second embodiment. As an additional step, the upper pixel electrode 12 is formed (see FIG. 10F).

  Examples of the present invention will be described below.

  A first embodiment of the present invention will be described with reference to FIGS. 1 and 4. The element shown in FIG. 1 was produced by the steps of FIGS. First, an Al film having a thickness of 50 nm is formed on the PEN which is the insulating substrate 1, and a gate electrode 2, a gate wiring 2 ′, a capacitor lower electrode 10 and a capacitor wiring 10 ′ are formed by photolithography and wet etching (FIG. 4). (See (a)). Next, a polyvinylphenol solution was spin-coated and baked at 150 ° C. to form 1 μm of polyvinylphenol as a gate insulating film (see FIG. 4B). Further, as the drain electrode 5, the drain wiring 5 ', and the source electrode 4, a pattern having a width of 30 μm and a thickness of 500 nm was formed by reversal printing of Ag ink (see FIG. 4C). Next, as the pixel electrode 11, a pattern having a width of 250 μm and a thickness of 10 μm was formed by screen printing with Ag ink (see FIG. 4D). Further, a semiconductor layer 6 was formed by applying a polythiophene solution with a dispenser and baking at 100 ° C. (see FIG. 4E).

  A second embodiment will be described with reference to FIGS. The element shown in FIG. 2 was produced by the steps of FIGS. 4A to 4E are the same as those in the first embodiment. Here, the insulator 7 was formed by screen printing of the fluororesin solution and baking at 150 ° C. (see FIG. 4F).

  A third embodiment will be described with reference to FIGS. 3 and 4. The element shown in FIG. 3 was produced by the steps of FIGS. 4A to 4F are the same as those in the second embodiment. Here, the upper pixel electrode 12 was formed by screen printing of Ag ink and baking at 150 ° C. (see FIG. 4G).

  A fourth embodiment of the present invention will be described with reference to FIGS. The element shown in FIG. 1 was produced by the steps of FIGS. First, an Al film having a thickness of 50 nm is formed on the PEN as the insulating substrate 1 by vapor deposition, and a gate electrode 2, a gate wiring 2 ′, a capacitor lower electrode 10, and a capacitor wiring 10 ′ are formed by photolithography and wet etching (FIG. 5). (See (a)). Next, a polyvinylphenol solution was spin-coated and baked at 150 ° C. to form 1 μm of polyvinylphenol as a gate insulating film (see FIG. 5B). Further, the drain electrode 5, the drain wiring 5 ', the source electrode 4, and the pixel electrode 11 were simultaneously formed by screen printing of Ag ink. The drain electrode 5, the drain wiring 5 'and the source electrode 4 were 30 μm wide and 5 μm thick, and the pixel electrode 11 was 250 μm wide and 10 μm thick (see FIG. 5C). Next, a semiconductor layer 6 was formed by applying a polythiophene solution with a dispenser and baking at 100 ° C. (see FIG. 5D).

  Another embodiment 5 will be described with reference to FIGS. The device shown in FIG. 2 was produced by the steps of FIGS. 5A to 5D are the same as those in the fourth embodiment. Here, the insulator 7 was formed by screen printing and baking at 150 ° C. for the fluororesin solution (see FIG. 5E).

  Another embodiment 6 will be described with reference to FIGS. 3 and 5. The element shown in FIG. 3 was produced by the steps of FIGS. 5A to 5E are the same as those in the fifth embodiment. Here, the upper pixel electrode 12 was formed by screen printing of Ag ink and baking at 150 ° C. (see FIG. 5F).

  As Example 7, an electrophoretic display was produced using the TFT arrays of Examples 1 to 3 or Examples 4 to 6. The TFT array of Examples 1 to 3 or Examples 4 to 6 and the adhesive layer 18 / electrophoresis capsule layer 16 / counter electrode 14 / counter substrate 13 were overlaid to obtain the electrophoretic display of FIGS. (In FIGS. 16-18, description of the semiconductor layer 6 is abbreviate | omitted.) This electrophoretic display scanned the gate electrode and confirmed changing into white or black according to the voltage polarity which applies a drain electrode.

An eighth embodiment of the present invention will be described with reference to FIGS. The element shown in FIG. 6 was produced by the steps of FIGS. First, an Al film having a thickness of 50 nm is formed on the PEN which is the insulating substrate 1 by vapor deposition, and the gate electrode 2, the gate wiring 2 ′, the capacitor lower electrode 10 and the capacitor wiring 10 ′ are formed by photolithography and wet etching (FIG. 9). (
a)). Next, a SiON film of 500 nm was sputtered as the gate insulating film 3 (see FIG. 9B), and an InGaZnO film of 200 nm was sputtered as the semiconductor layer 6. Then, InGaZnO was patterned by photolithography and wet etching (see FIG. 9C). Next, a pattern having a width of 30 μm and a thickness of 500 nm was formed by screen printing with Ag ink as the drain electrode 5, the drain wiring 5 ′, and the source electrode 4 (see FIG. 9D). Then, a pattern having a width of 250 μm and a thickness of 10 μm was formed by screen printing with Ag ink as the pixel electrode 11 (see FIG. 9E).

  Another embodiment 9 will be described with reference to FIGS. The element shown in FIG. 7 was produced by the steps of FIGS. 9A to 9E are the same as those in the eighth embodiment. Here, the insulator 7 was formed by screen printing the epoxy solution and baking at 150 ° C. (see FIG. 9F).

  Another embodiment 10 will be described with reference to FIGS. The element shown in FIG. 8 was produced by the steps of FIGS. 9A to 9F are the same as those in the ninth embodiment. Here, the upper pixel electrode 12 was formed by screen printing of Ag ink and baking at 150 ° C. (see FIG. 9G).

  Example 11 of the present invention will be described with reference to FIGS. The element shown in FIG. 6 was produced by the steps of FIGS. First, an Al film having a thickness of 50 nm is formed on the PEN that is the insulating substrate 1 by vapor deposition, and the gate electrode 2, the gate wiring 2 ′, the capacitor lower electrode 10, and the capacitor wiring 10 ′ are formed by photolithography and wet etching (FIG. 10). (See (a)). Next, a SiON film of 500 nm was sputtered as the gate insulating film 3 (see FIG. 10B), and an InGaZnO film of 200 nm was sputtered as the semiconductor layer 6. Then, InGaZnO was patterned by photolithography and wet etching (see FIG. 10C). Further, the drain electrode 5, the drain wiring 5 ', the source electrode 4, and the pixel electrode 11 were simultaneously formed by screen printing of Ag ink. The drain electrode 5, the drain wiring 5 ', and the source electrode 4 were 30 μm wide and 5 μm thick, and the pixel electrode 11 was 250 μm wide and 10 μm thick (see FIG. 10D).

  Another embodiment 12 will be described with reference to FIGS. The element shown in FIG. 7 was produced by the steps of FIGS. 10A to 10D are the same as those in Example 11. Here, the insulator 7 was formed by screen printing the epoxy resin solution and baking at 150 ° C. (see FIG. 10E).

  Another embodiment 13 will be described with reference to FIGS. The element shown in FIG. 8 was produced by the steps of FIGS. The steps of FIGS. 10A to 10E are the same as those in Example 12. Here, the upper pixel electrode 12 was formed by screen printing of Ag ink and baking at 150 ° C. (see FIG. 10F).

As Example 14, a liquid crystal display was produced using the TFT array of Examples 8 to 10 or Examples 11 to 13. First, a PET substrate was used as the counter substrate 13 and an ITO film was formed by sputtering as the counter electrode 14. Next, polyimide was applied as an alignment film and rubbed (not shown). Then, after applying a dispenser of a frame-shaped sealing material and spraying spacers, it is bonded to a TFT array similarly processed with an alignment film, and guest host liquid crystal is vacuum-injected as liquid crystal 15 to obtain the liquid crystal display of FIGS. 13 to 15). In FIGS. 13 to 15, the description of the semiconductor layer 6 is omitted. Next, driving was performed to confirm image display. The influence of the voltage of the drain electrode 5 and drain wiring 5 'was hardly seen. That is, in the peripheral part of the drain electrode 5 and the drain wiring 5 ′, the voltage applied to the liquid crystal is deviated by the influence of the voltage of the drain electrode 5 and the drain wiring 5 ′, and the display is different from the pixel electrode 11 part. As a result, the phenomenon that the display image was disturbed was hardly observed.

  Examples 15 to 16 will be described as comparative examples of the present invention.

Example 15 is a sample manufactured up to the semiconductor layer in substantially the same process as Example 11, and the drain electrode 5, the drain wiring 5 ′, the source electrode 4, and the pixel electrode 11 are formed by photolithography, Ag deposition, and lift-off. Was made. The thickness is 50 nm. A liquid crystal display was produced in the same manner as in Example 14. In the drain electrode 5 and drain wiring 5 'portions, a display different from that of the pixel electrode 11 portion was observed. That is, in the portion of the drain electrode 5 and the drain wiring 5 ′, the voltage applied to the liquid crystal is deviated by the influence of the potential of the drain electrode 5 and the drain wiring 5 ′, and the display is different from that of the pixel electrode 11 portion. As a result, the display image was disturbed.

As Example 16, the sample including the gate insulating film was manufactured in substantially the same process as Example 1, and the drain electrode 5, the drain wiring 5 ′, the source electrode 4, and the pixel electrode 11 were formed by vapor deposition of Ag, photolithography, and wet etching. Then, an element in which a semiconductor was dispensed was produced. The drain electrode 5, the drain wiring 5 ′, the source electrode 4, and the pixel electrode 11 have a thickness of 50 nm. An electrophoretic display was made in the same process as in Example 7. Since the adhesive layer was also in contact with the TFT portion, the TFT characteristics deteriorated and normal display could not be obtained. That is, since the thickness of the pixel electrode 11 is not thicker than the thickness of each of the drain electrode, the drain wiring, and the source electrode, the adhesive layer is in contact with the TFT portion, and the TFT characteristics are deteriorated. A bug has occurred.

  In the thin film transistor, it is needless to say that the term “drain” and the term “source” are distinguished for convenience and may be called in reverse.

It is one Example of the thin-film transistor apparatus concerning the 1st Embodiment of this invention, (a) is a top view, (b) is a sectional side view. It is one Example of the thin-film transistor apparatus concerning the 2nd Embodiment of this invention, (a) is a top view, (b) is a sectional side view. It is one Example of the thin-film transistor apparatus concerning the 3rd Embodiment of this invention, (a) is a top view, (b) is a sectional side view. FIG. 4 is a side sectional view showing an embodiment of a manufacturing process of the thin film transistor device of FIGS. FIG. 4 is a side sectional view showing an embodiment of a manufacturing process of the thin film transistor device of FIGS. It is one Example of the thin-film transistor apparatus concerning the 1st Embodiment of this invention, (a) is a top view, (b) is a sectional side view. It is one Example of the thin-film transistor apparatus concerning the 2nd Embodiment of this invention, (a) is a top view, (b) is a sectional side view. It is one Example of the thin-film transistor apparatus concerning the 3rd Embodiment of this invention, (a) is a top view, (b) is a sectional side view. FIG. 9 is a side sectional view showing one embodiment of a manufacturing process of the thin film transistor device of FIGS. FIG. 9 is a side sectional view showing one embodiment of a manufacturing process of the thin film transistor device of FIGS. It is a relational expression of the printing line width of the screen printing used for manufacture of the thin-film transistor device of this invention, and a printing film thickness. It is a top view of the thin-film transistor array using the thin-film transistor apparatus of this invention. It is a sectional side view of the liquid crystal display using the thin-film transistor apparatus of FIG. 1 or FIG. 6 of this invention. FIG. 8 is a side sectional view of a liquid crystal display using the thin film transistor device of FIG. 2 or FIG. 7 of the present invention. FIG. 9 is a side sectional view of a liquid crystal display using the thin film transistor device of FIG. 3 or FIG. 8 of the present invention. FIG. 7 is a side sectional view of an electrophoretic display using the thin film transistor device of FIG. 1 or 6 of the present invention. FIG. 8 is a side sectional view of an electrophoretic display using the thin film transistor device of FIG. 2 or FIG. 7 of the present invention. FIG. 9 is a side sectional view of an electrophoretic display using the thin film transistor device of FIG. 3 or FIG. 8 of the present invention. It is a sectional side view of an example of the conventional liquid crystal display. It is a sectional side view of an example of the conventional liquid crystal display. FIG. 21 is a side sectional view showing a manufacturing process of the conventional liquid crystal display of FIG. 20.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Gate electrode 2 '... Gate wiring 3 ... Gate insulating film 4 ... Source electrode 5 ... Drain electrode 5' ... Drain wiring 6 ... Semiconductor layer 7 ... Insulator (interlayer insulating film)
8 ... Capacitor upper electrode 9 ... Via hole 10 ... Capacitor lower electrode 10 '... Capacitor wiring 11 ... Pixel electrode 12 ... Upper pixel electrode 13 ... Counter substrate 14 ... Counter electrode 15 ... Liquid crystal 16 ... Electrophoretic capsule layer 17 ... Black matrix 18 ... Adhesive layers 50, 60 ... Thin film transistor device 51 ... Thin film transistor 52 ... Capacitor 80 ... Thin film transistor array

Claims (10)

  A gate electrode formed on an insulating substrate, a gate wiring connected to the gate electrode, a capacitor lower electrode, a capacitor wiring connected to the gate electrode, and a drain electrode connected to the gate electrode on the gate insulating film formed thereon A thin film transistor device in which a drain layer, a source electrode, and a pixel electrode connected thereto are disposed, and a semiconductor layer is disposed so as to include at least a gap between the source electrode and the drain electrode. A thin film transistor device, wherein the thickness is larger than the thickness of each of the drain electrode, the drain wiring, and the source electrode.   2. The thin film transistor device according to claim 1, wherein a portion other than the pixel electrode is filled with an insulating material up to a height of a surface of the pixel electrode.   3. The thin film transistor device according to claim 1, further comprising an upper pixel electrode electrically connected to the pixel electrode and extending over the part of the insulator and the pixel electrode.   The thin film transistor device according to claim 1, wherein the semiconductor layer is an organic semiconductor or an oxide semiconductor.   A thin film transistor array in which a plurality of thin film transistor devices according to any one of claims 1 to 4 are arranged in a matrix on an insulating substrate, wherein the plurality of thin film transistor devices of the thin film transistor array includes the gate wiring, the drain A thin film transistor array which is electrically connected by wiring and capacitor wiring.   6. A thin film transistor display using the thin film transistor array according to claim 5 on an insulating substrate, wherein a plurality of thin film transistor devices of the thin film transistor array are electrically connected by the gate wiring, drain wiring and capacitor wiring. A thin film transistor display. Forming a gate electrode made of a conductive film, a gate wiring, a capacitor lower electrode and a capacitor wiring on an insulating substrate; forming a gate insulating film thereon; and then draining the conductive film on the gate insulating film A step of forming an electrode, a drain wiring, a source electrode, and a pixel electrode; a step of forming a semiconductor layer on the gate insulating film so as to be in contact with the source electrode and the drain electrode; and a portion other than the pixel electrode A method of manufacturing a thin film transistor device including a step of forming an upper pixel electrode connected to the pixel electrode and extending on the insulator and the pixel electrode, the method of forming the pixel electrode comprising: Ri printing der, the thickness of the pixel electrode, the drain electrode, the drain wire, and wherein the thicker than the thickness of each of the source electrode Method of manufacturing that a thin film transistor device.   8. The method of manufacturing a thin film transistor device according to claim 7, wherein the drain wiring, the drain electrode, and the source electrode are screen-printed simultaneously with the pixel electrode.   9. The method of manufacturing a thin film transistor device according to claim 7, wherein the method of filling with an insulator is screen printing. 10. The method of manufacturing a thin film transistor device according to claim 7, wherein the step of forming the upper pixel electrode is screen printing.

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