JP5098668B2 - Surface mount type piezoelectric oscillator - Google Patents

Description

  The present invention relates to a surface-mount piezoelectric oscillator in which a piezoelectric diaphragm and an integrated circuit element are mounted on an insulating base, and particularly to improve the package structure of a surface-mount piezoelectric oscillator.

  A piezoelectric oscillator using a piezoelectric vibrator such as a quartz diaphragm can stably obtain a highly accurate oscillation frequency, and is therefore used in various fields as a reference frequency source for electronic devices and the like. In a surface-mounted piezoelectric oscillator, a ceramic multilayer substrate is used as an insulating base, an integrated circuit element for an oscillation circuit is disposed in a housing portion of the base, and a crystal diaphragm is supported and fixed above the integrated circuit element. , And hermetically sealed (for example, see Patent Document 1 below). Such a configuration has a relatively small number of parts due to customization of the integrated circuit element, is a simple configuration, and contributes to cost reduction.

Such an integrated circuit element is connected to a wiring pattern formed on a base using a wire bonding method, or a face-down bonding method (hereinafter referred to as “FCB”) through a metal bump (Au or the like). ) Is electrically connected to a piezoelectric vibrator, a terminal electrode, or the like (see, for example, Patent Document 2 below).
JP 2002-158558 A JP 2004-356687 A

  Currently, electronic devices are being miniaturized, and along with this miniaturization, the surface-mount piezoelectric oscillator as described above is also being miniaturized. Therefore, for example, in the surface mount piezoelectric oscillator as shown in Patent Document 1 described above, it is necessary to shorten the interval between the formation positions of the wiring patterns on the base for joining the integrated circuit element to the base.

  By the way, if dust, a solvent, an oxide thin film, or the like adheres to the surface of the base wiring pattern, the bonding force of the wire bonding to the wiring pattern or the metal bump is reduced. For this reason, at present, a method of cleaning the surface of the wiring pattern is employed before bonding the integrated circuit element and the wiring pattern. As a method for cleaning this wiring pattern, in recent years, a cleaning method using dry etching, such as plasma etching, which is free from secondary contamination due to a subsequent process (alkali removal) after cleaning has been generalized. In the method using plasma etching here, accelerated argon ions, oxygen ions, etc. are physically collided with the surface of the wiring pattern to scrape the metal surface of the wiring pattern, and the wiring without dust, solvent or oxide thin film attached. The surface of the wiring pattern is cleaned by exposing the metal surface of the pattern.

  However, when the above-described wiring pattern on the base is cleaned by plasma etching, electrode scraps are scattered, and the scattered electrode scraps are reattached to a surface having an angle with respect to the bottom surface of the base, such as a wall surface of the base. This electrode scrap reattachment does not reattach to the facing surface (for example, the bottom surface of the base) facing the irradiation source of argon ions and oxygen ions, but has an angle with respect to the facing surface facing the irradiation source. On the exposed surface (for example, a surface-based wall surface orthogonal to the irradiation source) or the like, ions irradiated from the irradiation source do not collide or are unlikely to collide, so that electrode scraps scattered and reattached remain.

  For this reason, when the interval between the wiring pattern formation positions on the base to which the integrated circuit elements are joined is reduced along with the miniaturization of the surface mount type piezoelectric oscillator, the electrode scraps reattached to the surface having an angle with respect to the bottom surface of the base. The wiring patterns that are formed closer to each other and are not connected to each other are connected to each other. As a result, there is a possibility that a short circuit occurs between the wiring patterns that are formed close to each other and are not connected to each other.

  In order to avoid a short circuit between the adjacent wiring patterns described above, for example, in the surface mount piezoelectric oscillator described in Patent Document 1 described above, a region where the base is reattached is masked so that electrode scraps do not reattach. Although it was covered with a member, the area where the base is reattached becomes smaller due to the downsizing and low profile of the surface-mounted piezoelectric oscillator, and it is difficult to cover only the area where the base reattaches with the mask member. In particular, in the invention described in Patent Document 1 described above, the integrated circuit element is arranged below the inside of the package, and the crystal diaphragm is held above the vicinity of the integrated circuit element. It was.

  Therefore, in order to solve the above-mentioned problem, the present invention is less likely to be short-circuited between wiring patterns that are formed close to the bottom surface of the base and are not connected to each other while corresponding to downsizing and low profile. An object is to provide a highly reliable surface-mount piezoelectric oscillator.

In order to achieve the above object, as described in claim 1 of the present invention, a surface having a piezoelectric diaphragm and an integrated circuit element, having an insulating base for housing them and a lid for hermetically sealing A mounting type piezoelectric oscillator, wherein the base has a side wall portion and a storage portion on the upper surface side, and a terminal electrode on the bottom surface side, and an insulating holding base having a top surface portion and a side surface portion on the bottom surface of the storage portion. And a first wiring pattern to be connected to the integrated circuit element, a second wiring pattern to be connected to the piezoelectric diaphragm is formed on the upper surface portion of the holding base, and the second wiring pattern A wiring pattern is connected to a part of the first wiring pattern, and the other end of the piezoelectric diaphragm opposing the one end of the piezoelectric diaphragm is provided with a gap from the bottom surface of the housing portion of the base. Join the base holder and cantilever The integrated circuit element is arranged below the piezoelectric diaphragm, and the first wiring pattern extending toward the holding base side includes at least two first wirings connected to the second wiring pattern. includes wiring patterns, said the end region of the holder of the upper surface portion of the first wiring pattern which is not connected to the second wiring pattern intersect electrodeless portion where the second wiring pattern is not formed A second wiring pattern that is connected to the first wiring pattern and forms the same electrode in the other end region of the upper surface portion of the holding table that intersects with the side surface portion of the holding table on the integrated circuit element mounting side Is formed up to the end region of the upper surface portion of the holding table where the first wiring pattern intersects.

  With the above configuration, the second wiring pattern in the end region of the upper surface portion of the holding table where the first wiring pattern that is not connected to at least the second wiring pattern intersects is isolated from the side surface portion of the holding table. Since it is formed in a state, the second wiring pattern and the first wiring pattern which are not connected to each other are blocked by the base portion of the upper surface portion of the insulating holding base, and are arranged close to each other only on the side surface portion of the holding base. It will not be done. In addition, since the second wiring pattern is formed up to the end region in the other end region of the upper surface portion of the holding table that intersects the side surface portion of the holding table on the integrated circuit element mounting side, the second wiring pattern is The mounting area of the second wiring pattern is not reduced as a whole by enlarging the housing portion of the base on which the integrated circuit element is mounted.

  For this reason, the first wiring pattern formed on the bottom surface of the storage portion and the second wiring pattern formed on the upper surface portion of the holding base and not connected to each other are formed on the side surface portion of the holding base. It is possible to avoid the connection, and it is possible to prevent a short circuit due to the connection between the first wiring pattern and the second wiring pattern that are not connected to each other. Since the short circuit between the side portions of the holding table can be prevented, the holding table can be reduced in height.

  In particular, the present invention is a preferable configuration when the wiring pattern on the base is cleaned by plasma etching. That is, when plasma etching is used, electrode scraps are scattered, and the scattered electrode scraps are reattached to a surface having an angle with respect to the bottom surface of the base, such as a side surface portion of the base holder. According to this, the second wiring pattern and the first wiring pattern that are not connected to each other are blocked by the base portion of the upper surface portion of the insulating holding base and are disposed close to each other only on the side surface portion of the holding base. Therefore, it is possible to avoid connection on the side surface of the holding table. In addition, this invention is preferable not only in the above-mentioned plasma etching but in solving the same malfunction in the dry etching method in general.

  In addition, since a short circuit between adjacent electrode pads is not avoided using a mask member as in the conventional example described above, the present invention is suitable for a miniaturized surface-mount type piezoelectric oscillator. In particular, the first wiring pattern formed on the bottom surface of the housing portion of the base is not limited to the design of the second wiring pattern that is not connected, and the degree of design freedom increases. As a result, it is possible to cope with an increase in wiring patterns in the surface-mounted piezoelectric oscillator caused by the multi-function (addition of functions) of a device on which the surface-mounted piezoelectric oscillator is mounted.

  Furthermore, the mounting area of the second wiring pattern is not reduced as a whole by enlarging the second wiring pattern toward the housing portion of the base on which the integrated circuit element is mounted. Thus, the electrical connection with the wiring pattern is not lowered, and the mechanical bonding strength between the piezoelectric diaphragm and the holding base is not lowered. In addition, it is possible to support mounting of various piezoelectric diaphragms that are formed in a large or small size with respect to the mounting direction of the integrated circuit element from the holding base of the base storage unit. It becomes possible to respond.

  In addition, while providing one end of the piezoelectric diaphragm from the bottom surface of the storage section of the base, the other end facing the piezoelectric diaphragm is joined to the holding base of the base and cantilevered, An integrated circuit element is disposed under the piezoelectric diaphragm, and the first wiring pattern extending toward the holding base side includes at least two first wiring patterns connected to the second wiring pattern. As a result, it is not necessary to form the second wiring pattern in a state of being isolated from the side surface portion of the holding base with respect to the first wiring patterns connected to each other. The area of the second wiring pattern can be further increased. In other words, the electrical connection between the piezoelectric diaphragm and the second wiring pattern is further improved while accommodating the downsizing of the surface mount type piezoelectric oscillator, and the mechanical joint strength between the piezoelectric diaphragm and the holding base is improved. Can be further improved.

  In addition, since the first wiring pattern connected to the second wiring pattern is not limited to the design of the second wiring pattern, the degree of freedom of design is increased and the first wiring pattern of the first wiring pattern toward the holding base is increased. It can cope with the increase. In other words, the arrangement density of the first wiring pattern on the bottom surface of the base storage portion also contributes to improvement, and it is possible to cope with downsizing and multi-functionality (addition of functions) of the surface-mounted piezoelectric oscillator. .

  Further, the piezoelectric diaphragm is cantilever-mounted from the holding unit of the base storage unit in the mounting direction of the integrated circuit element, and the integrated circuit element is arranged under the piezoelectric vibration plate, so that the integration within the base storage unit is performed. The circuit element and piezoelectric diaphragm can be mounted at higher density, and not only can the size of the surface-mounted piezoelectric oscillator be reduced, but also a larger piezoelectric diaphragm closer to the area of the base housing can be installed. Can do. In particular, it is possible to increase the excitation region, improve the series resonance resistance, and widen the frequency variable amount by surface-mounting by forming the excitation electrode larger than the larger piezoelectric diaphragm. While realizing a miniaturization of the type piezoelectric oscillator, it is possible to obtain a more excellent electrical characteristic.

  Further, in addition to the above-described configuration, a first wiring pattern connected to the terminal electrode among the first wiring patterns in which terminal electrodes are formed in at least four corners of the base and extend toward the holding base side. Alternatively, the first wiring pattern connected to the second wiring pattern may be arranged from the center of the base. In this case, in addition to the above-described effects, the first wiring pattern can be extended to the second wiring pattern and the terminal electrode with the shortest dimension, and the design of each wiring pattern on the base is simple. Since the distance between each wiring pattern is unnecessarily extended, it may complicate the adjustment of electrical characteristics associated with capacitance formation, and may prevent the surface-mount piezoelectric oscillator from being downsized. It will disappear even more.

  As described above, according to the present invention, there is no short circuit between unconnected wiring patterns formed close to the bottom surface of the base while corresponding to downsizing and low profile. Therefore, it is possible to provide a more reliable surface-mount piezoelectric oscillator that does not reduce the overall electromechanical connection region.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. An embodiment according to the present invention will be described with reference to the drawings by taking a surface-mounted crystal oscillator as an example. 1 is a plan view of a base before mounting a piezoelectric diaphragm showing an embodiment of the present invention, FIG. 2 is a bottom view of FIG. 1, and FIG. 3 is a cross-sectional view taken along line AA of FIG. 4 is a cross-sectional view taken along line BB in FIG. 1, and FIG. 5 is a plan view after the piezoelectric diaphragm of FIG. 1 is mounted. FIG. 6 is a schematic process diagram showing a cleaning process among the manufacturing processes of the surface-mount crystal oscillator according to the embodiment of the present invention. FIG. 7 is a process for manufacturing the surface-mount crystal oscillator according to the embodiment of the present invention. FIG. 8 is a schematic process diagram showing the bonding process of the piezoelectric diaphragm in the manufacturing process of the surface-mounted crystal oscillator according to the embodiment of the present invention. FIG.

  The surface-mount type crystal oscillator is housed in a ceramic base 1 (insulating base) having a recess with an upper opening, an integrated circuit element 2 housed in the ceramic base, and the upper part in the ceramic base. And a lid (not shown) joined to the opening of the ceramic base.

  The ceramic base 1 is a rectangular parallelepiped as a whole, and has a configuration in which a ceramic such as alumina and a conductive material such as tungsten or molybdenum are appropriately laminated, and has a concave storage portion 10 when viewed in cross section. The storage unit 10 includes a first storage unit 10a (lower storage unit) and a second storage unit 10b (upper storage unit), in which the integrated circuit element 2 and the piezoelectric diaphragm 3 are stored. A bank part (side wall part) 11 is formed around the storage part, the upper surface of the bank part 11 is flat, and a circumferential metal layer 11a (a sealing member) is formed on the bank part. . The upper surface of the metal layer 11a is also formed to be flat, and the metal layer is composed of tungsten, molybdenum, nickel, and gold in this order. Tungsten or molybdenum is integrally formed during ceramic firing by metallization technology using thick film printing technology, and each layer of nickel and gold is formed by plating technology.

  A plurality of castellations extending in the vertical direction are formed on the end portion on the ceramic base side. The castellation has a configuration in which arc-shaped cutouts are formed in the vertical direction. The metal layer 11a is electrically led out to a part of the terminal electrode formed on the bottom surface side of the ceramic base by a conductive via or castellation (not shown) that vertically connects the corner portions of the ceramic base. ing. By connecting the terminal electrode to the ground, a metal lid, which will be described later, is grounded through the metal layer 11a, a conductive via, a castellation, and the like, and the electromagnetic shielding effect of the surface mount type piezoelectric oscillator can be obtained. As described above, the conductive via can be formed by a known ceramic lamination technique.

  Inside the ceramic base 1, the lower surface protrudes upward from the bottom surface of the first storage portion 10 a for storing the integrated circuit element 2 on the lower surface as described above, and holds the end portion of the piezoelectric diaphragm described later. A holding base 10c and a pillow part 10d facing the holding base via the first storage part are formed. Above the first storage part 10a, a second storage part 10b is provided. Is formed.

  A plurality of, for example, six first wiring patterns 12a, 12b, 12c, 12d, 12e, and 12f connected to an integrated circuit element 2 to be described later are formed on the bottom surface of the first storage portion 10a. On the upper surface 101c of the holding base 10c, second wiring patterns 13a and 13b connected to a piezoelectric diaphragm 3 to be described later are formed. Among these, the second wiring pattern 13a is connected to the first wiring pattern 12b by the conductive via V formed on the holding table 10c, and the second wiring pattern 13b is connected to the conductive via V formed on the holding table 10c. To be connected to the first wiring pattern 12c.

  The second wiring patterns 13a and 13b are provided in the end region of the upper surface portion of the holding table where the first wiring pattern intersects the side surface portion 102c on the side where the later-described integrated circuit element 2 is mounted in the holding table 10c. Other non-electrode portions 131a, 132a, 131b, 132b on which the second wiring pattern is not formed are formed, and other upper surface portions of the holding table crossing the side surface portion 102c on the side where the integrated circuit element 2 of the holding table 10c is mounted. The second wiring pattern is enlarged and formed in the end region. In the second wiring patterns 13a and 13b of the present embodiment, electrodeless portions are formed for all of the intersecting first wiring patterns 12a, 12b, 12c, and 12d. The electrodeless portion may be formed only for the first wiring patterns 12a and 12d that are not connected to the wiring patterns 13a and 13b. In this case, the electrode area of the second wiring pattern is not reduced.

  The first wiring patterns 12a, 12d, 12e, and 12f are configured to be drawn out through castellation and finally led to the terminal electrodes 14a, 14b, 14c, and 14d. The ceramic base having such a structure is formed using a known ceramic lamination technique or metallization technique, and each wiring pattern is formed with a nickel plating layer on the upper surface of the metallization layer made of tungsten, molybdenum, or the like, similar to the formation of the metal layer 11a. In this configuration, each gold plating layer is formed.

  The integrated circuit element 2 mounted in the lower housing part is a one-chip integrated circuit element that constitutes an oscillation circuit together with the piezoelectric diaphragm 3, and a plurality of connection terminals (not shown) are formed on one surface thereof. The integrated circuit element 2 has a plurality of connection terminals of the integrated circuit element and a plurality of first wiring patterns 12a, 12b, 12c, 12d, and 12e formed on the ceramic base via metal bumps C such as gold. , 12f are connected by, for example, FCB.

  A piezoelectric diaphragm 3 is mounted above the integrated circuit element 2 with a predetermined interval. The piezoelectric diaphragm 3 is, for example, a rectangular AT-cut quartz diaphragm, a pair of rectangular excitation electrodes 31 and 32 facing the front and back surfaces thereof, and a first electrode formed on the ceramic base holding table. Connection electrodes 33 and 34 for electrical connection with the second wiring patterns 13a and 13b and lead electrodes 35 and 36 for electrical connection of the excitation electrode to the connection electrode are formed.

  These electrodes include, for example, a laminated thin film composed of a chromium base electrode layer, a silver or gold intermediate electrode layer, and a chromium upper electrode layer, a chromium base electrode layer, and a silver or gold intermediate layer. It is a laminated thin film composed of an electrode layer and a nickel upper electrode layer, or a laminated thin film composed of a chromium base electrode layer and a silver or gold upper electrode layer. Each of these electrodes can be formed by a thin film forming means such as a vacuum deposition method or a sputtering method. Note that an aluminum upper electrode layer may be formed instead of chromium or nickel, or a silver upper electrode layer may be formed when the intermediate layer is gold.

  For joining the piezoelectric diaphragm 3 and the ceramic base 1, for example, a silicone-based conductive resin adhesive S that is in a paste form and contains metal fine pieces such as a silver filler is used. As shown in FIG. 5, the conductive resin adhesive S is applied to the upper surfaces of the second wiring patterns 13a and 13b, and the conductive resin adhesive S is applied to the piezoelectric diaphragm 3 and the holding base. By interposing them between 10c and hardening them, they are joined together electromechanically. As described above, the piezoelectric diaphragm 3 is opposed to the other end of the piezoelectric diaphragm 3 while providing a gap from the bottom surface of the first storage section 10a of the ceramic base 1 at one end of the piezoelectric diaphragm 3 (on the side of the pillow portion 10d serving as a free end). The part is joined to the holding table 10c of the base and cantilevered.

  The lid (not shown) for hermetically sealing the ceramic base 1 has a structure in which a metal brazing material (sealing material) is formed on a core material made of, for example, Kovar. More specifically, for example, a nickel layer is formed from the upper surface. , A Kovar core material, a copper layer, and a silver brazing layer in that order. The silver brazing layer is joined to a ceramic-based metal layer. The external shape of the metal lid in plan view is substantially the same as or slightly smaller than that of the ceramic base.

  The ceramic base 1 in which the integrated circuit element 2 and the piezoelectric diaphragm 3 are housed in the housing portion 10 is covered with the metal lid, and the metal lid sealing material and the ceramic base sealing member are melt-cured. Then, by performing hermetic sealing, the surface-mounted piezoelectric oscillator is completed. In this embodiment, airtight sealing is performed by seam welding without using a metal ring for sealing, and the seam roller runs along the ridges of the long side and the short side of the metal lid. The silver brazing (sealing material) formed on the metal lid and the metal layer 11a (sealing member) of the ceramic base 1 are welded to perform hermetic sealing.

  Next, the manufacturing process of the surface mount crystal oscillator described above will be described with reference to FIGS.

  On the 1st layer lamination part 1a which comprises the bottom of ceramic base 1, the 2nd lamination part 1b for shape | molding the holding stand 10c and the pillow part 10d is laminated | stacked, and also the cap 5 on the 2nd lamination | stacking part 1b. The third laminated portion 1c including the joining region is laminated, and the first, second, and third laminated portions 1a, 1b, and 1c are integrally fired in a concave shape so that the upper portion shown in FIG. The body ceramic base 1 is molded.

  The ceramic base 1 formed into a box-like body as described above is dry-etched by plasma etching to form the first wiring patterns 12a, 12b, 12c, 12d, 12e, 12f and the second wiring patterns 13a, 13b. Remove and clean the adhering dust, solvent and oxide thin film (cleaning process). Specifically, in this cleaning process, accelerated argon ions are physically collided against the surface of each wiring pattern (only a part is shown) from the opening of the ceramic base 1 as shown in FIG. The surface of the electrode is shaved to expose the metal surface of the uncontaminated electrode and clean the wiring patterns. By this cleaning, the electrode surface of each wiring pattern, which is a metal, is scraped to activate the electrode surface of each wiring pattern, whereas the ceramic base 1 itself is hardly scraped. Note that dry etching such as plasma etching as in the present embodiment is preferable in order to increase the bonding strength between each wiring pattern of the ceramic base 1 and the connection terminals of the integrated circuit element 2 and the piezoelectric diaphragm 3. Further, in the cleaning step, even if the electrode scrap K is scattered and adhered to the side end portion 102c of the holding base 10c as shown in FIG. It can be avoided that the second wiring pattern that is not connected is connected on the side surface of the holding base. As a result, it is possible to prevent a short circuit due to the connection between the first wiring pattern and the second wiring pattern that are not connected to each other.

  As described above, after cleaning the electrode surfaces of the first wiring patterns 12a, 12b, 12c, 12d, 12e, and 12f in the cleaning process, the integrated circuit element 2 is bonded to the ceramic base 1 (bonding process of the integrated circuit element 2). ). Prior to the bonding step of the integrated circuit element 2, metal bumps C are bonded to the connection terminals on the back side of the integrated circuit element 2 (only a part of the connection terminals and metal bumps are shown). Then, the metal bumps C bonded to the integrated circuit element 2 are arranged so as to correspond to the first wiring patterns 12a, 12b, 12c, 12d, 12e, and 12f (only a part is shown) formed on the bottom surface of the ceramic base 1. As shown in FIG. 7, the metal bump C is bonded to the first wiring patterns 12a, 12b, 12c, 12d, 12e, and 12f (only a part is shown) by the FCB method, and the integrated circuit element 2 is bonded to the ceramic base 1. To join. In the FCB method or the like here, the first wiring patterns 12a, 12b, 12c, 12d, 12e, and 12f (partly) of the ceramic base 1 are loaded while the integrated circuit element 2 is loaded on the ceramic base 1 side by a bonding tool. The integrated circuit element 2 is bonded to the ceramic base 1 by applying an ultrasonic wave to the surface of the metal bump C. Moreover, the ceramic base 1 itself may be heated somewhat.

  Then, after the bonding process of the integrated circuit element 2, the piezoelectric diaphragm 3 is bonded to the upper surface portion 101c of the holding base 10c of the ceramic base 1 (bonding process of the piezoelectric diaphragm 3). The bonding process between the piezoelectric diaphragm 3 and the ceramic base 1 uses, for example, a silicone-based conductive resin adhesive S that is in the form of a paste and contains fine metal pieces such as silver filler. As shown in FIG. 8, the conductive resin adhesive S is applied to the upper surfaces of the second wiring patterns 13a and 13b (only part of which are shown), and the conductive resin adhesive S is applied to the piezoelectric vibration. By interposing and curing between the plate 3 and the holding table 10c, the two are electrically and mechanically joined.

  As described above, after the integrated circuit element 2 and the piezoelectric diaphragm 3 are joined on the ceramic base 1, a metal lid is placed on the third laminated portion 1 c of the ceramic base 1 so as to close the opening of the ceramic base 1. Arrange. The surface mount type piezoelectric oscillator is completed by melt-curing the metal lid sealing material and the ceramic-based metal layer 11a sealing member and performing hermetic sealing.

  In this embodiment, etching by plasma etching using argon ions is performed in the cleaning process. However, this is a preferred example, and the present invention is not limited to this. Plasma etching using oxygen ions is used. There may be. In this embodiment, plasma etching is used in the cleaning process. However, this is a preferable example, and another dry etching process may be used.

  According to the embodiment of the present invention, the side surface portion 102c on the side where the integrated circuit element 2 of the holding base 10c is mounted and other side surface portions are not connected to the second wiring patterns 13a and 13b at least. The second wiring patterns 13a and 13b in the end region of the upper surface portion 101c of the holding base where the first wiring patterns 12a, 12b, 12c and 12d intersect with each other include the first wiring patterns 12a and 12d. , 131b and 132b are formed in a state of being isolated from the side surface portion 102c of the holding base and other side surface portions. In the other end region of the upper surface portion 101c of the holding table that intersects the side surface portion 102c on the side where the integrated circuit element 2 of the holding table is mounted, the second wiring patterns 13a and 13b are formed up to the end region. That is, the second wiring patterns 13a and 13b and the first wiring patterns 12a and 12d that are not connected to each other and the second wiring patterns 13a and 13b and the first wiring patterns 12b and 12c are kept insulative. It is obstructed by the base portion of the upper surface portion 101c of the table, and is not disposed close to the side surface portion 102c of the holding table or other side surfaces. Further, the mounting area of the second wiring pattern is not reduced as a whole by expanding the second wiring patterns 13a and 13b toward the base accommodating portion 10 on which the integrated circuit element 2 is mounted.

  Therefore, the first wiring patterns 12a, 12b, 12c, and 12d formed on the bottom surface of the storage portion and the second wiring pattern formed on the upper surface portion 101c of the holding table in the vicinity thereof are side portions of the holding table. It is possible to avoid the connection at the upper surface of 102c and other side surfaces, and it is possible to prevent a short circuit due to the connection between the first wiring pattern and the second wiring pattern which are not connected to each other. Since a short circuit between the side portions of the holding table can be prevented, a reduction in the height of the holding table 10c can be realized.

  In particular, the embodiment of the present invention shows an example in which each wiring pattern on the base is cleaned by plasma etching, which is a preferable configuration for this cleaning. That is, when plasma etching is used, electrode scraps are scattered and the scattered electrode scraps K are reattached to a surface having an angle with respect to the bottom surface of the base, such as the side surface portion 102c of the base holder. According to the invention, the second wiring pattern and the first wiring pattern which are not connected to each other are blocked by the base portion of the upper surface portion of the insulating holding base and are disposed close to each other only on the side surface portion of the holding base. Therefore, it is possible to avoid connection on the side surface of the holding table. In addition, this invention is preferable not only in the above-mentioned plasma etching but in solving the same malfunction in the dry etching method in general.

  Further, the embodiment of the present invention is suitable for a miniaturized surface-mount piezoelectric oscillator. In particular, the first wiring pattern formed on the bottom surface of the base storage unit 10 is not limited to the design of the second wiring pattern that is not connected to each other, and the degree of freedom in design is increased. As a result, it is possible to cope with an increase in wiring patterns in the surface-mounted piezoelectric oscillator caused by the multi-function (addition of functions) of a device on which the surface-mounted piezoelectric oscillator is mounted.

  Furthermore, the mounting area of the second wiring pattern is not reduced as a whole by enlarging the second wiring patterns 13a and 13b toward the housing 10 of the base on which the integrated circuit element 2 is mounted. The electrical connectivity between the diaphragm 3 and the second wiring patterns 13a and 13b is not lowered, and the mechanical joint strength between the piezoelectric diaphragm 3 and the holding base 10c is not lowered. In addition, it is possible to cope with mounting of various piezoelectric diaphragms 3 that are formed in a large or small size with respect to the mounting direction of the integrated circuit element 2 from the holding base 10c of the base storage unit. It is possible to cope with mounting displacement.

  Further, the piezoelectric diaphragm 3 is cantilevered from the holding base 10c of the base storage portion in the mounting direction of the integrated circuit element 2, and the integrated circuit element 2 is disposed under the piezoelectric diaphragm 3, thereby The integrated circuit element 2 and the piezoelectric diaphragm 3 can be mounted at a higher density inside the storage unit 10, and not only can the size of the surface mount piezoelectric oscillator be reduced, but also the area of the base storage unit 10 can be reduced. A larger piezoelectric diaphragm 3 in close proximity can be mounted. In particular, by forming the excitation electrodes 31 and 32 larger than the piezoelectric diaphragm 3 formed larger in this way, the excitation region can be widened, the series resonance resistance can be improved, and the frequency variable amount can be widened. Therefore, it is possible to obtain a surface mount type piezoelectric oscillator having a more excellent electrical characteristic while realizing a reduction in size.

  In the embodiment of the present invention, terminal electrodes 14a, 14b, 14c, and 14d are formed on at least four corners of the base 1, and the terminal is included in the first wiring pattern that extends toward the holding base 10c. The first wiring patterns 12b and 12c connected to the second wiring patterns 13a and 13b are arranged from the center of the base 1 with respect to the first wiring patterns 12a and 12d connected to the electrodes 14a and 14b. Yes. Therefore, not only the first wiring patterns 12b and 12c extend to the second wiring patterns 13a and 13b with the shortest dimension, but also the first wiring patterns 12a, 12d, 12e and 12f have the shortest dimension. The terminal electrodes 14a, 14b, 14c, and 14d can be extended so that the design of each wiring pattern on the base can be simplified. As a result, the distance between each wiring pattern is unnecessarily extended, making it difficult to adjust the electrical characteristics associated with capacitance formation, and preventing the surface-mount piezoelectric oscillator from becoming more compact Has been.

  A modification of the above-described embodiment will be described with reference to FIGS. 9 and 10 are diagrams showing modifications of the embodiment of the present invention. Since the basic configuration is the same as that of the above-described embodiment, the same reference numerals are used for the same components, and only differences will be described. One end of the piezoelectric diaphragm 3 is cantilevered by joining the other end facing the piezoelectric diaphragm to the holding base 10c of the base while providing a gap from the bottom surface of the storage section 10 of the base. . The integrated circuit element 2 is disposed under both ends of the piezoelectric diaphragm, and the second wiring pattern 13c is provided in the first wiring patterns 12a, 12b, 12c, and 12d extending toward the holding base. , 13d includes at least two first wiring patterns 12b, 12c, so that the second wiring pattern is isolated from the side surface portion of the holding base with respect to the first wiring pattern serving as the same electrode. The end region is formed without forming in this state.

  Therefore, the area of the second wiring patterns 13c and 13d can be increased compared with the above embodiment, and the piezoelectric diaphragm 3 and the second wiring pattern 13a can be made compatible with the miniaturization of the surface mount type piezoelectric oscillator. , 13b and the mechanical bonding strength between the piezoelectric diaphragm 3 and the holding base 10c can be further improved.

  Further, the first wiring patterns 12b and 12c connected to the second wiring patterns 13c and 13d are not limited to the design of the second wiring pattern, so that the degree of freedom in design is increased and the holding base 10c is attached. It is also possible to cope with an increase in the first wiring pattern heading. In other words, the arrangement density of the first wiring pattern on the bottom surface of the base storage unit 10 also contributes to improvement, and it is possible to cope with downsizing and multi-functionality (addition of functions) of the surface-mounted piezoelectric oscillator. Become.

  Further, the piezoelectric diaphragm 3 is cantilevered from the holding base 10c of the base storage portion in the mounting direction of the integrated circuit element 2, and the integrated circuit element 2 is disposed under the piezoelectric diaphragm 3, thereby The integrated circuit element 2 and the piezoelectric diaphragm 3 can be mounted at a higher density inside the storage unit 10, and not only can the size of the surface mount piezoelectric oscillator be reduced, but also the area of the base storage unit 10 can be reduced. A larger piezoelectric diaphragm 3 in close proximity can be mounted. In particular, by forming the excitation electrodes 31 and 32 larger than the piezoelectric diaphragm 3 formed larger in this way, the excitation region can be widened, the series resonance resistance can be improved, and the frequency variable amount can be widened. Therefore, it is possible to obtain a surface mount type piezoelectric oscillator having a more excellent electrical characteristic while realizing a reduction in size.

In the above-described embodiment, the AT-cut quartz crystal diaphragm is used as the piezoelectric diaphragm, but the present invention is not limited to this, and a tuning fork type quartz diaphragm may be used. Further, although quartz is used as the piezoelectric diaphragm, the present invention is not limited to this, and a piezoelectric single crystal material such as piezoelectric ceramics or LiNbO ₃ may be used. That is, any piezoelectric diaphragm can be applied. Moreover, although the piezoelectric diaphragm is cantilevered as an example, a configuration in which both ends of the piezoelectric diaphragm are held may be employed.

  In this embodiment, the piezoelectric diaphragm 3 and the integrated circuit element 2 are used. However, the present invention is not limited to this, and the number of the piezoelectric diaphragm 3 can be arbitrarily set. In addition to 2, other circuit components may be mounted. That is, the setting of the member mounted on the base can be changed according to the application. The electrical connection between the integrated circuit element and the ceramic base is not limited to the flip chip bonding method, and a wire bonding method or the like may be employed.

  Further, in the present embodiment, the above-described sealing process using seam sealing is used, but the present invention is not limited to this, and may be seam sealed via a Kovar ring, and is limited to seam sealing. Instead, it may be beam sealing (for example, laser beam, electron beam), glass sealing, brazing material sealing, or the like.

  It should be noted that the present invention can be implemented in various other forms without departing from the spirit or main features thereof. For this reason, the above-described embodiment is merely an example in all respects and should not be interpreted in a limited manner. The scope of the present invention is indicated by the claims, and is not restricted by the text of the specification. Further, all modifications and changes belonging to the equivalent scope of the claims are within the scope of the present invention.

The top view before mounting the piezoelectric diaphragm which shows embodiment of this invention. The bottom view of FIG. Sectional drawing along the AA line of FIG. Sectional drawing along the BB line of FIG. The top view after mounting the piezoelectric diaphragm of FIG. The schematic process figure which showed the washing | cleaning process among the manufacturing processes of the surface mount-type crystal oscillator concerning embodiment of this invention. FIG. 4 is a schematic process diagram showing a bonding process of integrated circuit elements in the manufacturing process of the surface-mounted crystal oscillator according to the embodiment of the present invention. The schematic process drawing which showed the joining process of a piezoelectric diaphragm among the manufacturing processes of the surface mount-type crystal oscillator concerning embodiment of this invention. The top view before mounting the piezoelectric diaphragm which shows the modification of embodiment of this invention. The top view after mounting the piezoelectric diaphragm of FIG.

DESCRIPTION OF SYMBOLS 1 Ceramic base 2 Integrated circuit element 3 Piezoelectric diaphragm S Conductive joining material C Metal bump V Conductive via

Claims (1)

A surface-mount type piezoelectric oscillator having a piezoelectric diaphragm and an integrated circuit element, having an insulating base for storing them and a lid for hermetically sealing,
The base has a side wall portion and a storage portion on the upper surface side, and a terminal electrode on the bottom surface side,
An insulating holding base having an upper surface portion and a side surface portion and a first wiring pattern connected to the integrated circuit element are formed on the bottom surface of the storage portion,
A second wiring pattern connected to the piezoelectric diaphragm is formed on the upper surface portion of the holding base, and the second wiring pattern is connected to a part of the first wiring pattern,
Piezoelectric vibration is formed by joining one end of the piezoelectric diaphragm to the base holding base and cantilevering the other end facing the piezoelectric diaphragm while providing a gap from the bottom surface of the base storage section. An integrated circuit element is disposed under the plate, and the first wiring pattern extending toward the holding base includes at least two first wiring patterns connected to the second wiring pattern. And
Forming an electrodeless portion in which the second wiring pattern is not formed in an end region of the upper surface portion of the holding table where the first wiring pattern not connected to the second wiring pattern intersects;
Of the other end region of the upper surface portion of the holding table that intersects the side surface portion of the holding table on the integrated circuit element mounting side, the second wiring pattern that is connected to the first wiring pattern and becomes the same electrode is A surface-mount piezoelectric oscillator, wherein the first wiring pattern is formed up to an end region of an upper surface portion of a holding table where the first wiring patterns intersect.

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