JP2006054321A - Package for electronic component and piezoelectric oscillator employing the package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component having stabilized characteristics by suppressing a stray capacitance resulting from a package for the electronic component, and to provide a piezoelectric oscillator thereof. <P>SOLUTION: A surface mounting crystal oscillator comprises a ceramic package 1 having a recess opening upward, an AT cut crystal vibrator, i.e. a piezoelectric vibrator 2, being contained in the package, an integrated circuit element 4 also contained in the package, and a lid 3 being bonded to the opening of the package. Each of electrode pads 12, 13 is connected electrically with the integrated circuit element 4 by internal wiring formed in the ceramic package and led out, as crystal terminals 12a and 13a, to the outer circumferential side face through conduction paths 12b and 13b, respectively. Width of the conduction path is set in the range of 0.05-0.2 mm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a package for an electronic component used in an electronic device or the like, and more particularly to a package configuration in which characteristic fluctuations caused by the package configuration are suppressed and a piezoelectric oscillator using the package.

  Examples of electronic components that require hermetic sealing include piezoelectric vibration devices such as crystal resonators, crystal filters, and crystal oscillators. Each of these products is hermetically sealed in order to form a metal thin film electrode on the surface of the crystal diaphragm and protect the metal thin film electrode from the outside air.

  These piezoelectric vibration devices are increasingly being stored in a ceramic package (electronic component package) in an airtight manner due to the requirement for surface mounting of components. For example, in a crystal oscillator, an integrated circuit element and a crystal diaphragm are housed in a ceramic package whose upper surface is opened, and a crystal oscillation circuit is constituted by both electronic component elements. In such a crystal oscillator, after each electronic component element is hermetically housed in a package, data may be written to the integrated circuit element in order to adjust its characteristics. In such a case, after airtight storage, the electrical characteristics such as the frequency of the crystal diaphragm are measured in advance from the outside of the package, and necessary data is written according to the measurement result.

  Such a configuration is disclosed in Japanese Patent Application Laid-Open No. 2004-214799 (Patent Document 1), and an electrode pad for mounting a crystal resonator formed inside the package is used as a piezoelectric vibration element measurement electrode (crystal terminal) outside the package. ) And measuring the characteristics of the quartz diaphragm from the outside of the package even after hermetic sealing.

  By the way, the crystal oscillation circuit has a configuration as shown in FIG. 7, for example, and oscillation capacitors Cg and Cd are arranged between both ends of the crystal resonator X and the ground. As is well known, the output frequency of the oscillation circuit can be adjusted by the value of the oscillation capacitor. In other words, when the value of the capacitor becomes unstable, the output frequency also varies.

On the other hand, various electrode wirings are formed in the ceramic package, and as a result, a stray capacitance is formed, and as a result, the oscillation capacitor value is changed. For example, as shown in FIG. 6, the metal layer 81 used for hermetic sealing is finally grounded, but a stray capacitance is provided between the metal layer 81 and the conductive path 82b that leads the electrode pad 82 to the crystal terminal 82a outside the package. Is formed. When this is schematically shown by a circuit, stray capacitances Cg1 and Cd1 indicated by dotted lines in the circuit diagram of FIG. 7 are formed, and a desired capacitance value changes. In such a case, the negative resistance on the circuit side decreases and the output frequency also varies. Such a tendency becomes apparent as the package size becomes ultra-small, and it is necessary to eliminate the influence of stray capacitance.
JP 2004-214799 A

  The present invention has been made in view of such points, and an object of the present invention is to provide an electronic component and a piezoelectric oscillator having stable characteristics by suppressing stray capacitance caused by the package for electronic components. .

  The present invention can achieve the above object by the following configuration.

  That is, as shown in claim 1, a storage portion having a bottomed electrode pad that is conductively bonded to an electronic component element, a bank portion formed around the storage portion, and a metal layer formed on the top of the bank portion And a package for an electronic component having a ceramic laminated structure in which a conductive path that leads the electrode pad to the outside of the package with a predetermined distance from the metal layer is provided, wherein the conductive path overlaps the metal layer In the electronic component package, the width is 0.05 to 0.2 mm. There may be one electronic component element or a plurality of electronic component elements. Moreover, the structure in which multiple accommodating parts were formed may be sufficient, for example, the structure which has an accommodating part opened up and down or parallelly may be sufficient.

  As described in the section of the prior art, a stray capacitance is formed between the metal layer formed in the upper part of the bank and the conductive path, which affects the characteristics of the electronic component. In order to suppress stray capacitance as much as possible, it is necessary to suppress these overlaps. As a result of intensive investigation on the width of the conductive path as a method for suppressing superposition, the present inventor, for example, has an external shape of 3 × 2 mm in size (conducting path width 0.1 mm) or 2.5 × 2 mm (conducting path width 0.1 mm It was confirmed that the influence of the stray capacitance on the negative resistance would be reduced to a practically no problem when the width of the conductive path was 0.2 mm or less, even in the case of the ultra-small electronic component package.

In addition, by setting the width of the conductive path to 0.2 mm or less, the influence of electromagnetic induction noise due to parallel wiring of conductive paths, electromagnetic induction noise due to overlapping with power supply patterns and GND patterns, and electrostatic induction noise can be reduced. It becomes difficult to receive.

  On the other hand, in the ceramic laminating technique, there is a possibility that an extremely narrow conductive path is disconnected inside the ceramic. Further, an increase in resistance is expected due to the extremely narrow width, and as the frequency becomes higher, the charge distribution is concentrated on the surface due to the skin effect. In the present invention, it was confirmed that a highly reliable electronic component package that does not cause a disconnection accident and does not cause an increase in resistance can be manufactured if the conductive path has a width of 0.05 mm.

  According to the present invention, the conductive path of the electronic component package has a width of 0.08 to 0.2 mm in a region overlapping the metal layer, thereby suppressing the influence of stray capacitance and the conductive path. Can be reliably formed, and the characteristics of an electronic element such as an accurate piezoelectric diaphragm can be obtained.

According to a second aspect of the present invention, there may be provided an electronic component package having a configuration in which the width of the metal layer is 0.15 to 0.5 mm in addition to the above configuration.

As described above, when the width of the metal layer is small, the overlap with the conductive path is also small. Therefore, the width is preferably small from the viewpoint of stray capacitance, and the width is also large from the viewpoint of increasing the outer dimensions of the package storage portion. Is preferably small. However, a minimum width is necessary from the viewpoint of ensuring the strength of the package and the reliability of hermetic sealing with the lid (lid). As a result of intensive investigation on this point, the inventor of the present invention has a 3 × 2 mm size (conducting path width 0.1 mm) or 2.5 × 2 mm size (conducting path width 0.1 mm) as described above. It was confirmed that the reliability of hermetic sealing could be ensured by setting the width of the metal layer to 0.15 mm or more even for an ultra-small electronic component package. Further, it was confirmed that by setting the thickness to 0.5 mm or less, the stray capacitance can be suppressed to a practical range, and the decrease in negative resistance due to the stray capacitance can be suppressed. Further, it is necessary to increase the negative resistance by decreasing Cg and Cd in FIG. 7 as the frequency becomes higher. In this case, the reduction rate of the negative resistance is suppressed to less than 5% by setting the width to 0.5 mm or less. it can. This is the same tendency whether the package size is a relatively large 5 mm × 3 mm size or a small 2.5 × 2 mm size.

In addition, the width of the bank portion can be reduced by suppressing the width of the metal layer, and as a result, the outer dimensions of the storage portion are not so limited, thereby improving the degree of margin (design margin) related to the design of the piezoelectric diaphragm. be able to. In addition, the larger the t / X value (t: quartz thickness, X: length in the X direction of the quartz) in the AT-cut quartz plate, the easier the coupling of sub-vibration occurs. It becomes difficult. From this point of view, it is preferable that the width of the metal layer is 0.5 mm or less.

According to a third aspect of the present invention, in addition to the above configuration, the electrode pad may be a package for an electronic component that is separated from the inner wall of the bank portion in the storage portion. Further, as shown in claim 4, it is preferable that the separation dimension is in a range of 0.05 to 0.15 mm.

  When the electrode pad is formed close to the inner wall of the bank in the storage unit, the electrode pad may be formed in the lower part of the bank depending on the manufacturing variation of the ceramic laminate. In such a case, stray capacitance is formed with the metal layer above the bank portion, and the characteristics of the electronic component element become unstable. In addition, electronic components are often assembled by an automatic machine, and an electronic component element such as a crystal diaphragm is mounted on a ceramic package arranged at a predetermined position. In order to perform such mounting with high accuracy, positioning of the ceramic package is important. For example, image recognition processing is performed with the vicinity of the corner of the inner periphery of the ceramic package as a reference point (recognition point) to ensure positioning. However, when the electrode pad is arranged near the corner and does not overlap or overlap with the bank as described above, the reference point becomes unclear and may not be recognized on the automatic machine side.

  According to the third aspect, since the electrode pad is separated from the bank inner wall in the storage unit, the electrode pad formation position as described above does not overlap with the bank, and an unintended stray capacitance There is no formation, and positioning can be performed reliably.

  Note that it is necessary to allow for the manufacturing error of the ceramic laminate in consideration of the package size and the requirement for downsizing the package. Specifically, it must be 0.05 mm or more in anticipation of a manufacturing error of the ceramic laminate, and the contact area with the conductive adhesive used for the electrical connection with the crystal and the requirement for downsizing of the package is ensured. Since it is necessary, it is preferable to set the range to 0.15 mm or less. More preferably, the thickness is 0.08 to 0.12 mm, whereby a highly reliable electronic component package can be obtained in terms of manufacturing characteristics.

The present invention also discloses a piezoelectric oscillator using the electronic component package described above. That is, as shown in claim 5, the electronic component package according to any one of claims 1 to 4, wherein the electronic component element oscillates together with a piezoelectric diaphragm having an excitation electrode formed on a surface thereof and the piezoelectric diaphragm. A piezoelectric oscillator comprising an integrated circuit element constituting a circuit, wherein electrode pads conductively joined to a piezoelectric diaphragm are led out to a side wall of the electronic component package through the conductive path.

In the piezoelectric oscillator, after the integrated circuit element and the piezoelectric diaphragm are hermetically stored in a package, data may be written to the integrated circuit element in order to adjust the characteristics. In such a case, after airtight storage, the electrical characteristics such as the frequency of the piezoelectric diaphragm are measured, and necessary data is written according to the measurement result. According to the above configuration, since the package configuration that suppresses stray capacitance is adopted, the frequency fluctuation of the piezoelectric oscillator and the decrease in negative resistance can be suppressed to a practical range, and the piezoelectric oscillator having the intended characteristics can be obtained. Obtainable.

  ADVANTAGE OF THE INVENTION According to this invention, the stray capacitance resulting from the package for electronic components can be suppressed, and the electronic component and piezoelectric oscillator of the stable characteristic can be obtained.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
A first embodiment of the present invention will be described with reference to FIGS. 1 and 2 by taking a surface-mount crystal oscillator as an example. FIG. 1 is an exploded perspective view showing the present embodiment, and FIG. 2 is a plan view before airtight sealing with a lid. A surface-mount crystal oscillator includes a ceramic package (electronic component package) 1 having a recess with an upper opening, an AT-cut crystal diaphragm that is a piezoelectric diaphragm 2 housed in the package, It consists of an integrated circuit element 4 housed therein and a lid 3 joined to the opening of the package.

  The ceramic package 1 is a rectangular parallelepiped as a whole, and has a configuration in which a ceramic such as alumina and a conductive material such as tungsten are appropriately laminated, and has a concave storage portion 10 when viewed in cross section. The upper surface of the bank portion 11 around the storage portion is flat, and a circumferential first metal layer 11a is formed on the bank portion. The upper surface of the first metal layer 11a is also formed to be flat, and the metal film layers are formed in the order of tungsten, nickel, and gold. Tungsten is integrally formed during ceramic firing by metallization technology, and nickel and gold layers are formed by plating technology. The ceramic package used in the present embodiment has outer dimensions of a long side of 3 mm, a short side of 2 mm, and a height of 1.1 mm.

  Castellations C1, C2, C3, C4 extending in the vertical direction are formed at the four corners of the outer periphery of the ceramic package. The castellation has a configuration in which arc-shaped cutouts are formed in the vertical direction, and is necessary when cutting small pieces from a wafer in which a large number of ceramic packages are integrally formed. In the present embodiment, castellations C5 and C6 are formed side by side on the outer side of the short side where the electrode pads 12 and 13 are formed.

  The first metal layer 11a is electrically connected to external connection electrodes (not shown) formed on the bottom surface of the ceramic package by conductive vias (not shown) that vertically connect the corner portions 11 of the ceramic package. Has been derived. By connecting the external lead electrode to the ground, a metal lid, which will be described later, is grounded through the metal layer 11a and the conductive via, and an electromagnetic shielding effect of the electronic component can be obtained. As described above, the conductive via can be formed by a known ceramic lamination technique.

  On the inner bottom surface of the ceramic package 1, electrode pads 12 and 13 are formed side by side in the short side direction at one end in the long side direction. These electrode pads 12 and 13 are formed close to the inside of the ceramic package, and each electrode pad is led out as an input / output terminal to an external connection electrode formed on the lower surface of the ceramic package on the opposite surface by a conductive via (not shown). It is.

  Each of these electrode pads 12 and 13 is electrically connected to the integrated circuit element 4 by internal wiring formed in the ceramic package, and led out as crystal terminals 12a and 13a on the outer peripheral side surface of the package. That is, as shown in FIG. 2, the electrode pads 12 and 13 are electrically connected to the crystal terminals 12a and 13a formed on the outer surface of the package via the conductive paths 12b and 13b formed inside the ceramic. The crystal terminal is formed inside the castellations C5 and C6 and in an intermediate portion in the vertical direction. Thus, when the crystal oscillator is mounted, an accident such as a short circuit with the mounting substrate at the lower end portion or a short circuit with the upper metal layer is prevented. The internal wiring such as the conductive path is formed of a metal material such as tungsten in the ceramic by a metallization technique and a ceramic lamination technique.

The width A of the conductive paths 12b and 13b is set to 0.1 mm in the present embodiment. The width dimension can be changed depending on the outer size of the package, and may be set as appropriate within a range of 0.05 to 0.2 mm. By setting to such a range, the influence of stray capacitance can be suppressed, the conductive path can be reliably formed, and the characteristics of an electronic element such as an accurate piezoelectric diaphragm that is not easily affected by unnecessary noise can be obtained. . The distance between the conductive path and the metal layer above it is 0.33 mm.

The width B of the metal layer 11a on the bank is set to 0.33 mm in the region where the conductive paths 12b and 13b are formed. The width dimension B can also be changed depending on the outer size of the package, and may be set in the range of 0.15 to 0.5 mm. With such a range, the reliability of hermetic sealing can be ensured, the stray capacitance can be suppressed to a practical range, and the outer dimensions of the storage part are not so limited, so the piezoelectric diaphragm The margin (design margin) related to design can be improved.

  A ceramic frame layer constituting the bank portion 11 is laminated on the upper part of the layer in which the conductive path or the like is formed, and a metallized layer constituting a part of the metal layer is formed on the uppermost part. The metal layer 11a has a structure in which a nickel plating layer and a gold plating layer are formed on the upper surface of the metallization layer.

  A plurality of connection pads 14 are arranged in two rows at the bottom of the center portion of the ceramic package, and the integrated circuit element 4 is electrically and mechanically connected to the connection pads 14. The integrated circuit element 4 is a one-chip integrated circuit element that constitutes an oscillation circuit together with the piezoelectric diaphragm 2, and a plurality of connection terminals (not shown) corresponding to the connection pads 14 are formed on the upper surface thereof. . The integrated circuit element 4 employs a bare chip in the present embodiment and is face-down bonded to the connection terminal 14.

A rectangular AT-cut quartz crystal diaphragm, which is the piezoelectric diaphragm 2, is mounted on the electrode pads 12 and 13 above the integrated circuit element 4 in a cantilevered state. The AT-cut quartz crystal plate has a pair of rectangular excitation electrodes 21 and 22 facing the front and back surfaces, connection electrodes 21b and 22b that lead the excitation electrodes to the outer periphery of the crystal plate, and a crystal connected to the connection electrode. Extraction electrodes 21a and 22a are formed at one end in the long side direction of the diaphragm with a predetermined interval. The numbers 22, 22b and 22a are not shown. Each of these electrodes can be formed by thin film forming means such as vacuum deposition.

  The extraction electrodes 21a and 22a and the electrode pads 12 and 13 are electrically and mechanically connected by a paste-like conductive bonding material S. As the conductive bonding material S, for example, a silicone-based conductive resin adhesive containing metal fine pieces such as a silver filler can be cited. In addition to the silicone-based conductive bonding material, for example, urethane-based, imide-based, polyimide-based, epoxy-based A conductive resin adhesive of the system can be used.

  The lid 3 for hermetically sealing the ceramic package has a flat plate configuration having a rectangular shape in plan view. The lid 3 has a configuration in which a metal brazing material is formed as a second metal film layer (not shown) on a core material (not shown) made of kovar. More specifically, for example, a nickel layer and a kovar core are formed from the upper surface. This is a multilayer structure in the order of the material, the copper layer, and the silver brazing layer, and the silver brazing layer that is the second metal film layer is joined to the first metal film layer of the ceramic package. The external shape of the lid in plan view is substantially the same as or slightly smaller than the external shape of the ceramic package.

  The integrated circuit element 4 and the piezoelectric diaphragm 2 are housed in the housing part 10 of the ceramic package 1 and covered with the lid, and the first metal layer and the second metal layer are melt-cured, and hermetically sealed. Do. In the present embodiment, hermetic sealing is performed by seam welding, and the silver brazing that is the second metal layer formed on the lid is melt-cured to perform hermetic sealing. In the present embodiment, a configuration in which a metal film is formed on the package side and joined to the lid is illustrated. However, a seam ring made of a metal frame is formed on the metal film, and the seam welding is performed using the seam ring. You may stop.

  The present invention is not limited to the above embodiment, and each component can be changed and modified. As the second embodiment, an example in which the electrode pad configuration or the like is changed will be described. FIG. 3 is a plan view showing the second embodiment.

  The ceramic package 5 is a rectangular parallelepiped as a whole, and has a configuration in which a ceramic such as alumina and a conductive material are appropriately stacked, and has a concave storage portion 50 when viewed in cross section. The upper surface of the bank portion 51 around the storage portion is flat, and a circumferential first metal layer 51a is formed on the bank portion. The upper surface of the first metal layer 51a is also formed to be flat, and a metal film layer is formed in the order of tungsten, nickel, and gold. Tungsten is integrally formed during ceramic firing by metallization technology, and nickel and gold layers are formed by plating technology. The ceramic package used in this embodiment has outer dimensions of 2.5 mm long side, 2 mm short side, and 0.8 mm height.

  Castellations C1, C2, C3, C4 extending in the vertical direction are formed at the four corners of the outer periphery of the ceramic package. The castellation has a configuration in which arc-shaped cutouts are formed in the vertical direction, and is necessary when cutting small pieces from a wafer in which a large number of ceramic packages are integrally formed. Castellations C5 and C6 are formed on the short side on the electrode pad forming side.

  The metal layer 51a is electrically led to an external connection electrode formed on the lower surface of the ceramic package by conductive vias (not shown) that vertically connect the corner portions of the ceramic package. A side electrode may be formed on the surface in the castellation, and the metal layer 51a may be electrically led to the external connection electrode by the side electrode. By connecting the external lead electrode to the ground, a metal lid, which will be described later, is grounded through the metal layer 51a and the conductive via, and the electromagnetic shielding effect of the electronic component can be obtained. The conductive via can be formed by a known ceramic lamination technique.

  A plurality of connection pads (not shown) are arranged around the opening at the bottom of the storage portion 50 in the central portion of the ceramic package 5. A one-chip integrated circuit element 4 that constitutes an oscillation circuit together with the piezoelectric diaphragm 2 is accommodated at the bottom. The integrated circuit element 4 is die-bonded at the bottom, and the connection terminals (not shown) of the integrated circuit element 4 and the connection pads are electrically connected by wire bonding.

A rectangular AT-cut quartz crystal diaphragm, which is the piezoelectric diaphragm 2, is mounted on the electrode pads 52 and 53 in a cantilevered state above the integrated circuit element 4. The AT cut quartz crystal plate is opposed to the front and back surfaces thereof, a pair of rectangular excitation electrodes 51 and 52, connecting electrodes 51b and 52b for drawing the excitation electrodes to the outer periphery of the quartz crystal plate, and the connection electrodes are connected to the crystal vibration. Lead electrodes 51a and 52a are formed at one end in the long side direction of the plate with a predetermined interval. The numbers 52, 52b and 52a are not shown. Each of these electrodes can be formed by thin film forming means such as vacuum deposition.

  In the present embodiment, the connection pads 52 and 53 are separated from the inner wall of the bank portion in the storage unit 50. The separation dimension C is about 0.1 mm in both the long side direction and the short side direction. The separation dimension C can also be changed depending on the outer size of the package, and may be set in a range of 0.05 to 0.15 mm. By setting it in such a range, even if the ceramic lamination varies, the formation position of the electrode pad does not overlap with the bank portion, no unintended stray capacitance is formed, and positioning can be performed reliably. .

As shown in FIG. 3, the electrode pads 52 and 53 are electrically connected to crystal terminals 52a and 53a formed on the side surface of the package via conductive paths 52b and 53b formed inside the ceramic. The crystal terminal is formed inside the castellations C5 and C6 and in an intermediate portion in the vertical direction.

  The integrated circuit element 4 and the piezoelectric diaphragm 2 are housed in the housing part 10 of the ceramic package 1 and covered with the lid, and the first metal layer and the second metal layer are melt-cured, and hermetically sealed. Do. In the present embodiment, hermetic sealing is performed by seam welding, and the silver brazing that is the second metal layer formed on the lid is melt-cured to perform hermetic sealing.

  Next, a third embodiment will be described with reference to FIGS. FIG. 4 is a plan view showing the third embodiment, and FIG. 5 is a sectional view taken along the line DD in FIG. In the present embodiment, a configuration having storage portions that open above and below the ceramic package is illustrated.

  The ceramic package 6 has a rectangular parallelepiped shape and is configured by appropriately laminating ceramics such as alumina and a conductive material, and includes a first storage portion 601 opening upward and a second storage portion 602 opening downward when viewed in cross section. It is the composition which has. Embankments 611 and 612 are formed around each storage unit, and the upper surface of each embankment is flat. A first metal layer 611 a is formed on the bank portion 611, and a metal layer 612 a is formed on the bank portion 612 as a terminal electrode. Each metal layer constitutes a metal film layer in the order of tungsten, nickel, and gold. Tungsten is integrally formed during ceramic firing by metallization technology, and nickel and gold layers are formed by plating technology.

  Castellations C1, C2, C3, C4 extending in the vertical direction are formed at the four corners of the outer periphery of the ceramic package. The castellation has a configuration in which arc-shaped cutouts are formed in the vertical direction, and is necessary when cutting small pieces from a wafer in which a large number of ceramic packages are integrally formed. Castellations C5 and C6 are formed on the short side on the electrode pad forming side.

  The metal layer 51a is electrically led to an external connection electrode formed on the lower surface of the ceramic package by a conductive via that vertically connects and connects the bank portion at the corner of the ceramic package. By connecting the external lead electrode to the ground, a metal lid, which will be described later, is grounded through the metal layer 51a and the conductive via, and the electromagnetic shielding effect of the electronic component can be obtained. The conductive via can be formed by a known ceramic lamination technique.

  The first storage portion 601 is formed with electrode pads 62 and 63 for holding the piezoelectric diaphragm. The electrode pads 62 and 63 are formed with a predetermined distance from the inner wall of the storage portion, and cut portions 62c and 63c are formed in which no electrode is formed at portions corresponding to the four corners of the storage portion. This eliminates the possibility of forming under the bank portion even when the ceramic stacking deviation occurs.

The electrode pads are drawn to the short side of the package by the conductive paths 62b and 63b and led to the crystal terminals 62a and 63a in the castellations C5 and C6. In each of the embodiments described above including this embodiment, an example in which the crystal terminal is derived to the short side is shown. However, the crystal terminal may be derived to the long side, or may be derived to both sides or corners. Also good. In addition, auxiliary support portions 65 and 66 are formed at the other end of the storage portion to support the tip of the piezoelectric diaphragm. This is useful for stabilizing the piezoelectric diaphragm during bonding with a conductive bonding material.

  As shown in FIG. 5, the second storage portion 602 is a space for mounting the integrated circuit element 7, and a plurality of connection pads 64 are provided in the second storage portion 602. Further, the metal layer 612a on the bank portion 612 serves as an input / output terminal and a ground terminal for the piezoelectric oscillator, and three or more terminals (metal layers) are formed although not shown.

  A pair of rectangular excitation electrodes 21 and 22 are formed on the piezoelectric diaphragm 2 so as to face the front and back surfaces of the rectangular AT-cut quartz crystal diaphragm. Each excitation electrode is drawn out to the outer periphery of the piezoelectric diaphragm by the connecting electrodes 21b and 22b, and is further drawn out to an extraction electrode formed at one end in the long side direction. The integrated circuit element 7 is a one-chip type that constitutes an oscillation circuit together with a piezoelectric diaphragm, and a plurality of connection terminals are formed on the upper surface thereof.

  These piezoelectric diaphragms and integrated circuit elements are mounted on a ceramic package. The piezoelectric diaphragm 2 is electrically and mechanically held in the package by conductively bonding the extraction electrodes 21 a and 22 a and the electrode pads 62 and 63 with the conductive bonding material S. The integrated circuit element 7 is die-bonded to the bottom of the second storage portion 602 and the connection pad 64 and the connection terminal 71 are joined by the bonding wire W. If necessary, the second storage portion may be filled with an insulating resin so as to be insulated from the outside.

  In the examples of the above embodiments, a surface mount type crystal resonator using an AT-cut crystal diaphragm is illustrated, but a tuning fork crystal diaphragm, a crystal filter element, a crystal diaphragm and other electronic elements are exemplified. May be stored in a package. In addition, the piezoelectric diaphragm may be made of other piezoelectric materials such as a piezoelectric ceramic diaphragm, and may be applied to other electronic component elements, and is not limited to the example of the above embodiment.

  It can be applied to mass production of electronic components including crystal oscillators.

The disassembled perspective view of the open state of the crystal oscillator which shows 1st Embodiment. The top view which shows 1st Embodiment The top view which shows 2nd Embodiment The top view which shows 3rd Embodiment DD sectional drawing of FIG. The figure which shows a prior art example. The figure which shows an oscillation circuit.

Explanation of symbols

1, 5, 6 Ceramic package 11, 51, 611, 612 Embankment
11a, 51a, 611a, 612a, 81 Metal layers 12, 13, 52, 53, 62, 63 Electrode pads
12b, 13b, 52b, 53b, 62b, 63b Conductive path 2 Piezoelectric diaphragm (electronic component element)
3 lid

Claims (5)

A storage portion having an electrode pad that is conductively bonded to the electronic component element with a bottom, a bank portion formed around the storage portion, a metal layer formed on the top of the bank portion, and the electrode pad as the metal layer And a package for an electronic component having a ceramic laminated structure having a conductive path leading out to the outside of the package with a predetermined interval,
The package for electronic parts, wherein the conductive path has a width of 0.05 to 0.2 mm in a region overlapping with the metal layer. 2. The electronic component package according to claim 1, wherein a width of a region overlapping with the conductive path in the metal layer is 0.15 to 0.5 mm. The electronic component package according to claim 1, wherein the electrode pad is separated from the inner wall of the bank portion in the storage portion. The electronic component package according to claim 3, wherein the separation dimension is 0.05 to 0.15 mm. 5. The electronic component package according to claim 1, wherein the electronic component element comprises a piezoelectric diaphragm having an excitation electrode formed on a surface thereof and an integrated circuit element that constitutes an oscillation circuit together with the piezoelectric diaphragm. An electrode pad that is conductively bonded to the piezoelectric diaphragm is led to the side wall of the electronic component package through the conductive path.

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