JP5084343B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a technique for forming a thin film by a PECVD method (plasma vapor deposition method Plasma Enhanced Chemical Vapor Deposition).

Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

In order to manufacture an integrated circuit used for LSI, liquid crystal display (LCD), electroluminescence display (EL display), etc., a film forming process for forming a thin film made of a semiconductor, an insulating material or a conductive material on a substrate, A photolithography process for forming a resist mask made of a photoresist on the formed thin film and an etching process for processing the thin film into a predetermined shape using the resist mask are repeated.

As one of the methods for forming a thin film, a plasma vapor deposition method (PECVD method) is known. The PECVD method applies a microwave or high frequency to a gaseous raw material to form a plasma state, decomposes the raw material into radicals or chemically active ions, and forms a film on the substrate by surface reaction of these radicals and ions. It is a method of forming.

Therefore, when a film is formed by a plasma CVD apparatus, a product obtained by reacting the raw material is deposited not only on the substrate surface but also on the inner wall of the reaction vessel, the electrode, the substrate holder, and the like. This deposit causes particles and dust. Therefore, a cleaning process for removing such deposits is periodically performed. As a typical method for cleaning the reaction vessel, there is a method using plasma gas etching. This is a method in which a fluoride gas such as NF ₃ is introduced into a reaction vessel and converted into plasma, thereby generating fluorine radicals and etching to remove deposits. Since the fluoride generated by reacting with the fluorine radical has a high vapor pressure, it is removed from the reaction vessel by the exhaust system.

By performing the cleaning process, the fluoride gas used as the cleaning gas is adsorbed on the inner wall of the reaction vessel, the electrode, and the like. Fluoride gas has a very high reactivity, and when the film forming process is performed after the cleaning process, residual fluoride gas may be mixed into the film, which may affect the characteristics of the formed film. It is thought that there is. Therefore, methods for suppressing the influence of the fluoride gas used for the cleaning gas have been studied (see Patent Documents 1 to 3).

For example, in Patent Document 1 (Japanese Patent Laid-Open No. 2001-345278), after the deposition chamber is cleaned with NF ₃ gas, the glow discharge and H ₂ in an atmosphere of 100% H ₂ gas are continued without a substrate being placed in the deposition chamber. The film is deposited in the deposition chamber by performing a plurality of continuous discharges by glow discharge in a SiH ₄ gas atmosphere diluted with gas, thereby suppressing the influence of remaining NF ₃ .

Patent Document 2 (Japanese Patent Application Laid-Open No. 8-241865) describes a post-treatment method for removing a cleaning gas from a reaction vessel when an amorphous silicon thin film is formed in a film forming process. The post-processing step is a step of removing the cleaning gas from the reaction vessel, and is performed as follows.

After cleaning the reaction vessel with NF ₃ gas, a mixed gas of monosilane (SiH ₄ ) and hydrogen is subsequently introduced into the reaction vessel as a post-treatment gas. The post-treatment gas is the same gas as the process gas used for forming the amorphous silicon film. By making the post-treatment gas into a plasma state, the remaining NF ₃ is also decomposed to generate F ^* . F ^* reacts with chemical species such as SiH ^* to form volatiles with high vapor pressure such as SiF ₄ and is removed from the reaction vessel from the exhaust system. After finishing the post-treatment process, the substrate is carried into the reaction vessel, and a mixed gas of monosilane (SiH ₄ ) and hydrogen is introduced into the reaction vessel to form an amorphous silicon film.

In Patent Document 3 (JP-A-7-201738), after cleaning the reaction vessel by a fluoride gas such as NF _3, by reduction process, and removing the fluoride gas from the reaction vessel. The reduction process is as follows. By introducing a reducing gas capable of converting a Si—F bond into a Si—H bond into the reaction vessel by introducing the substrate into the reaction vessel, the reducing gas is activated by high frequency, and reacted with the remaining fluoride to react. Producing products. The reaction product is removed from the reaction vessel by depressurizing the reaction vessel. As the reducing gas, NH ₃ capable of converting a Si—F bond into a Si—H bond is used.

Further, in Patent Document 3, following the reduction process, SiH ₄ , NH ₃ , and N ₂ are introduced into a reaction vessel to perform a nitride film forming process for forming a silicon nitride film.
JP 2001-345278 A JP-A-8-241865 JP-A-7-201738

An object is to provide a new film formation method using a fluoride gas or a fluorine gas used for cleaning a reaction vessel of a PECVD apparatus for forming a thin film by a PECVD method.

One aspect of the present invention is that after a reaction vessel of a plasma CVD apparatus (PECVD apparatus) is cleaned by gas plasma etching using a fluoride gas, a thin film is formed with the fluoride gas remaining in the reaction vessel. A process gas is introduced into a reaction vessel, an electric field is applied to the process gas, plasma is generated, and a thin film is formed on a formation surface of the substrate by a chemical reaction of active species contained in the plasma. A method for manufacturing a semiconductor device. Fluorine gas can also be used instead of fluoride gas.

Simultaneously with the generation of plasma of the process gas for forming a thin film, the remaining fluoride gas is also decomposed to generate fluorine radicals. The formation surface of the substrate is etched by the fluorine radicals. In this etching, volatile fluoride having a high vapor pressure is generated, and this fluoride is removed from the reaction vessel by exhausting the reaction vessel.

This fluorine radical etching removes organic substances, natural oxides, and the like from the thin film formation surface, and the formation surface is cleaned.

Since fluorine radicals are highly reactive, while fluorine radicals are present in the reaction vessel, an etching reaction by fluorine radicals proceeds, not a film deposition reaction by a process gas for thin film formation. With the progress of the etching reaction, the concentration of fluorine radicals decreases, and eventually, the atmosphere in the reaction vessel is replaced with the process gas for thin film formation, the deposition reaction starts, and a film grows on the formation surface of the substrate.

By etching the surface to be formed with fluorine radicals before the deposition reaction occurs, if contaminants such as organic substances are attached to the surface to be formed, the contaminants can be removed. In addition, when a thin film is formed in advance on the substrate, it is possible to form the film after etching the thin film in an extremely thin range of less than 1.0 nm.

As a method of introducing fluoride gas or fluorine gas into the reaction vessel, in addition to the method of cleaning the reaction vessel with fluoride gas and leaving the fluoride gas or fluorine gas in the reaction vessel, the substrate is placed in the reaction vessel. After being installed, a method of introducing fluoride gas or fluorine gas into the reaction vessel can be used.

Further, in the present invention, before introducing the process gas for forming the thin film, nitrogen gas is introduced and the nitrogen gas is turned into plasma, whereby fluoride gas or fluorine gas (F ₂ gas) remaining in the reaction vessel ) Can also be turned into plasma. By generating plasma while introducing nitrogen gas, the etching reaction of the surface to be formed proceeds by fluorine radicals, and eventually the fluoride gas concentration decreases.

Thereafter, the introduction of the nitrogen gas into the reaction vessel is stopped, the process gas for forming a thin film is introduced into the reaction vessel, and a thin film is formed on the formation surface of the substrate by PECVD.

In addition to nitrogen gas, rare gas gases (He, Ar, Kr, Xe, etc.) are preferable. Since radicals contained in the plasma of nitrogen gas and halogen gas hardly react with fluorine radicals to generate volatile fluorides, most of the fluorine radicals can be reacted on the formation surface of the substrate.

A fluoride is a compound containing fluorine (F) in its composition. In the present invention, the fluoride gas _can be used _{OF 2, ClF 3, NF 3} , FNO, F 3 NO, SF 6, SF 5 NO, SOF _2, or the like gas. Further, as the fluoride gas, the following fluorine compound gas containing carbon can be used. Perfluorocarbon (PFC: Perfluorocarbon), hydrofluorocarbon (HFC), hydrochlorofluorocarbon (HCFC), ether fluoride, carbonyl fluoride, ester fluoride.

As the perfluorocarbon, CF ₄ , C ₂ F ₆ , C ₃ F ₈ , C ₄ F ₁₀ , C ₃ F ₈ , C ₄ F ₆ , C ₄ F ₈ , C ₅ F _{8 and the} like can be used. As the hydrofluorocarbon, CF ₃ CHF ₂ , CHF ₂ CHF ₂ , CF ₃ CHFCF ₃ , CF ₃ CF ₂ CHF ₂ , CHF ₂ CF ₂ CHF _{2 and the} like can be used. Examples of the ether _fluoride, CHF ₂ OCHF _2, CF 3 hydrofluoroethers such as _{OCHFCF 3 (HFE: Hydrofluoroether),} CF 3 OCF = CF 2, C 2 F 5 OCF = CF 2, C 3 F 6 O, C ₃ F ₆ O ₂ , C ₄ F ₈ O, C ₄ F ₈ O _{2 and the} like can be used. As the carbonyl fluoride, CF ₃ COCF ₃ or the like can be used. As the ester fluoride, CF ₃ COOCHF ₂ , CF ₃ COOC ₂ F _{5 and the} like can be used.

Further, as the gas of the fluorine compound containing carbon, COF ₂ , COF ₂ , CF ₃ COF, CF ₂ (COF) ₂ , C ₃ F ₇ COFCF ₃ OF, CF ₃ I, CF ₃ OOCF ₃ , CF ₃ A gas selected from OOOCF ₃ , CF ₃ CN, CF ₃ NO, and the like can also be used.

Before forming a film by PECVD from a process gas for forming a thin film, the surface to be formed can be cleaned by etching with a fluorine radical.

The present invention is described below. However, the present invention can be implemented in many different modes, and it is easy for those skilled in the art to change the form and details in various ways without departing from the spirit and scope of the present invention. Understood. Therefore, the present invention should not be construed as being limited to the description of the embodiments and examples.

First, the PECVD apparatus used in the embodiment of the present invention will be described. In the present invention, a capacitively coupled PECVD apparatus is preferably used. FIG. 5 is a diagram illustrating a configuration example of a capacitively coupled PECVD apparatus.

The PECVD apparatus shown in FIG. 5 has a reaction vessel 10 for forming a film. The potential of the reaction vessel 10 is maintained at the ground potential. An upper electrode 11 and a lower electrode 12 are provided in the reaction vessel 10. The upper electrode 11 and the lower electrode 12 are disposed to face each other. A pipe 13 into which process gas is introduced is connected to the upper electrode 11. The upper electrode 11 has a cavity connected to the pipe 13, and a plurality of pores connected to the cavity are formed on the surface facing the lower electrode 12. With such a structure, the process gas is supplied into the reaction vessel 10 through the pipe 13 and the upper electrode 11.

The upper electrode 11 is electrically connected to a high-frequency oscillation power supply 14 via a pipe 13, and a high-frequency potential output from the high-frequency oscillation power supply 14 is applied to the upper electrode 11. On the other hand, the potential of the lower electrode 12 is maintained at the ground potential. With such a structure, an electric field that oscillates at a high frequency is formed between the upper electrode 11 and the lower electrode 12, and this electric field is applied to the process gas supplied into the reaction vessel 10.

The lower electrode 12 also functions as a stage on which a substrate 30 for forming a film is installed. A heater for heating the substrate 30 is incorporated. The upper electrode 11 has a built-in heater for heating the process gas.

The reaction vessel 10 is provided with an exhaust port 15 for exhausting. Exhaust means such as a rotary pump and a dry pump is connected to the exhaust port. The reaction vessel 10 is evacuated by operating the vacuum pump of the evacuation means.

Hereinafter, in Embodiments 1 to 4, a method for forming a film on a substrate using the PECVD apparatus of FIG. 5 will be described. By using the thin film formation process of Embodiments 1 to 4, a semiconductor device having various elements can be formed.

(Embodiment 1)
FIG. 1 is a flowchart showing an example of a film forming method. A method for forming a thin film will be described with reference to FIG.

First, the reaction container 10 is cleaned in a state where the substrate 30 is not installed in the reaction container 10 (step S1). A process gas for cleaning is introduced into the reaction vessel 10. The high-frequency oscillation power supply 14 is operated, and an electric field is applied to the cleaning process gas to cause plasma discharge. Deposits adhering to the inner wall of the reaction vessel 10, the upper electrode 11, the lower electrode 12, and the like are removed by plasma gas etching using a cleaning process gas activated by plasma discharge. At least a fluoride gas is used as the cleaning process gas.

For the fluoride gas, OF _2, ClF _3, NF ₃ , FNO _{3 ,} F ₃ NO _{3 ,} SF _6, SF ₅ NO _, SOF _2, or the like can be used.

As the fluoride gas, a fluorine compound gas containing carbon in its composition can be used. Such fluorine _{compounds, COF 2, COF 2, CF} 3 COF, CF 2 (COF) 2, C 3 F 7 COFCF 3 OF, CF 3 I, CF 3 OOCF 3, CF 3 OOOCF 3, CF 3 CN CF ₃ NO, perfluorocarbon (eg, CF ₄ , C ₂ F ₆ , C ₃ F ₈ , C ₄ F ₁₀ , C ₃ F ₈ , C ₄ F ₆ , C ₄ F ₈ , C ₅ F _8, etc.) Hydrofluorocarbons (for example, CF ₃ CHF ₂ , CHF ₂ CHF ₂ , CF ₃ CHFCF ₃ , CF ₃ CF ₂ CHF ₂ , CHF ₂ CF ₂ CHF _2, etc.), ether fluorides (for example, CHF ₂ OCHF ₂ , CF _{3) OCHFCF 3, CF 3 OCF = CF} 2, C 2 F 5 OCF = CF 2, C 3 F 6 O, C 3 F 6 O 2, C 4 F 8 And _C 4 _F 8 _{O 2),} carbonyl-based fluoride, such as CF 3 COCF _3, and, ester fluorides _(e.g., such as _{CF 3 COOCHF 2, CF 3 COOC} 2 F 5) , and the like.

Instead of fluoride gas, fluorine gas (F ₂ gas) can also be used.

By activating the fluoride gas with plasma, fluorine radicals are generated, and the fluorine radicals react with the deposits generated inside the reaction vessel 10 to generate volatile fluorides with high vapor pressure. The During this time, exhaust is performed by an exhaust means connected to the exhaust port 15, and this fluoride is removed from the reaction vessel 10 through the exhaust port 15. The supply and exhaust of the cleaning process gas are stopped, and the cleaning is finished.

Next, the substrate 30 is carried into the reaction vessel 10 and placed on the lower electrode 12 (step S2). Fluoride gas, which is a cleaning process gas, remains in the reaction vessel 10 into which the substrate 30 is loaded, and is adsorbed on the inner wall of the reaction vessel 10, the upper electrode 11, the lower electrode 12, and the like.

Next, a thin film formation process for forming a thin film on the substrate 30 is performed (step S3). First, evacuation is performed to bring the inside of the reaction vessel 10 to a predetermined pressure. Then, while exhausting, a thin film forming process gas for forming a film is supplied into the reaction vessel 10, the high frequency oscillation power supply 14 is operated, and an electric field is applied to the thin film forming process gas to cause plasma discharge. . Simultaneously with this plasma discharge, the fluoride gas remaining in the reaction vessel 10 is also plasma discharged, fluorine radicals are generated, and the fluorine radicals pour onto the substrate 30. For this reason, the surface of the substrate 30 to be formed is etched by the fluorine radicals to generate volatile fluoride having a high vapor pressure, and this fluoride is removed from the exhaust port 15 to the outside of the reaction vessel 10.

Since fluorine radicals are highly reactive, etching reactions with fluorine radicals proceed preferentially rather than film deposition reactions with a process gas for thin film formation while fluorine radicals are present in the reaction vessel. As the etching reaction proceeds, the concentration of fluorine radicals decreases, and eventually, the atmosphere in the reaction vessel 10 is replaced with the process gas for thin film formation, the deposition reaction starts, and a film grows on the formation surface of the substrate 30. Therefore, immediately before forming the thin film, the surface on which the thin film is formed is plasma-etched by fluorine radicals, so that organic substances on the formed surface can be removed, and the thin film is formed on the clean formed surface. Can do.

In addition, the process of cleaning the thin film formation surface and the thin film formation can be performed continuously in the same reaction vessel, so the thin film can be formed without exposing the cleaned formation surface to the air atmosphere. can do.

For example, NF ₃ is used as the cleaning gas, a silicon oxide film is formed on the surface to be formed of the substrate 30, and an amorphous silicon film is formed on the silicon oxide film. explain. In order to form an amorphous silicon film, hydrogen (H ₂ ) and monosilane (SiH ₄ ) are used as a process gas for forming a thin film. When H ₂ and SiH ₄ are supplied to the reaction vessel 10 and a plasma discharge is performed by applying an electric field to the H ₂ and SiH ₄ from the high-frequency oscillation power source 14, the remaining NF ₃ is also plasma discharged to generate fluorine radicals. Is done. First, when the silicon oxide film on the surface of the substrate 30 is etched by the fluorine radicals and NF ₃ is reduced, amorphous silicon is deposited on the silicon oxide film.

Since a small amount of NF ₃ remains in the reaction vessel 10 in the cleaning process, the thickness of the silicon oxide film etched can be less than 1 nm, for example, 0.1 nm to 0.5 nm. It is possible. Therefore, in the thin film formation process, the surface of the silicon oxide film on which the amorphous silicon film is formed can be cleaned with fluorine radicals, and the thickness of the silicon oxide film can be finely adjusted. .

Of course, as long as the material can be etched with fluorine radicals, the thickness etched with a material other than silicon oxide can be less than 1 nm, and the etched thickness can be 0.1 nm or more and 0.5 nm or less. Is possible.

The rate at which the concentration of the fluoride gas in the reaction vessel 10 decreases varies depending on the pressure in the reaction vessel 10, the type of process gas for forming a thin film, the flow rate, and the temperature of the upper electrode 11 and the lower electrode 12. These conditions may be determined as appropriate in accordance with the thickness to be etched.

When the thin film is formed to a predetermined thickness, the supply of the process gas for forming the thin film is stopped and the thin film forming process is terminated. Next, the substrate 30 on which the thin film is formed is taken out from the reaction vessel 10 (step S4). Thus, the formation of the thin film using the process flow of FIG. 1 is completed. By forming the thin film according to this process flow, the process of cleaning the thin film forming surface and the process of forming the thin film are continuously performed in the same reaction vessel. A thin film can be formed without exposure.

In the thin film formation method using the process flow of FIG. 1, in the thin film formation process (step S3), the concentration of the fluoride gas remaining in the reaction vessel 10 is determined after the cleaning process (step S1) is completed. The time can be adjusted by starting the thin film formation process (step S3).

(Embodiment 2)
FIG. 2 is a flowchart showing an example of a film forming method. A method for forming a thin film will be described with reference to FIG.

First, as in step S1 of the first embodiment, the reaction container 10 is cleaned without the substrate 30 being placed in the reaction container 10 (step S11). By this step S11, the fluoride gas that is the cleaning process gas remains in the reaction vessel 10 and is adsorbed on the inner wall of the reaction vessel 10, the upper electrode 11, the lower electrode 12, and the like. Next, similarly to step S2 of the embodiment, next, the substrate 30 is carried into the reaction vessel 10 and placed on the lower electrode 12 (step S12).

Next, before performing the thin film formation process (step S14), the fluoride gas remaining in the reaction vessel 10 is plasma-excited to generate fluorine radicals. For this purpose, nitrogen gas (N ₂ gas) is supplied as a process gas to the reaction vessel 10 to generate nitrogen gas plasma (step S13).

First, evacuation is performed to bring the inside of the reaction vessel 10 to a predetermined pressure. Then, while evacuating, nitrogen gas is supplied into the reaction vessel 10, the high frequency oscillation power supply 14 is operated, an electric field is applied to the nitrogen gas, and plasma discharge is performed. The nitrogen gas is plasma-discharged, and the fluoride gas remaining in the reaction vessel 10 is also plasma-discharged to generate fluorine radicals. The surface of the substrate 30 to be formed is etched by the fluorine radicals to generate a volatile fluoride having a high vapor pressure, and the fluoride is removed from the reaction vessel 10 through the exhaust port 15.

By performing this nitrogen gas plasma generation process before the thin film formation process (step S14), the film formation surface of the thin film is etched by fluorine radicals immediately before forming the thin film. Organic substances on the formation surface can be removed, and a thin film can be formed on a clean surface.

For example, the process of generating this nitrogen gas plasma will be described by taking as an example the case where NF ₃ is used as the cleaning gas and a silicon oxide film is formed on the surface of the substrate 30 to be formed. When the nitrogen gas is plasma-excited, the remaining NF ₃ is also plasma discharged to generate fluorine radicals, and the silicon oxide film on the surface of the substrate 30 is etched by the fluorine radicals. Since the amount of NF ₃ remaining in the reaction vessel 10 in the cleaning process (S11) is very small, the thickness at which the silicon oxide film is etched can be less than 1 nm, in the range of 0.1 nm to 0.5 nm. It is possible to etch. Therefore, in the thin film formation process, the surface of the silicon oxide film on which the amorphous silicon film is formed can be cleaned with fluorine radicals, and the thickness of the silicon oxide film can be finely adjusted. .

As long as the material can be etched with fluorine radicals, the thickness etched with materials other than silicon oxide can be less than 1 nm, and the etched thickness can be 0.1 nm or more and 0.5 nm or less. is there.

Note that the rate at which the concentration of the fluoride gas in the reaction vessel 10 decreases varies depending on the pressure in the reaction vessel 10, the flow rate of nitrogen gas, and the temperature of the upper electrode 11 and the lower electrode 12. In accordance with this, these conditions may be determined as appropriate.

Further, as a process gas that can be used in the process, a rare gas gas (He, Ar, Kr, Xe, etc.) is preferable in addition to nitrogen gas. Since radicals contained in the plasma of nitrogen gas and halogen gas hardly react with fluorine radicals to generate volatile fluorides, most of the fluorine radicals can be reacted on the formation surface of the substrate.

The plasma is excited while supplying nitrogen gas to the reaction vessel 10 for a predetermined period, and then the supply of nitrogen gas is stopped. Next, a thin film forming process is performed in which a thin film forming process gas is supplied into the reaction vessel 10 to form a thin film on the substrate 30 (step S14). While evacuating, a thin film forming process gas for forming a film is supplied into the reaction vessel 10, the high frequency oscillation power supply 14 is operated, an electric field is applied to the thin film forming process gas, and plasma discharge is performed. A thin film is formed on the formation surface of the substrate 30. When the thin film is formed to a predetermined thickness, the supply of the process gas for forming the thin film is stopped and the thin film forming process is terminated.

Next, the substrate 30 on which the thin film is formed is taken out from the reaction vessel 10 (step S15). Thus, the thin film formation process using the process flow of FIG. 2 is completed. By forming the thin film according to this process flow, the process of cleaning the thin film forming surface and the process of forming the thin film are continuously performed in the same reaction vessel. A thin film can be formed without exposure.

In the thin film forming method using the process flow of FIG. 2, in the process of generating nitrogen gas plasma (step S13), the concentration of the fluoride gas remaining in the reaction vessel 10 is determined by the cleaning process (step S1). It can be adjusted by the time for starting the process of generating the nitrogen gas plasma (step S3) after the end.

(Embodiment 3)
FIG. 3 is a flowchart showing an example of a film forming method. A method for forming a thin film will be described with reference to FIG.

First, the substrate 30 is carried into the reaction vessel 10 and placed on the lower electrode 12 (step S2).

Next, a fluoride gas is supplied to the reaction vessel 10 (step S21). As the fluoride gas, a gas selected from NF ₃ , SF ₆ and CF ₄ can be used. Of these, NF ₃ gas is preferred. At this time, the pressure in the reaction vessel 10 may be atmospheric pressure or lower than atmospheric pressure.

Next, a thin film formation process for forming a thin film on the substrate 30 is performed (step S23). While exhausting, a thin film forming process gas for forming a film is supplied into the reaction vessel 10, the high frequency oscillation power supply 14 is operated, and an electric field is applied to the thin film forming process gas to cause plasma discharge. Simultaneously with this plasma discharge, the fluoride gas previously supplied in step S21 is also plasma-discharged to generate fluorine radicals. Therefore, the surface of the substrate 30 to be formed is etched by the fluorine radicals, and volatile fluoride having a high vapor pressure is generated. This fluoride is removed from the reaction vessel 10 through the exhaust port 15.

Since fluorine radicals are highly reactive, etching reactions with fluorine radicals proceed preferentially rather than film deposition reactions with a process gas for thin film formation while fluorine radicals are present in the reaction vessel. As the etching reaction proceeds, the concentration of fluorine radicals decreases, and eventually, the atmosphere in the reaction vessel 10 is replaced with the process gas for thin film formation, the deposition reaction starts, and a film grows on the formation surface of the substrate 30. Therefore, immediately before forming the thin film, the surface on which the thin film is formed is plasma-etched by fluorine radicals, so that organic substances on the formed surface can be removed, and the thin film is formed on the clean formed surface. Can do.

For example, NF ₃ is used as the cleaning gas, a silicon oxide film is formed on the surface to be formed of the substrate 30, and an amorphous silicon film is formed on the silicon oxide film. explain. In order to form an amorphous silicon film, hydrogen (H ₂ ) and monosilane (SiH ₄ ) are used as a process gas for forming a thin film. When H ₂ and SiH ₄ are supplied to the reaction vessel 10 and an electric field is applied to the H ₂ and SiH ₄ by the high-frequency oscillation power source 14 and plasma discharge is performed, NF ₃ is also plasma discharged and fluorine radicals are generated. First, the silicon oxide film on the surface of the substrate 30 is etched by the fluorine radicals, and then when NF ₃ decreases, amorphous silicon is deposited on the silicon oxide film.

By adjusting the amount of the fluoride gas supplied to the reaction vessel 10 in step S22, the thickness at which the silicon oxide film is etched can be less than 1 nm, and the etching is performed in the range of 0.1 nm to 0.5 nm. Is possible. Therefore, the surface of the silicon oxide film on which the amorphous silicon film is formed can be cleaned with fluorine radicals, and the thickness of the silicon oxide film can be finely adjusted. Of course, as long as the material can be etched with fluorine radicals, the thickness etched with a material other than silicon oxide can be less than 1 nm, and the etched thickness can be 0.1 nm or more and 0.5 nm or less. Is possible. The amount of the fluoride gas can be adjusted by adjusting the flow rate of the fluoride gas and the exhaust amount.

When the thin film is formed to a predetermined thickness, the supply of the process gas for forming the thin film is stopped, the exhaust is stopped, and the thin film forming process is finished. Since the process of cleaning the thin film forming surface and the process of forming the thin film are continuously performed in the same reaction vessel, the thin film can be formed without exposing the cleaned film forming surface to the air atmosphere. it can.

Next, the substrate 30 on which the thin film is formed is taken out from the reaction vessel 10 (step S24). Thus, the formation of the thin film using the process flow of FIG. 3 is completed.

In the thin film formation method using the process flow of FIG. 3, even if the thin film formation process is not performed after the cleaning process, the thin film formation surface (plasma gas etching with fluorine radicals) is performed in the thin film formation process (step S23). can do.

(Embodiment 4)
FIG. 4 is a flowchart showing an example of a film forming method. A method for forming a thin film will be described with reference to FIG.

First, the substrate 30 is carried into the reaction vessel 10 and placed on the lower electrode 12 (step S31). Next, as in step S22 of FIG. 3, a fluoride gas is supplied to the reaction vessel 10 (step S32).

Next, the fluoride gas supplied into the reaction vessel 10 in step S32 is plasma-excited to generate fluorine radicals. For this purpose, nitrogen gas (N ₂ gas) is supplied as a process gas to the reaction vessel 10 to generate nitrogen gas plasma (step S33). This process can be performed in the same manner as step S13 in FIG.

By performing the process of generating the nitrogen gas plasma before the thin film formation process (step S34), the film formation surface of the thin film is plasma-etched by fluorine radicals immediately before the thin film is formed. Organic substances on the formation surface can be removed, and a thin film can be formed on a clean surface.

For example, the process of generating this nitrogen gas plasma will be described by taking as an example the case where NF ₃ is used as the cleaning gas and a silicon oxide film is formed on the surface of the substrate 30 to be formed. By plasma-exciting nitrogen gas, NF ₃ supplied in advance is also plasma-discharged to generate fluorine radicals. The silicon oxide film on the surface of the substrate 30 is etched by the fluorine radicals.

By adjusting the amount of fluoride gas supplied to the reaction vessel 10 in step S32, the thickness of the silicon oxide film etched can be less than 1 nm, and the etching is performed in the range of 0.1 nm to 0.5 nm. Is possible. Therefore, the surface of the silicon oxide film on which the amorphous silicon film is formed can be cleaned with fluorine radicals, and the thickness of the silicon oxide film can be finely adjusted. Of course, as long as the material can be etched with fluorine radicals, the thickness etched with a material other than silicon oxide can be less than 1 nm, and the etched thickness can be 0.1 nm or more and 0.5 nm or less. Is possible. The amount of the fluoride gas can be adjusted by adjusting the flow rate of the fluoride gas and the exhaust amount.

As a process gas that can be used in this process, a rare gas gas (He, Ar, Kr, Xe, etc.) is preferable in addition to nitrogen gas. Since radicals contained in the plasma of nitrogen gas and halogen gas hardly react with fluorine radicals to generate volatile fluorides, most of the fluorine radicals can be reacted on the formation surface of the substrate.

Next, the supply of nitrogen gas is stopped, and a thin film formation process is performed to form a thin film on the substrate 30 (step S34). While evacuating, a thin film forming process gas for forming a film is supplied into the reaction vessel 10, the high frequency oscillation power supply 14 is operated, an electric field is applied to the thin film forming process gas, and plasma discharge is performed. A thin film is formed on the formation surface of the substrate 30. When the thin film is formed to a certain thickness, the supply of the process gas for forming the thin film is stopped and the thin film forming process is terminated.

Next, the substrate 30 on which the thin film is formed is taken out from the reaction vessel 10 (step S35). Thus, the formation of the thin film using the process flow of FIG. 3 is completed. In the film forming method of this embodiment, the process of cleaning the thin film forming surface and the process of forming the thin film are continuously performed in the same reaction vessel. A thin film can be formed without exposure.

In the thin film formation method using the process flow of FIG. 4, even if the thin film formation process is not performed after the cleaning process, in the thin film formation process (step S23), the surface on which the thin film is formed is plasma gas etched by fluorine radicals. can do.

(Embodiment 5)
By using the thin film formation process of Embodiments 1 to 4, a semiconductor device having various elements can be formed. The inventor has confirmed by experiments that the surface to be formed is etched very slightly by the fluoride gas present in the reaction vessel 10. In this embodiment, the experiment will be described. In this experiment, the process was performed from step S31 to step S34 using the process flow of FIG. 4, and the thickness at which the thin film was etched by the fluoride gas was measured. The experimental method will be described below.

A glass substrate was used as the substrate 30. The substrate 30 was carried into the reaction vessel 10 and an amorphous silicon film was formed on the glass substrate using the capacitively coupled PECVD apparatus shown in FIG. The film formation time was adjusted so that the thickness was 55 nm. The conditions for the formation process of the amorphous silicon film are shown below.
・ Process gas type (flow rate)
SiH ₄ (25 sccm)
H ₂ (150 sccm)
・ Lower electrode temperature 250 ℃
・ Pressure 66.7Pa
・ Oscillation frequency of high-frequency oscillation power supply 27MHz
・ Output power of high frequency power supply 50W
・ Distance between electrodes 25mm
-Electrode area 615.75 cm ²

In order to measure the thickness etched by the fluoride gas, the substrate 30 on which the amorphous silicon film was formed was taken out of the reaction vessel 10 and the thickness of the amorphous silicon film was measured.

Next, the substrate 30 on which the amorphous silicon film was formed was carried into the reaction vessel 10. The temperature of the upper electrode 11 and the lower electrode 12 was raised to 200 ° C. by a built-in heater, and NF ₃ gas was supplied to the reaction vessel 10 at a flow rate of 200 sccm for 60 seconds. An NF ₃ gas was supplied while evacuating by operating a vacuum pump as an exhaust means. The pressure in the reaction vessel 10 supplied with NF ₃ gas is about 1.5 Pa.

Next, nitrogen gas was supplied to the reaction vessel 10 while operating a vacuum pump as exhaust means, and nitrogen gas plasma was generated, and the amorphous silicon film formed on the substrate 30 was etched by fluorine radicals. The conditions of the nitrogen gas plasma treatment process are shown below.
・ Process gas type (flow rate)
N ₂ (200 sccm)
・ Upper electrode temperature 200 ℃
・ Lower electrode temperature 200 ℃
・ Pressure 40Pa
・ Oscillation frequency of high-frequency oscillation power supply 13.56MHz
・ High frequency oscillation power supply output power 50W
・ Distance between electrodes 20mm
-Electrode area 651.44 cm ²

The change in the thickness of the amorphous silicon film was measured by changing the plasma treatment time with nitrogen gas. FIG. 6 shows the measurement results. FIG. 6 is a scatter diagram showing changes in the thickness of the amorphous film with respect to the plasma treatment time of nitrogen gas. The plasma treatment time was 5 seconds, 10 seconds, 15 seconds, 20 seconds, and 25 seconds. The change in the thickness of the amorphous silicon film is the difference between the thickness of the amorphous silicon film before and after the plasma treatment with nitrogen gas. The thickness of the amorphous silicon film was measured with a film thickness measuring device. The accuracy of the measurement apparatus used is 0.1 nm. Further, the thickness of the amorphous silicon film was measured at 25 points in a rectangular region of 100 mm × 100 mm.

As shown in FIG. 6, it can be seen that the amorphous silicon film is etched by NF ₃ gas by the nitrogen gas plasma treatment. In addition, the amorphous silicon film can be etched in a thickness range of 0.5 nm or less, more specifically from 0.1 nm. The result of FIG. 6 shows that the thickness at which the amorphous silicon film is etched can be adjusted by adjusting the NF ₃ gas concentration in the reaction vessel 10.

Accordingly, in forming the thin film shown in FIGS. 1 to 4, the fluoride gas is supplied to the reaction vessel 10 before the thin film is formed, and fluorine radicals are generated by plasma treatment using another process gas, thereby forming the substrate 30. It is possible to etch the thin film formed on the substrate or the substrate 30 in units of 0.1 nm. For example, the thin film or the substrate 30 can be etched in the range of 0.1 nm to 0.5 nm.

(Embodiment 6)
In this embodiment, manufacturing of a nonvolatile semiconductor memory device will be described as an example of a method for manufacturing a semiconductor device.

FIG. 7 is a block diagram illustrating a configuration example of the nonvolatile semiconductor memory device. The nonvolatile semiconductor memory device of FIG. 7 includes a memory cell array 52 and a logic unit 54 that is connected to the memory cell array 52 and controls a write operation, an erase operation, a read operation, and the like on the same substrate. The memory cell array 52 includes a plurality of word lines WL, a plurality of bit lines BL formed crossing the word lines WL, and a plurality of memory cells MC connected to the word lines WL and the bit lines BL. As the data storage means of the memory cell MC, the nonvolatile memory transistor described in the first embodiment is used. Therefore, a highly reliable nonvolatile semiconductor memory device having excellent charge retention characteristics can be obtained.

The configuration of the logic unit 54 is as follows. A row decoder 62 for selecting a word line and a column decoder 64 for selecting a bit line are provided around the memory cell array 52. The address is sent to the control circuit 58 via the address buffer 56, and the internal row address signal and the internal column address signal are transferred to the row decoder 62 and the column decoder 64, respectively.

For writing and erasing data, a potential obtained by boosting the power supply potential is used. Therefore, a booster circuit 60 controlled by the control circuit 58 according to the operation mode is provided. The output of the booster circuit 60 is supplied to the word line W and the bit line BL formed in the memory cell array 52 via the row decoder 62 and the column decoder 64. The sense amplifier 66 receives the data output from the column decoder 64. Data read by the sense amplifier 66 is held in the data buffer 68, and the data is randomly accessed under the control of the control circuit 58 and output via the data input / output buffer 70. The write data is temporarily held in the data buffer 68 via the data input / output buffer 70 and transferred to the column decoder 64 under the control of the control circuit 58.

FIG. 8 is a circuit diagram illustrating a configuration example of the memory cell array 52. Memory cells MC are arranged in a matrix. FIG. 8 shows a memory cell MC of 3 rows × 2 columns. Each memory cell MC stores 1-bit information and includes a switching transistor Ts and a non-volatile memory memory transistor Tm connected in series. The memory cell array 52 is provided with bit lines BL0 and BL1 and source lines SL0 and SL1 for each column. For each row, first word lines WL1 to WL3 and second word lines WL11 to WL13 are provided.

Focusing on the memory cell MC specified by the bit line BL0 and the first word line WL1, the switching transistor Ts has a gate connected to the second word line WL11 and one of the source and drain connected to the bit line BL0. The other is connected to the nonvolatile memory transistor Tm. The nonvolatile memory transistor Tm has a gate connected to the first word line WL1, one of a source and a drain connected to the switching transistor Ts, and the other connected to the source line SL0.

When both the switching transistor Ts and the nonvolatile memory memory transistor Tm are n-channel type, in order to write data to the memory cell MC specified by the bit line BL0 and the first word line WL1, the second word line W11 and the bit A high voltage is applied to the second word line W11 by setting the potential of the line BL0 to the H level and the potential of the bit line BL1 to the L level. As a result, charges are injected into the charge storage layer of the nonvolatile memory memory transistor Tm. In order to erase data from the nonvolatile memory transistor Tm, the potentials of the first word line W1 and the bit line BL0 are set to H level, and a negative high voltage is applied to the second word line W11.

Next, a method for manufacturing a nonvolatile semiconductor memory device will be described with reference to FIGS.

In the nonvolatile semiconductor memory device, the transistors in the memory cell array have a higher driving voltage than the transistors in the logic portion. Therefore, the transistors in the memory cell array and the transistors in the logic portion preferably have different structures depending on the driving voltage. For example, when the driving voltage is small and it is desired to reduce variation in threshold voltage value, it is preferable to make the gate insulating film thin. When the driving voltage is large and the dielectric strength of the gate insulating film is required, it is preferable to increase the thickness of the gate insulating film.

Thus, in this embodiment, a method for manufacturing transistors with different gate insulating film thickness over the same substrate is described. In this embodiment, a method for manufacturing a transistor and a nonvolatile memory transistor with thin film transistors will be described. Further, in this embodiment mode, a method for manufacturing a nonvolatile semiconductor device will be described by using the device in FIG. 7 as an example of a nonvolatile semiconductor memory device and an example in which the memory cell array 52 is configured by the circuit illustrated in FIG. To do. This also applies to the nonvolatile semiconductor memory devices of Embodiments 4 to 8 described later.

9 to 12 are cross-sectional views for explaining a manufacturing process of this embodiment mode. 9 to 12, a cross section of the p-channel transistor Trp provided in the logic portion 54 is shown between A and B, and a cross section of the n-channel transistor Trn provided in the logic portion 54 is shown between C and D. Further, a cross section of the nonvolatile memory transistor Tm provided in the memory cell MC is shown between EF, and a cross section of the switching transistor Ts of the memory cell MC is shown between GH. 13 to 15 are top views for explaining a manufacturing process of this embodiment. Cross-sectional views cut along one-dot chain lines AB, CD, EF, and GH in FIGS. 13 to 15 correspond to FIGS. 9 to 12.

First, as illustrated in FIG. 9A, the base insulating film 102 is formed over the substrate 100. As the substrate 100, a glass substrate, a quartz substrate, or a metal substrate (for example, a ceramic substrate or a stainless steel substrate) can be used. The base insulating film 102 can be formed using an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride by a CVD method, a sputtering method, or the like. For example, in the case where the base insulating film 102 has a two-layer structure, a silicon oxynitride layer may be formed as a first insulating layer and a silicon oxynitride layer may be formed as a second insulating layer. Alternatively, a silicon nitride layer may be formed as the first insulating layer, and a silicon oxide layer may be formed as the second insulating layer. In this manner, by forming the base insulating film 102 functioning as a blocking layer, alkali metal such as Na or alkaline earth metal from the substrate 100 can be prevented from adversely affecting the element formed thereon. .

Next, island-shaped semiconductor films 104, 106, 108, and 110 are formed over the base insulating film 102. FIG. 13 is a top view of the island-shaped semiconductor films 104, 106, 108, 110. The formation of the island-shaped semiconductor films 104, 106, 108, and 110 can be performed as follows. An amorphous semiconductor film containing silicon (Si) as a main component is formed by a sputtering method, an LPCVD method, a PECVD method, or the like, and the amorphous semiconductor film is crystallized to form a crystalline semiconductor film. The crystalline semiconductor film is etched to form island-shaped semiconductor films 104, 106, 108, and 110. Note that an amorphous silicon film, an amorphous germanium film, an amorphous silicon germanium film, or the like can be formed as the amorphous semiconductor film. The amorphous semiconductor film is crystallized by a laser crystallization method, a thermal crystallization method using an RTA or a furnace annealing furnace, a thermal crystallization method using a metal element that promotes crystallization, or a method combining these methods. It can be carried out.

Alternatively, an SOI substrate can be used as the substrate 100. In this case, the semiconductor layer of the SOI substrate can be etched to form island-shaped semiconductor films 104, 106, 108, and 110. Further, the semiconductor layer can be partially oxidized, and the regions that are not oxidized can be island-shaped semiconductor films 104, 106, 108, and 110. A GOI substrate or an SGOI substrate can be used instead of the SOI substrate.

Next, as illustrated in FIG. 9A, an insulating film 112 is formed so as to cover the island-shaped semiconductor films 104, 106, 108, and 110. The insulating film 112 is formed by a LPCVD method or a PECVD method as a single layer film or a multilayer film including two or more layers of silicon oxide, silicon nitride, and silicon oxynitride. The insulating film 112 functions as a gate insulating film of the transistor Ts of the memory cell MC. Therefore, it is formed to a thickness of 10 nm to 50 nm.

Next, as illustrated in FIG. 9B, the insulating film 112 is selectively removed to expose the surfaces of the semiconductor films 104, 106, and 108. Here, the semiconductor film 110 provided in the memory portion is selectively covered with a resist 114, and the insulating film 112 formed over the semiconductor films 104, 106, and 108 is removed by etching.

The resist 114 is removed, and as shown in FIG. 9C, insulating films 116, 118, and 120 are formed over the semiconductor films 104, 106, and 108, respectively. The thickness of the insulating films 116, 118, and 120 is preferably 1 to 10 nm, and more preferably 1 to 5 nm. Note that the insulating films 116 and 118 are removed in a later step.

The insulating films 116, 118, and 120 can be formed by heat treatment or high-density plasma treatment of the semiconductor films 104, 106, and 108. Here, first, a mixed gas of oxygen (O ₂ ) and argon (Ar) is introduced into the reaction vessel, oxygen radicals are generated by high-density plasma, and the semiconductor films 104, 106, and 108 are oxidized. A silicon oxide layer having a thickness of about 3 nm to 6 nm is formed on the surfaces of the semiconductor films 104, 106, and 108. The flow rate of the process gas can be 0.1 to 100 sccm for oxygen and 100 to 5000 sccm for argon.

Subsequently, a mixed gas of nitrogen (N ₂ ) and argon (Ar) is introduced into the reaction vessel that has been subjected to the oxidation treatment, and nitrogen radicals are generated by high-density plasma to nitride the silicon oxide layer. For example, by adjusting the nitriding time, a layer with a nitrogen concentration of about 20 to 50 atomic% and a thickness of about 1 nm can be formed in the silicon oxide layer. At this time, the surface of the insulating film 112 formed over the semiconductor film 110 may also be oxidized or nitrided to form a silicon oxynitride layer. The process flow rate can be 20-2000 sccm for nitrogen and 100-10000 sccm for argon.

Next, as illustrated in FIG. 10A, the charge storage layer 122 is formed so as to cover the insulating film 112 and the insulating films 116, 118, and 120. For example, the method for forming a thin film described in Embodiments 1 to 4 can be used to form the charge storage layer 122. Here, the thin film formation method of Embodiment 1 is applied. First, the reaction vessel 10 of the PECVD apparatus in FIG. 5 is cleaned using NF ₃ gas. Then, the substrate 100 in the state of FIG. 9C is carried into the reaction vessel 10. NH ₃ and SiH ₄ are supplied to the reaction vessel 10 as a process gas for forming a thin film, and a silicon nitride film is formed as the charge storage layer 122. When NH ₃ and SiH ₄ are plasma-excited, NF ₃ present in the reaction vessel 10 is also converted into plasma, and fluorine radicals pour onto the substrate 100. As a result, the insulating films 112, 116, 118, and 120 are slightly etched. Since the insulating film 120 can be thinned, writing characteristics or reading characteristics to the memory transistor Tm can be improved.

Next, as shown in FIG. 10B, a resist 124 is formed, and the insulating films 116 and 118 and the charge storage layer 122 are partially removed by etching, and the top surfaces of the semiconductor films 104 and 106 and the semiconductor film The upper surface of the insulating film 120 on the upper surface 108 is exposed, and the charge storage layer 122 is left on the semiconductor film 108 to be the memory transistor Tm.

The resist 124 is removed, and an insulating film 128 is formed over the substrate 100 as shown in FIG. The insulating film 128 is formed by depositing an insulating material made of silicon oxide, silicon nitride, silicon oxynitride, or the like using a CVD method, a sputtering method, or the like. The insulating film 128 is formed of a single layer film or a multilayer film of two or more layers. For example, in the case where the insulating film 128 is provided as a single layer, a silicon oxynitride layer is formed with a thickness of 5 to 50 nm by a CVD method. In the case where the insulating film 128 is provided with a three-layer structure, a silicon oxynitride layer is formed as the first insulating layer, a silicon nitride layer is formed as the insulating film, and silicon oxynitride is used as the third insulating layer. Form a layer. Note that in the case where the insulating film 128 is formed by PECVD, the method for forming a thin film in Embodiments 1 to 4 can be used.

Next, as illustrated in FIG. 11A, the conductive film 130 is formed over the insulating film 128 and the conductive film 132 is formed over the conductive film 130. The stacked film formed of the conductive film 130 and the conductive film 132 constitutes the gate electrodes of the transistors Trp, Trn, Ts and the memory transistor Tm. An example is shown. Needless to say, the gate electrode can be formed using a single-layer conductive film.

Note that in the case where the memory transistor Tm is an MNOS type, etching is performed before the step of forming the conductive film 130 to remove the insulating film 128 from the region where the memory transistor Tm is formed.

The conductive films 130 and 132 can have a single-layer structure or a multilayer structure including two or more layers. Examples of the conductive material forming the conductive films 130 and 132 include tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), and niobium. A single metal selected from (Nb) or the like, an alloy containing these metals as a main component, a compound material, and polycrystalline silicon doped with an impurity element such as phosphorus can be used. For example, examples of the metal compound include metal nitride and silicide.

For example, the conductive film 130 is formed using a tantalum nitride film, and the conductive film 132 is formed using a tungsten film. In addition, the conductive film 130 is formed using a single layer film or a stacked film of a conductive material selected from tungsten nitride, molybdenum nitride, or titanium nitride, and the conductive film 132 is a single layer of a conductive material selected from tantalum, molybdenum, or titanium. The film can be formed of a laminated film.

Next, as illustrated in FIG. 11B, the stacked film including the conductive films 130 and 132 is etched to form conductive films 134, 136, 138, and 140 that overlap the semiconductor films 104, 106, 108, and 110. . FIG. 14 is a top view of this state.

Next, as illustrated in FIG. 11C, a resist 142 that covers the semiconductor film 104 is selectively formed. An n-type impurity is added to the semiconductor films 106, 108, and 110 using the conductive films 136, 138, and 140 as masks to form n-type high concentration impurity regions 146, 150, and 154. The high concentration impurity regions 146, 150, and 154 constitute a source region or a drain region. By the addition of the n-type impurity, channel formation regions 144, 148, and 152 are formed in the semiconductor films 106, 108, and 110 in a self-aligned manner.

The resist 142 is removed. Next, as illustrated in FIG. 12A, a resist 156 that covers the resist 156 and the semiconductor films 106, 108, and 110 is formed. A p-type impurity is added to the semiconductor films 104, 108, and 110 using the conductive film 134 as a mask to form a p-type high concentration impurity region 160. The high concentration impurity region 160 forms a source region or a drain region. By the addition of this p-type impurity, a channel formation region 158 is formed in the semiconductor film 104 in a self-aligned manner.

The resist 156 is removed. Next, as illustrated in FIG. 12B, an insulating film 162 is formed so as to cover the conductive films 134, 136, 138, and 140. Openings reaching the high-concentration impurity regions 146, 150, 154, and 160 are formed in the insulating film 162. A conductive film 164 electrically connected to the high concentration impurity regions 146, 150, 154, and 160 formed in the semiconductor films 104, 106, 108, and 110 is formed over the insulating film 162. FIG. 15 is a top view of this state.

The insulating film 162 can have a single-layer structure or a stacked structure. The insulating film constituting the insulating film 162 can be formed using an inorganic insulating film such as silicon oxide, silicon nitride, silicon oxynitride, or DLC (diamond-like carbon) by a CVD method, a sputtering method, or the like. Alternatively, a film made of an organic material such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, or acrylic, or a film made of a siloxane material such as a siloxane resin can be used.

The conductive film 164 can have a single-layer structure or a stacked structure. The conductive material that forms the conductive film 164 includes aluminum (Al), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), nickel (Ni), CVD, sputtering, and the like. A single metal element selected from platinum (Pt), copper (Cu), gold (Au), silver (Ag), manganese (Mn), and neodymium (Nd), or an alloy material or compound containing these elements as a main component Materials can be used. For example, the alloy material containing aluminum as a main component includes, for example, an alloy of aluminum and nickel, an aluminum alloy containing nickel, and one or both of carbon and silicon. Aluminum or aluminum silicon is suitable for a material for forming the conductive film 164 because it has low resistance and is inexpensive.

For example, as the conductive film 164 having a three-layer structure, a barrier layer, an aluminum silicon (Al—Si) layer and a barrier film are stacked, a barrier layer, an aluminum silicon (Al—Si) layer, a titanium nitride (TiN _x ) layer, and a barrier. There is a laminated film of layers. The barrier layer is formed of a thin film made of titanium, titanium nitride, molybdenum, or molybdenum nitride. When the upper and lower barrier layers are provided, generation of hillocks of aluminum or aluminum silicon can be prevented. In addition, when a barrier layer made of titanium, which is a highly reducing element, is formed, even if a thin natural oxide film is formed on the crystalline semiconductor layer, the natural oxide film is reduced, and the crystalline semiconductor layer is excellent. Contact can be made.

Through the above steps, a nonvolatile semiconductor device in which the memory cell array 52 and the logic portion 54 are integrated on the same substrate 100 can be manufactured.

(Embodiment 7)
In order to form an integrated circuit using a TFT (Thin Film Transistor, hereinafter referred to as “TFT”) on a glass substrate, a crystallization technique has been studied with the goal of forming single crystal silicon on the glass substrate. Yes. As a crystallization technique studied by the present applicant, a technique for crystallizing silicon by adding a metal element such as nickel to an amorphous silicon film has been developed. In this crystallization technique, a metal element acts as a catalyst to promote crystallization, and utilizes the effect of lowering the temperature required for crystallization. By using a metal element, it is possible to enhance the crystal orientation of crystallized silicon. It is known that such a catalytic metal element is one or more selected from Fe, Ni, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.

However, the metal element is a factor that lowers the reliability of the TFT, such as variations in electrical characteristics and an increase in leakage current, and the metal element becomes unnecessary once the crystalline silicon film is formed. Therefore, the present applicant has also developed a gettering technique for removing the metal element from the amorphous silicon film. One of the gettering techniques is a gettering technique using a semiconductor film containing a rare gas element as a gettering site.

A method for manufacturing a semiconductor device including a gettering process in which a semiconductor film containing a rare gas element is used as a gettering site will be described with reference to FIGS.

A substrate 200 is prepared. The substrate 200 to be used is preferably made of alkali-free glass such as barium borosilicate glass or alumino borosilicate glass, or quartz. Next, an inorganic insulating film having a thickness of 10 to 200 nm is formed on the surface of the substrate 200 as the insulating film 201. The insulating film 201 is provided so that the alkali metal contained in the glass substrate does not diffuse into the semiconductor film formed in the upper layer, and is formed in order to lower the interface density level with the channel formation region of the TFT. The insulating film 201 functions as a base insulating film of the TFT. A preferable example of the insulating film 201 is a silicon oxynitride film formed by a PECVD method. A silicon oxynitride film using SiH ₄ , NH ₃ and N ₂ O as a process gas is formed to a thickness of 50 nm, and a silicon oxynitride film using SiH ₄ and N ₂ O as a process gas is formed to a thickness of 100 nm. The two-layered silicon oxynitride film formed as described above can be formed as the insulating film 201.

Next, an amorphous silicon film 202 is formed over the insulating film 201. A film obtained by crystallizing the amorphous silicon film 202 is used for a channel formation region of the TFT. The amorphous silicon film 202 is formed to a thickness of 10 to 100 nm by PECVD, low pressure CVD, or sputtering.
Instead of the amorphous silicon film 202, an amorphous silicon germanium film can be formed.

Next, thereafter, a metal element having a catalytic action for promoting crystallization is added to the surface of the amorphous silicon film 202. Examples of catalytic metal elements that promote crystallization of silicon include iron (Fe), nickel (Ni), cobalt (Co), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), Examples include iridium (Ir), platinum (Pt), copper (Cu), and gold (Au). One or more selected from these can be used. For example, when nickel is added, the catalyst-containing layer 203 is formed by applying a nickel acetate aqueous solution containing 1 to 100 ppm of nickel in terms of weight with a spinner. In this case, since amorphous silicon is hydrophobic, it is difficult to form a uniform layer when the catalyst-containing layer 203 is formed using an aqueous solution. Therefore, before applying the aqueous solution, the amorphous silicon film 202 is surface-treated with an ozone-containing aqueous solution to form a chemical oxide film. This chemical oxide film is etched with a mixed solution of hydrofluoric acid and hydrogen peroxide solution to clean the surface, and then again treated with an aqueous solution containing ozone to form chemical oxide. As a method of adding the catalyst element to the amorphous silicon film 202, there is a method of forming the catalyst-containing layer 203 by a sputtering method, a vapor deposition method, a plasma treatment, or the like in addition to a method of applying a solution.

Next, heat treatment of the amorphous silicon film 202 is performed for crystallization. As a heat treatment method, a furnace annealing method using an electric furnace, an RTA method (Rapid Thermal Annealing method) using a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, a high pressure mercury lamp, etc. Can be used.

When the RTA method is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The emission intensity of the lamp light source is arbitrary, but the semiconductor film is instantaneously heated to 600 to 1000 ° C., preferably about 650 to 750 ° C. Even at such a high temperature, the semiconductor film is only heated instantaneously, and the substrate 100 itself is not distorted and deformed. In this way, the amorphous semiconductor film can be crystallized to obtain the crystalline semiconductor film 104 shown in FIG. 1C. The crystal can be crystallized by such treatment only by providing the catalyst element-containing layer. It can be achieved.

In the case of using the furnace annealing method, the heat treatment is performed at 500 ° C. for about one hour before the heat treatment, and hydrogen contained in the amorphous silicon film 202 is released. Then, using an electric furnace, heat treatment is performed at 550 ° C. to 600 ° C., preferably 580 ° C. for 4 hours in a nitrogen atmosphere, and the amorphous silicon film 202 is crystallized. Thus, a crystalline silicon film 205 is formed as shown in FIG. It is also effective to irradiate the crystalline silicon film with laser light in order to increase the crystallization rate (ratio of the crystal component in the total volume of the film) and reduce defects left in the crystal grains.

In the crystalline silicon film 205 obtained in this way, the catalyst element (here, nickel) remains. Although nickel is not uniformly distributed in the crystalline silicon film 205, the average concentration of the catalyst element exceeds 1 × 10 ¹⁹ atoms / cm ³ when converted from the added nickel concentration. In this embodiment mode, an amorphous silicon film containing a rare gas is used as a gettering site in order to getter nickel from the crystalline silicon film 205.

First, as shown in FIG. 16C, a barrier layer 206 is formed on the surface of the crystalline silicon film 205. The barrier layer 206 is a layer provided so that the crystalline silicon film 205 is not etched when the gettering site is removed later.

Next, as illustrated in FIG. 16D, an amorphous silicon film 207 serving as a gettering site is formed over the barrier layer 206. The amorphous silicon film 207 contains a rare gas element at a concentration of 1 × 10 ²⁰ / cm ³ or more. Such an amorphous silicon film 207 can be formed by PECVD using process gas Ar and SiH ₄ . Further, the amorphous silicon film 207 can be formed by sputtering by using single crystal silicon as a target and setting the atmosphere to Ar.

After the amorphous silicon film 207 containing a rare gas is formed, heat treatment is performed, and the heat treatment is performed by a furnace annealing method or an RTA method. In the case of performing furnace annealing, the treatment time is set to 0.5 to 12 hours at a heating temperature of 450 ° C. to 600 ° C. in a nitrogen atmosphere. When the RTA method is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The temperature of the crystalline silicon film 205 is raised to 600 ° C. or higher and 1000 ° C. or lower, preferably 700 ° C. or higher and 750 ° C. or lower by turning on the lamp light source.

By performing the heat treatment, the nickel element in the crystalline silicon film 205 is diffused into the amorphous silicon film 207. The diffused nickel is captured by the amorphous silicon film 207, and a crystalline silicon film 205 'having a reduced nickel concentration is formed.

After the heat treatment for gettering is completed, the amorphous silicon film 207 is removed by etching as shown in FIG. The barrier layer 206 functions as an etching stopper for preventing the crystalline silicon film 205 'from being removed. Therefore, the barrier layer 206 is preferably formed using silicon oxide.

In the gettering, nickel is diffused from the crystalline silicon film 205 to the amorphous silicon film 207 through the barrier layer 206. Therefore, in order to perform gettering efficiently and reliably, the thickness of the silicon oxide serving as the barrier layer 206 is preferably 2 nm or less according to the knowledge of the present inventors.

However, it is very difficult to form such a silicon oxide film on the large-sized substrate (area 100 m ₂ or more). If the thickness does not exceed 2 nm, pinholes are likely to occur. On the other hand, when the silicon oxide film is formed so as to prevent pinholes, a portion having a thickness of 2 nm or more is generated. In such a portion, nickel hardly passes and gettering is hindered.

By applying the thin film formation method of Embodiments 1 to 4 to the formation process of the amorphous silicon film 207, such a problem can be solved.

First, a silicon oxide film is formed as the barrier layer 206. As a method for forming the silicon oxide film, a method in which the surface of the crystalline silicon film 205 is treated with ozone water to form a chemical oxide film is simple and preferable. In addition, chemical oxide can be similarly formed by treating with an aqueous solution in which sulfuric acid, hydrochloric acid, nitric acid or the like and hydrogen peroxide are mixed in addition to ozone water. Further, the processing time is adjusted so that the thickness of the silicon oxide film becomes 2 nm.

Next, an amorphous silicon film 207 is formed by PECVD. Here, the method of Embodiment 2 is used. First, the substrate 200 on which the barrier layer 206 is formed is loaded into the reaction vessel 10. Then, NF ₃ gas is supplied to the reaction vessel 10. Next, nitrogen gas is plasma-excited while supplying nitrogen gas to the reaction vessel. By this plasma treatment, NF ₃ gas is decomposed to generate fluorine radicals, and the fluorine radicals pour onto the substrate 200. As a result, the barrier layer 206 is etched to about 0.1 nm to 0.5 nm. As a result, the barrier layer 206 can be free from a portion having a thickness exceeding 2 nm. The nitrogen gas plasma treatment is stopped, and Ar and SiH ₄ are supplied to the reaction vessel 10 as a process gas for forming a thin film to form an amorphous silicon film 207.

By using the thin film formation method of Embodiment Modes 1 to 4 in the formation process of the amorphous silicon film 207, the barrier layer 206 that functions reliably as an etching stopper and that can reliably perform gettering can be easily obtained. Can be formed.

Various semiconductor devices can be manufactured by manufacturing TFTs using the crystalline silicon film 205 ′ formed through the processes of FIGS. 16A to 16E. For example, the memory device in Embodiment 6 can be manufactured. Hereinafter, an example of a semiconductor device having a TFT that can be manufactured using the present invention will be described.

First, an active matrix EL module will be described as an example of a semiconductor device. FIG. 17A is a front view illustrating a configuration example of an EL module, and FIG. 17B is a cross-sectional view taken along line A-A ′ in FIG.

The EL module shown in FIG. 17 can be bent and has a structure in which a TFT and a light-emitting element are sealed with a sealant 305 formed between a first substrate 301 and a second substrate 306. A pixel portion 302, a signal line driver circuit 303, and a scanning line driver circuit 304 are formed on the first substrate 301 to constitute an EL module substrate.

The EL module is configured by sealing the EL module substrate with the sealing material 305 and the second substrate 306. In the EL module of FIG. 17, a filler 307 is filled in a space sealed by the EL module substrate, the sealing material 305, and the second substrate 306. As the filler 307, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used. Polyvinyl chloride, acrylic, polyimide, epoxy resin, silicon resin, polyvinyl butyral, or ethylene Vinylene acetate can be used.

The pixel portion 302, the signal line driver circuit 303, and the scan line driver circuit 304 include a plurality of TFTs. In FIG. 17B, only the TFT 308 included in the signal line driver circuit 303 and the TFT 310 included in the pixel portion 302 are illustrated. Yes. The pixel portion 302 includes a light emitting element 311, and the light emitting element 311 is electrically connected to the TFT 310.

The lead wiring 314 is a wiring for supplying a signal and power to a circuit in the element formation layer 300 from the outside. The lead wiring 314 is connected to the connection terminal 316 having a two-layer structure via the lead wiring 315b and the lead wiring 315a. The connection terminal 316 is electrically connected to a terminal included in a flexible printed circuit (FPC) 318 through an anisotropic conductive film 319.

Next, an active matrix liquid crystal module will be described as an example of a semiconductor device. 18A is a front view of the liquid crystal module, and FIG. 18B is a cross-sectional view taken along A-A ′ in FIG.

Reference numeral 400 denotes a first substrate, 401 indicated by a dotted line, 401 denotes a driver circuit portion (source side driver circuit), 402 denotes a pixel portion, and 403 denotes a driver circuit portion (scanning line driver circuit). On the first substrate 400, a pixel portion 402 made of TFT or the like, and drive circuits 401 and 403 made of TFT or the like are formed.

Next, a cross-sectional structure of the LCD module will be described with reference to FIG. The TFT is formed on an insulating film 409 made of an insulating film. The signal line driver circuit 401 includes a CMOS circuit in which an n-channel TFT 411 and a p-channel TFT 412 are combined. The pixel portion 402 includes a switching TFT 413 and a capacitor 414. The switching TFT 413 is covered with an interlayer insulating film 421. A pixel electrode 422 is formed on the interlayer insulating film 421. The pixel electrode 422 is electrically connected to the switching TFT 413.

A protective film 423 is formed to cover the wiring of the switching TFT 413, the pixel electrode 422, the n-channel TFT 411, and the p-channel TFT 412. The protective film 223 can prevent impurities from entering the active layer of the TFT, the interlayer insulating film 421, and the like. An alignment film 424 is formed over the protective film 423. Note that the alignment film 424 is formed as necessary.

The wiring 410 is a wiring for transmitting a signal input to the signal line driver circuit 401 and the scanning line driver circuit 403, and is connected to an FPC (flexible printed circuit) 408 serving as an external input terminal. The liquid crystal module of the present invention includes both a form in which only the FPC 408 is attached and a form in which both the FPC 408 and the PWB are attached. The liquid crystal module of this embodiment includes a liquid crystal module substrate having a first substrate 400 on which a TFT is formed, a counter substrate having a second substrate 430 as a base material, a sealing material 405, a liquid crystal 440, and an FPC (flexible flexible substrate). Print circuit) 408.

As the counter substrate, a color filter 431, a black matrix (BM) 432, a counter electrode 433, and an alignment film 434 are formed on a second substrate 430. The color filter 431 can also be provided on the first substrate 400 side. In addition, an IPS liquid crystal module can be formed by providing the counter electrode 433 on the first substrate 400.

The second substrate 430 is fixed by a sealant 405 so as to face the first substrate 400, and the liquid crystal 440 is sealed between the first substrate 400 and the first flexible substrate 404 by the sealant 405. .

18A and 18B show a liquid crystal module in which the driving circuits 401 and 403 are configured by TFTs, but only the pixel portion 402 is formed by TFT, and the driving circuits 401 and 403 are formed by a silicon wafer. It is also possible to use an IC chip using the above and to be electrically connected to the pixel portion 402 on the first substrate 400 by a COG method or a TAB method.

The semiconductor device of the present invention includes an electronic device having an EL module as shown in FIG. 17 and a liquid crystal module shown in FIG. 18 in a display portion. Hereinafter, the liquid crystal module and the EL module are collectively referred to as a “display module”. Such electronic devices include computer monitors, television devices (also simply referred to as televisions or television receivers), digital cameras, digital video cameras, mobile phone devices (also simply referred to as mobile phones and mobile phones), and PDAs. (Personal Digital Assistant) and other portable information terminals, notebook computers, car audio systems, navigation systems, digital music players, portable DVD players, portable game machines, and arcade game machines. A specific example will be described with reference to FIG.

A portable information terminal illustrated in FIG. 19A includes a main body 9201, a display portion 9202, and the like. A display module is applied to the display portion 9202. A digital video camera shown in FIG. 19B includes a display portion 9701, a display portion 9702, and the like. A display module is applied to the display portion 9701. A mobile phone shown in FIG. 19C includes a main body 9101, a display portion 9102, and the like. A display module 9102 display module is applied.

A portable television device illustrated in FIG. 19D includes a main body 9301, a display portion 9302, and the like. A display module is applied to the display portion 9302. A portable computer illustrated in FIG. 19E includes a main body 9401, a display portion 9402, and the like. A display module is applied to the display portion 9402. A television set illustrated in FIG. 19F includes a main body 9501, a display portion 9502, and the like. A display module is applied to the display portion 9502.

The flowchart which shows the formation method of a thin film. The flowchart which shows the formation method of a thin film. The flowchart which shows the formation method of a thin film. The flowchart which shows the formation method of a thin film. The figure which shows the structural example of a PECVD apparatus. The graph which shows the relationship between nitrogen plasma processing time and the change of the film thickness of an amorphous silicon film. FIG. 10 is a block diagram illustrating a configuration example of a semiconductor device. The circuit diagram which shows the structural example of a memory cell array. 9 is a cross-sectional view illustrating a method for manufacturing a semiconductor device. 9 is a cross-sectional view illustrating a method for manufacturing a semiconductor device. 9 is a cross-sectional view illustrating a method for manufacturing a semiconductor device. 9 is a cross-sectional view illustrating a method for manufacturing a semiconductor device. FIG. 10 is a top view illustrating a method for manufacturing a semiconductor device. FIG. 10 is a top view illustrating a method for manufacturing a semiconductor device. FIG. 10 is a top view illustrating a method for manufacturing a semiconductor device. 9 is a cross-sectional view illustrating a method for manufacturing a semiconductor device. (A) Front view of EL module. (B) A cross-sectional view of an EL module. (A) Front view of liquid crystal module. (B) Sectional drawing of a liquid crystal module. FIG. 14 is an external view of an electronic device having a semiconductor device in a display portion. (A) a portable information terminal, (B) a digital video camera, (C) a mobile phone, (D) a portable television device, (E) a portable computer, and (F) a television device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Reaction container 11 Upper electrode 12 Lower electrode 13 Piping 14 High frequency oscillation power supply 15 Exhaust port 30 Substrate 52 Memory cell array 54 Logic part 56 Address buffer 58 Control circuit 60 Booster circuit 62 Row decoder 64 Column decoder 66 Sense amplifier 68 Data buffer 70 Data input Output buffer 100 Substrate 102 Underlying insulating film 104 Semiconductor film 106 Semiconductor film 108 Semiconductor film 110 Semiconductor film 112 Insulating film 114 Resist 116 Insulating film 120 Insulating film 122 Charge storage layer 124 Resist 128 Insulating film 130 Conductive film 132 Conductive film 134 Conductive film 136 Conductive film 142 Resist 144 Channel formation region 146 High concentration impurity region 156 Resist 158 Channel formation region 160 High concentration impurity region 162 Insulating film 164 Conductive film 200 Substrate 201 Edge film 202 Amorphous silicon film 203 Catalyst-containing layer 205 Crystalline silicon film 205 ′ Crystalline silicon film 206 Barrier layer 207 Amorphous silicon film 210 Wiring 223 Protective film 300 Element formation layer 301 Substrate 302 Pixel portion 303 Signal line drive Circuit 304 Scanning line drive circuit 305 Seal material 306 Substrate 307 Filler 308 TFT
310 TFT
311 Light emitting element 314 Wiring 315a Wiring 315b Wiring 316 Connection terminal 318 Flexible printed circuit (FPC)
319 Anisotropic conductive film 400 Substrate 401 Signal line drive circuit 402 Pixel portion 403 Scan line drive circuit 404 Flexible substrate 405 Seal material 408 FPC (flexible printed circuit)
409 Insulating film 411 n-channel TFT
412 p-channel TFT
413 TFT for switching
414 Capacitance element 421 Interlayer insulating film 422 Pixel electrode 423 Protective film 424 Alignment film 430 Substrate 431 Color filter 432 Black matrix (BM)
433 Counter electrode 434 Alignment film 440 Liquid crystal 9101 Main body 9102 Display unit 9201 Main unit 9202 Display unit 9301 Main unit 9302 Display unit 9401 Main unit 9402 Display unit 9501 Main unit 9502 Display unit 9701 Display unit 9702 Display unit

Claims (2)

A method for manufacturing a semiconductor device including a step of forming a thin film in a plasma CVD apparatus provided with a reaction vessel,
Installing a substrate in the reaction vessel;
Introducing fluoride gas or fluorine gas into the reaction vessel to clean the inside of the reaction vessel,
Stopping the introduction of the fluoride gas or the fluorine gas into the reaction vessel, introducing nitrogen gas into the reaction vessel, and applying an electric field to the nitrogen gas to generate a first plasma;
Stopping the introduction of the nitrogen gas into the reaction vessel,
The reaction for forming a thin film process gas introduced city container, the thin film forming process gas by applying an electric field to generate a second plasma, said substrate by active species chemical reactions involved in the second plasma A method for manufacturing a semiconductor device, comprising forming the thin film on a surface on which the semiconductor device is formed. In claim 1,
By applying an electric field to the nitrogen gas to generate the first plasma, the fluoride gas or the fluorine gas remaining in the reaction vessel is also turned into plasma, and the formation surface of the substrate is etched. And a method for manufacturing a semiconductor device, wherein the fluoride gas or the fluorine gas remaining in the reaction vessel is reduced.

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