JP2001319877A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the orientation of a crystalline semiconductor film of an amorphous semiconductor film made by a thermal crystallizing or laser annealing method, improve the characteristics of a TFT and reduce the characteristics variation by using such crystalline semiconductor film. SOLUTION: The method comprises a step of selectively forming a first insulation film on an insulator surface, a step of forming a second insulation film on the insulator surface and the first insulation film, a step of treating the second insulation film surface with a halogen element, a step of forming an amorphous semiconductor film on the second insulation film, a step of adding a catalytic element into or in contact wit the amorphous semiconductor film, a step of applying a first thermal treatment to the amorphous semiconductor film to form a first crystalline semiconductor film, and a step of irradiating the first crystalline semiconductor film with a laser beam to form a second crystalline semiconductor film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device using a semiconductor film having a crystal structure and a method for manufacturing the same. In this specification, a semiconductor device refers to any device utilizing semiconductor characteristics, such as a liquid crystal display device manufactured using a thin film transistor (hereinafter, referred to as a TFT) or an electroluminescent (hereinafter, referred to as EL) material. An electro-optical device typified by a self-luminous display device using the same and an electronic device using the electro-optical device as a component are included in the category.

[0002]

2. Description of the Related Art A technique for producing a semiconductor film having a crystalline structure by crystallizing an amorphous semiconductor film on a glass substrate or a quartz substrate by the energy of light or heat (hereinafter referred to as a crystalline semiconductor film) has been developed. Have been. A laser annealing method is known as a method using laser light such as excimer laser light or YAG laser light in addition to a method for obtaining a crystalline semiconductor film by heat treatment using a furnace annealing furnace.

In order to crystallize an amorphous silicon film by heat treatment, it is necessary to perform heat treatment at a temperature of 600 ° C. or more for about 10 to 24 hours. However, a manufacturing process that requires a long-time heat treatment at such a temperature has a problem that throughput is reduced and productivity is reduced.

On the other hand, the laser annealing method has a
The amorphous silicon film can be crystallized by irradiating a laser beam with an energy density of about 00 mJ / cm ² . Laser light is condensed by an optical system so as to be linear or rectangular on the surface to be irradiated, and is scanned on the surface to be processed (the position of the laser light is moved relative to the surface to be irradiated). By doing so, it is possible to crystallize a large-area substrate.

The second harmonic (532) of an excimer laser beam or a YAG laser beam having a wavelength of 400 nm or less for pulse oscillation.
Most of the amorphous silicon film absorbs most of the second to fourth harmonics (266 nm), so that the silicon is instantaneously heated. However, since irradiation is performed with a pulse width of several tens to several hundreds of nanoseconds, the temperature of the substrate itself hardly rises. However, the size of the crystal grains is less than 1 μm, and the characteristics of the TFT are considerably inferior to those of a MOS transistor using a single crystal semiconductor due to the influence of the grain boundaries.

As another crystallization technique, a thermal crystallization method using a catalytic element has been developed. JP-A-7-1306
The crystallization method using a catalyst element disclosed in Japanese Patent Application Laid-Open No. 52-78, JP-A-8-78329, etc. introduces a catalyst element capable of lowering the crystallization temperature of silicon into an amorphous silicon film. This makes it possible to form a crystalline silicon film by heat treatment at 550 ° C. for 4 hours.

However, in any case, a crystalline semiconductor film formed from an amorphous semiconductor film on a glass substrate or a quartz substrate has a structure in which a plurality of crystal grains are aggregated, and the position and size of the crystal grains are determined. It was not possible to make the regularity. It is known that the interface between crystal grains (grain boundaries) has a defect level caused by crystal discontinuity and crystal defects, and the effect of potential at the crystal grain boundaries deteriorates electron / hole carrier transport characteristics. I have.

In an active matrix type liquid crystal display device or an EL display device which forms a pixel portion and a driving circuit thereof by using a TFT formed from a crystalline semiconductor film on a glass substrate or a quartz substrate, the image quality is becoming higher and higher. Inevitably, the size of one pixel is inevitably reduced. As a result, the proportion of the area occupied by the TFT, the source wiring, the gate wiring, and the like in the pixel portion increases, and the aperture ratio decreases. For this reason, the size of the TFT is limited and must be reduced.

However, as the size of the TFT becomes smaller,
The influence of the grain boundaries in the channel formation region becomes even greater, and there is a concern that the characteristics of the TFT may vary depending on the area ratio occupied by the grain boundaries.

[0010]

SUMMARY OF THE INVENTION A crystalline silicon film obtained by crystallizing an amorphous silicon film on a quartz substrate or a glass substrate by a heat treatment or a laser anneal method is affected by the interface energy between the base and the silicon film. It has been known from electron diffraction analysis that there are a number of crystal grains which are preferentially oriented at <111> and have random orientations in other directions. On the other hand, in a crystalline silicon film formed by a crystallization method using a catalytic element, most of the crystal grains are <110.
> Orientation. However, as described above, other orientations such as <111> are slightly mixed depending on the interface energy between the base film and the silicon film.

In a crystalline semiconductor film composed of a plurality of crystal grains, if the crystal orientation is random, the continuity of the crystal is not satisfied at the grain boundaries, so that many dangling bonds are formed. As a result, carriers are scattered or trapped, so that high field-effect mobility cannot be expected even when a TFT is manufactured.

In order to solve such a problem, it is necessary to increase the size of the crystal, align the orientation, and adjust the position to the position where the TFT is formed. An object of the present invention is to provide means for that purpose, and to improve the orientation of a crystalline semiconductor film formed from an amorphous semiconductor film by a thermal crystallization method or a laser annealing method. Further, a first object is to improve the characteristics of a TFT by using such a crystalline semiconductor film and to reduce variation in characteristics.

Further, in order to realize a high aperture ratio within a specified pixel size, it is essential to efficiently arrange elements necessary for the circuit configuration of the pixel portion. Therefore, an active matrix type having a pixel structure in which a pixel electrode formed in a pixel portion, a gate wiring, and a source wiring are arranged appropriately and a high aperture ratio is realized without increasing the number of masks and the number of steps. A first object is to provide a display device.

[0014]

In order to solve the above-mentioned problems, a structure of the present invention comprises a first step of selectively forming a first insulating film on an insulating surface; A second step of forming a second insulating film on the first insulating film, a third step of treating the surface of the second insulating film with a halogen element, and after the third step, A fourth step of forming a semiconductor film having an amorphous structure over the second insulating film; and forming the amorphous structure in or on the semiconductor film having the amorphous structure. A fifth step of adding a catalytic element that promotes crystallization of the semiconductor film to be formed, and a sixth step of performing a first heat treatment on the semiconductor film having the amorphous structure to form a first crystalline semiconductor film And the first
And a seventh step of irradiating the crystalline semiconductor film with a laser beam to form a second crystalline semiconductor film.

In another aspect of the present invention, a first step of selectively forming a first insulating film on an insulating surface and a second insulating film on the insulating surface and the first insulating film are provided. A second step of forming a film, a third step of treating the surface of the second insulating film with a halogen element, and an amorphous structure formed on the second insulating film after the third step. A fourth step of forming a semiconductor film having: a catalytic element that promotes crystallization of the semiconductor film having the amorphous structure in or in contact with the semiconductor film having the amorphous structure. Fifth to add
And a sixth step of irradiating the semiconductor film having an amorphous structure with a laser beam to form a crystalline semiconductor film.

According to another aspect of the present invention, a first step of selectively forming a first insulating film on an insulating surface and a second insulating film on the insulating surface and the first insulating film are provided. A second step of forming a film, a third step of treating the surface of the second insulating film with a halogen element, and crystallization of the semiconductor film having the amorphous structure on the surface of the second insulating film A fourth step of adding a catalyst element that promotes the following, and after the third step,
A fifth step of forming a semiconductor film having an amorphous structure on the second insulating film, and performing a first heat treatment on the semiconductor film having the amorphous structure to form a first crystalline semiconductor film And a seventh step of irradiating the first crystalline semiconductor film with a laser beam to form a second crystalline semiconductor film.

In another aspect of the present invention, a first step of selectively forming a first insulating film on an insulating surface and a second insulating film on the insulating surface and the first insulating film are provided. A second step of forming a film, a third step of treating the surface of the second insulating film with a halogen element, and an amorphous structure formed on the second insulating film after the third step. A fourth step of forming a semiconductor film having: a catalytic element that promotes crystallization of the semiconductor film having the amorphous structure in or in contact with the semiconductor film having the amorphous structure. Fifth to add
A step of performing a first heat treatment on the semiconductor film having an amorphous structure to form a first crystalline semiconductor film; and irradiating the first crystalline semiconductor film with laser light. A seventh step of forming a second crystalline semiconductor film by using the above method, an eighth step of forming a gate insulating film on the second crystalline semiconductor film, and a first conductive film on the gate insulating film. A ninth step of forming a first conductive film and a second conductive film;
A tenth step of forming a first shape conductive layer by performing a first etching process on the conductive film, and an eleventh step of forming a first impurity region outside the first shape conductive layer. A twelfth step of forming the second shape conductive layer on the first shape conductive layer by a second etching process, and forming a second impurity region overlapping the second shape conductive layer. A thirteenth step and a fourteenth step of forming a third shape conductive layer by subjecting the second shape conductive layer to a third etching process.

In another aspect of the present invention, a first step of selectively forming a first insulating film on an insulating surface and a second insulating film on the insulating surface and the first insulating film are provided. A second step of forming a film, a third step of treating the surface of the second insulating film with a halogen element, and an amorphous structure formed on the second insulating film after the third step. A fourth step of forming a semiconductor film having: a catalytic element that promotes crystallization of the semiconductor film having the amorphous structure in or in contact with the semiconductor film having the amorphous structure. Fifth to add
And a sixth step of irradiating the semiconductor film having the amorphous structure with a laser beam to form a crystalline semiconductor film;
A seventh step of forming a gate insulating film on the crystalline semiconductor film, an eighth step of forming a first conductive film and a second conductive film on the gate insulating film, Membrane and second
A ninth step of forming a first shape conductive layer by performing a first etching process on the conductive film, and a tenth step of forming a first impurity region outside the first shape conductive layer. ,
An eleventh step of forming a second shape conductive layer by performing a second etching process on the first shape conductive layer, and a second step of forming a second impurity region overlapping the second shape conductive layer. A step of forming a third-shape conductive layer by performing a third etching process on the second-shape conductive layer;
And a step of:

In another aspect of the invention, a first step of selectively forming a first insulating film on an insulating surface and a second insulating film on the insulating surface and the first insulating film are provided. A second step of forming a film, a third step of treating the surface of the second insulating film with a halogen element, and crystallization of the semiconductor film having the amorphous structure on the surface of the second insulating film A fourth step of adding a catalyst element that promotes the following, and after the third step,
A fifth step of forming a semiconductor film having an amorphous structure on the second insulating film, and performing a first heat treatment on the semiconductor film having the amorphous structure to form a first crystalline semiconductor film A sixth step of irradiating the first crystalline semiconductor film with a laser beam to form a second crystalline semiconductor film, and a gate insulating film on the second crystalline semiconductor film. An eighth step of forming a film, a ninth step of forming a first conductive film and a second conductive film on the gate insulating film, and a step of forming the first conductive film and the second conductive film 1st etching process
A tenth step of forming a conductive layer having a first shape, and a first step of forming a first impurity region outside the conductive layer having the first shape.
A first step, a twelfth step of forming the second shape conductive layer by performing a second etching process on the first shape conductive layer, and a second impurity overlapping the second shape conductive layer. A thirteenth step of forming a region and a fourteenth step of forming a third shape conductive layer by subjecting the second shape conductive layer to a third etching process.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [Embodiment 1] In FIG. 1A, a glass substrate such as barium borosilicate glass or aluminoborosilicate glass is used as a substrate 101. An insulating film of 20 to 20 is formed on the insulating surface of the substrate 101.
The island-shaped insulating film 102 is formed to a thickness of 0 nm and etched. The material of the insulating film is not limited, but is preferably selected from a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The island-shaped insulating film 102 may have any shape. For example, the island-shaped insulating film 102 is formed in a stripe shape having a short side of 1 to 20 μm. Further, it is preferable that the end portion is etched in a tapered shape, and the angle is 5 degrees with respect to the substrate surface.
At about 50 degrees, the step coverage of the thin film formed thereon is ensured.

The base insulating film 103 is formed using a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like. The base insulating film 103 may be formed with one layer of these insulating films, or may have a stacked structure in which two or more layers are stacked. The base insulating film 103 is not necessarily needed, but is preferably formed in order to prevent impurities such as an alkali metal from diffusing from the substrate 101 into a semiconductor film formed over the base insulating film 103.

After the formation of the base insulating film 103, FIG.
A surface treatment with a halogen element is performed as shown in FIG. Preferably, atomic fluorine or fluorine radical 10
The object is to expose the substrate on which the base insulating film 103 is formed in the atmosphere of No. 4 and cover the surface with fluorine. Chlorine or bromine may be used as the halogen element.

One specific example is silicon tetrafluoride (Si
F ₄ ) or nitrogen trifluoride (NF ₃ ) is introduced, plasma is generated by glow discharge decomposition, atomic fluorine or fluorine radicals 104 are generated, and supplied to the surface of the base insulating film 103. The generation of atomic fluorine or fluorine radicals depends on the plasma CV used for depositing the amorphous semiconductor film.
D device can be substituted. Plasma CVD devices include capacitively coupled or inductively coupled plasma CVD devices, as well as EC
Any type of device such as an R (electron cyclotron resonance) plasma CVD device or a microwave CVD device may be applied. In particular, since ECR plasma and microwave plasma have high gas decomposition efficiency, fluorine radicals can be efficiently generated.

In this surface treatment, dangling bonds on the surface of the base insulating film 103 are terminated by fluorine. Since fluorine has a high electronegativity, dangling bonds on the surfaces of the silicon oxide film, the silicon nitride film, and the silicon oxynitride film can be terminated. Further, it can replace and bond with oxygen and nitrogen to cover its surface.

Then, as shown in FIG. 1C, a semiconductor film 105 having an amorphous structure is formed with a thickness of 25 to 100 nm. A typical example of a semiconductor film having an amorphous structure is an amorphous silicon (a-Si) film, but other examples include an amorphous silicon germanium (a-SiGe) film and an amorphous silicon carbide. An (a-SiC) film, an amorphous silicon tin (a-SiSn) film, or the like can be used. A semiconductor film having an amorphous structure is formed by a plasma CVD method, a sputtering method,
Alternatively, it is formed by a low pressure CVD method or the like. Typically,
The semiconductor film having an amorphous structure containing silicon is formed using a hydride of silicon, germanium, carbon, or tin.

Then, a layer 106 containing a catalytic element having an effect of lowering the crystallization temperature is formed on the semiconductor film having an amorphous structure. The catalyst element is nickel (Ni),
Iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (Co), platinum (Pt), copper (C
u), gold (Au) and the like. For example, 10
An aqueous solution containing a catalytic element of ppm is applied by a spinner to form a layer 106 containing the catalytic element. Other techniques include printing, spraying, bar coater, or sputtering or vacuum deposition of the catalyst element layer from 1 to 5
It may be formed to a thickness of nm.

It is desirable that the amount of hydrogen contained in the semiconductor film 105 having an amorphous structure be released before crystallization, and the concentration remaining in the film be 5 atomic% or less. For that purpose, heat treatment is performed at 400 to 500 ° C for about 1 hour,
The hydrogen contained in the semiconductor film having an amorphous structure is released.
Then, at 550-600 ° C. in a nitrogen atmosphere,
Heat treatment is performed for 8 hours, preferably at 550 ° C. for 4 hours to crystallize the semiconductor film 105 having an amorphous structure. A furnace annealing furnace or the like is used for this heat treatment. Thus, a first crystalline semiconductor film 107 is obtained (FIG. 1D).
The catalyst element diffuses into the first crystalline semiconductor film and contributes to crystallization, but in this state, 3 × 10 ¹⁰ to 2 ×
It is 10 ¹¹ atoms / cm ² .

However, the first crystalline semiconductor film 107 is
Observation with an optical microscope may confirm that an amorphous region remains locally. In this situation,
Analysis by Raman spectroscopy confirms the presence of an amorphous structure. In the case of a silicon film, a spectrum having a broad peak at 480 cm ^-1 is observed. The laser annealing method performed after the heat treatment is a method suitable for the purpose of crystallizing the remaining amorphous region.

Excimer laser, YAG laser, YVO ₄ laser,
Solid lasers such as a YAlO ₃ laser and a YLF laser can be used. 400nm excimer laser
Since light having the following wavelengths can be extracted with high output, it can be suitably used for crystallization of a semiconductor film. On the other hand, Y
AG laser, YVO ₄ laser, YAlO ₃ laser,
A solid-state laser such as a YLF laser uses the second harmonic (532 nm), the third harmonic (355 nm), and the fourth harmonic (266 nm). When the second harmonic (532 nm) is used due to the penetration depth of light, the third harmonic (355 nm) or the fourth harmonic (266 n) is applied from the surface and the inside of the semiconductor film.
In the case of m), crystallization can be performed by heating from the surface of the semiconductor film as in the case of the excimer laser.

FIG. 1E shows a laser annealing step, for example, when the pulse oscillation frequency of the Nd: YAG laser is 1 to 10 kHz and the laser energy density is 100.
A linear laser beam 108 formed by an optical system including a cylindrical lens or the like is scanned in a direction perpendicular to the longitudinal direction of the laser beam at a rate of about 500 mJ / cm ² (typically 200 to 400 mJ / cm ² ) (or Relatively moving the substrate).
The line width of the linear laser beam 108 is 100 to 1000 μm,
For example, it is 400 μm.

The crystalline semiconductor film 107 is an island-shaped insulating film 102
Are formed continuously along a region A formed along the line A and a region B other than the region A. The area C is a boundary between the area A and the area B. FIG. 3 is a top view of FIG. 1E and illustrates a part of the substrate 101. A range indicated by a dashed line in the crystalline semiconductor film 107 is a region where the island-shaped semiconductor film 110 is formed in a later step.
2 are formed so as to intersect. Linear laser beam 108
Is made to cross the island-shaped insulating film 102 as shown in the figure, and its end is located outside the island-shaped semiconductor film 110. Then, the substrate is moved in the direction of the arrow shown in FIG. 3 to process the entire surface of the substrate.

When the linear laser beam 108 is irradiated with a pulse width of 10 to 100 nsec, the first crystalline semiconductor film 10
7 is instantaneously heated and reaches a molten state, but is cooled and changes to a solid state again with the end of the pulse. 1-10k
Since the pulse width is very short as compared with the pulse oscillation frequency of Hz, the control of the cooling rate and cooling temperature at this time is a very important factor in laser annealing.

It is considered that crystal nuclei are formed and formed during the crystallization process during the cooling process of transition from the molten state to the solid state. It has been empirically found that the nucleation density increases when quenched from a high temperature. In the region A where the island-shaped insulating film 102 is formed, the volume is relatively increased and the heat capacity is increased, so that the temperature rise is suppressed, and the cooling rate is slower than other regions. Further, the region C is cooled faster than other regions because heat propagates to both sides of the island-shaped insulating film 102 existing below and in the lateral direction. Therefore, in the region C, nucleation starts first, and in the region A where solidification starts later than the region C, crystal growth or recrystallization occurs in the horizontal direction with respect to the substrate surface toward the region A around the crystal nucleus. Occur. On the other hand, in region B, the generation of crystal nuclei is random and crystal growth from a plurality of crystal nuclei interacts, so that the crystal grains cannot be expected to become large.

Heat treatment using a furnace annealing furnace,
The crystalline silicon film produced by the laser annealing method
Since the interface energy between the silicon oxide or silicon oxynitride formed as the base insulating film and the silicon film is low, the crystal is preferentially oriented to <111>, and many other crystal grains having random orientations are mixed. Is known from electron diffraction analysis. In such a case, many dangling bonds are formed at the crystal grain boundaries. On the other hand, a crystalline silicon film produced by heat treatment using a catalyst element such as nickel has a structure in which a plurality of needle-like or rod-like crystals are aggregated microscopically.
It can be seen that the continuity of adjacent crystal grains is high and dangling bonds are hardly formed. Most of the crystal grains are oriented in <110>. One of the reasons is that the crystal growth process in the case of using a catalyst element such as nickel is considered to involve silicide of the catalyst element, and the thickness of the silicon film is as small as 25 to 100 nm. Of the early nuclei (11
1) It is considered that the orientation substantially perpendicular to the substrate surface grows preferentially, so that the orientation of <110> substantially increases. However, as described above, if the interfacial energy between silicon oxide and silicon is low, it is possible to take another plane orientation included in the <111> crystal zone. Therefore, other orientations are slightly mixed.

However, by terminating the surface of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like formed as a base insulating film with fluorine, the influence of interface energy can be reduced, and the effect can be substantially reduced. The effect can be ignored. As a result, the orientation of the crystal is affected only by the surface energy, and the orientation of <110> is increased in the crystal growth using the catalytic element. Such an effect can be realized by a normal heat treatment or a laser annealing method, but can be more remarkably obtained by a crystallization method by a thermal heat treatment using a catalytic element.

The crystalline semiconductor film 109 thus manufactured
Can be used as an active layer of a TFT. For example, the island-shaped semiconductor film 110 is formed by etching into a predetermined shape as illustrated in FIG. Since the crystal size of the island-shaped semiconductor film 110 over the island-shaped insulating film 102 is increased, a channel formation region is formed at this portion.
The operation speed of the TFT can be increased because the influence of the crystal grain boundaries is small. In addition, by using a crystalline semiconductor film with uniform orientation by using the present invention, a TFT with small electric characteristics and small variation can be manufactured.

[Embodiment 2] In the same manner as in Embodiment 1, an island-shaped insulating film 102 and a base insulating film 103 are formed, and a surface treatment with a halogen element is performed. Then, after forming the semiconductor film 105 having an amorphous structure, crystallization is performed by a laser annealing method using a solid-state laser such as an excimer laser or a YAG laser that performs pulse oscillation as a light source.

FIG. 2A shows a first laser beam 111 and a second laser beam 11 in this laser annealing method.
2 shows a state in which a semiconductor film 105 having an amorphous structure is irradiated with 2 and 3. The first laser light is emitted from the surface of the substrate 101 over which the semiconductor film 105 having an amorphous structure is formed, and the second laser light 112 is emitted from the opposite surface. Of course, crystallization can be achieved by irradiating laser light from either side, but the method of irradiating laser light from both sides of a semiconductor film having an amorphous structure enables large crystals to be formed. I do. These laser beams may be formed linearly or rectangularly by an optical system.

The laser annealing method slightly differs depending on the wavelength of the laser light used. Wavelength 4 such as KrF or XeCl
In the case where an excimer laser beam of 00 nm or less is used, the first laser beam 111 is absorbed near the surface of the semiconductor film and heated. In the case of a quartz substrate, the second laser beam 112 transmits 90% or more and is absorbed in a region extremely shallow from the surface on the opposite side of the semiconductor film. However, in the case of an aluminoborosilicate glass substrate, the transmittance is about 50%, and the transmittance may be further reduced when the base insulating film is formed. on the other hand,
When a second harmonic (532 nm) such as a YAG laser or a YVO ₄ laser is used, both the quartz substrate and the glass substrate have a transmittance of 80% or more. Light having this wavelength reaches the inside of the semiconductor film in view of the absorption coefficient, and is heated from the inside of the film. Therefore, the irradiation conditions are slightly different depending on the selection of the laser beam. However, the principle of controlling the density of crystal nuclei generated by the stacked structure of the base insulating film 103 and the island-shaped insulating film 102 in the base state in the transition state where the solidification is performed through the cooling process from the molten state is the same as in the first embodiment. . The halogen element coated on the surface of the base insulating film 103 is effective in reducing the interaction at the interface between the semiconductor film and the base insulating film 103.

As described above, even if only the laser annealing method is used, it is possible to increase the crystal grain size and enhance the orientation. As shown in FIG. 2B, the crystalline semiconductor film 1
Reference numeral 13 can be used as an active layer of a TFT.

[Embodiment 3] An example of a manufacturing apparatus suitable for performing the laser annealing method described in Embodiment 1 or 2 will be described with reference to FIGS. FIG. 4 is a diagram showing a configuration of a manufacturing apparatus suitable for the present invention. A plurality of reaction chambers or processing chambers are provided around a common chamber 401 provided with an exhaust unit 408.

The loading / unloading chamber 402 for loading and unloading substrates is provided with an exhaust means 409, and the substrates 400 are loaded in a cassette 410. The reaction chamber 403 is provided with an exhaust unit 411, a substrate heating unit 412, a glow discharge generating unit 413, and a gas introducing unit 414.
By a method D, a base insulating film or a semiconductor film having an amorphous structure can be formed. These coatings can be continuously formed by appropriately selecting the reaction gas to be introduced into the reaction chamber.

The cleaning chamber 415 is a place where the surface is wet-cleaned. The pressure is set to a normal pressure in order to perform a treatment using the cleaning liquid or pure water supplied from the cleaning chamber 416, and the cleaning chamber 415 is purged with nitrogen by a gas supply unit 417. The cleaning liquid or pure water is applied by rotating the substrate with a spinner. Therefore, the common chamber 401 is connected via the intermediate chamber 404 provided with the transfer robot. The intermediate chamber 404 can be evacuated by an exhaust unit 445. The cleaning liquid for the glass substrate and the base insulating film is a hydrofluoric acid-containing aqueous solution, and the surface is slightly etched to remove contaminants adhering in the clean room, such as organic substances adhering to the surface and boron and phosphorus.

The processing chamber 405 for performing laser annealing includes an exhaust unit 418, a gas introducing unit 418, an X-θ stage 420 for moving a substrate, and a laser oscillator 419.
And so on.

The details will be described with reference to FIG. In FIG. 6, a processing chamber 601 includes an exhaust unit 602 and a gas introduction unit 6.
03 is provided. Laser annealing can be performed either under normal pressure or under reduced pressure. The atmosphere can be an air atmosphere, but it is preferably performed in a nitrogen or inert atmosphere or a reducing atmosphere. Therefore, the gas introduction unit 603 is designed to be capable of introducing a gas such as nitrogen, hydrogen, or argon. The laser oscillator 609 and its optical system are provided outside the processing chamber 601. KrF, XeCl,
Excimer laser such as ArF or YAG, YV
O ₄ , YAlO ₃ , YLF laser or the like is applied. The optical system includes a beam homogenizer 610 composed of a cylindrical lens array, a cylindrical lens 611, optical lenses of doublet cylindrical lenses 616 and 617, mirrors 613 to 615, and a beam splitter 612. The laser light is linearly formed by these optical systems, and a quartz window 60 provided in the processing chamber 601 is provided.
Substrate 6 held on stage 604 through 7, 608
Irradiated at 00. The stage 604 moves on the rail 618 and can be moved by a stepping motor with an accuracy of several tens to several hundreds of μm. Beam splitter 61
In FIG. 2, the laser beam 619 is divided into two, and is divided into a first linear laser beam 620 and a second linear laser beam 621. In another embodiment of the laser annealing, irradiation is performed from one side. You may do it.

The reaction chamber 406 is a chamber for forming a layer containing a catalyst element by a glow discharge method.
23, a gas introduction unit 426, a substrate heating unit 424, and a glow discharge generation unit 425 are provided. The glow discharge generating means includes a high frequency power supply and a high frequency electrode for generating a discharge in the reaction chamber 406. The high-frequency electrode is composed of Ni, Fe, Pd, Sn, Pb, C acting as a catalytic element.
It is formed of a material containing one or more elements selected from o, Pt, Cu, and Au. When a glow discharge is generated in an atmosphere of an inert gas such as Ar, Kr, or Xe using such a high-frequency electrode, the high-frequency electrode is sputtered by the generated ion species and adheres to the surface of the substrate placed on the opposite side. be able to. Its density is 1 × 10 ¹⁰ -1 ×
The power density and the processing time of glow discharge are controlled so as to be 10 ¹² / cm ² .

The reaction chamber 407 is for forming a semiconductor film having an amorphous structure and performing a surface treatment with a halogen element. The reaction chamber 407 includes an exhaust unit 427, a substrate heating unit 428, a glow discharge generating unit 429, and a gas introducing unit 43.
0 is provided, and a means for supplying a halogen element using microwave plasma is provided. This includes a microwave oscillator (typically 2.45 GHz) 431, a waveguide 432, a cavity 433, and a gas introduction unit 43.
5, an exhaust unit 434, and an introduction pipe 436 are provided.

The reaction chamber or the processing chamber is a common chamber 40
1 and gate valves 439-444.
01 by the robot arm 437 provided on the substrate 40.
Convey 0. Since the gas system and the exhaust system of the reaction chamber are separated and independent, it is also possible to perform processing and reaction independently and simultaneously by computer control.

FIG. 5 is a diagram for explaining the structure of the reaction chamber 407 in detail. The reaction chamber 501 is provided with an exhaust unit 502 and a gas introduction unit 511. The gas introduction means includes a cylinder filled with a reaction gas or a dilution gas, a mass flow controller for controlling the flow rate of the gas, and the like. Si is used as a reactive gas to deposit an amorphous semiconductor film.
H ₄ , Si ₂ H ₆ , GeH ₄ , SiF ₄ , GeF ₄ , CH ₄ or the like is used, and He, H ₂ or the like is used as a diluting gas. A high-frequency electrode 505 for generating a glow discharge for decomposing these reaction gases to form a film is connected to a high-frequency power supply (13.56 to 75 MHz) 503 via a matching circuit 504 for impedance matching. I have.
The substrate 500 is held on a stage 512 provided with a heater 514 and a hitter controller 513. In addition, there is a mechanism for lifting with a pusher pin 515, which corresponds to the transfer of a substrate by a robot arm.
Surface treatment with halogen element is SiF ₄ , NF ₃ , CF ₄
Such a fluorine-based gas is introduced into the reaction chamber, and a high-frequency power is similarly applied to generate glow discharge to generate atomic fluorine or fluorine radicals. In order to decompose gas more efficiently, a method of applying microwave power can also be adopted. An example shown in FIG. 5 includes a gas supply means 509, a cavity 510, a matching device 508, a waveguide 507, and a microwave oscillator 506, and generates microwave plasma in the cavity, and the microwave plasma is generated there. Atomic fluorine or fluorine radicals are introduced into the reaction chamber.

One example of a manufacturing method using an apparatus as shown in FIG. 4 is that the operation from the base insulating film 103 to the second crystalline semiconductor film 109 in the step shown in FIG. 1 is performed without exposing the substrate to the atmosphere. Can be performed continuously. An example of the process will be described with reference to FIGS.

First, the substrate 101 on which the island-shaped insulating film 102 is formed is set in the load / unload chamber 402 and evacuated. When the pressure of the load / unload chamber 402 becomes substantially the same as that of the common chamber 401, the reaction chamber 4 for forming a base insulating film is formed.
03 by using the conveying means 437. Reaction chamber 403
Then, a base insulating film 103 such as a silicon oxide film, a silicon nitride film,
To form The reaction gas is SiH ₄ , TEOS, N ₂ O, N
To select and H _3.

Next, the substrate 101 is moved to the reaction chamber 407 for performing a surface treatment with a halogen element. The surface treatment is performed by generating atomic fluorine or fluorine radicals generated by microwave plasma. In order for fluorine to be adsorbed and reacted on the surface of the base insulating film, the substrate temperature does not need to be so high and is set in the range of 100 to 250 ° C.
As atomic fluorine or fluorine radical, fluorine dissociated from SiF ₄ or NF ₃ is used. When plasma is formed by microwaves, self-bias is not applied to the substrate, so that damage to the substrate due to ion species can be reduced.

The formation of the layer containing the catalyst element is carried out by transporting the substrate which has been subjected to the surface treatment with the halogen element to the reaction chamber 406. The glow discharge generating means 425 is a capacitively coupled parallel plate electrode as shown in FIG. The cathode or the surface of the cathode is formed of a material containing a catalytic element. In order to form the layer 106 containing a catalyst element on the surface of the substrate that has been subjected to the surface treatment with a halogen element, a glow discharge is formed with an inert gas such as He or Ar, and the catalyst element sputtered and released from the cathode is discharged. Use.

After the surface treatment is completed, the formation of the amorphous semiconductor film 105 is performed by the plasma CVD method. The configuration shown in FIG. 5 is a capacitively coupled parallel plate type reaction chamber. However, when an amorphous silicon film is formed with a mixed gas of SiH ₄ and Xe at a substrate temperature of 400 ° C., S
The decomposition of iH ₄ and the surface reaction are promoted, and the amount of hydrogen in the film is reduced by 5a.
It can be less than tomic%. Substrate temperature is 400 ° C
An amorphous semiconductor film suitable for crystallization can be formed even below, but when the hydrogen content is 5 atomic% or more, a heat treatment at 300 to 450 ° C. under reduced pressure is required.
By performing the heat treatment under reduced pressure, hydrogen in the film can be sufficiently released even at about 400 ° C.

The laser annealing is performed in the processing chamber 405.
The laser oscillator uses an Nd: YAG laser, the pulse oscillation frequency is 1 to 10 kHz, and the laser energy density is 100 to 500 mJ / cm ² (typically 100 to 4 mJ / cm ² ).
MJ / As cm ^2), by scanning the linear laser beam formed by an optical system in a direction perpendicular to the longitudinal direction, including cylindrical lens (or by moving relatively the substrate) is. The overlapping ratio is set to 80 to 99% (preferably 95 to 99%). Linear laser light 110
The line width of 7 is 100 to 1000 μm, for example, 400 μm.

The substrate subjected to the laser annealing is returned to the load / unload chamber 402 again by the transfer robot. Thus, the manufacturing apparatus having the configuration shown in FIG.
Steps (A) to (E) can be performed continuously. The point to be noted here is that the surface of the base insulating film or the amorphous semiconductor film is formed by using a multi-chamber system in which the common chamber and the reaction chamber are connected via a gate valve as shown in FIG. The point is that the laser annealing process can be performed without exposing to the atmosphere. As a result, it is possible to prevent organic contamination and oxidation reaction on the surface. In particular, the natural oxide film formed on the surface of the amorphous semiconductor film causes the surface of the crystalline semiconductor film formed by laser annealing to be uneven.

FIG. 4 shows an example of a manufacturing apparatus suitable for performing the laser annealing method described in Embodiment 1 or 2, but the configuration of the manufacturing apparatus is not limited to this.
There is no particular limitation on the number of reaction chambers, the method of connecting them, the method of transporting substrates, the procedure thereof, and the like.

[Fourth Embodiment] In the first embodiment, a method of manufacturing the semiconductor film 105 having an amorphous structure from a hydride of silicon or germanium has been described. In this embodiment mode, an example of manufacturing using a gas containing a halogen element will be described.

A feature of the manufacturing method of this embodiment is that the semiconductor film 105 having an amorphous structure is formed using a reaction gas containing a halogen element and hydrogen. Specifically, a halogen element and hydrogen are mixed when, for example, an amorphous silicon film is formed as a semiconductor film having an amorphous structure. It is particularly preferable to use fluorine as the halogen element. Fluorine has an action of etching silicon, and preferentially etches a portion having a weak bond in a film deposition process. Further, by supplying hydrogen, the concentration of fluorine remaining in the film can be reduced. Then, a dense amorphous silicon film with few voids and vacancies can be manufactured by utilizing the action of fluorine and hydrogen. Such an effect can be obtained by an amorphous silicon-germanium (a-SiGe) film, an amorphous silicon carbide (a-Si
C) film, amorphous silicon tin (a-SiSn) film, etc.

The method of supplying fluorine and hydrogen is as follows. When an amorphous silicon film is formed as an amorphous semiconductor film, silicon tetrafluoride (SiF ₄ ) and hydrogen (H ₂ ) or SiF ₄ And SiH ₄ , or a combination of SiF ₄ , SiH ₄ and H ₂ can be selected. Instead of SiF ₄ , trifluorosilane (SiHF ₃ ), difluorosilane (SiH ₂ F ₂ ), or monofluorosilane (SiH ₃ F) can also be used. Further, SiH ₄ and F ₂ may be directly reacted. Further, germanium (GeH ₄ ) or germanium tetrafluoride (GeF ₄ ) is used for forming an amorphous silicon-germanium film, and methane (CH ₄ ) or tetrafluoride is used for forming an amorphous silicon carbide film. Methane (C
For forming an amorphous silicon / tin film such as F ₄ ), tin hydride (SnH ₄ ) may be appropriately added.

The semiconductor film 105 having an amorphous structure is formed with a thickness of 25 to 100 nm. At the initial stage of film deposition, the surface of the base film 103 can be fluorinated by the effect of fluorine.

As described above, the semiconductor film 105 having an amorphous structure produced by the reaction gas containing fluorine and hydrogen includes:
Although it depends on the substrate temperature at the time of film formation, hydrogen is 0.1% in the film.
It is formed so as to contain ２０20 atomic% and 0.1０．１10 atomic% of fluorine. Fluorine and hydrogen remaining in the film are released from the film in the subsequent thermal crystallization step and the concentration remaining in the film further decreases, but the dense amorphous semiconductor film and the outermost surface are made of fluorine. Interaction with the terminated base film can further enhance the orientation of <110>.

[0063]

[Example 1] An example of a method for manufacturing a TFT using the crystalline semiconductor film of the present invention will be described. This embodiment is an example of a display device, in which a pixel TFT and a storage capacitor in a pixel portion and a TF of a driving circuit provided around a display region are provided.
A method for simultaneously manufacturing T will be described.

In FIG. 7A, a glass substrate such as barium borosilicate glass or aluminoborosilicate glass typified by Corning # 7059 glass or # 1737 glass is used as a substrate 701. Such a glass substrate shrinks slightly due to the heating temperature,
Heat treatment is performed in advance at a temperature lower by about 10 to 20 ° C. than the glass strain point.

On the insulating surface formed by the substrate 701,
A silicon oxide film is formed to a thickness of 200 nm by plasma CVD using TEOS and O ₂ . Then, island-shaped insulating films 702a to 702e are formed from the silicon oxide film in accordance with the positions where the channel formation regions of the TFT are formed.
The end portion of the island-shaped insulating film 702a~702e performed by dry etching using CHF ₃ in order to form a tapered portion of 5 to 50 degrees. A base insulating film 703 including an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed thereover to prevent impurity contamination from the substrate 701. For example, the plasma CVD method
A silicon oxynitride film 102 made of H ₄ and N ₂ O is formed to a thickness of 50 to 200 nm (preferably 100 to 150 nm).

Thereafter, a surface treatment is performed on the silicon oxynitride film 703 formed as the base insulating film, and the surface is fluorinated. For example, a SiF ₄ gas or an NF ₃ gas is introduced, and high-frequency power is applied to convert the gas into a plasma to generate atomic fluorine or fluorine radicals 704.
Alternatively, microwave plasma as described in the third embodiment may be used. By exposing the surface of the silicon oxynitride film 703 to atomic fluorine or fluorine radicals 704 formed in this manner, fluorine or fluorine radicals are supplied to the surface, so that the surface can be covered with fluorine. Since fluorine has a higher electronegativity than oxygen, it is possible to substitute oxygen and terminate a bond on the surface with fluorine.

Then, as shown in FIG. 7B, an amorphous silicon film 705 is formed on the base insulating film 703 by plasma CVD.
It is formed by a method or a low pressure CVD method. In the plasma CVD method, SiH ₄ or Si ₂ H ₆ , or SiF ₄ and H ₂ ,
Or SiF ₄ and SiH ₄ , or SiF ₄ and SiH ₄ and H
You can also select a combination of the _two . Substrate temperature is 2
Discharge is performed at a power density of 0.1 to 1 W / cm ² at 00 to 400 ° C., and an amorphous silicon film 705 is formed to a thickness of 55 nm at a deposition rate of 0.1 to 5 nm / sec.

As described in the third embodiment, FIG.
With the use of the apparatus having the structure shown in (1), the steps from surface treatment of the base insulating film, surface treatment with a halogen element, and formation of an amorphous silicon film can be continuously performed under reduced pressure without exposure to the air. As a result, organic contamination and contamination from the environment such as boron and phosphorus are prevented, and each interface can be maintained in a clean state.

For crystallization, either the crystallization method using the catalytic element described in the first embodiment or the laser annealing method described in the second embodiment can be employed. In any case, the energy required for crystallization of the surface silicon film 706 is given to cause crystallization. For example, X oscillating at 100 Hz
Using an eCl excimer laser (308 nm), line width 30
0 μm linear laser light (longitudinal direction is optional), energy density 300 mJ / cm ² , superposition rate 95%
Scans the entire surface of the substrate. At this time, laser light may be emitted from both surfaces of the semiconductor film 705 in a processing chamber having a structure as shown in FIG. Thus, the crystalline silicon film 7
07 is formed. By performing the surface treatment, the orientation of <110> can be improved.

Next, as shown in FIG. 8A, the crystalline silicon film 707 is etched according to the base insulating films 702a to 702e to form island-like semiconductor films 708 to 712. The island-shaped semiconductor film is formed so as to cover the upper and end portions of the base insulating film and to extend therearound.

The gate insulating film 713 is formed with a thickness of 40 to 150 nm by a plasma CVD method or a sputtering method. For example, it is formed from a silicon oxynitride film with a thickness of 120 nm. A silicon oxynitride film formed by adding O ₂ to SiH ₄ and N ₂ O can reduce the fixed charge density in the film, and is a preferable material for a gate insulating film. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and an insulating film such as a silicon oxide film or a tantalum oxide film may be used as a single layer or a stacked structure.

Further, prior to the formation of the gate insulating film, if the apparatus having the structure shown in FIG. 4 is used, the contaminants adhering to the surface of the island-shaped semiconductor film can be removed in the cleaning chamber 415. For cleaning the island-like semiconductor film, a method of oxidizing the surface with pure water containing ozone and removing the oxide film with a hydrofluoric acid-containing aqueous solution is effective.

Then, a first conductive film 714 and a second conductive film 715 for forming a gate electrode are formed over the gate insulating film 713. In the present embodiment, the first conductive film 71
4 is formed of tantalum nitride or titanium to a thickness of 50 to 100 nm, and the second conductive film 715 is formed of tungsten
It is formed to a thickness of about 300 nm. These materials are stable even in a heat treatment at 400 to 600 ° C. in a nitrogen atmosphere, and the resistivity does not significantly increase.

Next, as shown in FIG. 8B, a mask 716 made of a resist is formed, and a first etching process for forming a gate electrode is performed. There is no limitation on the etching method, but preferably, ICP (Inductively Coupled Plas) is used.
ma: Inductively coupled plasma) etching method is used. Mixture of CF ₄ and Cl ₂ as etching gas, 0.5~2Pa,
Preferably, at a pressure of 1 Pa, 500 W of R is applied to the coil type electrode.
F (13.56 MHz) power is applied to generate plasma. 100W RF (13.56) on the substrate side (sample stage)
MHz) power is applied and a substantially negative self-bias voltage is applied. When CF ₄ and Cl ₂ are mixed, etching can be performed at substantially the same rate even in the case of a tungsten film, a tantalum nitride film, and a titanium film.

Under the above etching conditions, the end portion can be tapered by the shape of the resist mask and the effect of the bias voltage applied to the substrate side. The angle of the tapered portion is set to 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased by about 10 to 20%. Since the selectivity of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the exposed surface of the silicon oxynitride film is etched by about 20 to 50 nm by the over-etching process. Thus, the first-shaped conductive layers 718, 719720, and 722 formed of the first conductive film and the second conductive film by the first etching treatment.
(First conductive layers 718a, 719a, 720a, 722
a and the second conductive layers 718b, 719b, 720b722
b) is formed. The first shape conductive layers 717 and 721 are wirings formed simultaneously outside the island-shaped semiconductor film.
The conductive layer 721 having the shape of forms a source wiring in the pixel portion. The first shape conductive layer 723 is one electrode for forming a storage capacitor provided in each pixel, and is formed at the same time in this step. Reference numeral 724 denotes a gate insulating film, and a region which is not covered with the first shape conductive layer is 20 to 50.
It is etched by about nm and becomes thin.

Then, a first doping process is performed to add an impurity element imparting n-type. The doping is performed by an ion doping method or an ion implantation method. The condition of the ion doping method is that the dose is 1 × 10 ^{13 to} 5 × 10 ¹⁴ atom
Perform as s / cm ² . 1 as an impurity element imparting n-type
An element belonging to Group V, typically, phosphorus (P) or arsenic (As) is used. In this case, the first shape conductive layer 71
8, 719, 720, and 722 serve as masks for the elements to be doped, and appropriately adjust the acceleration voltage (for example, 20
-60 keV), and the first impurity region 7 is formed by the impurity element passing through the thinned portion of the gate insulating film 721.
22 to 726 are formed. For example, the first impurity region 7
The phosphorus (P) concentration between 25 and 729 is 1 × 10 ²⁰ -1 ×
The range is 10 ²¹ atomic / cm ³ .

Further, as shown in FIG. 8C, a second etching process is performed. Etching is performed using an ICP etching method, and CF ₄ , Cl _2, and O ₂ are mixed into an etching gas, and RF power of 500 W is applied to a coil-type electrode at a pressure of 1 Pa.
(13.56 MHz) to generate plasma. An RF (13.56 MHz) power of 50 W is applied to the substrate side (sample stage), and a lower self-bias voltage is applied than in the first etching process. Under such conditions, the tungsten film is anisotropically etched so that the tantalum nitride film or the titanium film as the first conductive layer is left. Thus, the second shape conductive layers 730 to 737 (the first conductive film 730)
a to 737a and second conductive films 730b to 737b) are formed. Reference numeral 738 denotes a gate insulating film, and a region which is not covered by the second shape conductive layers 727 to 730 is 20 to 5
The thickness is reduced by being etched by about 0 nm.

CF _{4 of} tungsten film or tantalum nitride film
The etching reaction by the mixed gas of Cl ₂ and Cl ₂ can be inferred from the generated radical or ionic species and the vapor pressure of the reaction product. Comparing the vapor pressures of tungsten and tantalum fluoride and chloride, the tungsten fluoride WF ₆ is extremely high, and the other WCl ₅ , Ta
F ₅ and TaCl ₅ are comparable. Therefore, CF ₄ and Cl ₂
With the mixed gas, both the tungsten film and the tantalum nitride film are etched. However, an appropriate amount of O ₂
In response to the CF4 and O ₂ added to become CO and F, F
A large amount of radicals or F ions are generated. as a result,
The etching rate of the tungsten film having a high fluoride vapor pressure is increased. On the other hand, in tantalum nitride, the increase in the etching rate is relatively small even if F increases. Also, tantalum nitride is more easily oxidized than tungsten, so
By adding ₂ , the surface of tantalum nitride is oxidized.
Since the oxide of tantalum nitride does not react with fluorine or chlorine, the etching rate of the tantalum nitride film further decreases. Accordingly, it is possible to make a difference in the etching rate between the tungsten film and the tantalum nitride film, and it is possible to make the etching rate of the tungsten film higher than that of the tantalum nitride film.

Then, a second doping process is performed as shown in FIG. Doping with an impurity element imparting n-type is performed under a condition of a high acceleration voltage with a lower dose than in the first doping process. For example, when the accelerating voltage is 70 to 120
8 and a dose of 1 × 10 ¹³ / cm ² .
(B) An impurity region is formed inside the first impurity region formed in the island-shaped semiconductor film. The doping is performed using the second shape conductive layers 731b, 732b, 733b, and 736b as a mask for impurity elements.
Doping is performed so that an impurity element is added to a region below 31a, 732a, 733a, and 736a. Thus, the second conductive layers 731a, 732a, 733a, 73
Second impurity regions 738 to 742 overlapping with 6a are formed. This impurity region is formed in the second conductive layers 731a, 731
Since 2a, 733a, and 736a remain with substantially the same thickness, the concentration difference in the direction along the second conductive layer is small, and the concentration is formed at a concentration of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ atoms / cm ^3. I do.

Then, as shown in FIG. 9A, a third etching process is performed to etch the gate insulating film 738. As a result, the second conductive layers 730a-730
7a is also etched, and the end portions recede and become smaller, and third-shaped conductive layers 743 to 749 are formed. In the drawing, 750 to 756 are remaining gate insulating films.

Then, as shown in FIG. 9B, a resist mask 757 is formed, and an impurity element imparting p-type is doped into the island-shaped semiconductor layer 708 forming a p-channel TFT. It is an element belonging to Group 13 as an impurity element imparting p-type, and typically uses boron (B).
The impurity concentration of the third impurity region 758 is 2 × 10 ²⁰ to 2
X 10 ²¹ atoms / cm ³ . Impurity region 75
Phosphorus is added to 8, but boron is added at a concentration of 1.5 to 3 times that of the phosphor to reverse the conductivity type.

Through the above steps, impurity regions are formed in each of the island-shaped semiconductor layers. Third conductive layers 744, 74
5, 746 and 748 serve as gate electrodes, and the third conductive layers 750 and 754 are used as wiring. In particular, the third conductive layer 754 becomes a source wiring in the pixel portion. Also,
The third conductive layer 749 serves as one electrode of a storage capacitor formed for each pixel.

Thereafter, as shown in FIG. 9C, a protective insulating film 759 made of a silicon nitride film or a silicon oxynitride film is formed by a plasma CVD method. Then, a step of activating the impurity element added to each of the island-shaped semiconductor layers is performed for the purpose of controlling the conductivity type. Activation is preferably performed by a thermal annealing method using a furnace annealing furnace. Alternatively, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 400 to 700 in a nitrogen atmosphere of 1 ppm or less, preferably 0.1 ppm or less.
C., typically at 500 to 600.degree. C. In this embodiment, the heat treatment is performed at 500.degree. C. for 4 hours. As a result, hydrogen in the protective insulating film 759 is released and diffused into the island-shaped semiconductor film, so that hydrogenation can be performed at the same time.

The catalytic element remains in the island-shaped semiconductor film formed by the crystallization method using the catalytic element. However, this catalytic element can be removed using the gettering action of phosphorus. In the step shown in FIG. 8B, first impurity regions 725 to 729 to which phosphorus is added are once formed in the island-shaped semiconductor layers 708 to 712. By the heat treatment for activation, it is possible to getter the catalytic element in the region where phosphorus is added. That is, the catalyst element can be removed from the channel formation region.

For hydrogenation, heat treatment may be performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen. In any case, this is a step of terminating dangling bonds in the semiconductor layer with hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) can be performed.

The interlayer insulating film 760 is formed of an organic insulating material such as polyimide and acrylic, and has a flat surface. Of course, TEOS (Tetraethyl Orthos
Although a silicon oxide film formed using ilicate may be used, it is preferable to use the organic material from the viewpoint of improving flatness.

Next, contact holes are formed, and aluminum (Al), titanium (Ti), and tantalum (Ta) are formed.
The connection electrodes 761 and 767 and the source or drain wirings 762 to 766 are formed using, for example. Further, a pixel electrode 768, a gate wiring 770, and a capacitor wiring 769 are formed.

As described above, the p-channel type TFT 80
3, n-channel TFT 804, n-channel TFT 8
05 and a pixel portion 802 including a pixel TFT 806 and a storage capacitor 807 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience.

The n-channel TFT 80 of the drive circuit 801
Reference numeral 4 denotes a second impurity region 811 (Gate) overlapping the gate electrode formed of the channel formation region 810 and the third conductive layer 745.
Overlapped drain: GOLD region, second impurity region 812 (Lightly Dope
d Drain (LDD region) and a first impurity region 813 functioning as a source region or a drain region. The n-channel TFT 805 has the same structure, and includes a channel formation region 814, a second impurity region 815 overlapping with a gate electrode formed of a third conductive layer 746, a second impurity region 816 formed outside the gate electrode, and a source. First impurity region 8 functioning as region or drain region
17. The p-channel TFT 803 includes a channel formation region 808 and a third impurity region 809 functioning as a source or drain region.

The pixel TFT 806 of the pixel portion 802 has a channel forming region 818, a second impurity region 819 (GOLD region) overlapping the third conductive layer 748 forming a gate electrode, and a second region formed outside the gate electrode. Impurity region 820 (LDD region) and first impurity regions 821, 822, 82 functioning as a source region or a drain region
Three. The first impurity region 82 is provided in the semiconductor layer 712 functioning as one electrode of the storage capacitor 807.
5, a second impurity region 824 is formed. The storage capacitor is formed by the capacitor wiring 749, an insulating layer therebetween (the same layer as the gate insulating film), and the semiconductor layer 712.

As described above, the channel formation region is formed in a region where the island-shaped semiconductor layer overlaps the island-shaped insulating film. In the island-shaped semiconductor film on the island-shaped insulating film, crystal grains are made large. When a channel formation region is formed in this portion, the influence of the crystal grain boundary is small.
The operating speed of T can be increased.

FIG. 10 shows the pixel portion 802 shown in FIG.
FIG. In FIG. 10, line AA ′ corresponds to FIG.
This corresponds to the cross-sectional view shown in FIG. In the pixel structure shown in this embodiment, a source wiring 747 is formed below an interlayer insulating film 760, and a pixel electrode 768 formed on the interlayer insulating film 760 is formed so as to overlap with the source wiring 747. ing. In the island-shaped semiconductor layer 711, a gate wiring 770 is formed over an intersection (a channel formation region) with the gate electrode 748 to provide light-shielding properties. With such a structure, the area of the pixel electrode can be increased, and the aperture ratio can be improved.

According to the steps shown in this embodiment, the number of photomasks required for manufacturing the active matrix substrate is six (the island-like insulating film pattern, the island-like semiconductor layer pattern,
A first wiring pattern (gate wiring, island-shaped source wiring, capacitance wiring), a mask pattern of an n-channel region, a contact hole pattern, and a second wiring pattern (including pixel electrodes and connection electrodes) can be used. As a result, the process can be shortened, which can contribute to a reduction in manufacturing cost and an improvement in yield.

[Embodiment 2] In this embodiment, a process of manufacturing an active matrix type liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described below.
First, according to the first embodiment, after obtaining the active matrix substrate in the state of FIG. 9C, a columnar spacer 901 is formed as shown in FIG. Such a columnar spacer,
A photosensitive resin film is formed, and exposed and developed to form a predetermined position. The material of the photosensitive resin film is not limited. For example, NN700 manufactured by JSR Co., Ltd. is applied by a spinner, and is cured by heating at 150 to 200 ° C. using a clean oven. The shape of the spacer manufactured in this manner can be varied depending on the conditions of the exposure and the development processing.
The height of 1 is 2 to 7 μm, preferably 4 to 6 μm, and its shape is columnar and the top is flat, so that the mechanical strength of the liquid crystal display panel when the opposing substrates are combined Can be secured. An alignment film 9 is formed thereon.
02 is formed and a rubbing process is performed.

After forming a counter electrode 905 on the counter substrate 904 and forming an alignment film 906, a rubbing process is performed. Then, the active matrix substrate and the counter substrate are bonded with a sealant 903. A filler is mixed in the sealant 903, and the two substrates can be bonded to each other with a uniform interval by the filler and the spacer 901. Thereafter, a liquid crystal material 907 is injected between the two substrates, and completely sealed with a sealing agent (not shown). A known liquid crystal material may be used as the liquid crystal material. Thus, the active matrix liquid crystal display device shown in FIG. 11 is completed.

The structure of such an active matrix type liquid crystal display device will be described with reference to the perspective view of FIG. FIG.
In FIG. 2, description will be made using common reference numerals in order to clarify the relationship with FIGS. In FIG. 12, the active matrix substrate is formed on a glass substrate 701,
The pixel unit 802 includes a driving circuit 801 and another signal processing circuit 913. The driving circuit is a gate wiring 770
And the one connected to the source wiring 747 have different configurations, and are formed separately from each other. The pixel portion 802 is provided with a pixel TFT 806 and a storage capacitor 807, and a driving circuit provided around the pixel portion is basically formed of a CMOS circuit. The pixel TFT 806 is provided at an intersection of the gate wiring 770 and the source wiring 747. In addition, flexible printed wiring boards (Flexib
le Printed Circuit (FPC) 910 is the external input terminal 9
11 and used to input image signals and the like. Then, a connection wiring 912 is connected to each drive circuit. Further, a transparent electrode (not shown) is provided on the counter substrate 904.

The active matrix type liquid crystal display device thus manufactured is of a reflection type and can be suitably used as a display device of a portable information terminal. In particular, the adoption of the laser annealing method of the present invention enables the TFT to be manufactured to operate at high speed, thereby enabling high-definition and digital driving of an active matrix type liquid crystal display device integrally formed with a driving circuit. Can be.

[Embodiment 3] In FIG. 9C or FIG. 10 (Embodiment 1), if the pixel electrode 768 is formed of a transparent conductive film, a transmissive display device can be formed. The material of the transparent conductive film is indium oxide (In2O3) or indium oxide tin oxide alloy (In2O3-SnO2; ITO)
Are formed using a sputtering method, a vacuum evaporation method, or the like.
The etching of such a material is performed using a hydrochloric acid-based solution. Further, since a residue is easily generated in the etching of ITO, an alloy of indium oxide and zinc oxide (In2O3-ZnO) may be used to improve the etching processability.
Indium zinc oxide alloy has excellent surface smoothness,
It has excellent thermal stability to O. Similarly, zinc oxide (ZnO) is a suitable material, and zinc oxide (ZnO: Ga) to which gallium (Ga) is added in order to increase the transmittance and conductivity of visible light can be used.

[Embodiment 4] FIG. 13 shows an example in which an active matrix type liquid crystal display device of a reflection type liquid crystal display device manufactured using the pixel structure of the present invention is used as a direct view type display device. A pixel portion 1301 and a driver circuit portion 1302 are formed over an active matrix substrate 1303, a counter substrate 1304 is bonded with a sealant 1306, and a liquid crystal layer 1305 is formed therebetween.

FIG. 13 shows an example of a reflection type liquid crystal display device using a front light. A front light system 1308 is provided on a polarizing plate 1307. Reflective liquid crystal display devices use external light to display images in bright places during the daytime, but use a method that uses front lights to display images when sufficient external light cannot be introduced, such as at night. Can be. In any case, with the pixel structure of the present invention, the ratio of the pixel electrode in the pixel portion is increased, and a bright image display can be realized.
In addition, when a front light is used, the intensity of light to be applied can be reduced, and the power consumption of an electronic device incorporating such a liquid crystal display device can be reduced.

[Embodiment 5] In this embodiment, a self-luminous display device using an electroluminescence (EL) material (hereinafter, referred to as an EL display device) is used for the active matrix substrate shown in the first embodiment. ) Will be described.

FIG. 14 is a cross-sectional view of the pixel portion, showing a state in which a switching TFT 901, a current controlling TFT 902, and a storage capacitor 903 are formed. These TFTs
Is manufactured in the same process as in the first embodiment. The switching TFT 901 is an n-channel TFT, and the channel forming region 90 is formed in the semiconductor layer 955 below the gate electrode 951.
4. The semiconductor device includes a second impurity region 905 serving as an LDD region and a first impurity region 906 serving as a source or drain region. In addition, the semiconductor layer 955 includes a source wiring 953
And the connection electrode 961.

The current control TFT 902 is a p-channel type T
FT, which includes a channel formation region 907 and a third impurity region 908 to be a source or drain region in the semiconductor layer 956 below the gate electrode 952. The source side of the current controlling TFT 902 is connected to the power supply line 964, and the drain side is connected to the drain electrode 965.
Further, a pixel electrode 966 formed of a transparent conductive film is connected to the drain electrode 965. Also, the capacitance wiring 95
2 and the semiconductor layer 956 overlap each other in the storage capacitor 9.
03 is formed. The protective insulating film 959 and the interlayer insulating film 960 are the same as those in the first embodiment.

The sectional view of FIG. 14 corresponds to the line BB ′ shown in the top view of the pixel portion of FIG. The source wiring 953 includes a pixel electrode 967 and an adjacent pixel electrode 971
The light-shielding property is enhanced by forming an end portion overlapping with the source wiring 753.

A bank 967 made of an insulating film is formed in the pixel portion, and a light emitting layer 968 made of a material such as polyvinyl carbazole is formed by applying a solution. An electron injection layer 969 made of potassium acetylacetonate (denoted as acacK) and a cathode 970 made of an aluminum alloy are formed thereon. In this case, the cathode 970 also functions as a passivation film. Thus, a self-luminous EL element is formed. In the case of this embodiment, the light emitting layer 968 is used.
Is emitted toward the active matrix substrate.

As described above, by adopting the pixel structure of the present invention, the aperture ratio can be improved in the active matrix type self-luminous display device. As a result, a bright and clear image can be displayed.

[Embodiment 6] In this embodiment, a semiconductor device incorporating the display device of the present invention will be described. Such a semiconductor device includes a portable information terminal (electronic notebook, mobile computer, mobile phone, and the like), a video camera, a still camera, a personal computer, a television, and the like.
Examples of these are shown in FIGS.

FIG. 16A shows a portable telephone, and
01, audio output unit 9002, audio input unit 2903, display device 2904, operation switch 2905, antenna 290
6. The present invention can be applied to the display device 2904. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of low power consumption.

FIG. 16B shows a video camera, which includes a main body 9101, a display device 9102, an audio input portion 9103, operation switches 9104, a battery 9105, and an image receiving portion 91.
06. The invention can be applied to the display device 9102. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of reducing power consumption.

FIG. 16C shows a mobile computer or a portable information terminal.
02, an image receiving section 9203, operation switches 9204, and a display device 9205. The present invention relates to a display device 920.
5 can be applied. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of reducing power consumption.

FIG. 16D shows a television receiver, which includes a main body 9401, a speaker 9402, a display device 9403, a receiver 9404, an amplifier 9405, and the like. The invention can be applied to the display device 9403. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of reducing power consumption.

FIG. 16E shows a portable book, and a main body 95.
01, display devices 9502 and 9503, storage medium 950
4, comprising an operation switch 9505 and an antenna 9506 for displaying data stored on a mini disk (MD) or a DVD or data received by the antenna. The direct-view display devices 9502 and 9503 are, in particular,
The reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of low power consumption.

FIG. 17A shows a personal computer, which includes a main body 9601, an image input section 9602, and a display device 9.
603 and a keyboard 9604. The present invention can be applied to the display device 9603. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of reducing power consumption.

FIG. 17B shows a player that uses a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 9701, a display device 9702, and a speaker unit 97.
03, a recording medium 9704, and operation switches 9705. This device uses a DVD (Di) as a recording medium.
It is possible to watch music, watch a movie, play a game, or use the Internet by using a CD (g. Versatile Disc) or a CD. The present invention can be applied to the display device 9702. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of reducing power consumption.

FIG. 17C shows a digital camera, which comprises a main body 9801, a display device 9802, an eyepiece 9803, operation switches 9804, and an image receiving unit (not shown). The present invention can be applied to the display device 9802. In particular, the reflective liquid crystal display device described in Embodiment 4 is suitable from the viewpoint of reducing power consumption.

FIG. 18A shows a front type projector, which comprises a projection device 3601 and a screen 3602. The present invention can be applied to the projection device 3601 and other signal control circuits.

FIG. 18B shows a rear type projector, which includes a main body 3701, a projection device 3702, and a mirror 370.
3. It is composed of a screen 3704. The present invention can be applied to the projection device 3702 and other signal control circuits.

FIG. 18C is a diagram showing an example of the structure of the projection devices 3601 and 3702 in FIGS. 18A and 18B. Projection device 3601, 370
2 is a light source optical system 3801, mirrors 3802 and 3804
To 3806, dichroic mirror 3803, prism 3807, liquid crystal display device 3808, retardation plate 3809,
It is composed of a projection optical system 3810. Projection optical system 3810
Is composed of an optical system including a projection lens. In the present embodiment, an example of a three-plate type is shown, but there is no particular limitation, and for example, a single-plate type may be used. In addition, the practitioner may appropriately place an optical lens, a film having a polarizing function, a film for adjusting a phase difference, or the like in the optical path indicated by the arrow in FIG.
An optical system such as an IR film may be provided.

FIG. 18D is a diagram showing an example of the structure of the light source optical system 3801 in FIG. 18C. In this embodiment, the light source optical system 3801 includes a reflector 3811, a light source 3812, a lens array 3813,
814, a polarization conversion element 3815, and a condenser lens 3816. Note that the light source optical system shown in FIG. 18D is an example and is not particularly limited. For example, a practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the light source optical system.

[0120]

According to the present invention, the orientation of a crystalline semiconductor film formed by using a laser annealing method for an amorphous semiconductor film can be improved. Further, by using such a crystalline semiconductor film, characteristics of the TFT can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing steps of a crystallization method of the present invention.

FIG. 2 is a process chart in a case where a dual beam laser annealing method is applied to the crystallization method of the present invention.

FIG. 3 is a top view illustrating a nucleation region and a crystal growth direction in a laser annealing method.

FIG. 4 is a configuration diagram of a cluster tool type apparatus applied to the crystallization method of the present invention.

FIG. 5 is a diagram illustrating an example of a reaction chamber associated with a cluster tool type device.

FIG. 6 is a diagram illustrating an example of a laser processing chamber attached to a cluster tool type device.

FIG. 7 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 8 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 9 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 10 is a top view illustrating a structure of a pixel in a liquid crystal display device.

FIG. 11 is a cross-sectional view of an active matrix display device.

FIG. 12 is a perspective view of an active matrix liquid crystal display device.

FIG. 13 illustrates a configuration of a reflective liquid crystal display device using a front light.

FIG. 14 is a cross-sectional view illustrating a structure of a pixel portion of an EL display device.

FIG. 15 is a top view illustrating a structure of a pixel portion of an EL display device.

FIG. 16 illustrates an example of a semiconductor device.

FIG. 17 illustrates an example of a semiconductor device.

FIG. 18 illustrates an example of a projector.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification FI theme coat ゛ (Reference) H01L 29/786 H01L 29/78 626C 21/336 627G (72) Inventor Koji Ono 398 Hase, Atsugi City, Kanagawa Prefecture Inside the Semiconductor Energy Laboratory Co., Ltd. (72) Inventor Tohru Takayama 398 Hase, Atsugi-shi, Kanagawa F-term in the Semiconductor Energy Laboratory Co., Ltd. BA03 BA43 CA19 EA04 EA05 EB02 HA08 HA10 5F048 AA08 AB10 AC04 AC10 BA10 BA16 BB05 BC06 BC11 BD04 BE08 BF02 BF07 BF11 BG05 5F052 AA02 AA11 BA07 BB02 BB07 CA04 DA02 DB02 DB03 DB07 EA12 FA06 FA19 FA02 DD01 DD17 DD21 DD25 EE01 EE04 EE14 EE23 FF01 FF02 FF04 FF09 FF28 FF30 FF35 GG01 GG02 GG 13 GG17 GG25 GG43 GG45 GG47 HJ01 HJ04 HJ12 HJ13 HJ23 HL03 HL04 HL07 HM15 NN02 NN22 NN24 NN27 NN35 NN72 PP01 PP03 PP04 PP05 PP06 PP07 PP10 PP13 PP29 PP34 PP35 PP40 QQ04 QQ09 QQQ25 Q25Q

Claims (12)

[Claims] 1. A first step of selectively forming a first insulating film on an insulating surface, and a second step of forming a second insulating film on the insulating surface and on the first insulating film. The step and the second
A third step of treating the surface of the insulating film with a halogen element, and a fourth step of forming a semiconductor film having an amorphous structure on the second insulating film after the third step. A fifth step of adding a catalyst element in the semiconductor film having the amorphous structure or in contact with the semiconductor film having the amorphous structure to promote crystallization of the semiconductor film having the amorphous structure;
A sixth step of performing a first heat treatment on the semiconductor film having the amorphous structure to form a first crystalline semiconductor film, and a second step of irradiating the first crystalline semiconductor film with laser light. And a seventh step of forming a crystalline semiconductor film. 2. A first step of selectively forming a first insulating film on an insulating surface, and a second step of forming a second insulating film on the insulating surface and on the first insulating film. The step and the second
A third step of treating the surface of the insulating film with a halogen element, and a fourth step of forming a semiconductor film having an amorphous structure on the second insulating film after the third step. A fifth step of adding a catalyst element in the semiconductor film having the amorphous structure or in contact with the semiconductor film having the amorphous structure to promote crystallization of the semiconductor film having the amorphous structure;
Irradiating the semiconductor film having an amorphous structure with laser light to form a crystalline semiconductor film. 3. A first step of selectively forming a first insulating film on an insulating surface, and a second step of forming a second insulating film on the insulating surface and on the first insulating film. The step and the second
A third step of treating the surface of the insulating film with a halogen element, and a fourth step of adding a catalytic element that promotes crystallization of the semiconductor film having an amorphous structure to the surface of the second insulating film. A fifth step of forming a semiconductor film having an amorphous structure on the second insulating film after the third step, and performing a first heat treatment on the semiconductor film having the amorphous structure. First
Forming a second crystalline semiconductor film by irradiating a laser beam to the first crystalline semiconductor film to form a second crystalline semiconductor film. Of manufacturing a semiconductor device. 4. A first step of selectively forming a first insulating film on an insulating surface, and a second step of forming a second insulating film on the insulating surface and on the first insulating film. The step and the second
A third step of treating the surface of the insulating film with a halogen element, and a fourth step of forming a semiconductor film having an amorphous structure on the second insulating film after the third step. A fifth step of adding a catalyst element in the semiconductor film having the amorphous structure or in contact with the semiconductor film having the amorphous structure to promote crystallization of the semiconductor film having the amorphous structure;
A sixth step of performing a first heat treatment on the semiconductor film having the amorphous structure to form a first crystalline semiconductor film, and a second step of irradiating the first crystalline semiconductor film with laser light. A seventh step of forming a crystalline semiconductor film, an eighth step of forming a gate insulating film on the second crystalline semiconductor film, and a first conductive film and a second conductive film on the gate insulating film. A ninth step of forming a conductive film, a tenth step of forming a first shape conductive layer by performing a first etching process on the first conductive film and the second conductive film, An eleventh step of forming a first impurity region outside the conductive layer having a shape;
A twelfth step of forming a second shape conductive layer by performing a second etching process on the second shape conductive layer, and a thirteenth step of forming a second impurity region overlapping with the second shape conductive layer And a fourteenth step of forming a third-shape conductive layer by performing a third etching process on the second-shape conductive layer. 5. A first step of selectively forming a first insulating film on an insulating surface, and a second step of forming a second insulating film on the insulating surface and on the first insulating film. The step and the second
A third step of treating the surface of the insulating film with a halogen element, and a fourth step of forming a semiconductor film having an amorphous structure on the second insulating film after the third step. A fifth step of adding a catalyst element in the semiconductor film having the amorphous structure or in contact with the semiconductor film having the amorphous structure to promote crystallization of the semiconductor film having the amorphous structure;
A sixth step of irradiating the semiconductor film having the amorphous structure with a laser beam to form a crystalline semiconductor film, a seventh step of forming a gate insulating film on the crystalline semiconductor film, An eighth step of forming a first conductive film and a second conductive film on the insulating film, and a first shape conductive layer formed by performing a first etching process on the first conductive film and the second conductive film. A ninth step of forming a first impurity region outside the first shape conductive layer; and a tenth step of forming the first shape conductive layer by a second etching process. An eleventh step of forming a conductive layer of the second shape, a twelfth step of forming a second impurity region overlapping the conductive layer of the second shape, and a third step of forming the conductive layer of the second shape. And a thirteenth step of forming a conductive layer having a third shape by an etching process. The method for manufacturing a semiconductor device according to. 6. A first step of selectively forming a first insulating film on an insulating surface, and a second step of forming a second insulating film on the insulating surface and on the first insulating film. The step and the second
A third step of treating the surface of the insulating film with a halogen element, and a fourth step of adding a catalytic element that promotes crystallization of the semiconductor film having an amorphous structure to the surface of the second insulating film. A fifth step of forming a semiconductor film having an amorphous structure on the second insulating film after the third step, and performing a first heat treatment on the semiconductor film having the amorphous structure. First
A sixth step of forming a second crystalline semiconductor film by irradiating the first crystalline semiconductor film with a laser beam, and a second step of forming a second crystalline semiconductor film by irradiating the first crystalline semiconductor film with a laser beam. An eighth step of forming a gate insulating film on the quality semiconductor film, a ninth step of forming a first conductive film and a second conductive film on the gate insulating film, The second conductive film is first
A tenth step of forming a first shape conductive layer by etching treatment, and a first step outside the first shape conductive layer.
An eleventh step of forming a second shape conductive layer by performing a second etching process on the first shape conductive layer; and a second step of forming the second shape conductive layer by performing a second etching process on the first shape conductive layer. A thirteenth step of forming a second impurity region overlapping the layer; and a fourteenth step of forming a third shape conductive layer by subjecting the second shape conductive layer to a third etching process. A method for manufacturing a semiconductor device, comprising: 7. The method according to claim 1, wherein the step of treating the surface of the second insulating film with a halogen element includes exposing the surface of the second insulating film to plasma containing fluorine atoms or fluorine radicals. Of manufacturing a semiconductor device. 8. The method according to claim 1, wherein the step of treating the surface of the second insulating film with a halogen element includes exposing the surface of the silicon tetrafluoride to plasma. A method for manufacturing a semiconductor device. 9. The method according to claim 1, wherein the step of treating the surface of the second insulating film with a halogen element includes exposing the surface of the second insulating film to an atmosphere in which nitrogen trifluoride is turned into a plasma. A method for manufacturing a semiconductor device. 10. The method according to claim 1, wherein the catalyst element is nickel (Ni), germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead ( Pb), cobalt (Co), platinum (P
t), copper (Cu), and gold (Au). 11. The method for manufacturing a semiconductor device according to claim 1, wherein the laser light is excimer laser light having a wavelength of 400 nm or less. 12. The any one of claims 1 to 6, wherein the laser beam is a YAG laser, YVO ₄ laser, YAlO ₃ laser, a laser light selected from the YLF laser, the first 2 harmonics (53
2 nm), the third harmonic (355 nm), and the fourth harmonic (266
nm), a method for manufacturing a semiconductor device.