JP2002359196A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the orientation rate of a semiconductor film obtained by crystallizing an amorphous semiconductor film while relaxing strain, and to provide a TFT employing such a crystalline semiconductor film. SOLUTION: The orientation rate of a semiconductor film 104 is enhanced by adding a rare gas element, typically argon, into an amorphous semiconductor film 102 during or after formation thereof thereby crystallizing the amorphous semiconductor film, and strain existing in the crystallized semiconductor film 104 is relaxed as compared with that before crystallization. The film is eventually irradiated with laser light in order to remove rare gas elements.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a circuit composed of thin film transistors (hereinafter, referred to as TFTs). For example, the present invention relates to an electro-optical device typified by a liquid crystal display panel and an electronic device equipped with such an electro-optical device as a component.

[0002] In this specification, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

[0003]

2. Description of the Related Art In recent years, a technique of forming a thin film transistor (TFT) using a semiconductor thin film (having a thickness of several to several hundred nm) formed on a substrate having an insulating surface has attracted attention. Thin film transistors are widely applied to electronic devices such as ICs and electro-optical devices, and are particularly rapidly developed as switching elements for image display devices.

A material of a crystalline semiconductor film suitably used for a TFT is silicon. A silicon film having a crystal structure (hereinafter referred to as a crystalline silicon film) is formed by plasma CVD.
Amorphous silicon film deposited on a substrate such as glass or quartz by heat treatment or low pressure CVD is crystallized by heat treatment or laser light irradiation (hereinafter referred to as laser treatment in this specification). Has been applied.

[0005]

However, the crystalline silicon film produced by the above-mentioned conventional method has its crystal orientation planes at random and has a low orientation ratio for a specific crystal orientation. When the orientation ratio is low, it is almost impossible to maintain lattice continuity at a crystal grain boundary where crystals of different orientations collide, and it can be estimated that many dangling bonds are formed. Unpaired bonds at the grain boundaries are carriers (electrons,
Hole), which reduces transport properties. That is, since carriers are scattered or trapped, a TFT having high field-effect mobility cannot be expected even if a TFT is manufactured using such a crystalline semiconductor film.

Further, a silicon film having a crystal structure, that is, a polysilicon film has many strains, defects, and the like. These act as carrier traps and deteriorate electrical characteristics. Therefore, even in the channel forming region of the TFT, the existence form of the strain, the volume of the lattice defect, and the like are one of the major causes of the fluctuation of the characteristics.

SUMMARY OF THE INVENTION An object of the present invention is to provide a means for solving such a problem, and to increase the orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film and to reduce distortion. It is another object of the present invention to provide a TFT using such a crystalline semiconductor film.

[0008]

SUMMARY OF THE INVENTION The present invention is directed to a method for forming an amorphous semiconductor film by crystallizing the semiconductor film by including a rare gas, typically argon, during or after the formation of the amorphous semiconductor film. This is characterized in that the rate can be increased, and the strain existing in the semiconductor film after crystallization is reduced as compared with before the crystallization.

In the crystallization according to the present invention, a metal element which promotes crystallization of silicon is introduced, and a crystalline silicon film is formed by a heat treatment at a lower temperature than in the prior art. Then, a rare gas in the film is removed or reduced by laser light irradiation performed later.

The distribution of the crystal orientation is determined by a backscattered diffraction pattern (EBSP).
rn). EBSP is a technique in which a dedicated detector is provided in a scanning electron microscope (SEM: Scanning Electron Microscopy) to analyze the crystal orientation from the backscattering of primary electrons. When an electron beam is incident on a sample with a crystal structure, inelastic scattering also occurs in the back, and in that, a linear pattern unique to the crystal orientation by Bragg diffraction in the sample is included.
(Generally called Kikuchi statue) are also observed. EB
SP determines the crystal orientation of the sample by analyzing the Kikuchi image reflected on the detector screen. By repeating the orientation analysis (mapping measurement) while moving the position of the sample where the electron beam hits, information on the crystal orientation or orientation of the planar sample can be obtained. When all the crystal orientations of each crystal grain are determined by mapping measurement, the state of the crystal orientation with respect to the film can be statistically displayed.

The present inventors conducted the following experiment.

(Experiment) First, a sample in which a base insulating film (silicon oxynitride film, 150 nm thick) was formed on a glass substrate, and a 54 nm-thick amorphous silicon film was formed thereon by plasma CVD. Prepared. Next, argon was added to the amorphous silicon film by an ion doping method. The condition of ion doping at this time is as follows.
At 0 kV, the dose was set at 2 × 10 ¹⁵ / cm ^2, and the concentration of argon contained in the film was set at about 3 × 10 ²⁰ / cm ³ . Next, nickel was converted to 100 pp by weight.
After a solution containing m was applied, heat treatment was performed at 500 ° C. for 1 hour, and then heat treatment was performed at 600 ° C. for 8 hours to crystallize, thereby forming a silicon film having a crystal structure. The distribution of the crystal orientation in the silicon film having the crystal structure thus obtained was examined by EBSP.

FIG. 14 is a diagram showing the reverse pole obtained from the EBSP. The inverse pole figure is often used to indicate the preferred orientation of polycrystals, and collectively displays which lattice plane matches a specific plane of the sample (here, the film surface). It is. The fan-shaped frame in FIG. 14 is generally called a standard triangle, and includes all indices in the cubic system. Further, the length in the figure corresponds to the angle in the crystal orientation. For example, 45 degrees between {001} and {101}, {101}
35.26 degrees between {111} and {111}, {111} and {00}
54.74 degrees during 1 °.

FIG. 14 is a plot of all measurement points in the mapping within a standard triangle.
Since the density of points is high near 1｝ and around {111}, specific indices (here, {101} and {11}
It can be seen that 1｝) is preferentially oriented.

In this way, when it is found that the orientation is preferentially oriented to a specific index, the degree of the preferential orientation can be further improved by quantifying the degree of crystal grains gathering in the vicinity of the index. It becomes easy to imagine. In the inverse pole figure shown in FIG. 14, the ratio of the number of points existing in the range of the deviation angle of 10 degrees from {101} to the entire point can be shown as the orientation ratio.

In the orientation ratio thus obtained, the ratio of the angle between the {101} plane and the surface of the silicon film detected by the backscattered electron diffraction pattern method being within 10 degrees is 16%, and the {111} angle is {111}. The ratio of the angle of the｝ face to the surface of the semiconductor film within 10 degrees is 14%, and
The ratio of the angle formed by the 1 ° plane with the surface of the semiconductor film within 10 degrees was 1%. That is, as compared with the {001} plane, the crystal orientation ratio is more strongly oriented between the {101} plane and the {111} plane.

The information on the distortion may be obtained by the X-ray diffraction method. In the X-ray diffraction method, the diffraction intensity is measured while scanning the diffraction angle 2θ. From the measurement of 2θ at which the intensity peaked, the Bragg equation (2d sinθ =
λ, λ is the wavelength of X-rays) The lattice spacing d can be determined. Here, when the 2θ scan is delayed and the peak position is precisely obtained, information on the distortion applied to the lattice can also be obtained.

According to the structure of the invention disclosed in this specification, a first step of forming a first semiconductor film having an amorphous structure on an insulating surface and a step of forming the first semiconductor film having the amorphous structure A second step of adding a rare gas element, a third step of adding a metal element to the first semiconductor film having the amorphous structure, and irradiation of laser light after the first semiconductor film is subjected to heat treatment. Performing a crystallization to form a first semiconductor film having a crystal structure, a fifth step of forming a barrier layer on a surface of the first semiconductor film having the crystal structure, A sixth step of forming a second semiconductor film containing a rare gas element on the layer, and the metal element in the first semiconductor film having a crystal structure by gettering the metal element to the second semiconductor film Removing the second semiconductor film, and removing the second semiconductor film. A method for manufacturing a semiconductor device, characterized in that it comprises an eighth step.

In the above structure, the step of forming the barrier layer includes oxidizing the surface of the semiconductor film having the crystal structure by irradiating a laser beam, and further oxidizing the surface of the semiconductor film having the crystal structure with a solution containing ozone. Is characterized by the step of oxidizing

In the above structure, in the second step, a rare gas element is contained in the first semiconductor film having an amorphous structure in an amount of 1 × 10 ¹⁷ / cm ³ or more, preferably 1 × 10 ¹⁷ / cm ³ or more.
It is characterized in that it is added in a concentration range of 0 ²⁰ / cm ^{3 to} 3 × 10 ²⁰ / cm ³ .

Further, in the above structure, the rare gas element contained in the first semiconductor film is removed or reduced by the laser light irradiation in the fourth step.

In each of the above structures, the laser is a solid-state laser of continuous oscillation or pulse oscillation. Typically, the laser is a continuous wave or pulsed YAG laser, a YVO ₄ laser, a YLF laser, a YAl laser.
One or a plurality of types selected from an O ₃ laser, a glass laser, a ruby laser, an alexandrite laser, and a Ti: sapphire laser. Alternatively, in each of the above structures, the laser is one or more types selected from a continuous wave or pulsed excimer laser, an Ar laser, and a Kr laser.

An experiment was conducted to confirm that the rare gas element contained in the first semiconductor film was removed or reduced by laser light. FIG. 15 shows the Ar / Si concentration ratio by TXRF. In the experiment, the results were measured immediately after film formation using an amorphous silicon film containing Ar during film formation, and N
Samples were prepared by applying a nickel acetate solution containing 10 ppm by weight of i to a spinner.
The results measured after heat treatment (SPC) at 6 ° C. for 6 hours and the results measured after irradiation with excimer laser light (LC) are indicated by circles in FIG. Also, Ni
Of a nickel acetate solution containing 100 ppm by weight of
The results of measurement after heat treatment (SPC) at 8 ° C. for 8 hours and the results of measurement after irradiation (LC) with excimer laser light are indicated by triangles in FIG. From FIG. 15, it can be read that the rare gas element contained in the semiconductor film is significantly removed or reduced by the laser light irradiation.

In another aspect of the present invention, a first step of forming a first semiconductor film having an amorphous structure on an insulating surface and a step of forming a rare gas on the first semiconductor film having the amorphous structure are performed. A second step of adding an element, and a first step having the amorphous structure.
A third step of adding a metal element to the semiconductor film of the first step;
Heating the semiconductor film, and then irradiating the semiconductor film with a laser beam to perform crystallization to form a first semiconductor film having a crystal structure, and applying a rare gas to the first semiconductor film having the crystal structure. A fifth step of selectively adding an element to form a region containing a rare gas element, and forming a region in the first semiconductor film having a crystal structure by gettering the metal element in the region containing the rare gas element. A method for manufacturing a semiconductor device, comprising: a sixth step of selectively removing or reducing the metal element; and a seventh step of removing a region containing the rare gas element.

In the above structure, in the second step, a rare gas element is contained in the first semiconductor film having an amorphous structure in an amount of 1 × 10 ¹⁷ / cm ³ or more, preferably 1 × 10 ¹⁷ / cm ³ or more.
It is characterized in that it is added in a concentration range of 0 ²⁰ / cm ^{3 to} 3 × 10 ²⁰ / cm ³ .

Further, in the above structure, the rare gas element contained in the first semiconductor film is removed or reduced by the laser light irradiation in the fourth step.

In each of the above structures, the second semiconductor film is formed by a sputtering method using a semiconductor as a target in an atmosphere containing a rare gas element. Alternatively, the gate electrode may be formed by a sputtering method using a semiconductor containing phosphorus or boron as a target in an atmosphere containing a rare gas element. In each of the above configurations, the second
May be formed by a PCVD method in which a film is formed in an atmosphere containing a rare gas element.

In each of the above structures, the sixth step is a heat treatment or a treatment for irradiating the semiconductor film with strong light. The sixth step may be a step of performing a heat treatment and irradiating the semiconductor film with strong light.

In each of the above structures, the strong light is
The light is emitted from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp.

In each of the above structures, when the sixth step is performed, the concentration of the rare gas element contained in the second semiconductor film is adjusted to the concentration of the rare gas element contained in the first semiconductor film having a crystalline structure. It is preferable to set higher than the concentration.

After forming a semiconductor film having an amorphous structure by including a rare gas element at the time of film formation, crystallization may be performed using a metal element that promotes crystallization. A configuration including a rare gas element over an insulating surface and forming a semiconductor film having an amorphous structure; a second step of adding a metal element to the semiconductor film having the amorphous structure;
And b. Performing a heat treatment on the first semiconductor film, irradiating the first semiconductor film with laser light, and performing crystallization to form a semiconductor film having a crystalline structure.

After forming a semiconductor film having an amorphous structure by including a rare gas element at the time of film formation, the semiconductor film may be crystallized using a metal element that promotes crystallization, and further gettering may be performed. According to another aspect of the present invention, a first step of forming a first semiconductor film including a rare gas element on an insulating surface and having an amorphous structure, and a first semiconductor film having the amorphous structure A second step of adding a metal element to the first step, and a third step of subjecting the first semiconductor film to heat treatment and then irradiating a laser beam to perform crystallization to form a first semiconductor film having a crystalline structure. A fourth step of forming a barrier layer on a surface of the first semiconductor film having the crystal structure, a fifth step of forming a second semiconductor film containing a rare gas element on the barrier layer, 2 has a crystal structure by gettering the metal element to the semiconductor film A sixth step of removing or reducing the metal element in the first semiconductor film, a method for manufacturing a semiconductor device, characterized in that it comprises a seventh step of removing the second semiconductor film.

In the above structure, the second semiconductor film may be formed by a sputtering method using a semiconductor as a target in an atmosphere containing a rare gas element, or may be formed in an atmosphere containing a rare gas element. The film may be formed by a PCVD method. Alternatively, the gate electrode may be formed by a sputtering method using a semiconductor containing phosphorus or boron as a target in an atmosphere containing a rare gas element.

In the above structure, when the step of forming the second semiconductor film is performed, the concentration of the rare gas element contained in the second semiconductor film is adjusted to the concentration of the rare gas element contained in the first semiconductor film having a crystalline structure. It is preferable to set higher than the concentration of the gas element.

In each of the above structures, the metal element is Fe, Ni, Co, Ru, Rh, Pd, Os, Ir,
It is characterized by one or more selected from Pt, Cu and Au.

In each of the above structures, the rare gas element is one or more selected from He, Ne, Ar, Kr, and Xe.

[0037]

Embodiments of the present invention will be described below.

The present invention relates to a process for forming an amorphous semiconductor film on an insulating surface, a process for adding a rare gas element to the amorphous semiconductor film, and a process for adding a metal element for promoting crystallization. And a process of performing first crystallization by heat treatment and a process of performing second crystallization by laser light irradiation.

The heat treatment may be heat treatment using a furnace, irradiation with strong light from a lamp light source, or irradiation with strong light simultaneously with the heat treatment.

Further, it is desirable to remove or reduce metal elements from the semiconductor film having a crystal structure obtained by the above process. The obtained semiconductor film having a crystal structure is patterned into a desired shape and used as an active layer of a TFT.

The procedure for fabricating a typical TFT using the present invention will be briefly described below with reference to FIGS.

(Embodiment 1) In FIG.
Denotes a substrate having an insulating surface, 101 denotes an insulating film serving as a blocking layer, and 102 denotes a semiconductor film having an amorphous structure.

In FIG. 1A, a substrate 100 can be a glass substrate, a quartz substrate, a ceramic substrate, or the like. Alternatively, a silicon substrate, a metal substrate, or a stainless steel substrate on which an insulating film is formed may be used. Alternatively, a plastic substrate having heat resistance enough to withstand the processing temperature in this step may be used.

First, a silicon oxide film, a silicon nitride film or a silicon oxynitride film (SiO _x N _y ) is formed on the substrate 100.
A base insulating film 101 made of such an insulating film is formed. A typical example has a two-layer structure as the base insulating film 101,
The first silicon oxynitride film formed using SiH ₄ , NH ₃ , and N ₂ O as a reaction gas is
₄ and a structure in which a second silicon oxynitride film formed using N ₂ O as a reaction gas is formed to a thickness of 100 to 150 nm. Further, as one layer of the base insulating film 101, a silicon nitride film (SiN film) having a thickness of 10 nm or less or a second silicon oxynitride film (SiN _x O _y film (X≫
It is preferred to use Y)). At the time of gettering, nickel tends to easily move to a region having a high oxygen concentration. Therefore, it is extremely effective to use a silicon nitride film as a base insulating film in contact with a semiconductor film. Alternatively, a three-layer structure in which a first silicon oxynitride film, a second silicon oxynitride film, and a silicon nitride film are sequentially stacked may be used.

Next, a first semiconductor film having an amorphous structure is formed on the base insulating film 101. For the first semiconductor film, a semiconductor material containing silicon as a main component is used. Typically, an amorphous silicon film or an amorphous silicon germanium film is applied, and a plasma CVD method or a low pressure CVD method is used.
It is formed to a thickness of 10 to 100 nm by a method or a sputtering method. In order to obtain a semiconductor film having a good crystal structure by subsequent crystallization, the concentration of impurities such as oxygen and nitrogen contained in the film of the first semiconductor film having an amorphous structure is set to 5 × 10 ¹⁸ / c.
It is preferable to reduce it to m ³ (atomic concentration measured by secondary ion mass spectrometry (SIMS)) or less. These impurities are factors that hinder subsequent crystallization, and also increase the density of trapping centers and recombination centers even after crystallization. For this purpose, it is desirable to use not only a high-purity material gas but also an ultra-high vacuum-compatible CVD apparatus provided with a mirror surface treatment (electric polishing treatment) in the reaction chamber and an oil-free vacuum exhaust system.

Next, a rare gas element is added to the first semiconductor film 102 by an ion doping method or an ion implantation method. (FIG. 1A) As a rare gas element, helium (H
e), neon (Ne), argon (Ar), krypton (Kr), or one or more selected from xenon (Xe). Here, an example is shown in which these inert gases are used as an ion source and injected into a semiconductor film by an ion doping method or an ion implantation method. Here, the concentration of the rare gas element is 1 × 10 ¹⁷ / cm ³ or more, preferably 1 × 10 ²⁰ / cm ³
It is added to the first semiconductor film to have a concentration of about 3 × 10 ²⁰ / cm ³ . The meaning of implanting these inert gas ions is as follows.
Is to alleviate the distortion by implanting the ions between lattices of the semiconductor film. In particular, it is remarkably obtained when an element having a larger atomic radius than silicon, such as argon (Ar), krypton (Kr), and xenon (Xe), is used.

Although an example in which a rare gas is added after the formation of the first semiconductor film is described here, the first semiconductor film may be formed so as to include a rare gas element at the time of film formation. . For example, an argon gas may be mixed with a reaction gas containing silane to form a first semiconductor film by a PCVD method. Alternatively, by forming a film by a sputtering method in an atmosphere containing a rare gas element, a first semiconductor film including a rare gas element in the film and having an amorphous structure may be formed.

Next, the first semiconductor film having an amorphous structure is crystallized. However, crystallization is difficult due to the inclusion of a rare gas element in the film. Therefore, in the present invention, a metal element which promotes crystallization is selectively added, and heat treatment is performed to form a semiconductor film having a crystal structure which spreads from an addition region as a starting point. First, the surface of the first semiconductor film 102 containing a rare gas element and having an amorphous structure contains 1 to 100 ppm by weight of a metal element (here, nickel) having a catalytic action to promote crystallization. Nickel-containing layer 1 by applying a nickel acetate solution with a spinner
03 is formed. (FIG. 1B) As means other than the method for forming the nickel-containing layer 103 by coating, means for forming an extremely thin film by sputtering, vapor deposition, or plasma treatment may be used. Here, an example in which the coating is performed on the entire surface is described, but a nickel-containing layer may be selectively formed by forming a mask.

Next, heat treatment is performed to perform crystallization.
(FIG. 1C) Here, the heat treatment for dehydrogenation (4
After 50 ° C. to 500 ° C. for 1 hour), a heat treatment for crystallization (at 550 ° C. to 650 ° C. for 4 to 24 hours) is performed. When crystallization is performed by irradiation with strong light, any one of infrared light, visible light, or ultraviolet light or a combination thereof can be used. Typically, a halogen lamp, a metal halide, Light emitted from a lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp is used. The lamp light source may be turned on for 1 to 60 seconds, preferably 30 to 60 seconds, repeated 1 to 10 times, and heated so that the semiconductor film is instantaneously heated to about 600 to 1000 ° C. Note that heat treatment for releasing hydrogen contained in the first semiconductor film 102 having an amorphous structure may be performed before irradiation with strong light, if necessary. In addition, crystallization may be performed by simultaneously performing the heat treatment and the irradiation with strong light. In consideration of productivity, it is preferable that crystallization be performed by irradiation with strong light. Although a crystallization technique using nickel as a metal element for promoting crystallization of silicon is used here, other known crystallization techniques, for example, a solid phase growth method or a laser crystallization method may be used.

Next, in order to increase the crystallization rate (the ratio of the crystal component in the total volume of the film) and repair defects remaining in the crystal grains, the first semiconductor film 104 having a crystal structure is irradiated with a laser beam. Is irradiated. When a laser beam is applied, a thin oxide film (not shown) is formed on the surface. Further, the rare gas element in the first semiconductor film is removed or reduced when the laser light is irradiated. As this laser light, an excimer laser light having a wavelength of 400 nm or less, or a second or third harmonic of a YAG laser is used.

The first semiconductor film 1 thus obtained
04 has a high orientation ratio and the strain is relaxed.

Although an example using a pulse laser is shown here, a continuous wave laser may be used. In order to obtain a crystal having a large grain size when crystallizing an amorphous semiconductor film, a continuous wave laser is used. Using a solid-state laser capable of oscillation,
It is preferable to apply the harmonic to the fourth harmonic. Typically, the second of a Nd: YVO ₄ laser (fundamental wave 1064 nm)
A harmonic (532 nm) or a third harmonic (355 nm) may be applied. When a continuous wave laser is used, laser light emitted from a continuous wave YVO ₄ laser having an output of 10 W is converted into a harmonic by a non-linear optical element. There is also a method in which a YVO ₄ crystal and a non-linear optical element are put in a resonator to emit harmonics. Then, the laser light is preferably shaped into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and the laser light is irradiated onto the object to be processed. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation may be performed by moving the semiconductor film relatively to the laser light at a speed of about 10 to 2000 cm / s.

Here, the technique of irradiating a laser beam after performing thermal crystallization using nickel as a metal element to promote crystallization of silicon was used, but a continuous oscillation laser was added without adding nickel. (The second harmonic of the YVO ₄ laser) may crystallize the amorphous silicon film.

Further, the metal element (here, nickel) remains in the first semiconductor film 104 obtained by performing the heat treatment after the addition of the metal element. It is not evenly distributed in the film, but as an average concentration,
It remains at a concentration exceeding 1 × 10 ¹⁹ / cm ³ . Of course, various semiconductor elements including TFTs can be formed in such a state, but the elements are removed by a method described below.

Since the oxide film formed by the laser light irradiation after the crystallization is insufficient, an oxide film (called a chemical oxide) is further formed by an aqueous solution containing ozone (typically, ozone water). 1 to 10 nm in total
A barrier layer 105 made of an oxide film is formed, and a second semiconductor film 106 containing a rare gas element is formed on the barrier layer 105. (FIG. 2A) Note that an oxide film formed when the first semiconductor film 104 having a crystal structure is irradiated with laser light is also regarded as a part of the barrier layer 105 here. This barrier layer 105 will be
Functions as an etching stopper when only the semiconductor film 106 is selectively removed. Alternatively, a chemical oxide can be similarly formed by treating with an aqueous solution obtained by mixing sulfuric acid, hydrochloric acid, nitric acid, or the like with a hydrogen peroxide solution instead of the ozone-containing aqueous solution. As another method for forming the barrier layer 105, ozone may be generated by irradiation with ultraviolet light in an oxygen atmosphere to oxidize the surface of the semiconductor film having the crystal structure. As another method for forming the barrier layer 105, an oxide film of about 1 to 10 nm may be deposited as a barrier layer by a plasma CVD method, a sputtering method, an evaporation method, or the like. As another method for forming the barrier layer 105, a thin oxide film may be formed by heating to about 200 to 350 ° C. using a clean oven. Note that the barrier layer 105 formed by any one of the above methods or a combination of those methods has a film quality which allows nickel in the first semiconductor film to move to the second semiconductor film in later gettering. Alternatively, it is necessary to set the film thickness.

Here, the second semiconductor film 106 containing a rare gas element is formed by a sputtering method, a plasma CVD method, or the like to form a gettering site. Helium (He), neon (Ne), argon (A
r), krypton (Kr), and xenon (Xe). Among them, argon (Ar), which is a cheap gas, is preferable. Here, a target made of silicon is used in an atmosphere containing a rare gas element,
Is formed. There are two meanings to include a rare gas element ion, which is an inert gas, in the film. One is to form a dangling bond to give a strain to the semiconductor film, and the other is to give a strain between lattices of the semiconductor film. Strain between the lattices of the semiconductor film is remarkably obtained when an element having a larger atomic radius than silicon, such as argon (Ar), krypton (Kr), or xenon (Xe), is used. Further, by containing a rare gas element in the film, not only lattice distortion but also dangling bonds are formed, which contributes to gettering action. The rare gas element is 1 × 10
¹⁹ / cm ³ to 1 × 10 ²² / cm ³ , preferably 1 × 10 ²⁰ / cm ³
A semiconductor film containing a concentration of about 1 × 10 ²¹ / cm ³ , more preferably 5 × 10 ²⁰ / cm ³ and which can provide a gettering effect may be formed.

In the case where the second semiconductor film is formed using a target containing phosphorus which is an impurity element of one conductivity type, gettering is performed by utilizing the Coulomb force of phosphorus in addition to gettering by a rare gas element. It can be carried out.

Further, at the time of gettering, since nickel tends to easily move to a region having a high oxygen concentration, the concentration of oxygen contained in the second semiconductor film 106 is higher than the concentration of oxygen contained in the first semiconductor film. High concentrations, for example 5 × 10 ¹⁸ /
cm ³ or more is desirable.

Next, heat treatment is performed to perform gettering for reducing or removing the concentration of the metal element (nickel) in the first semiconductor film. (FIG. 2B) As the heat treatment for performing gettering, heat treatment or heat treatment may be performed. By this gettering, the metal element moves in the direction of the arrow in FIG. 2B (that is, the direction from the substrate side to the surface of the second semiconductor film), and the first semiconductor film covered with the barrier layer 105 is formed. The removal of the metal element included in 104 or the reduction of the concentration of the metal element is performed.
The distance that the metal element moves during gettering may be at least as long as the thickness of the first semiconductor film, and the gettering can be completed in a relatively short time. Here, all nickel is moved to the second semiconductor film 106 so as not to segregate in the first semiconductor film 104, and nickel contained in the first semiconductor film 104 hardly exists.
That is, gettering is sufficiently performed so that the nickel concentration in the film is 1 × 10 ¹⁸ / cm ³ or less, preferably 1 × 10 ¹⁷ / cm ³ or less.

Further, depending on the conditions of the heat treatment for the gettering, the crystallization rate of the first semiconductor film is increased at the same time as the gettering, and the defects remaining in the crystal grains are repaired, that is, the crystallinity is improved. be able to.

In this specification, gettering means that a metal element in a gettering region (here, a first semiconductor film) is released by thermal energy and moves to a gettering site by diffusion. . Therefore,
Gettering depends on the processing temperature, and the higher the temperature, the faster the gettering proceeds.

When using a process of irradiating intense light, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The luminous intensity of the lamp light source is arbitrary, but is instantaneously 600 to 1000 ° C., preferably 700 to 75 ° C.
The semiconductor film is heated to about 0 ° C.

In the case of performing heat treatment, heat treatment may be performed in a nitrogen atmosphere at 450 to 800 ° C. for 1 to 24 hours, for example, at 550 ° C. for 14 hours. In addition, intense light may be applied in addition to the heat treatment.

Next, after selectively removing only the second semiconductor film indicated by 106 using the barrier layer 105 as an etching stopper, the barrier layer 105 is removed, and the first semiconductor film 104 is subjected to a known patterning technique. The semiconductor layer 107 having a desired shape is formed by using this. (FIG. 2 (C)) Second
The method for selectively etching only the semiconductor film 106 is dry etching without plasma using ClF ₃ , or wet etching with an alkaline solution such as an aqueous solution containing hydrazine or tetraethylammonium hydroxide (chemical formula (CH ₃ ) ₄ NOH). It can be performed by etching. After the second semiconductor film 106 was removed, when the surface of the barrier layer was measured for nickel concentration by TXRF, nickel was detected at a high concentration.
The barrier layer 105 is preferably removed, and may be removed with an etchant containing hydrofluoric acid. Further, after removing the barrier layer and before forming a resist mask, it is desirable to form a thin oxide film on the surface with ozone water.

Next, after the surface of the semiconductor layer 107 is washed with an etchant containing hydrofluoric acid, an insulating film mainly containing silicon to be the gate insulating film 108 is formed. It is desirable that the surface cleaning and the formation of the gate insulating film be performed continuously without exposure to the air.

Next, after cleaning the surface of the gate insulating film 108, a gate electrode 109 is formed. Next, the source region 110 and the drain region 111 are formed by appropriately adding an impurity element (P, As, or the like) that imparts n-type to the semiconductor, here, phosphorus. After the addition, heat treatment, strong light irradiation, or laser light irradiation is performed to activate the impurity elements. In addition, plasma damage to the gate insulating film and plasma damage to the interface between the gate insulating film and the semiconductor layer can be recovered simultaneously with the activation. In particular, in an atmosphere at room temperature to 300 ° C., Y
Irradiating the second harmonic of the AG laser to activate the impurity element is very effective. A YAG laser is a preferred activation means because of its low maintenance.

In the subsequent steps, an interlayer insulating film 113 is formed, hydrogenation is performed to form a contact hole reaching the source region and the drain region, and a source electrode 114 and a drain electrode 115 are formed to form a TFT (n-channel). Type TF
T) is completed. (FIG. 2 (D))

The concentration of the metal element contained in the channel forming region 112 of the TFT thus obtained is 1 × 10 ¹⁷ / cm
It can be less than ³ .

The present invention is not limited to the TFT structure shown in FIG. 2D. If necessary, a low-concentration drain (LDD: LDD) having an LDD region between a channel formation region and a drain region (or a source region) may be used. Lightly Doped Drain) structure may be used. In this structure, a region to which an impurity element is added at a low concentration is provided between a channel formation region and a source or drain region formed by adding an impurity element at a high concentration. This region is referred to as an LDD region. Calling. Further, a so-called GOLD (Gate-drain) in which an LDD region is arranged to overlap a gate electrode with a gate insulating film interposed therebetween.
Overlapped LDD) structure may be used.

Although the description has been made using the n-channel TFT here, it goes without saying that a p-channel TFT can be formed by using a p-type impurity element instead of the n-type impurity element.

Although a top gate type TFT has been described as an example here, the present invention can be applied regardless of the TFT structure. For example, a bottom gate type (reverse stagger type) TFT and a forward stagger type TFT can be used. It is possible to apply.

The order of the steps shown here is merely an example and is not particularly limited. For example, although an example in which a rare gas element is added to the first semiconductor film and then a metal element is added is described here, the rare gas element may be added to the first semiconductor film after the metal element is added. Good.

(Embodiment 2) Here, Embodiment 1
An example using a gettering method different from that shown in FIG. In addition,
This embodiment is the same as the first embodiment up to the middle, and the detailed description thereof is omitted.

First, as shown in FIG.
The state of (C) is obtained.

Next, a mask is formed and a rare gas element is selectively added. Here, 100-
A silicon oxide film having a thickness of 200 nm is formed. Although a method for forming the silicon oxide film is not limited, for example, tetraethyl orthosilicate (TEOS) and O
₂ and a reaction pressure of 40 Pa, and a substrate temperature of 300 to 40.
0 ° C, high frequency (13.56 MHz) power density 0.5 ~
It is formed by discharging at 0.8 W / cm ² .

Next, a mask 207 made of a resist is formed on the silicon oxide film. After patterning with this mask to form an insulating layer 206 made of silicon oxide covering a portion to be a semiconductor layer of the TFT, a gettering site 208 is formed by adding a rare gas element to the semiconductor film.
(FIG. 3A) Here, it is preferable that the concentration of the rare gas element added to the semiconductor film be 1 × 10 ^{20 to} 5 × 10 ²¹ / cm ³ by using an ion doping method or an ion implantation method. At this time, doping with a rare gas element may be performed while a mask made of a resist is left as it is,
After removing the resist mask 207, doping with a rare gas element may be performed. After the doping with the rare gas element, the resist mask is removed. Further, in addition to the rare gas element, a periodic table group 15 element or a periodic table group 13 element may be added.

Next, gettering is performed. (FIG. 3
(B)) gettering is performed at 450 to 800 in a nitrogen atmosphere.
When a heat treatment is performed at 1 ° C. for 1 to 24 hours, for example, at 550 ° C. for 14 hours, a metal element can be segregated at the gettering site 208. By this gettering, a metal element contained in the semiconductor film covered with the insulating layer 206 is removed or the concentration of the metal element is reduced. Further, strong light may be applied instead of the heat treatment. In addition, intense light may be applied in addition to the heat treatment. However, when the RTA method using light emitted from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp is used as the heating means for gettering, the heating temperature of the semiconductor film is reduced. 400
It is desirable to irradiate intense light at a temperature of from 550C to 550C.

After the gettering is completed, the gettering sites are removed by using the above mask as it is to form a semiconductor layer 209 having a desired shape composed of a region where the metal element is reduced, and finally made of silicon oxide. The insulating layer is removed. (FIG. 3C) When the insulating layer 206 is removed, it is preferable that the surface of the semiconductor layer 209 be slightly etched.

Further, at the stage when a resist mask is formed, a gettering site may be formed by doping a rare gas element through a silicon oxide film. In this case, after the doping, the mask is removed and gettering is performed, then the silicon oxide film is removed, and thereafter, only a region (a gettering site) of the semiconductor film to which a rare gas element is added is selectively removed. Thus, a semiconductor layer is formed. When a dash solution, a Sato solution, a Seco solution, or the like is used as an etchant, a region to which a rare gas element is added is amorphous, and therefore, a region which is a crystalline semiconductor film (a rare gas is not added). It can be selectively etched.

In the subsequent steps, the TFT is completed by the same steps as in the first embodiment. (FIG. 3 (D))

This embodiment can be combined with the first embodiment. Further, it can be combined with another known gettering technique.

The present invention having the above configuration will be described in more detail with reference to the following embodiments.

(Embodiment) [Embodiment 1] An embodiment of the present invention will be described with reference to FIGS. Here, a pixel portion and a driving circuit TFT (an n-channel TFT and a p-channel transistor) provided around the pixel portion are provided over the same substrate.
A method for simultaneously manufacturing channel type TFTs will be described in detail.

First, a base insulating film 1101 is formed over a glass substrate 1100 by the method described in the above embodiment, a first semiconductor film having a crystal structure is obtained, and then etching is performed to a desired shape to form an island. Semiconductor layers 1102-
1106 is formed.

The detailed description up to the formation of the semiconductor layers 1102 to 1106 is described in the first embodiment, and will be briefly described below.

In this embodiment, a two-layer structure is used as the base insulating film 1101 provided on the glass substrate. However, a single-layer film of the insulating film or a structure in which two or more insulating films are stacked may be used. As a first layer of the base insulating film 1101, plasma C
Using a VD method, a first silicon oxynitride film (composition ratio Si) formed using SiH ₄ , NH ₃ , and N ₂ O as reaction gases
= 32%, O = 27%, N = 24%, H = 17%) with a film thickness of 50 nm. Next, as a second layer of the base insulating film 1101, a second silicon oxynitride film (composition ratio: Si = 32%, O = 59) is formed by a plasma CVD method using SiH ₄ and N ₂ O as reaction gases. %, N = 7%,
H = 2%) with a thickness of 100 nm.

Next, an amorphous silicon film having a thickness of 50 nm is formed on the base insulating film 1101 by using a plasma CVD method. Next, a nickel acetate salt solution containing 10 ppm by weight of nickel is applied by a spinner. Instead of coating, a method of spraying a nickel element over the entire surface by a sputtering method may be used.

Next, a rare gas element (here, argon) is added to the amorphous silicon film by an ion doping method. 1 × 10 ¹⁷ / c rare gas element in amorphous silicon film
m ³ or more, preferably 1 × 10 ²⁰ / cm ^{3 to} 3 × 10 ²⁰ / cm ³
Add in a concentration range of cm ³ . By incorporating argon into the film before crystallization, the orientation ratio of the film is increased, and after crystallization, the strain present in the film is relaxed.

Next, intense light irradiation at 700 ° C. for 110 seconds was performed with a multitask type lamp annealing apparatus using a total of 21 tungsten halogen lamps to obtain a silicon film having a crystal structure. Note that if the temperature is 700 ° C. or lower in the lamp annealing apparatus, the semiconductor film is only instantaneously heated, and there is almost no change in the shape of the substrate 1100. Here, crystallization is performed using a lamp annealing apparatus, but crystallization may be performed by heat treatment using a furnace.

Next, irradiation with laser light (XeCl: wavelength 308 nm) for increasing the crystallization rate and repairing defects remaining in the crystal grains is performed. 400 wavelength for laser light
Excimer laser light of nm or less, or the second and third harmonics of a YAG laser are used. In any case, using a pulse laser light with a repetition frequency of about 10 to 1000 Hz,
The laser light may be condensed to 100 to 400 mJ / cm ² by an optical system and irradiated with an overlap ratio of 90 to 95% to scan the silicon film surface. Note that the laser light irradiation here is very important for removing or reducing a rare gas element (here, argon) in the film.
Next, the surface is treated with ozone water for 120 seconds in addition to the oxide film formed by the irradiation of the laser beam, and the total is 1 to 5 nm.
A barrier layer made of an oxide film is formed.

Next, the barrier layer is obtained by sputtering.
Amorphous silicon containing argon element as a tarring site
A film is formed with a thickness of 150 nm. Sputter of this embodiment
The film formation conditions by the method are as follows.
(Ar) The flow rate was set to 50 (sccm), and the deposition power was set to 3 kW.
And the substrate temperature is 150 ° C. Note that under the above conditions
Atomic concentration of argon element in amorphous silicon film
Is 3 × 10²⁰/ Cm^Three~ 6 × 10²⁰/ Cm^Three, A source of oxygen
Child concentration is 1 × 10¹⁹/ Cm^Three~ 3 × 10¹⁹/ Cm ^ThreeIn
You. Then, at 650 ° C., 3 using a lamp annealing apparatus.
Heat treatment for gettering.

Next, after the amorphous silicon film containing an argon element, which is a gettering site, is selectively removed using the barrier layer as an etching stopper, the barrier layer is selectively removed with dilute hydrofluoric acid. When gettering,
Since nickel tends to move to a region having a high oxygen concentration, it is desirable to remove the barrier layer made of an oxide film after gettering.

Next, after a thin oxide film is formed on the surface of the obtained silicon film having a crystal structure (also called a polysilicon film) with ozone water, a mask made of a resist is formed, and an etching process is performed to a desired shape. To form a semiconductor layer separated into islands. After forming the semiconductor layer, the resist mask is removed.

After the formation of the semiconductor layer, an impurity element imparting p-type or n-type may be added in order to control the threshold value (Vth) of the TFT. Note that the impurity element imparting p-type to the semiconductor includes boron (B),
Group 13 elements of the periodic rule such as aluminum (Al) and gallium (Ga) are known. As an impurity element that imparts n-type to a semiconductor, an element belonging to Group 15 of the periodic rule, typically, phosphorus (P) or arsenic (As) is known.

Next, after removing the oxide film with an etchant containing hydrofluoric acid and simultaneously cleaning the surface of the silicon film,
An insulating film containing silicon as a main component to be the gate insulating film 1107 is formed. In the present embodiment, 1
15 nm thick silicon oxynitride film (composition ratio Si = 3
2%, O = 59%, N = 7%, H = 2%).

Next, as shown in FIG. 4A, a first conductive film 1108a having a thickness of 20 to 100 nm, a second conductive film 1108b having a thickness of 100 to 400 nm, and a film are formed on the gate insulating film 1107. A third conductive film 1108c having a thickness of 20 to 100 nm is stacked. In this embodiment, a 50 nm-thick tungsten film and a 5
00nm alloy of aluminum and titanium (Al-Ti)
A film and a 30-nm-thick titanium film were sequentially laminated.

The conductive material for forming the first to third conductive films is an element selected from Ta, W, Ti, Mo, Al and Cu, or an alloy or compound material containing the above elements as a main component. Form. Further, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used as the first to third conductive films. For example, tungsten nitride may be used in place of tungsten in the first conductive film, or an alloy of aluminum and silicon (Al-Si) instead of the alloy film of aluminum and titanium (Al-Ti) in the second conductive film. ) A film may be used, or a titanium nitride film may be used instead of the titanium film of the third conductive film.
Further, the structure is not limited to the three-layer structure, and may be, for example, a two-layer structure of a tantalum nitride film and a tungsten film.

Next, as shown in FIG.
To form resist masks 11010 to 1115
And a first edge for forming a gate electrode and a wiring.
Performing a ching process. In the first etching process, the first and
This is performed under the second etching condition. ICP for etching
(Inductively Coupled Plasma)
It is preferable to use an etching method. Using ICP etching method
Etching conditions (power applied to coil-type electrode
Amount, the amount of power applied to the substrate-side electrode, and the substrate-side electrode temperature
The desired taper shape by appropriately adjusting the degree
The film can be etched first. In addition, etching
The gas for use is Cl_Two, BCl_Three, SiCl _Four, CCl_Four
Such as chlorine-based gas or CF_Four, SF₆, NF
_ThreeSuch as fluorine-based gas or O_TwoAs appropriate
Can be

Although there is no limitation on the etching gas used,
Here, it is suitable to use BCl ₃ , Cl ₂ and O ₂ . Each gas flow ratio is 65/10/5 (scc
m) and a pressure of 1.2 Pa is applied to the coil-type electrode at 450
An RF (13.56 MHz) power of W is supplied to generate plasma, and etching is performed for 117 seconds. A 300 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The Al film and the Ti film are etched under the first etching conditions to make the end of the first conductive layer tapered.

Thereafter, the conditions were changed to the second etching condition,
CF for gas for etching_FourAnd Cl_TwoAnd O _TwoAnd use
The gas flow ratio is 25/25/10 (sccm),
At a pressure of 1 Pa, a 500 W RF (1
3.56MHz) Power is turned on to generate plasma.
Etching is performed for about 30 seconds. Substrate side (sample stay
20W RF (13.56MHz) power input
Then, a substantially negative self-bias voltage is applied. CF_Four
And Cl_TwoUnder the second etching condition in which is mixed, an Al film,
Both the Ti film and the W film are etched to the same extent. What
Note that etching is performed without leaving any residue on the gate insulating film.
In order to achieve this, the etching time should be
Should be increased.

In the first etching process, by making the shape of the mask made of resist suitable,
Due to the effect of the bias voltage applied to the substrate side, the ends of the first conductive layer, the second conductive layer, and the third conductive layer are tapered. The angle of the tapered portion is 15 to 45 °. Thus, by the first etching process, the first shape conductive layers 1117 to 1122 (the first conductive layer 1117a) including the first conductive layer, the second conductive layer, and the third conductive layer are formed.
To 1122a, second conductive layers 1117b to 1122b, and third conductive layers 1117c to 1122c). 1
Reference numeral 116 denotes a gate insulating film, which is a first shape conductive layer 11.
The region not covered with 17 to 1122 is etched by about 20 to 50 nm to form a thinned region.

Next, a mask 11010 made of resist is used.
A second etching process is performed without removing 1115 as shown in FIG. BCl ₃ and C for etching gas
l ₂ and the respective gas flow ratios were 20/60 (scc
m) and a pressure of 1.2 Pa is applied to the coil-type electrode for 600
An RF (13.56 MHz) power of W is applied to generate plasma to perform etching. Substrate side (sample stage)
Is supplied with 100 W RF (13.56 MHz) power. The second conductive layer and the third conductive layer are etched under the third etching condition. Thus, the aluminum film and the titanium film containing a small amount of titanium are anisotropically etched under the third etching condition to form the second shape conductive layers 1124 to 1129 (first conductive layers 1124 a to 1122).
9a, second conductive layers 1124b to 1129b, and third conductive layers 1124c to 1129c). 1123 is a gate insulating film, and the second shape conductive layers 1124-1 to 1123.
The region not covered by 129 is slightly etched to form a thinned region.

Then, the resist mask is removed.
First doping process without adding n-type to the semiconductor layer.
The added impurity element is added. Doping treatment is ion
The doping method or the ion implantation method may be used. ion
The conditions of the doping method are as follows:¹⁴atoms / cm^Two
And an acceleration voltage of 60 to 100 keV. n-type
Typically, phosphorus (P) or
Alternatively, arsenic (As) is used. In this case, the second shape conductive
The layers 1124 to 1128 correspond to n-type impurity elements.
The first impurity region 11 in a self-aligned manner.
30 to 1134 are formed. First impurity region 113
1 × 10 for 0-1134¹⁶~ 1 × 10 ¹⁷/cm^ThreeConcentration range
An impurity element imparting n-type is added in the box.

In this embodiment, the first doping process is performed without removing the resist mask. However, the first doping process may be performed after removing the resist mask.

Next, after removing the mask made of resist, as shown in FIG. 5A, masks 1135 and 1136 made of resist are formed, and a second doping process is performed. A mask 1135 is a mask for protecting a channel formation region of a semiconductor layer forming one of the n-channel TFTs of the driver circuit and a peripheral region thereof. A mask 1136 is a channel formation region of the semiconductor layer for forming a TFT in a pixel portion. And a mask for protecting the surrounding area.

The conditions of the ion doping method in the second doping process are such that phosphorus (P) is doped at a dose amount of 1.5 × 10 ¹⁵ atoms / cm ² and an acceleration voltage of 60 to 100 keV. Here, the second shape conductive layer 1124 is used.
An impurity region is formed in each semiconductor layer by utilizing a difference in thickness of the gate insulating film 1123 and the thickness of the gate insulating film 1123. Of course, the mask 11
Phosphorus (P) is not added to the regions covered by 35 and 1136. Thus, the second impurity regions 1180 to 118
Second and third impurity regions 1137 to 1141 are formed. The third impurity regions 1137 to 1141 have 1 × 10
An impurity element imparting n-type is added in a concentration range of ²⁰ to 1 × 10 ²¹ / cm ³ . In addition, the second impurity region is formed at a lower concentration than the third impurity region due to a difference in thickness of the gate insulating film, and is given n-type in a concentration range of 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^3. An impurity element is added.

Next, a mask 113 made of resist is used.
After removing 5 and 1136, masks 1142 to 1144 made of resist are newly formed, and a third doping process is performed as shown in FIG. As a result of the third doping treatment, the semiconductor layer forming the p-channel TFT is doped with an impurity element imparting p-type conductivity.
Impurity region 1147 and fifth impurity region 1145,
1146 is formed. The fourth impurity region is formed in a region overlapping with the second shape conductive layer, and is 1 × 10 ¹⁸
An impurity element imparting p-type is added in a concentration range of about 1 × 10 ²⁰ / cm ³ . Further, the fifth impurity region 1
An impurity element imparting p-type is added to 145 and 1146 in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ . Although the fifth impurity region 1146 is a region to which phosphorus (P) is added in the previous step, the concentration of the impurity element imparting p-type is 1.5 to 3 times that of the fifth impurity region 1146, and the conductivity type Is p-type.

The fifth impurity regions 1148 and 114
The ninth and fourth impurity regions 1150 are formed in a semiconductor layer forming a storage capacitor in the pixel portion.

In the above steps, each semiconductor layer has n
An impurity region having a conductivity type of p-type or p-type is formed. The second shape conductive layers 1124 to 1127 serve as gate electrodes. The second shape conductive layer 1128 serves as one electrode forming a storage capacitor in the pixel portion. Further, the second shape conductive layer 1129 forms a source wiring in the pixel portion.

Next, an insulating film (not shown) covering almost the entire surface is formed. In this embodiment, a 50 nm-thick silicon oxide film is formed by a plasma CVD method. Of course, this insulating film is not limited to a silicon oxide film, and another insulating film containing silicon may be used as a single layer or a laminated structure.

Next, a step of activating the impurity element added to each semiconductor layer is performed. This activation step is performed by a rapid thermal annealing method (RTA method) using a lamp light source, a method of irradiating a YAG laser or an excimer laser from the back surface, a heat treatment using a furnace, or a combination of any of these methods. Done by the method However, in this embodiment, since a material containing aluminum as a main component is used for the second conductive layer, it is important to set a heat treatment condition that can withstand the second conductive layer in the activation step.

At the same time as the activation treatment, gettering is performed on the third impurity regions 1137, 1139, 1140 and the fifth impurity regions 1146, 1149 containing high-concentration phosphorus containing nickel used as a catalyst during crystallization. As a result, the nickel concentration in the semiconductor layer which mainly becomes a channel formation region is reduced. As a result, the TF having a channel forming region
T has a low off-current value and high crystallinity, so that a high field-effect mobility can be obtained and good characteristics can be achieved. Note that in this example, the first gettering is performed by the method described in Embodiment 1 at the stage of forming the semiconductor layer, so that the gettering by phosphorus here is the second gettering. . In addition, when the gettering is sufficiently performed by the first gettering, it is not necessary to perform the second gettering.

In this embodiment, the example in which the insulating film is formed before the activation is described.
A step of forming an insulating film may be performed.

Next, a first interlayer insulating film 1151 made of a silicon nitride film is formed and heat-treated (at 300 to 550 ° C.).
Is performed for 1 to 12 hours) to perform a step of hydrogenating the semiconductor layer. (FIG. 5C) This step is for terminating dangling bonds in the semiconductor layer with hydrogen contained in the first interlayer insulating film 1151. The semiconductor layer can be hydrogenated regardless of the presence of an insulating film (not shown) made of a silicon oxide film. However, in this embodiment, the second
Since a material containing aluminum as a main component is used for the conductive layer, it is important to set a heat treatment condition that the second conductive layer can withstand in the hydrogenation step. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Next, a second interlayer insulating film 1152 made of an organic insulating material is formed on the first interlayer insulating film 1151. In this embodiment, an acrylic resin film having a thickness of 1.6 μm is formed. Next, a contact hole reaching the source wiring 1127 and a contact hole reaching each impurity region are formed. In this embodiment, a plurality of etching processes are sequentially performed. In this embodiment, after the second interlayer insulating film is etched using the first interlayer insulating film as an etching stopper, the first interlayer insulating film is etched using the insulating film (not shown) as an etching stopper, and then the insulating film (shown in the drawing). do not do)
Was etched.

After that, wirings and pixel electrodes are formed using Al, Ti, Mo, W or the like. It is desirable to use a material having excellent reflectivity, such as a film containing Al or Ag as a main component or a laminated film thereof, as a material of these electrodes and pixel electrodes. Thus, the source or drain wiring 11
53 to 1158, gate wiring 1160, connection wiring 115
9. A pixel electrode 1161 is formed.

As described above, the n-channel TFT 40
1, p-channel TFT 402, n-channel TFT 4
03, a driving circuit 406 having
04 and the pixel portion 407 having the storage capacitor 405 can be formed over the same substrate. (FIG. 6) In this specification, such a substrate is referred to as an active matrix substrate for convenience. In this specification, such a substrate is referred to as an active matrix substrate for convenience.

The n-channel TFT 40 of the drive circuit 406
1 (second n-channel TFT) is a channel forming region 1
162, conductive layer 11 of second shape forming gate electrode
24, and a third impurity region 1164 functioning as a source region or a drain region. In the p-channel TFT 402, a channel formation region 1165, a fourth impurity region 1166 which partially overlaps the second shape conductive layer 1125 which forms a gate electrode, and a fourth impurity region 1167 which functions as a source or drain region are provided. Have. In the n-channel TFT 403 (a second n-channel TFT), a channel formation region 1168, a second impurity region 1169 which partially overlaps the second shape conductive layer 1126 which forms a gate electrode, and a source or drain region And has a third impurity region 1170 functioning as. With such an n-channel TFT and a p-channel TFT, a shift register circuit, a buffer circuit, a level shifter circuit, a latch circuit, and the like can be formed. In particular, in a buffer circuit having a high drive voltage, an n-channel TFT 401 or 4 is provided for the purpose of preventing deterioration due to the hot carrier effect.
03 is suitable.

The pixel TFT 404 (first n-channel TFT) of the pixel portion 407 has a channel forming region 1171,
First impurity region 1172 formed outside second shape conductive layer 1128 forming a gate electrode and third impurity region 1 functioning as a source region or a drain region
173. Further, a fourth impurity region 117 is provided in the semiconductor layer functioning as one electrode of the storage capacitor 405.
6. A fifth impurity region 1177 is formed. The storage capacitor 405 includes a second shape electrode 1129 and a semiconductor layer 110 using an insulating film (the same film as the gate insulating film) as a dielectric.
6 are formed.

When the pixel electrode is formed of a transparent conductive film, a transmissive display device can be formed although the number of photomasks is increased by one.

[Embodiment 2] In the embodiment 1, the example in which the gate electrode structure has a three-layer structure has been described.
An example of a layered structure will be described. Note that this embodiment is the same as Embodiment 1 except for the gate electrode, and therefore only different points will be described.

In this embodiment, in this embodiment, the thickness is 30 n.
a first conductive film made of a TaN film having a thickness of 370 nm;
The second conductive film made of the W film is laminated. The TaN film is formed by a sputtering method, and is sputtered using a Ta target in an atmosphere containing nitrogen. The W film is formed by a sputtering method using a W target. Further, instead of the W film, an alloy film composed of W and Mo may be used.

In this embodiment, as in the first embodiment, the ICP
The film is formed into a desired taper shape by appropriately adjusting the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the substrate-side electrode, the temperature of the substrate-side electrode, etc.) using an etching method. Can be etched. The etching gas may be Cl ₂ , BC
l _3, SiCl _4, can be used CCl ₄ chlorine gas or CF ₄ to the typified like, SF _6, fluorine-based gas NF ₃ and the like typified, or O ₂ as appropriate.

As in the first embodiment, the first etching process is performed under the first and second etching conditions. As a first etching condition, CF ₄ , Cl _2, and O are used as etching gases.
₂ and the respective gas flow ratios were 25/25/10
(Sccm) and a pressure of 1 Pa applies 50
An RF (13.56 MHz) power of 0 W is supplied to generate plasma to perform etching. 1 on substrate side (sample stage)
Apply 50 W of RF (13.56 MHz) power and apply a substantially negative self-bias voltage. The etching rate for W under the first etching condition is 200.39 nm / mi.
n, the etching rate for TaN is 80.32 nm /
min and the selectivity ratio of W to TaN is about 2.5. Further, the taper angle of W is about 26 ° under the first etching condition.

After that, the etching conditions were changed to the second etching condition without removing the resist mask, CF ₄ and Cl ₂ were used as etching gases, and the respective gas flow ratios were 30/50.
30 (sccm), 500 W of RF (13.56 MHz) power is applied to the coil type electrode at a pressure of 1 Pa to generate plasma, and etching is performed for about 30 seconds. A 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage) and a substantially negative self-bias voltage is applied. CF ₄
Under the second etching condition in which Al and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent. The etching rate for W under the second etching condition is 58.97 n.
m / min, the etching rate for TaN is 66.4.
3 nm / min.

In the first etching process, by making the shape of the resist mask appropriate,
The ends of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of the tapered portion may be 15 to 45 degrees.

Further, a second etching process is performed in the same manner as in the first embodiment. Here, SF ₆ and C are used as etching gases.
Using l ₂ and O ₂ , the respective gas flow ratios were 24/12
/ 24 (sccm), RF power (13.56 MHz) of 700 W was applied to the coil-type electrode at a pressure of 1.3 Pa to generate plasma, and etching was performed for 25 seconds. A 10 W RF (13.56 MHz) power is also applied to the substrate side (sample stage) and a substantially negative self-bias voltage is applied. The etching rate for W in the second etching process is 22
The etching rate for 7.3 nm / min and TaN is 32.1 nm / min, the selectivity ratio of W to TaN is 7.1, and the etching rate for silicon oxynitride film (SiON) as a gate insulating film is 33.3 nm / min. 7 nm
/ Min. The taper angle of W became 70 ° by the second etching process.

As compared with the first embodiment, the gate electrode formed by the present embodiment is formed by laminating a W film and a TaN film, and thus has a high electric resistance value, but has a high heat resistance, so that the activation is difficult. Or hydrogenation treatment conditions.

[Embodiment 3] In this embodiment, a process of manufacturing an active matrix liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described below. FIG. 7 is used for the description.

First, according to the first embodiment, after an active matrix substrate in the state shown in FIG. 6 is obtained, an alignment film is formed on the active matrix substrate shown in FIG. 6 and a rubbing process is performed. In this example, before forming the alignment film, an organic resin film such as an acrylic resin film was patterned to form a columnar spacer at a desired position for maintaining the distance between the substrates. Instead of the columnar spacers, spherical spacers may be spread over the entire surface of the substrate.

Next, a counter substrate is prepared. The opposite substrate is provided with a color filter in which a coloring layer and a light shielding layer are arranged corresponding to each pixel. Further, a light-shielding layer was provided also in a portion of the driving circuit. A flattening film was provided to cover the color filter and the light shielding layer. Next, a counter electrode made of a transparent conductive film was formed in the pixel portion on the flattening film, an alignment film was formed on the entire surface of the counter substrate, and rubbing treatment was performed.

Then, the active matrix substrate on which the pixel portion and the driving circuit are formed and the counter substrate are bonded with a sealant. A filler is mixed in the sealing material, and the two substrates are bonded together at a uniform interval by the filler and the columnar spacer. Thereafter, a liquid crystal material is injected between the two substrates, and completely sealed with a sealing agent (not shown). A known liquid crystal material may be used as the liquid crystal material. Thus, an active matrix type liquid crystal display device is completed. Then, if necessary, the active matrix substrate or the opposing substrate is cut into a desired shape. Further, a polarizing plate and the like were appropriately provided using a known technique. Then, an FPC was attached using a known technique.

The configuration of the liquid crystal module thus obtained will be described with reference to the top view of FIG.

At the center of the active matrix substrate 801, a pixel portion 804 is arranged. Above the pixel portion 804, a source signal line driver circuit 802 for driving a source signal line is provided. On the left and right of the pixel portion 804, gate signal line driving circuits 803 for driving gate signal lines are arranged. In the example shown in this embodiment,
Although the gate signal line driving circuit 803 is arranged symmetrically with respect to the pixel portion, it may be arranged on only one side, and may be appropriately selected by a designer in consideration of the substrate size of the liquid crystal module and the like. However, considering the operation reliability and driving efficiency of the circuit, the symmetrical arrangement shown in FIG. 7 is desirable.

Input of signals to each drive circuit is performed by a flexible printed circuit (FPC) 8.
It is performed from 05. The FPC 805 opens contact holes in the interlayer insulating film and the resin film so as to reach the wiring arranged up to a predetermined position on the substrate 801, and
After the formation of 09, it is press-bonded via an anisotropic conductive film or the like. In this embodiment, the connection electrode was formed using ITO.

A sealant 807 is applied to the periphery of the driving circuit and the pixel portion along the outer periphery of the substrate, and a predetermined gap (a space between the substrate 801 and the counter substrate 806) is formed by a spacer 810 formed in advance on the active matrix substrate. The counter substrate 806 is stuck while maintaining ()). After that, a liquid crystal element is injected from a portion where the sealant 807 is not applied, and is sealed with the sealant 808. Through the above steps, a liquid crystal module is completed.

Although an example in which all the driving circuits are formed on the substrate is shown here, several ICs may be used as a part of the driving circuit.

[Embodiment 4] In Embodiment 1, an example of a reflective display device in which a pixel electrode is formed of a reflective metal material has been described. In this embodiment, a pixel electrode is formed of a light-transmitting conductive material. An example of a transmission type display device formed of a film is shown.

Example 1 up to the step of forming an interlayer insulating film
Therefore, the description is omitted here. After forming an interlayer insulating film according to the first embodiment, a pixel electrode 601 made of a light-transmitting conductive film is formed. As the light-transmitting conductive film, ITO (indium tin oxide alloy), indium zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like may be used.

Thereafter, a contact hole is formed in interlayer insulating film 600. Next, the connection electrode 6 overlapping the pixel electrode
02 is formed. This connection electrode 602 is connected to the drain region through a contact hole. In addition, a source electrode or a drain electrode of another TFT is formed simultaneously with the connection electrode.

Although an example in which all the driving circuits are formed on a substrate is shown here, several ICs may be used as a part of the driving circuit.

An active matrix substrate is formed as described above. Using this active matrix substrate, a liquid crystal module is manufactured according to the third embodiment, and a backlight 604 and a light guide plate 605 are provided. If the liquid crystal module is covered with a cover 606, an active matrix type as shown in FIG. The liquid crystal display device is completed. Note that the cover and the liquid crystal module are attached to each other using an adhesive or an organic resin. Further, when the substrate and the counter substrate are attached to each other, an organic resin may be filled between the frame and the substrate so as to be adhered. Further, since it is a transmission type, the polarizing plate 603 is attached to both the active matrix substrate and the counter substrate.

[Embodiment 5] In this embodiment, the EL (Electr
FIG. 9 shows an example of manufacturing a light-emitting display device provided with an (o Luminescence) element.

FIG. 9A is a top view showing the EL module, and FIG. 9B is a cross-sectional view of FIG. 9A taken along the line AA ′. A pixel portion 902, a source driver circuit 901, and a gate driver circuit 903 are formed over a substrate 900 having an insulating surface (eg, a glass substrate, a crystallized glass substrate, or a plastic substrate). These pixel units and drive circuits can be obtained according to the above embodiment. Further, reference numeral 918 denotes a sealing material, and 919 denotes a DLC film. The pixel portion and the driving circuit portion are covered with a sealing material 918, and the sealing material is covered with a protective film 919. Further, it is sealed with a cover material 920 using an adhesive. In order to withstand deformation due to heat, external force, or the like, the cover material 920 is provided on the substrate 900.
It is preferable to use a material of the same material as that described above, for example, a glass substrate, and it is processed into a concave shape (depth 3 to 10 μm) shown in FIG. A recess (depth of 50 to 200) into which a desiccant 921 can be installed by further processing
μm). In addition, E
In the case of manufacturing an L module, after bonding the substrate and the cover material, the substrate may be cut using a CO ₂ laser or the like so that the end faces coincide.

Reference numeral 908 denotes wiring for transmitting signals input to the source-side drive circuit 901 and the gate-side drive circuit 903, and a video signal or a clock signal from an FPC (flexible print circuit) 909 serving as an external input terminal. Receive. Although only the FPC is shown here, this FPC has a printed wiring board (P
WB) may be attached. The light emitting device in this specification includes not only the light emitting device body but also an FPC
Alternatively, this also includes a state where the PWB is attached.

Next, the cross-sectional structure will be described with reference to FIG. An insulating film 910 is provided over the substrate 900,
A pixel portion 902 and a gate side driver circuit 903 are formed above the insulating film 910. The pixel portion 902 is formed by a plurality of pixels including a current control TFT 711 and a pixel electrode 912 electrically connected to a drain thereof. Is done. Also,
The gate driver circuit 903 is formed using a CMOS circuit in which an n-channel TFT 913 and a p-channel TFT 714 are combined.

The TFTs (911, 913, 914)
) May be produced according to the above embodiment.

The pixel electrode 912 functions as an anode of a light emitting element (EL element). A bank 915 is formed at both ends of the pixel electrode 912, and an EL layer 916 and a cathode 917 of a light emitting element are formed over the pixel electrode 912.

[0149] As the EL layer 916, an EL layer (a layer for performing light emission and carrier movement therefor) may be formed by freely combining a light emitting layer, a charge transport layer, or a charge injection layer. For example, a low molecular organic EL material or a high molecular organic EL material may be used. Further, as the EL layer, a thin film made of a light-emitting material (singlet compound) that emits light (fluorescence) by singlet excitation or a thin film made of a light-emitting material that emits light (phosphorescence) by triplet excitation can be used. It is also possible to use an inorganic material such as silicon carbide for the charge transport layer and the charge injection layer. Known materials can be used for these organic EL materials and inorganic materials.

The cathode 917 also functions as a common wiring for all pixels, and is electrically connected to the FPC 909 via the connection wiring 908. Further, elements included in the pixel portion 902 and the gate driver circuit 903 are all covered with a cathode 917, a sealant 918, and a protective film 919.

It is preferable to use a material that is as transparent or translucent as possible to visible light as the sealant 918. In addition, it is preferable that the sealant 918 be a material that does not transmit moisture or oxygen as much as possible.

After the light emitting element is completely covered with the sealing material 918, at least the DLC as shown in FIG.
It is preferable to provide a protective film 919 made of a film or the like on the surface (exposed surface) of the sealant 918. Further, a protective film may be provided on the entire surface including the back surface of the substrate. Here, care must be taken so that the protective film is not formed in a portion where the external input terminal (FPC) is provided. The protection film may be prevented from being formed by using a mask, or the protection film may be prevented from being formed by covering the external input terminal portion with a tape such as Teflon (registered trademark) used as a masking tape in a CVD apparatus. Is also good.

With the above structure, the light emitting element is sealed with the sealing material 9.
By enclosing the light emitting element with the protective film 18 and the protective film, the light emitting element can be completely shut off from the outside, and a substance such as moisture or oxygen, which promotes deterioration of the EL layer due to oxidation, can be prevented from entering from the outside. Therefore, a highly reliable light-emitting device can be obtained.

Further, the pixel electrode is made to have an anode (Pt, Cr, W,
9, an EL layer, a light-transmitting cathode (a thin metal layer (AgMg or AlLi) and a transparent conductive film (ITO or ZnO) are stacked, and light is emitted in the direction opposite to that in FIG. 9). The pixel electrode may be a cathode,
The EL layer and the anode may be stacked to emit light in the direction opposite to that in FIG. FIG. 10 shows an example. Note that the top views are the same, and thus are omitted.

The cross-sectional structure shown in FIG. 10 will be described below. As the substrate 1000, a semiconductor substrate or a metal substrate can be used in addition to a glass substrate or a quartz substrate. An insulating film 1010 is provided over the substrate 1000;
A pixel portion 1002 and a gate-side driver circuit 1003 are formed over the insulating film 1010. The pixel portion 1002 is formed by a plurality of pixels including a current control TFT 1011 and a pixel electrode 1012 electrically connected to a drain thereof. Is done. The gate side driver circuit 1003 is formed using a CMOS circuit in which an n-channel TFT 1013 and a p-channel TFT 1014 are combined.

The pixel electrode 1012 functions as a cathode of the light emitting device. Bank 1 is provided at both ends of the pixel electrode 1012.
015 is formed, and the EL layer 10 is formed on the pixel electrode 1012.
16 and an anode 1017 of the light emitting element are formed.

The anode 1017 also functions as a wiring common to all pixels, and is connected to the FPC 1009 via the connection wiring 1008.
Is electrically connected to Further, the elements included in the pixel portion 1002 and the gate side driver circuit 1003 are all covered with an anode 1017, a sealant 1018, and a protective film 1019 made of DLC or the like. Also, the cover material 1021
And the substrate 1000 were bonded with an adhesive. Further, a concave portion is provided in the cover material, and a desiccant 1021 is provided.

It is preferable to use a material that is as transparent or translucent as possible to visible light as the sealant 1018. It is preferable that the sealant 1018 be a material that does not transmit moisture or oxygen as much as possible.

In FIG. 10, the pixel electrode is a cathode,
Since the EL layer and the anode are stacked, the light emission direction is the direction of the arrow shown in FIG.

This embodiment can be combined with the first embodiment, the first embodiment, or the second embodiment.

[Embodiment 6] A driving circuit and a pixel portion formed by carrying out the present invention are composed of various modules (an active matrix type liquid crystal module, an active matrix type EL device).
Module, active matrix EC module)
Can be used. That is, the present invention can be applied to all electronic devices in which they are incorporated in the display unit.

Examples of such electronic equipment include a video camera, a digital camera, a head-mounted display (goggle type display), a car navigation, a projector, a car stereo, a personal computer, a portable information terminal (a mobile computer, a mobile phone, an electronic book, etc.). ). Examples of these are shown in FIGS.

FIG. 11A shows a personal computer, which includes a main body 2001, an image input section 2002, and a display section 20.
03, a keyboard 2004 and the like. Display unit 2 of the present invention
003 can be applied.

FIG. 11B shows a video camera, which includes a main body 2101, a display section 2102, an audio input section 2103, operation switches 2104, a battery 2105, and an image receiving section 210.
6 and so on. The present invention can be applied to the display portion 2102.

FIG. 11C shows a mobile computer (mobile computer), which includes a main body 2201, a camera section 2202, an image receiving section 2203, operation switches 2204, a display section 2205, and the like. The present invention can be applied to the display portion 2205.

FIG. 11D shows a goggle type display, which includes a main body 2301, a display section 2302, and an arm section 230.
3 and so on. The present invention can be applied to the display portion 2302.

FIG. 11E shows a player that uses a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display unit 2402, and a speaker unit 240.
3, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (D
digital Versatile Disc), CD
And the like, it is possible to perform music appreciation, movie appreciation, games and the Internet. The present invention can be applied to the display portion 2402.

FIG. 11F shows a digital camera, which includes a main body 2501, a display section 2502, an eyepiece section 2503, operation switches 2504, an image receiving section (not shown), and the like. The present invention can be applied to the display portion 2502.

FIG. 12A shows a front type projector, which includes a projection device 2601, a screen 2602, and the like. The present invention can be applied to the liquid crystal module 2808 forming a part of the projection device 2601.

FIG. 12B shows a rear type projector, which includes a main body 2701, a projection device 2702, and a mirror 270.
3, including a screen 2704 and the like. The present invention relates to a projection device 2
702 can be applied to a liquid crystal module 2808 which is a part of the liquid crystal module 2808.

FIG. 12C is a diagram showing an example of the structure of the projection devices 2601 and 2702 in FIGS. 12A and 12B. Projection devices 2601, 27
02 denotes a light source optical system 2801, mirrors 2802, 280
4 to 2806, dichroic mirror 2803, prism 2807, liquid crystal module 2808, retardation plate 280
9, the projection optical system 2810. Projection optical system 28
Reference numeral 10 denotes an optical system including a projection lens. In the present embodiment, an example of a three-plate type is shown, but there is no particular limitation, and for example, a single-plate type may be used. Further, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the optical path indicated by the arrow in FIG. Good.

FIG. 12D is a diagram showing an example of the structure of the light source optical system 2801 in FIG. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, a lens array 2813,
814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system shown in FIG. 12D is an example and is not particularly limited. For example, a practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the light source optical system.

However, in the projector shown in FIG. 12, a case in which a transmissive electro-optical device is used is shown, and examples of application to a reflective electro-optical device and an EL module are not shown.

FIG. 13A shows a mobile phone, and the main body 29 is shown.
01, audio output unit 2902, audio input unit 2903, display unit 2904, operation switch 2905, antenna 290
6. Image input unit (CCD, image sensor, etc.) 2907
And so on. The present invention can be applied to the display portion 2904.

FIG. 13B shows a portable book (electronic book), which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, and an antenna 3006.
And so on. The present invention can be applied to the display units 3002 and 3003.

FIG. 13C shows a display, which includes a main body 3101, a support 3102, a display portion 3103, and the like.
The present invention can be applied to the display portion 3103.

By the way, the display shown in FIG. 13C is of a small, medium or large size, for example, a screen size of 5 to 20 inches. In addition, in order to form a display portion having such a size, it is preferable to use a substrate having a side of 1 m and mass-produce it by performing multi-paneling.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to methods for manufacturing electronic devices in various fields. In addition, the electronic apparatus of the present embodiment includes
5 can be realized by using a configuration composed of any combination of the five.

[0179]

According to the present invention, the orientation ratio of the film can be increased, and the strain existing in the film after crystallization can be reduced as compared with before the crystallization.

[Brief description of the drawings]

FIG. 1 is a process chart showing Embodiment 1.

FIG. 2 illustrates a manufacturing process of a TFT. (Embodiment 1)

FIG. 3 illustrates a manufacturing process of a TFT. (Embodiment 2)

FIG. 4 is a view showing a manufacturing process of an AM-LCD.

FIG. 5 is a diagram showing a manufacturing process of an AM-LCD.

FIG. 6 is a diagram showing a manufacturing process of an AM-LCD.

FIG. 7 is a top view showing the appearance of the liquid crystal module.

FIG. 8 illustrates an example of a cross-sectional view of a liquid crystal display device.

FIG. 9 is a diagram showing an upper surface and a cross section of an EL module.

FIG. 10 is a diagram showing a cross section of an EL module.

FIG. 11 illustrates an example of an electronic device.

FIG. 12 illustrates an example of an electronic device.

FIG. 13 illustrates an example of an electronic device.

FIG. 14 is an inverse pole figure of a silicon film (including argon) having a crystal structure of the present invention, which is obtained by the EBSP method.

FIG. 15 is a view showing an Ar / Si concentration ratio by TXRF.

Continued on the front page F term (reference) 2H092 GA29 JA26 JA37 JA46 KA05 KA10 KB25 MA08 MA27 MA30 PA01 PA10 PA11 PA13 RA05 5F052 AA02 AA11 AA17 AA24 BA02 BB02 BB07 DA02 DB02 DB03 DB07 EA12 EA15 EA16 FA06 FA19 JA01 A01 JA02 JA04 CC02 CC06 CC08 DD01 DD02 DD03 DD05 DD13 DD14 DD15 DD17 EE01 EE02 EE03 EE04 EE06 EE09 EE14 EE15 EE23 EE44 FF04 FF12 FF36 GG01 GG02 GG13 GG32 NN33 GG34 GG43 GG45 GG47 NN33 NN03 NN04 NN PP04 PP10 PP29 PP34 PP35 PP38 QQ04 QQ11 QQ23 QQ25 QQ28

Claims (17)

[Claims] A first step of forming a first semiconductor film having an amorphous structure on an insulating surface; and a second step of adding a rare gas element to the first semiconductor film having an amorphous structure. A third step of adding a metal element to the first semiconductor film having the amorphous structure, and after heating the first semiconductor film, irradiating the first semiconductor film with a laser beam to perform crystallization, A fourth step of forming a first semiconductor film having: a fifth step of forming a barrier layer on a surface of the first semiconductor film having the crystal structure; and a fifth step of including a rare gas element on the barrier layer. A sixth step of forming a second semiconductor film; a seventh step of gettering the metal element in the second semiconductor film to remove or reduce the metal element in the first semiconductor film having a crystal structure; And an eighth step of removing the second semiconductor film. A method for manufacturing a semiconductor device. 2. The semiconductor device according to claim 1, wherein the step of forming the barrier layer comprises oxidizing a surface of the semiconductor film having the crystal structure by irradiating a laser beam, and further irradiating the semiconductor film having the crystal structure with a solution containing ozone. A method for manufacturing a semiconductor device, which is a step of oxidizing a surface of a film. 3. A first step of forming a first semiconductor film having an amorphous structure on an insulating surface, and a second step of adding a rare gas element to the first semiconductor film having an amorphous structure. A third step of adding a metal element to the first semiconductor film having the amorphous structure, and after heating the first semiconductor film, irradiating the first semiconductor film with a laser beam to perform crystallization, A fourth step of forming a first semiconductor film having a crystal structure; and a fifth step of selectively adding a rare gas element to the first semiconductor film having the crystal structure to form a region containing the rare gas element.
A sixth step of gettering the metal element in a region containing the rare gas element to selectively remove or reduce the metal element in the first semiconductor film having a crystal structure; And a seventh step of removing a region including: 4. The method according to claim 1, wherein in the second step, a rare gas element is contained in the first semiconductor film having an amorphous structure in an amount of 1 × 10 ¹⁷ / cm ³ or more. ,
A method for manufacturing a semiconductor device, which is preferably added in a concentration range of 1 × 10 ²⁰ / cm ^{3 to} 3 × 10 ²⁰ / cm ³ . 5. The method according to claim 1, wherein the rare gas element contained in the first semiconductor film is removed or reduced by the laser light irradiation in the fourth step. Of manufacturing a semiconductor device. 6. The semiconductor device according to claim 1, wherein the second semiconductor film is formed by a sputtering method using a semiconductor as a target in an atmosphere containing a rare gas element. Production method. 7. The semiconductor device according to claim 1, wherein the second semiconductor film is formed by a sputtering method using a semiconductor containing phosphorus or boron as a target in an atmosphere containing a rare gas element. Of manufacturing a semiconductor device. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the sixth step is a heat treatment. 9. The method for manufacturing a semiconductor device according to claim 1, wherein the sixth step is a step of irradiating the semiconductor film with strong light. 10. The method according to claim 1, wherein
The method for manufacturing a semiconductor device, wherein the sixth step is a step of performing heat treatment and irradiating the semiconductor film with strong light. 11. The method according to claim 9, wherein the intense light is light emitted from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp. A method for manufacturing a semiconductor device. 12. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the barrier layer is a step of oxidizing a surface of the semiconductor film having the crystal structure with a solution containing ozone. 13. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the barrier layer is a step of oxidizing the surface of the semiconductor film having the crystal structure by irradiation with ultraviolet light. 14. A first step of forming a first semiconductor film containing a rare gas element and having an amorphous structure on an insulating surface, and forming a metal element on the first semiconductor film having an amorphous structure. A second step of adding, and a third step of performing heat treatment on the first semiconductor film, irradiating a laser beam to perform crystallization, and forming a first semiconductor film having a crystal structure. A method for manufacturing a semiconductor device. 15. A first step of forming a first semiconductor film containing a rare gas element and having an amorphous structure on an insulating surface, and a step of forming a metal element on the first semiconductor film having an amorphous structure. A second step of adding, a third step of performing a heat treatment on the first semiconductor film, and then irradiating a laser beam to perform crystallization to form a first semiconductor film having a crystal structure; A fourth step of forming a barrier layer on the surface of the first semiconductor film having: a fifth step of forming a second semiconductor film containing a rare gas element on the barrier layer; and a second step of forming the second semiconductor film. A step of removing or reducing the metal element in the first semiconductor film having a crystal structure by gettering the metal element, and a seventh step of removing the second semiconductor film. A method for manufacturing a semiconductor device. 16. The method according to claim 1, wherein the metal element is Fe, Ni, Co, Ru, Rh, P
A method for manufacturing a semiconductor device, which is one or more kinds selected from d, Os, Ir, Pt, Cu, and Au. 17. The method for manufacturing a semiconductor device according to claim 1, wherein the rare gas element is one or more kinds selected from He, Ne, Ar, Kr, and Xe. .