JP2003173967A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for effectively removing a metal element retained in a crystalline semiconductor film obtained by using the metal element having a catalytic action for the crystallization of a semiconductor film. <P>SOLUTION: The method for removing the metal element comprises the steps of forming a barrier layer 105 on a first semiconductor film 104 having a crystal structure provided on a substrate and a second semiconductor film 106 including a rare gas element, passing the metal element included in the film 104 through the layer 105 by heat treating, and conducting gettering for moving the element to the film 106. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device using a gettering technique. In particular, the present invention is
The present invention relates to a method for manufacturing a semiconductor device using a semiconductor film having a crystal structure which is manufactured by adding a metal element which promotes crystallization of a semiconductor film.

[0002] In this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and electro-optical devices, semiconductor circuits, and electronic equipment are all semiconductor devices.

[0003]

2. Description of the Related Art A thin film transistor (hereinafter referred to as a TFT) is used as a typical semiconductor device using a semiconductor film having a crystal structure.
Is known). The TFT is drawing attention as a technique for forming an integrated circuit on an insulating substrate such as glass, and a drive circuit integrated liquid crystal display device and the like are being put to practical use. In the conventional technique, a semiconductor film having a crystalline structure is obtained by subjecting an amorphous semiconductor film deposited by a plasma CVD method or a low pressure CVD method to a heat treatment or a laser annealing method (a technique of crystallizing a semiconductor film by laser light irradiation). It is made by.

The semiconductor film having a crystal structure produced in this manner is an aggregate of a large number of crystal grains, and its crystal orientation is oriented in an arbitrary direction and cannot be controlled, which is a factor limiting the characteristics of the TFT. ing. In order to solve such a problem, the technique disclosed in JP-A-7-183540 is to add a metal element such as nickel that promotes crystallization of a semiconductor film to produce a semiconductor film having a crystal structure. In addition to the effect of lowering the heating temperature required for crystallization, it is possible to enhance the orientation of crystal orientation in a single direction. When a TFT is formed of a semiconductor film having such a crystal structure, not only the field effect mobility is improved, but also the subthreshold coefficient (S value) is reduced, and the electrical characteristics can be dramatically improved. ing.

However, since the metal element that promotes crystallization is added, the metal element remains in the film of the semiconductor film having a crystal structure or on the film surface, and the characteristics of the obtained device are varied. There's a problem. One example thereof is a problem that the off-current increases in the TFT and the TFTs vary among the individual elements. That is, the metal element that promotes crystallization, once the semiconductor film having a crystal structure is formed,
On the contrary, it becomes unnecessary.

Gettering using phosphorus is effectively used as a method for removing a metal element that promotes crystallization from a specific region of a semiconductor film having a crystal structure. For example, by adding phosphorus to the source / drain region of the TFT and performing heat treatment at 450 to 700 ° C., the metal element can be easily removed from the channel formation region.

[0007]

Phosphorus is an ion doping method (a method of dissociating PH ₃ or the like with plasma and accelerating the ions with an electric field to implant them into a semiconductor. Basically, mass separation of ions is performed. However, the phosphorus concentration required for gettering is 1 × 10 ²⁰ / cm ³ or more. The addition of phosphorus by the ion doping method brings about amorphization of the semiconductor film having a crystal structure, but an increase in the phosphorus concentration is a problem because it hinders recrystallization by subsequent annealing. Further, the addition of a high concentration of phosphorus causes an increase in the processing time required for doping, which lowers the throughput in the doping process, which is a problem.

Further, the concentration of boron required to invert the conductivity type is 1.5 to 3 times that of phosphorus added to the source / drain regions of the p-channel TFT, which causes recrystallization. Along with the difficulty, the resistance of the source / drain region is increased, which is a problem.

The present invention is a means for solving such a problem, and after a semiconductor film having a crystal structure is obtained by using a metal element that promotes crystallization of the semiconductor film, the remaining semiconductor film remains. It is an object of the present invention to provide a technique for effectively removing a metal element.

[0010]

The gettering technique is positioned as a main technique in the technique of manufacturing an integrated circuit using a single crystal silicon wafer. Gettering is known as a technique in which metal impurities taken into a semiconductor are segregated at gettering sites by some energy to reduce the impurity concentration in the active region of the device.
It is the extrinsic gettering (Extrinsic G
ettering and Intrinsic gettering
There are two main categories: Gettering). The extrinsic gettering is one in which a gettering effect is brought about by externally applying a strain field or a chemical action. This is a ring getter that diffuses a high concentration of phosphorus from the back surface of a single crystal silicon wafer, and the gettering using phosphorus described above can be regarded as a type of extrinsic gettering.

On the other hand, intrinsic gettering is known to utilize the strain field of lattice defects involving oxygen generated inside a single crystal silicon wafer.
The present invention focuses on intrinsic gettering utilizing such lattice defects or lattice distortion, and adopts the following means for applying to a semiconductor film having a crystal structure with a thickness of about 10 to 100 nm. To do.

The present invention comprises a step of forming a first semiconductor film having a crystalline structure on a silicon nitride film by using a metal element,
A step of forming a film (barrier layer) to be an etching stopper, a step of forming a second semiconductor film (gettering site) containing a rare gas element, a step of gettering a metal element to the gettering site, And a step of removing the second semiconductor film.

In the step of forming the second semiconductor film (gettering site) containing a rare gas element, a target made of a semiconductor is used, and an amorphous is formed by a sputtering method by glow discharge in an atmosphere containing a rare gas element. A semiconductor film having a quality structure may be formed. Further, a semiconductor target (having a specific resistance value of 0.01 to 1000 Ω ·) containing an impurity element imparting one conductivity type to the semiconductor (phosphorus, arsenic, boron, etc.)
cm) may be used. Further, if the semiconductor target containing the impurity element (phosphorus, arsenic, boron, etc.) has a specific resistance value of 0.01 to 1 Ω · cm, film formation can be performed by a sputtering apparatus using a DC power supply.

The rare gas elements are He, Ne, Ar and K.
One or more kinds selected from r and Xe, and by including these ions in the semiconductor film, dangling bonds or lattice distortion can be formed to form gettering sites.

Further, as another means for forming the second semiconductor film (gettering site) containing a rare gas element,
The second semiconductor film containing a rare gas element may be formed by a plasma CVD method using a source gas containing a rare gas element or a low pressure thermal CVD method. However, the film forming conditions are adjusted so that film peeling does not occur.

As another means, a rare gas element may be added by an ion doping method or an ion implantation method to form the second semiconductor film containing the rare gas element.

Further, after a second semiconductor film containing a rare gas element is obtained at the film forming stage by using a sputtering method, a plasma CVD method, a low pressure thermal CVD method or the like, a rare gas is further added to the second semiconductor film. One or more elements selected from elements, H, H ₂ , O, O ₂ , P and B may be added. By thus adding a plurality of elements, a gettering effect can be synergistically obtained. Above all, O and O ₂ are effective, and depending on the film forming conditions or addition after film formation, SI in the second semiconductor film may be increased.
When the oxygen concentration in the MS analysis is 5 × 10 ¹⁸ / cm ³ or more, preferably 1 × 10 ¹⁹ / cm ³ to 1 × 10 ²² / cm ³ , the gettering effect is increased. Note that the rare gas element hardly diffuses, but when another element to be added in addition to the rare gas element easily diffuses, the film thickness of the second semiconductor film is adjusted to be thick so that the other element to be added does not It is preferable that the heat treatment does not diffuse into the first semiconductor film. Further, not only the second semiconductor film but also the barrier layer has a function of preventing diffusion of other elements.

Further, the present invention is characterized in that the gettering effect is increased by using an insulating film made of a silicon nitride film having a film thickness of 10 nm or less as a base insulating film in contact with the first semiconductor film having a crystal structure. There is. The base insulating film also has a blocking effect.

According to the structure of the invention disclosed in this specification, the first semiconductor film having an amorphous structure is formed over the insulating film.
A step of adding a metal element to the first semiconductor film having an amorphous structure, and a step of crystallizing the first semiconductor film to form a first semiconductor film having a crystalline structure 3 steps, a fourth step of forming a barrier layer on the surface of the first semiconductor film having the crystal structure, and a fifth step of forming a second semiconductor film containing a rare gas element on the barrier layer. A sixth step of removing or reducing the metal element in the first semiconductor film having a crystalline structure by gettering the metal element in the second semiconductor film, and removing the second semiconductor film. It is a method for manufacturing a semiconductor device, which has seven steps.

In the above structure, it is preferable that the base insulating film is a silicon nitride film in order to increase the gettering effect.

In the above structure, it is preferable that the concentration of oxygen contained in the first semiconductor film is 5 × 10 ¹⁸ / cm ³ or less in order to increase the gettering effect.

In the above structure, it is preferable that the concentration of oxygen contained in the second semiconductor film be higher than 5 × 10 ¹⁸ / cm ³ in order to increase the gettering effect.

In the above structure, the oxygen concentration contained in the second semiconductor film is made higher than the oxygen concentration contained in the first semiconductor film in order to increase the gettering effect.

Further, in each of the above constitutions, the third step is a heat treatment, a treatment of irradiating strong light, or laser light (excimer laser light having a wavelength of 400 nm or less, second harmonic wave, third harmonic wave of YAG laser). It is characterized in that any one of the treatments of irradiating the waves) is performed, or a combination thereof.

Further, in each of the above structures, the fourth step of forming the barrier layer is to oxidize the surface of the semiconductor film having the crystal structure by irradiation with laser light, and then further to add the crystal structure with a solution containing ozone. The step may be the step of oxidizing the surface of the semiconductor film having Alternatively, in each of the above structures, the fourth step of forming the barrier layer is a step of oxidizing the surface of the semiconductor film having the crystal structure with a solution containing ozone, or the crystal structure is irradiated with ultraviolet rays in an oxygen atmosphere. The step may be the step of oxidizing the surface of the semiconductor film having Further, the fourth step of forming the barrier layer may be a step of oxidizing the surface of the semiconductor film having the crystal structure by oxygen plasma treatment.

In the present specification, the barrier layer refers to a layer having a film quality or a film thickness that allows a metal element to pass therethrough in the gettering step and also serving as an etching stopper in the step of removing the layer serving as the gettering site. ing.

Further, in each of the above structures, the second semiconductor film is formed by a sputtering method using a semiconductor as a target in an atmosphere containing a rare gas element.

Further, in each of the above structures, the second semiconductor film is formed by a sputtering method in which a semiconductor containing phosphorus or boron is targeted in an atmosphere containing a rare gas element.

Further, in each of the above structures, the internal stress of the second semiconductor film is a compressive stress.

Further, in each of the above structures, the sixth step may use heat treatment or a treatment of irradiating the semiconductor film having the amorphous structure with strong light. Also, the sixth
The process may be a process of performing heat treatment and irradiating the semiconductor film having the amorphous structure with strong light.

In each of the above constructions, the strong light is
It is characterized in that the light is emitted from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.

In each of the above structures, in the above structure, the metal element is Fe, Ni, Co, Ru, Rh,
It is characterized by being one or more selected from Pd, Os, Ir, Pt, Cu, and Au.

Further, the present invention is not limited to the above structure, and a gettering site containing a rare gas element may be formed only in the upper layer of the second semiconductor film. Alternatively, a gettering site may be formed by forming a second semiconductor film containing no rare gas element and forming a third semiconductor film containing a rare gas element on the second semiconductor film.

Further, after a nickel element is sputtered on the insulating film made of a silicon nitride film by a sputtering method or the like, a first semiconductor film is formed, a barrier layer is provided, and a second semiconductor film containing a rare gas element is formed. After the formation, the first semiconductor film may be crystallized and gettered at the same time by heat treatment or strong light.

[0035]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below.

The present invention relates to a process of forming a semiconductor film having a crystalline structure on a dielectric surface by using a metal element that promotes crystallization, a process of forming a barrier layer on the semiconductor film having a crystalline structure, and a barrier. A process for forming a semiconductor film (gettering site) containing a rare gas element on the layer;
A heat treatment process, in which the metal element contained in the semiconductor film having a crystalline structure moves through the barrier layer and passes through the barrier layer to form a gettering site (a semiconductor film containing ions of a rare gas element). It is to remove or reduce a metal element from a semiconductor film which is captured and has a crystalline structure. Note that the heat treatment may be heat treatment using a furnace, irradiation of intense light from a lamp light source, or irradiation of intense light at the same time as the heat treatment.

Further, one of the features of the present invention is to increase the gettering effect by setting the oxygen concentration in the semiconductor film (gettering site) containing the rare gas element to 5 × 10 ¹⁸ / cm ³ or more. Is.

The semiconductor film containing the rare gas element is
A semiconductor target containing an impurity element (phosphorus, arsenic, boron, etc.) that imparts one conductivity type to the semiconductor in an atmosphere containing a rare gas element (specific resistance value of 0.01 to 1000 Ω · cm) It is preferable to form the film by the used sputtering method. For example, a magnetron sputtering apparatus using an RF power supply is used to form a film on a silicon target containing boron (having a specific resistance value of 10Ω).

Further, one of the features of the present invention is to increase the gettering effect by using an insulating film made of a silicon nitride film having a film thickness of 10 nm or less as a base insulating film in contact with the first semiconductor film. . The base insulating film also has a blocking effect.

Further, according to the present invention, after the metal element is removed or reduced from the semiconductor film having the crystal structure by the heat treatment, the semiconductor film containing the rare gas element and the barrier layer are removed. The semiconductor film having a crystal structure thus obtained is patterned into a desired shape and used as an active layer of a TFT.

A procedure for manufacturing a typical TFT using the present invention will be briefly described below with reference to FIG.

In FIG. 1A, 100 is a substrate having an insulating surface, 101 is an insulating film to be a blocking layer, and 102 is.
Is a semiconductor film having an amorphous structure.

In FIG. 1A, the substrate 100 can be a glass substrate, a quartz substrate, a ceramic substrate, or the like. Alternatively, a silicon substrate, a metal substrate, or a stainless steel substrate having an insulating film formed on its surface may be used. Alternatively, a plastic substrate having heat resistance that can withstand the processing temperature of this step may be used.

First, as shown in FIG. 1A, the substrate 100
A base insulating film 101 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) is formed thereover. A typical example is a first silicon oxynitride film having a two-layer structure as the base insulating film 101, which is formed by using SiH ₄ , NH ₃ , and N ₂ O as reaction gases.
The second silicon oxynitride film formed by using 0 to 100 nm, SiH ₄ , and N ₂ O as reaction gases is 100 to 150 n.
A structure in which layers are formed to have a thickness of m is adopted. Further, it is preferable to use a silicon nitride film (SiN film) or a second silicon oxynitride film (SiN _x O _y film (X >> Y)) having a film thickness of 10 nm or less as one layer of the base insulating film 101.
At the time of gettering, nickel tends to move to a region having a high oxygen concentration. Therefore, it is extremely effective to use a silicon nitride film as a base insulating film which is in contact with the semiconductor film. Alternatively, a three-layer structure in which a first silicon oxynitride film, a second silicon oxynitride film, and a silicon nitride film are sequentially stacked may be used.

Next, a first semiconductor film 102 having an amorphous structure is formed on the base insulating film. First semiconductor film 1
For 02, a semiconductor material containing silicon as a main component is used.
Typically, an amorphous silicon film, an amorphous silicon germanium film, or the like is applied, and a plasma CVD method or low pressure C
It is formed to a thickness of 10 to 100 nm by the VD method or the sputtering method. In order to obtain a semiconductor film having a good crystal structure by the subsequent crystallization, the first semiconductor film 1 having an amorphous structure 1
The concentration of impurities such as oxygen and nitrogen contained in the No. 02 film is set to 5
It is preferable to reduce the concentration to × 10 ¹⁸ / cm ³ (atomic concentration measured by secondary ion mass spectrometry (SIMS)) or less. These impurities interfere with the subsequent crystallization, and
Even after crystallization, it becomes a factor to increase the density of trap centers and recombination centers. Therefore, it is desirable to use not only a high-purity material gas but also an ultrahigh vacuum-compatible CVD apparatus equipped with a mirror surface treatment (electrolytic polishing treatment) in the reaction chamber and an oil-free vacuum exhaust system.

Next, as a technique for crystallizing the first semiconductor film 102 having an amorphous structure, here, Japanese Patent Laid-Open No. 8-78 is used.
Crystallization is performed using the technique described in Japanese Patent No. 329. The technique described in the publication is a crystal structure that expands from an added region as a starting point by selectively adding a metal element that promotes crystallization to an amorphous silicon film (also called an amorphous silicon film) and performing heat treatment. To form a semiconductor film having First, the first semiconductor film 10 having an amorphous structure
On the surface of No. 2, a metal element (nickel in this embodiment) having a catalytic action for promoting crystallization is converted into a weight of 1 to 100 pp.
A nickel acetate solution containing m is applied by a spinner to form the nickel-containing layer 103. (FIG. 1B) As a means other than the method of forming the nickel-containing layer 103 by coating, a sputtering method, a vapor deposition method, or a means of forming an extremely thin film by plasma treatment may be used. In addition, although the example of coating the entire surface is shown here, a nickel-containing layer may be selectively formed by forming a mask.

Next, heat treatment is performed to perform crystallization.
In this case, in crystallization, silicide is formed in a portion of the semiconductor film which is in contact with a metal element that promotes crystallization of a semiconductor, and crystallization proceeds with the silicide as a nucleus. Thus, the first semiconductor film 104 having the crystal structure shown in FIG. 1C is formed. Note that the concentration of oxygen contained in the first semiconductor film 104 after crystallization is preferably 5 × 10 ¹⁸ / cm ³ or less. Here, the heat treatment for dehydrogenation (450
C., 1 hour) and then heat treatment for crystallization (550.degree.
650 ° C. for 4 to 24 hours). Further, when crystallization is performed by irradiation with intense light, any one of infrared light, visible light, or ultraviolet light or a combination thereof can be used, but typically, a halogen lamp, a metal halide, or the like. Light emitted from a lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, or high pressure mercury lamp is used. The lamp light source is 1 to 60
Second, preferably 30 to 60 seconds, and turn it on once to 1
Repeated 0 times, the semiconductor film momentarily 600 ~ 1000 ℃
It may be heated to a certain degree. Note that, if necessary, the first semiconductor film 10 having an amorphous structure before being irradiated with strong light.
A heat treatment for releasing hydrogen contained in 2 may be performed.
Further, crystallization may be performed by simultaneously performing heat treatment and irradiation with strong light. Considering the productivity, it is desirable to perform crystallization by irradiating strong light.

The first semiconductor film 1 thus obtained
In 04, the metal element (here, nickel) remains. It is not evenly distributed in the membrane,
If the average concentration is exceeded, it remains at a concentration exceeding 1 × 10 ¹⁹ / cm ³ . Of course, even in such a state, it is possible to form various semiconductor elements including the TFT, but the element is removed by the method described below.

Then, after removing the natural oxide film on the surface of the semiconductor film with dilute hydrofluoric acid or the like, the crystallization rate (the ratio of the crystal component in the total volume of the film) is increased to repair the defects left in the crystal grains. First, it is preferable that the first semiconductor film 104 having a crystal structure be irradiated with laser light. When irradiated with laser light, a thin oxide film (not shown) is formed on the surface. As the laser light, excimer laser light having a wavelength of 400 nm or less, and second and third harmonics of YAG laser are used. Alternatively, a continuous wave gas laser or solid laser may be used. As a solid-state laser, C
A laser using a crystal of YAG, YVO ₄ , YLF, YAlO ₃ or the like doped with r, Nd, Er, Ho, Ce, Co, Ti or Tm is applied. The fundamental wave of the laser varies depending on the material to be doped, and laser light having a fundamental wave of about 1 μm can be obtained. The harmonic wave with respect to the fundamental wave can be obtained by using a non-linear optical element. Here, a pulsed laser light having a repetition frequency of about 10 to 1000 Hz is used, the laser light is condensed to 100 to 400 mJ / cm ² by an optical system, and a laser is applied to the crystalline semiconductor film with an overlap ratio of 90 to 95%. Processing may be performed. Further, instead of the laser light, strong light from a lamp light source may be radiated, or laser light and strong light may be radiated at the same time.

When a continuous wave laser is used,
Is a continuous oscillation YVO with an output of 10 W _FourEmitted from laser
The generated laser light into a harmonic by a non-linear optical element.
It Typically, Nd: YVO_FourLaser (fundamental wave 106
4 nm) second harmonic (532 nm) and third harmonic (355 nm)
nm) may be applied. In the resonator, YVO_Four
A method of emitting a harmonic by inserting a crystal and a nonlinear optical element
There is also. And, preferably, a quadrature is used on the irradiation surface by an optical system.
Shaped or elliptical laser light to be processed
Irradiate. The energy density at this time is 0.01 to 10
0 MW / cm²Degree (preferably 0.1-10 MW / c
m²)is necessary. And 10 to 2000 cm / s
Move the semiconductor film relatively to the laser light at a speed of about
It suffices to irradiate.

Since the oxide film formed by the irradiation of the laser beam after the crystallization is not sufficient, an oxide film (called chemical oxide) is further formed with an ozone-containing aqueous solution (typically ozone water). And total 1-10 nm
The barrier layer 105 made of the oxide film is formed, and the second semiconductor film 106 containing a rare gas element is formed on the barrier layer 105. (FIG. 1D) Here, the oxide film formed when the first semiconductor film 104 having a crystal structure is irradiated with laser light is also regarded as part of the barrier layer. The barrier layer 105 functions as an etching stopper when only the second semiconductor film 106 is selectively removed in a later step. Further, instead of the ozone-containing aqueous solution, the chemical oxide can be similarly formed by treating with an aqueous solution in which sulfuric acid, hydrochloric acid, nitric acid and the like are mixed with hydrogen peroxide solution. As another method of forming the barrier layer 105, ozone may be generated by irradiation of ultraviolet rays in an oxygen atmosphere to oxidize the surface of the semiconductor film having the crystal structure. As another method of forming the barrier layer 105, an oxide film having a thickness of about 1 to 10 nm may be deposited as a barrier layer by a plasma CVD method, a sputtering method, an evaporation method, or the like. As another method for forming the barrier layer 105, a clean oven may be used and heated to about 200 to 350 ° C. to form a thin oxide film. Note that the barrier layer 105 formed by any one of the above methods or a combination of those methods has a film quality in which nickel in the first semiconductor film can move to the second semiconductor film by later gettering. Alternatively, it is necessary to set the film thickness.

Here, the second semiconductor film 106 containing a rare gas element is formed by a sputtering method to form a gettering site. As rare gas elements, helium (He), neon (Ne), argon (Ar), krypton (K)
One or more kinds selected from r) and xenon (Xe) are used. Of these, argon (Ar), which is an inexpensive gas, is preferable. Here, the second semiconductor film is formed using a target made of silicon in an atmosphere containing a rare gas element. There are two meanings of containing the rare gas element ion, which is an inert gas, in the film. One is to form dangling bonds to give strain to the semiconductor film, and the other is to give strain to the lattice of the semiconductor film. In order to give strain to the lattice of the semiconductor film, it is remarkably obtained when an element having an atomic radius larger than that of silicon such as argon (Ar), krypton (Kr), and xenon (Xe) is used. Further, by containing a rare gas element in the film, not only lattice strain but also dangling bonds are formed, which contributes to the gettering action.

FIG. 12 shows film forming pressures of 0.2 Pa and 0.4 P.
a, 0.6Pa, 0.8Pa, 1.0Pa, 1.2Pa
Shows the results of measuring the concentration of Ar in the formed films by sequentially forming films with a thickness of 0.2 μm. The film forming conditions other than the pressure are B-doped silicon target (specific resistance of about 1
0 Ω · cm, target size diameter 30.5 cm, gas (Ar) flow rate 50 (sccm), film formation power 3 kW,
The substrate temperature is 150 ° C. Although an example of an apparatus using a disk-shaped target is shown here, a sputtering apparatus for forming a film while moving a substrate may be used as a columnar (or columnar) target.

It can be seen from FIG. 12 that the lower the film forming pressure, the higher the Ar concentration in the film, and the film suitable for a gettering site can be formed. The reason for this is that the lower the deposition pressure of the sputter, the smaller the probability of collision between the Ar gas in the reaction chamber and the recoil atoms (Ar atoms reflected on the target surface), so recoil atoms are more likely to enter the substrate. It can be. Therefore, from the above experimental results, when the sputtering apparatus using the RF power source is used, if the film formation pressure is changed to 0.2 to 1.0 Pa and the conditions shown in FIG. × 10 ¹⁹ / cm ³ ~ 1
× 10 ²² / cm ³ , preferably 1 × 10 ²⁰ / cm ³ to 1 × 10
²¹ / cm ³ , more preferably 5 × 10 ²⁰ / cm ³ in concentration,
A semiconductor film having a gettering effect can be formed by a sputtering method.

Note that FIG. 13 shows the relationship between the Ar concentration and the internal stress in the second semiconductor film. From FIG. 13, the higher the Ar concentration in the film, the higher the compressive stress.
For example, an amorphous silicon film formed at a sputtering film forming pressure of 0.2 Pa contains Ar at an atomic concentration of 3 × 10 ²⁰ / cm ³ , and has a compressive stress (about −9.47 × 10 ⁹ (dynes). /
cm ² )). Therefore, it is desirable to adjust the stress of each film by setting the Ar concentration within a range where film peeling does not occur due to the subsequent heat treatment.

Generally, the internal stress includes tensile stress and compressive stress. When the thin film tries to shrink with respect to the substrate, the substrate is deformed with the thin film inside to pull in a direction that prevents it, which is called tensile stress. On the other hand, when the thin film is going to stretch, the substrate is compressed and formed with the thin film on the outside, which is called compressive stress.

Further, the relationship between the RF power (or RF power density) and the concentration of the rare gas element (Ar) in the amorphous silicon film formed by the sputtering method was obtained. The experimental procedure is shown below.

An amorphous silicon film containing a rare gas element was formed on a glass substrate with a sputtering device using an RF power source.
Using a silicon target (resistivity 10 Ωcm), the frequency is 1 kHz to 30 MHz, preferably 10 to 20 MHz,
Ar flow at 50 sccm into the film forming chamber and the film forming pressure is 0.1 P.
a to 5 Pa Here, 0.4 Pa is used, and the substrate temperature is 300
C. or less, here 150.degree. C., and RF power was sequentially changed every time a film having a thickness of 0.2 .mu.m was formed to be laminated. The electrode size is 30.5 cm in diameter. The RF power density refers to the value obtained by dividing the RF power by the electrode area. RF power on the glass substrate 0.4kW, 0.5kW, 1
Films were sequentially formed with a thickness of 0.2 μm under each condition of kW and 3 kW, and the atomic concentration of Ar in the formed film was measured by secondary ion mass spectrometry (SIMS).

The obtained results are shown in FIG. In FIG. 28, the vertical axis represents the atomic concentration of Ar and the horizontal axis represents the depth from the sample surface. In addition, FIG. 28 also shows the ionic strength of silicon in which the vertical axis represents the secondary ion intensity and the horizontal axis represents the depth from the sample surface.

From FIG. 28, it is understood that the lower the RF power (or the RF power density), the higher the atomic concentration of Ar in the film and the film suitable as a gettering site can be formed. Further, when the RF power (or the RF power density) is lowered, the internal stress can be reduced, so that film peeling can be made less likely to occur.

From these experimental results, a suitable gettering site (amorphous silicon film containing a rare gas element) may be formed by appropriately setting the film forming pressure, RF power (or RF power density) and the like. .

When the second semiconductor film is formed using a target containing phosphorus, which is an impurity element of one conductivity type, in addition to gettering by a rare gas element, gettering is performed by utilizing the Coulomb force of phosphorus. It can be carried out.

Further, during gettering, nickel tends to move to a region having a high oxygen concentration, so that the oxygen concentration contained in the second semiconductor film 106 is higher than the oxygen concentration contained in the first semiconductor film. High concentration, eg 5 × 10 ¹⁸ /
It is desirable to set it to cm ³ or more.

In addition, in the film formation by the sputtering method of FIG. 1D, when a rare gas element is also added to the first semiconductor film, the added portion functions as a gettering site, so that the gettering effect is obtained. There is concern that it will be reduced. Therefore, it is desirable to appropriately adjust the sputtering conditions so that the rare gas element is not added to the first semiconductor film. In addition, the film thickness and film quality of the barrier layer are important because the barrier layer functions to prevent addition of a rare gas element during film formation by the sputtering method. According to the experiments conducted by the present inventors, an oxide film formed when irradiated with laser light in order to increase the crystallization rate and repair defects left in crystal grains is formed, and the oxide film is further formed with an ozone-containing aqueous solution. An oxide film having a total thickness of 10 nm or less obtained by forming is preferable as the barrier layer. On the other hand, when the barrier layer is formed only by the oxide film in the ozone-containing aqueous solution after removing the oxide film formed when the laser beam is irradiated, the rare gas element is the first semiconductor in the film formation by the sputtering method. A small amount was added to the film, which was insufficient as a barrier layer.

Next, heat treatment is performed to perform gettering for reducing or removing the concentration of the metal element (nickel) in the first semiconductor film. As the heat treatment for performing gettering, treatment for irradiating strong light or heat treatment may be performed (FIG. 1E). By this gettering, the metal element moves in a direction of an arrow in FIG. 1E (that is, a direction from the substrate side to the surface of the second semiconductor film), and the first semiconductor film covered with the barrier layer 105. The metal element contained in 104 is removed or the concentration of the metal element is reduced.
The distance that the metal element moves during gettering may be at least the thickness of the first semiconductor film, and gettering can be completed in a relatively short time. Here, all of nickel is moved to the second semiconductor film 106 so that nickel is not segregated in the first semiconductor film 104, and nickel contained in the first semiconductor film 104 is hardly present.
That is, sufficient gettering is performed so that the nickel concentration in the film is 1 × 10 ¹⁸ / cm ³ or less, preferably 1 × 10 ¹⁷ / cm ³ or less.

The second semiconductor film may be partially crystallized depending on the condition of the gettering heat treatment or the thickness of the second semiconductor film. When the second semiconductor film is crystallized, dangling bonds, lattice distortion, and dangling bonds are reduced, which leads to a reduction in gettering effect. Therefore, heat treatment in which the second semiconductor film is not crystallized is preferable. Or the thickness of the second semiconductor film. In any case, the second semiconductor film, that is, the amorphous silicon film containing a rare gas element is less likely to be crystallized than the amorphous silicon film containing no rare gas element, and thus is optimal as a gettering site. Is.

Depending on the conditions of the gettering heat treatment, the crystallization rate of the first semiconductor film is increased at the same time as the gettering, and the defects left in the crystal grains are repaired, that is, the crystallinity is improved. be able to.

In this specification, gettering means that the metal element in the gettered region (here, the first semiconductor film) is released by thermal energy and moves to the gettering site by diffusion. . Therefore,
Gettering depends on the processing temperature, and the higher the temperature, the shorter the gettering.

When the treatment of irradiating strong light is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The light emission intensity of the lamp light source is arbitrary, but it is instantaneously 600 to 1000 ° C., preferably 700 to 75 ° C.
The semiconductor film is heated to about 0 ° C.

FIG. 14 shows the relationship between the gettering site, that is, the film thickness of the second semiconductor film and the surface nickel / silicon concentration ratio. The nickel / silicon concentration ratio is TXRF
(Total Reflection X-Ray Fluorescence:
The nickel concentration and the silicon concentration on the surface are measured by line spectroscopy, and the ratio of the nickel concentration to the silicon concentration is calculated. From FIG. 14, it is shown that when the thickness of the second semiconductor film is 50 nm or less, there is a large variation, and there is a portion where the nickel concentration is higher than the silicon concentration on the surface. Therefore, it is desirable that the thickness of the second semiconductor film is at least 50 nm or more with respect to the thickness of the first semiconductor film of 50 nm. However, if it is possible to form a film with a small variation in film thickness, it is possible to sufficiently reduce the metal element even with a thickness of about 10 nm. The upper limit of the film thickness of the second semiconductor film is not particularly limited, but the thicker the film thickness of the second semiconductor film is, the more time it takes to form the second semiconductor film and the removal is performed after gettering. It may be appropriately determined in consideration of the increase in time.

When heat treatment is performed, heat treatment may be performed in a nitrogen atmosphere at 450 to 800 ° C. for 1 to 24 hours, for example at 550 ° C. for 14 hours. In addition to the heat treatment, strong light may be irradiated.

Next, using the barrier layer 105 as an etching stopper, after selectively removing only the second semiconductor film indicated by 106, the barrier layer 105 is removed and the first semiconductor film 104 is subjected to a known patterning technique. The semiconductor layer 107 having a desired shape is formed by using this. (Fig. 1 (F)) Second
As a method for selectively etching only the semiconductor film, dry etching without plasma with ClF ₃ or wet etching with an alkaline solution such as an aqueous solution containing hydrazine or tetraethylammonium hydroxide (chemical formula (CH ₃ ) ₄ NOH) is used. Can be done at. Also, after removing the second semiconductor film,
When the nickel concentration is measured on the surface of the barrier layer by TXRF, nickel is detected at a high concentration. Therefore, it is desirable to remove the barrier layer, and it may be removed with an etchant containing hydrofluoric acid. Also, it is desirable to form a thin oxide film on the surface with ozone water after removing the barrier layer and before forming a resist mask.

Next, after cleaning the surface of the semiconductor layer with an etchant containing hydrofluoric acid, an insulating film containing silicon as a main component to form the gate insulating film 108 is formed. It is desirable that the surface cleaning and the formation of the gate insulating film be continuously performed without exposing to the atmosphere.

Next, after cleaning the surface of the gate insulating film 108, the gate electrode 109 is formed. Then, an impurity element imparting n-type conductivity to the semiconductor (P, As, or the like), here phosphorus is added as appropriate to form the source region 110 and the drain region 111. After the addition, heat treatment, strong light irradiation, or laser light irradiation is performed to activate the impurity element. At the same time as activation, plasma damage to the gate insulating film and plasma damage to the interface between the gate insulating film and the semiconductor layer can be recovered. Particularly, in an atmosphere of room temperature to 300 ° C., Y from the front surface or the back surface
It is very effective to irradiate the second harmonic of the AG laser to activate the impurity element. The YAG laser is a preferable activation means because it requires less maintenance.

In the subsequent steps, the interlayer insulating film 113 is formed, hydrogenation is performed to form contact holes reaching the source region and the drain region, the source electrode 114 and the drain electrode 115 are formed, and the TFT (n channel) is formed. Type TF
T) is completed. (Fig. 1 (G))

The concentration of the metal element contained in the channel formation region 112 of the TFT thus obtained is 1 × 10 ¹⁷ / cm 3.
It can be less than ³ .

Further, the present invention is not limited to the TFT structure of FIG. 1G, and if necessary, a low concentration drain (LDD: LDD: LDD region) between the channel forming region and the drain region (or source region). Lightly Doped Drain) structure. In this structure, a region where an impurity element is added at a low concentration is provided between a channel formation region and a source region or a drain region which is formed by adding an impurity element at a high concentration, and this region is referred to as an LDD region. I'm calling. Furthermore, a so-called GOLD (Gate-drain) is formed in which the LDD region is arranged so as to overlap the gate electrode via a gate insulating film.
Overlapped LDD) structure.

Although an n-channel TFT is used here, it is needless to say that a p-channel TFT can be formed by using a p-type impurity element instead of the n-type impurity element.

Further, although the top gate type TFT has been described as an example here, the present invention can be applied regardless of the TFT structure, for example, a bottom gate type (inverse stagger type) TFT or a forward stagger type TFT. It is possible to apply.

The present invention having the above structure will be described in more detail with reference to the following examples.

(Embodiment) [Embodiment 1] An embodiment of the present invention will be described with reference to FIGS. Here, a pixel portion and TFTs (n-channel type TFT and p-type TFT) of a driving circuit provided around the pixel portion are provided on the same substrate.
A method of simultaneously producing channel type TFTs will be described in detail.

First, the base insulating film 1100 is formed over the glass substrate 1100 by the method described in the above embodiment, a first semiconductor film having a crystal structure is obtained, and then etching treatment is performed to a desired shape to form islands. Layers 1102 separated in a shape of
1106 is formed.

The detailed description up to the formation of the semiconductor layers 1102 to 1106 has been given in the above embodiment mode, and will be briefly described below.

In this embodiment, a two-layer structure is used as the base insulating film 1101 provided on the glass substrate, but a single layer film of the insulating film or a laminated structure of two or more layers may be used. As the first layer of the base insulating film 1101, plasma C is used.
The first silicon oxynitride film (composition ratio Si) formed by using the VD method and using SiH ₄ , NH ₃ , and N ₂ O as reaction gases.
= 32%, O = 27%, N = 24%, H = 17%) with a film thickness of 50 nm. Next, as a second layer of the base insulating film 1101, a second silicon oxynitride film (composition ratio Si = 32%, O = 59) formed by using a plasma CVD method with SiH ₄ and N ₂ O as reaction gases. %, N = 7%,
H = 2%) is formed with a film thickness of 100 nm.

Next, an amorphous silicon film with a thickness of 50 nm is formed on the base insulating film 1101 by using the plasma CVD method. Then, a nickel acetate salt solution containing 10 ppm by weight of nickel is applied by a spinner. Instead of coating, a method of spattering nickel element over the entire surface by a sputtering method may be used. Then, irradiation with strong light was performed at 700 ° C. for 110 seconds with a multitasking lamp annealing apparatus using a total of 21 tungsten halogen lamps to obtain a silicon film having a crystalline structure. Note that if the temperature is 700 ° C. or lower in the lamp annealing apparatus, the semiconductor film is only momentarily heated, and there is almost no change in the shape of the substrate 1100.

Next, laser light (XeCl: wavelength 308 nm) for increasing the crystallization rate and repairing defects left in the crystal grains is irradiated. 400 wavelength for laser light
Excimer laser light having a wavelength of nm or less, and second and third harmonics of YAG laser are used. In any case, using pulsed laser light with a repetition frequency of about 10 to 1000 Hz,
The laser light may be focused at 100 to 400 mJ / cm ² by an optical system and irradiated with an overlap rate of 90 to 95% to scan the surface of the silicon film. Note that the irradiation with laser light here has a gettering effect also in preventing addition of a rare gas element to a silicon film having a crystalline structure at the time of forming a film by an sputtering method after forming an oxide film. It is also very important to increase. Next, in addition to the oxide film formed by laser light irradiation, the surface is treated with ozone water for 120 seconds to form a barrier layer made of an oxide film with a total thickness of 1 to 5 nm.

Then, a barrier layer is formed on the barrier layer by a sputtering method.
Amorphous silicon containing elemental argon that acts as a tarring site
Forming a film having a thickness of 150 nm. Sputtering of this example
The film forming conditions by the method are as follows: film forming pressure is 0.3 Pa, gas is
(Ar) flow rate is 50 (sccm) and film formation power is 3 kW
And the substrate temperature is 150 ° C. In addition, under the above conditions
Atomic concentration of argon element contained in amorphous silicon film
Is 3 × 10²⁰/ Cm³~ 6 × 10²⁰/ Cm³, The source of oxygen
Child concentration is 1 × 10¹⁹/ Cm³~ 3 x 10¹⁹/ Cm ³And
It Then, using a lamp annealing device at 650 ° C., 3
Gettering is performed by heat treatment for a minute.

Next, the barrier layer is used as an etching stopper to selectively remove the amorphous silicon film containing the argon element which is the gettering site, and then the barrier layer is selectively removed with dilute hydrofluoric acid. In addition, at the time of gettering,
Since nickel tends to move to a region having a high oxygen concentration, it is desirable to remove the barrier layer made of an oxide film after gettering.

Next, after forming a thin oxide film with ozone water on the surface of the obtained silicon film having a crystal structure (also referred to as a polysilicon film), a mask made of a resist is formed and an etching treatment is carried out into a desired shape. Forming a semiconductor layer separated into islands. After forming the semiconductor layer, the resist mask is removed.

After forming the semiconductor layer, an impurity element imparting p-type or n-type may be added in order to control the threshold value (Vth) of the TFT. The impurity element that imparts p-type conductivity to the semiconductor is boron (B),
Periodic Group 13 elements such as aluminum (Al) and gallium (Ga) are known. Note that an element belonging to Group 15 of the periodic law, typically phosphorus (P) or arsenic (As) is known as an impurity element imparting n-type to a semiconductor.

Next, after removing the oxide film with an etchant containing hydrofluoric acid, the surface of the silicon film is washed,
An insulating film containing silicon as its main component to be the gate insulating film 1107 is formed. In this embodiment, the plasma CVD method is used.
A silicon oxynitride film with a thickness of 15 nm (composition ratio Si = 3
2%, O = 59%, N = 7%, H = 2%).

Then, as shown in FIG. 2A, a first conductive film 1108a having a film thickness of 20 to 100 nm, a second conductive film 1108b having a film thickness of 100 to 400 nm, and a film are formed on the gate insulating film 1107. A third conductive film 1108c having a thickness of 20 to 100 nm is stacked. In this embodiment, a tungsten film having a thickness of 50 nm and a thickness of 5 are formed on the gate insulating film 1107.
00nm aluminum-titanium alloy (Al-Ti)
A film and a titanium film having a film thickness of 30 nm were sequentially laminated.

As the conductive material for forming the first to third conductive films, an element selected from Ta, W, Ti, Mo, Al and Cu, or an alloy material or a compound material containing the above element as a main component is used. Form. Alternatively, as the first to third conductive films, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. For example, tungsten nitride may be used instead of tungsten of the first conductive film, and an alloy of aluminum and silicon (Al-Si) may be used instead of the alloy of aluminum and titanium (Al-Ti) film of the second conductive film. ) Film may be used, or a titanium nitride film may be used instead of the titanium film of the third conductive film.
The structure is not limited to the three-layer structure, and may be, for example, a two-layer structure of a tantalum nitride film and a tungsten film.

Note that W, which is a material having a relatively low electric resistance value, was used for the first conductive layer, and aluminum (Al--Si) containing 2 wt% of Si having high heat resistance was used as the second conductive layer. ) Is used, and Ti is used as the third conductive layer, so that the heat resistance of the second conductive layer is further increased. However, when Ti is used as the third conductive layer, if heat treatment at 350 ° C. or higher is performed in a subsequent step (heat activation treatment or the like), Ti / Al—Si interface is alloyed, resulting in high resistance. Therefore, when heat treatment at 350 ° C. or higher is performed in a later step, it is preferable to use TiN as the third conductive layer. Further, when laser light is irradiated in a later step (such as laser activation treatment), the nitride easily absorbs the laser light and may damage the irradiation surface. Therefore, TiN is used as the third conductive layer. And the use of Ti for the fourth conductive layer can protect the laser beam from damage.

Next, as shown in FIG. 2B, a light exposure step is performed.
Form masks 1101-1115 made of resist by
Forming a first electrode for forming a gate electrode and a wiring.
Perform ching process. In the first etching process, the first and
Performed under the second etching conditions. ICP for etching
(Inductively Coupled Plasma)
It is preferable to use an etching method. Uses ICP etching method
Etching conditions (power applied to the coil type electrode
Amount, the amount of power applied to the electrode on the substrate side, the electrode temperature on the substrate side
Desired taper shape by adjusting the degree)
The film can be etched. Etching
The gas used is Cl₂, BCl₃, SiCl _Four, CCl_Four
Chlorine gas or CF typified by_Four, SF₆, NF
₃Fluorine gas typified by, or O₂Is used as appropriate
You can

The etching gas used is not limited,
It is suitable here to use BCl ₃ , Cl ₂ and O ₂ . The gas flow rate ratio of each is 65/10/5 (scc
m) and a pressure of 1.2 Pa is applied to the coil-type electrode 450
RF (13.56 MHz) power of W is supplied to generate plasma and etching is performed for 117 seconds. RF (13.56 MHz) power of 300 W is also applied to the substrate side (sample stage) to apply a substantially negative self-bias voltage. The Al film and the Ti film are etched under the first etching condition to make the end portions of the second conductive layer and the third conductive layer tapered.

After that, the second etching condition is changed to
CF for etching gas_FourAnd Cl₂And O ₂Use and
The gas flow rate ratio of these is 25/25/10 (sccm),
At a pressure of 1 Pa, RF (1
3.56MHz) Power is supplied to generate plasma and
Etching is performed for about 30 seconds. Board side (Sample stay
20W RF (13.56MHz) power is also applied to
Then, a substantially negative self-bias voltage is applied. CF_Four
And Cl₂Under the second etching condition in which
The Ti film and the W film are etched to the same degree. Na
Etching without leaving any residue on the gate insulating film
In order to achieve this, the etching time should be 10-20%.
Should be increased.

In this first etching process, the shape of the mask made of resist is adjusted to
The edges of the first conductive layer, the second conductive layer, and the third conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of this tapered portion is 15 to 45 °. Thus, the first shape conductive layers 1117 to 1122 (first conductive layer 1117a) including the first conductive layer, the second conductive layer, and the third conductive layer are formed by the first etching treatment.
˜1122a, second conductive layers 1117b to 1122b, and third conductive layers 1117c to 1122c) are formed. 1
Reference numeral 116 denotes a gate insulating film, which is the first shape conductive layer 11
A region which is not covered with 17 to 1122 is etched by about 20 to 50 nm to form a thinned region.

Next, a mask 1110 made of resist.
A second etching process is performed as shown in FIG. 2C without removing 1115. BCl ₃ and C as etching gas
L ₂ is used and the gas flow rate ratio of each is 20/60 (scc
m) and the pressure of 1.2 Pa is applied to the coil-type electrode 600
RF (13.56 MHz) power of W is applied to generate plasma and etching is performed. Substrate side (Sample stage)
RF (13.56 MHz) power of 100 W is input to the. The second conductive layer and the third conductive layer are etched under the third etching condition. In this manner, the aluminum film and the titanium film containing a slight amount of titanium are anisotropically etched under the third etching condition to conduct the second shape conductive layers 1124 to 1129 (first conductive layers 1124a to 1121).
9a, second conductive layers 1124b to 1129b, and third conductive layers 1124c to 1129c). Reference numeral 1123 is a gate insulating film, and the second shape conductive layers 1124 to 1124.
The region not covered with 129 is slightly etched to form a thinned region. 2B and FIG.
In (C), the lengths of the tapered portions of the first conductive layer are the same, but in reality, since there is a dependency on the wiring width, the length of the tapered portion of the first conductive layer depends on the wiring width. Changes.

In this embodiment, the first etching process (first etching condition, second etching condition)
The second etching treatment (third etching condition) may be continuously performed without being exposed to the atmosphere, and is not particularly limited, and the second etching treatment is taken out from the chamber after the etching, the reaction gas is exhausted, and then the chamber is returned to the chamber. You may arrange | position and it may etch sequentially under different conditions.

Then, remove the resist mask.
The first doping process without adding n-type to the semiconductor layer.
Impurity element to be added is added. Doping process is ionic
The doping method or the ion implantation method may be used. ion
The condition of the doping method is that the dose amount is 1.5 × 10¹⁴atoms / cm²
And the acceleration voltage is set to 60 to 100 keV. n type
Typically, phosphorus (P) or
Or arsenic (As) is used. In this case, the second shape conductivity
The layers 1124-1128 are opposed to the impurity element imparting n-type.
Of the first impurity region 11 in a self-aligning manner.
30-1134 are formed. First impurity region 113
1 x 10 for 0-1134¹⁶~ 1 x 10 ¹⁷/cm³Concentration range
An impurity element imparting n-type is added in the surrounding area.

Although the first doping process is performed without removing the resist mask in this embodiment, the first doping process may be performed after removing the resist mask.

Next, after removing the resist mask, resist masks 1135 and 1136 are formed as shown in FIG. 3A, and a second doping process is performed. A mask 1135 is a mask that protects a channel formation region of a semiconductor layer forming one of n-channel TFTs of a driver circuit and a peripheral region thereof, and a mask 1136 is a channel formation region of a semiconductor layer forming a TFT in a pixel portion. And a mask that protects the area around it. Also, FIG.
In (A), for convenience, the length of the tapered portion of the first conductive layer is shown to be the same, but in reality, the length of the tapered portion of the first conductive layer changes depending on the wiring width. Therefore, when a plurality of wirings having different wiring widths are provided on the same substrate, the widths of the doped regions also differ.

The condition of the ion doping method in the second doping process is that the dose amount is 1.5 × 10 ¹⁵ atoms / cm ² and the accelerating voltage is 60 to 100 keV, and phosphorus (P) is doped. Here, the second shape conductive layer 1124
1128 and the gate insulating film 1123 are used to form impurity regions in the respective semiconductor layers. Of course, mask 11
No phosphorus (P) is added to the regions covered with 35 and 1136. Thus, the second impurity regions 1180 to 118
2 and third impurity regions 1137 to 1141 are formed. 1 × 10 3 is formed in the third impurity regions 1137 to 1141.
An impurity element imparting n-type is added within a concentration range of ²⁰ to 1 × 10 ²¹ / cm ³ . The second impurity region is formed at a lower concentration than the third impurity region due to the difference in film thickness of the gate insulating film, and n-type is imparted in the concentration range of 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^3. An impurity element will be added.

Next, a mask 113 made of resist.
After removing 5 and 1136, new masks 1142 to 1144 made of resist are formed and a third doping process is performed as shown in FIG. By the third doping process, a fourth impurity element that imparts p-type conductivity is added to the semiconductor layer forming the p-channel TFT.
Impurity region 1147 and fifth impurity region 1145 of
1146 is formed. The fourth impurity region is formed in a region overlapping with the second shape conductive layer, and is 1 × 10 ¹⁸
The impurity element imparting p-type is added in a concentration range of 1 × 10 ²⁰ / cm ³ . In addition, the fifth impurity region 1
An impurity element imparting p-type conductivity is added to 145 and 1146 in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ . Although the fifth impurity region 1146 is a region to which phosphorus (P) has been added in the previous step, the concentration of the impurity element imparting p-type is 1.5 to 3 times that of the conductivity type. Is p-type.

Note that the fifth impurity regions 1148 and 114
The ninth and fourth impurity regions 1150 are formed in a semiconductor layer that forms a storage capacitor in the pixel portion.

Through the above steps, each semiconductor layer is n-doped.
An impurity region having a conductivity type of p-type or p-type is formed. The second shape conductive layers 1124 to 1127 serve as gate electrodes. Further, the second shape conductive layer 1128 serves as one electrode which forms a storage capacitor in the pixel portion. Further, the second shape conductive layer 1129 forms a source wiring in the pixel portion.

Further, as long as the conductive layers 1124 to 1127 and the impurity regions (first impurity region to fifth impurity region) can be formed, the above process order is not particularly limited, and each etching order and each doping order can be appropriately set. You may change it.

Next, an insulating film (not shown) is formed so as to cover almost the entire surface. In this embodiment, a silicon oxide film having a film thickness of 50 nm is formed by the plasma CVD method. Of course, this insulating film is not limited to the silicon oxide film, and another insulating film containing silicon may be used as a single layer or a laminated structure.

Then, a step of activating the impurity element added to each semiconductor layer is performed. This activation step is performed by a rapid thermal annealing method (RTA method) using a lamp light source, a method of irradiating the back surface with a YAG laser or an excimer laser, a heat treatment using a furnace, or a combination of these methods. By the method. However, in this embodiment, since the material containing aluminum as the main component is used as the second conductive layer, it is important to set the heat treatment conditions that the second conductive layer can withstand in the activation step.

Simultaneously with the above activation treatment, the nickel used as a catalyst during crystallization is gettered by the third impurity regions 1137, 1139, 1140 containing a high concentration of phosphorus and the fifth impurity regions 1146, 1149. The nickel concentration in the semiconductor layer, which mainly serves as the channel formation region, is reduced. As a result, a TFT having a channel formation region
The off-state current value is low, and the crystallinity is good, so that high field-effect mobility can be obtained and good characteristics can be achieved. Note that in this embodiment, the gettering is performed the first time by the method described in the above embodiment at the stage of forming the semiconductor layer, so the gettering by phosphorus here is the second gettering. If the first gettering is sufficient, especially 2
There is no need for a second gettering.

In this embodiment, an example in which the insulating film is formed before the activation is shown, but after the activation is performed,
It may be a step of forming an insulating film.

Next, the first interlayer insulating film 1151 made of a silicon oxynitride film or a silicon nitride film containing hydrogen.
And heat treatment (heat treatment at 300 to 550 ° C. for 1 to 12 hours) are performed to hydrogenate the semiconductor layer.
(FIG. 3C) This step is a step of terminating the dangling bond of the semiconductor layer by hydrogen contained in the first interlayer insulating film 1151. The semiconductor layer can be hydrogenated regardless of the presence of an insulating film (not shown) made of a silicon oxide film existing between the interlayer insulating film 1151 and the semiconductor layer. However, in this embodiment, since the material containing aluminum as the main component is used as the second conductive layer, it is important to set the heat treatment conditions that the second conductive layer can withstand in the hydrogenation step. Plasma hydrogenation (using hydrogen excited by plasma) may be performed as another means of hydrogenation.

Then, a second interlayer insulating film 1152 made of an organic insulating material is formed on the first interlayer insulating film 1151. In this embodiment, an acrylic resin film having a thickness of 1.6 μm is formed. Next, a contact hole reaching the source wiring 1129 and a contact hole reaching each impurity region are formed. In this embodiment, a plurality of etching processes are sequentially performed. In this embodiment, after etching the second interlayer insulating film using the first interlayer insulating film as an etching stopper, the first interlayer insulating film is etched using an insulating film (not shown) as an etching stopper, and then the insulating film (illustrated). do not do)
Was etched.

After that, wirings and pixel electrodes are formed by using Al, Ti, Mo, W and the like. As a material of these electrodes and pixel electrodes, it is desirable to use a material having excellent reflectivity such as a film containing Al or Ag as a main component, or a laminated film thereof. Thus, the source or drain wiring 11
53 to 1158, gate wiring 1160, connection wiring 115
9, the pixel electrode 1161 is formed.

As described above, the n-channel TFT 40
1, p-channel TFT 402, n-channel TFT 4
Driver circuit 406 having an n-channel TFT 4 and an n-channel TFT 4
The pixel portion 407 including 04 and the storage capacitor 405 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience.

N-channel TFT 40 of drive circuit 406
1 (second n-channel TFT) is a channel formation region 1
162, the second shape conductive layer 11 forming the gate electrode
The second impurity region 1163 partially overlaps with 24 and the third impurity region 1164 functioning as a source region or a drain region. In the p-channel TFT 402, a channel formation region 1165, a fourth impurity region 1166 which partially overlaps the second shape conductive layer 1125 which forms a gate electrode, and a fourth impurity region 1167 which functions as a source region or a drain region are provided. Have The n-channel TFT 403 (second n-channel TFT) includes a channel formation region 1168, a second impurity region 1169 which partially overlaps the second shape conductive layer 1126 which forms a gate electrode, and a source or drain region. It has a third impurity region 1170 which functions as. A shift register circuit, a buffer circuit, a level shifter circuit, a latch circuit, and the like can be formed using such an n-channel TFT and a p-channel TFT. In particular, in a buffer circuit having a high driving voltage, in order to prevent deterioration due to the hot carrier effect, the n-channel TFT 401 or 4
A structure of 03 is suitable.

In the pixel TFT 404 (first n-channel TFT) of the pixel portion 407, a channel formation region 1171,
A first impurity region 1172 formed outside a second shape conductive layer 1127 forming a gate electrode and a third impurity region 1 functioning as a source region or a drain region.
It has 173. In addition, a fourth impurity region 117 is formed in the semiconductor layer functioning as one electrode of the storage capacitor 405.
The sixth and fifth impurity regions 1177 are formed. The storage capacitor 405 uses the insulating film (the same film as the gate insulating film) as a dielectric to form the second shape electrode 1129 and the semiconductor layer 110.
6 and 6.

FIG. 29 shows the electric characteristics (IV characteristics) of the pixel TFT manufactured by carrying out this embodiment. In addition,
The data in FIG. 29 shows that the length of the first impurity region 1172 in the channel length direction is 2 μm and the thickness of the gate insulating film is 1
10 nm, channel formation region 1171 L / W = 4.5
It is a measurement result with a single gate of μm / 4 μm. In FIG. 29, the gettering is performed, so that the off-current value is reduced to 1 × 10 ⁻¹² (A) or less. Further, in other electric characteristics, heat treatment (or strong light) during gettering is performed. Excellent value is obtained by irradiation. On the other hand, in FIG. 30, as a comparative example, a pixel TFT having the same structure was prepared without performing gettering, and its electrical characteristics (IV characteristics) are shown. In FIG. 30, since the gettering is not performed, the off current value is higher than that in FIG. 29. When the gettering is not performed, the off current value is high and the off current value varies. On the other hand, if the gettering of the present invention is performed,
It is possible to obtain a TFT having a low off-current value and a small variation.

When the pixel electrode is formed of a transparent conductive film, a transmissive display device can be formed although the number of photomasks is increased by one.

[Embodiment 2] In Embodiment 1, an example in which the gate electrode structure has a three-layer structure is shown.
An example of a layered structure will be shown. Since this example is the same as example 1 except for the gate electrode, only different points will be described.

In this embodiment, the film thickness is 30 n in this embodiment.
m first TaN film and a film thickness of 370 nm
The second conductive film made of the W film is laminated and formed. The TaN film is formed by a sputtering method and is sputtered in an atmosphere containing nitrogen using a Ta target. The W film is formed by a sputtering method using a W target.

In this embodiment, as in the first embodiment, the ICP
By using the etching method and adjusting the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the temperature of the electrode on the substrate side, etc.), the film can be formed into a desired taper shape. It can be etched. As the etching gas, Cl ₂ , BC is used.
A chlorine-based gas typified by l ₃ , SiCl ₄ , CCl ₄ or the like, a fluorine-based gas typified by CF ₄ , SF ₆ , NF ₃ or the like, or O ₂ can be used as appropriate.

Similar to the first embodiment, the first etching process is performed under the first and second etching conditions. As the first etching condition, CF ₄ , Cl ₂ and O are used as etching gas.
₂ and, the gas flow rate ratio of each is 25/25/10
(Sccm) and the pressure of 1Pa is applied to the coil-type electrode 50
An RF (13.56 MHz) electric power of 0 W is applied to generate plasma for etching. 1 on the substrate side (sample stage)
RF (13.56 MHz) power of 50 W is applied and a substantially negative self-bias voltage is applied. The etching rate for W under the first etching condition is 200.39 nm / mi
Etching rate for n and TaN is 80.32 nm /
min, and the selectivity ratio of W to TaN is about 2.5. Further, the taper angle of W is about 26 ° under the first etching condition.

Thereafter, the second etching condition was changed without removing the resist mask, CF ₄ and Cl ₂ were used as etching gases, and the flow rate ratio of each gas was set to 30 /.
With 30 (sccm), 500 W RF (13.56 MHz) power is applied to the coil-shaped electrode at a pressure of 1 Pa to generate plasma and etching is performed for about 30 seconds. 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. CF ₄
Under the second etching condition where Cl and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent. The etching rate for W under the second etching condition is 58.97n.
The etching rate for m / min and TaN is 66.4.
It is 3 nm / min.

In the first etching process, the shape of the mask made of resist is adjusted to
The edges of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of the tapered portion may be 15 to 45 °.

Further, the second etching process is performed as in the first embodiment. Here, SF ₆ and C are used as etching gases.
L ₂ and O ₂ are used, and the gas flow rate ratio of each is 24/12.
At / 24 (sccm), 700 W RF (13.56 MHz) power was applied to the coil-shaped electrode at a pressure of 1.3 Pa to generate plasma, and etching was performed for 25 seconds. RF (13.56 MHz) power of 10 W is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The etching rate for W in the second etching process is 22
7.3 nm / min, the etching rate for TaN is 32.1 nm / min, the selection ratio of W to TaN is 7.1, and the etching rate for the silicon oxynitride film (SiON) that is the gate insulating film is 33. 7 nm
/ Min. The taper angle of W became 70 ° by this second etching treatment.

Compared to the first embodiment, the gate electrode formed in this embodiment has a high electrical resistance value because it is formed of a laminated film of a W film and a TaN film, but has high heat resistance, so that it is activated. It has the advantage that it is not affected by the treatment conditions of hydrogenation and hydrogenation.

[Embodiment 3] In this embodiment, a process of manufacturing an active matrix type liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described below. FIG. 5 is used for the explanation.

First, according to the first embodiment, after obtaining the active matrix substrate in the state of FIG. 4, an alignment film is formed on the active matrix substrate of FIG. 4 and rubbing treatment is performed. In this embodiment, before forming the alignment film, the organic resin film such as the acrylic resin film was patterned to form the columnar spacers for holding the substrate distance at desired positions. Further, spherical spacers may be dispersed over the entire surface of the substrate instead of the columnar spacers.

Next, a counter substrate is prepared. The counter substrate is provided with a color filter in which a colored layer and a light shielding layer are arranged corresponding to each pixel. Further, a light-shielding layer was also provided in the drive circuit portion. A flattening film was provided to cover the color filter and the light shielding layer. Next, a counter electrode made of a transparent conductive film was formed on the flattening film in the pixel portion, an alignment film was formed on the entire surface of the counter substrate, and a rubbing treatment was performed.

Then, the active matrix substrate on which the pixel portion and the driving circuit are formed and the counter substrate are bonded together with a sealant. A filler is mixed in the sealing material, and the two substrates are bonded to each other with a uniform interval by the filler and the columnar spacer. After that, a liquid crystal material is injected between both substrates and completely sealed with a sealant (not shown). A known liquid crystal material may be used as the liquid crystal material. Thus, the active matrix type liquid crystal display device is completed. Then, if necessary, the active matrix substrate or the counter substrate is cut into a desired shape. Further, a polarizing plate and the like are appropriately provided by using a known technique. Then, the FPC was attached using a known technique.

The structure of the liquid crystal module thus obtained will be described with reference to the top view of FIG.

A pixel portion 804 is arranged at the center of the active matrix substrate 801. A source signal line driver circuit 802 for driving a source signal line is arranged above the pixel portion 804. A gate signal line driver circuit 803 for driving a gate signal line is arranged on the left and right of the pixel portion 804. In the example shown in this embodiment,
Although the gate signal line driver circuit 803 is arranged symmetrically with respect to the pixel portion, it may be arranged on only one side and may be appropriately selected by the designer in consideration of the substrate size of the liquid crystal module and the like. However, considering the operational reliability of the circuit and the driving efficiency, the symmetrical arrangement shown in FIG. 5 is desirable.

A signal is input to each drive circuit by a flexible print circuit (Flexible Print Circuit: FPC) 8
It starts from 05. The FPC 805 opens a contact hole in the interlayer insulating film and the resin film so as to reach the wiring arranged up to a predetermined position on the substrate 801, and connects the connection electrode 8
After forming 09, it is pressure-bonded through an anisotropic conductive film or the like. In this embodiment, the connection electrode is made of ITO.

A sealant 807 is applied to the periphery of the driving circuit and the pixel portion along the outer periphery of the substrate, and a constant gap (distance between the substrate 801 and the counter substrate 806 is formed by a spacer 810 formed on the active matrix substrate in advance. ) Is maintained, the counter substrate 806 is attached. After that, a liquid crystal element is injected from a portion where the sealant 807 is not applied and is sealed with a sealant 808. The liquid crystal module is completed through the above steps.

Although an example in which all the driving circuits are formed on the substrate is shown here, several ICs may be used as a part of the driving circuits.

[Embodiment 4] In Embodiment 1, an example of a reflection type display device in which the pixel electrode is formed of a reflective metal material is shown, but in this embodiment, the pixel electrode is made of a conductive material having a light transmitting property. An example of a transmissive display device formed of a film is shown.

Example 1 up to the step of forming the interlayer insulating film
Since it is the same as, it is omitted here. After the interlayer insulating film is formed according to Example 1, the pixel electrode 601 made of a light-transmitting conductive film is formed. As the light-transmitting conductive film, ITO (indium oxide-tin oxide alloy), indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO), zinc oxide (ZnO), or the like may be used.

After that, a contact hole is formed in the interlayer insulating film 600. Next, the connection electrode 6 overlapping the pixel electrode
02 is formed. The connection electrode 602 is connected to the drain region through a contact hole. At the same time as the connection electrode, the source electrode or drain electrode of another TFT is also formed.

Although an example in which all the driving circuits are formed on the substrate is shown here, several ICs may be used as a part of the driving circuits.

The active matrix substrate is formed as described above. Using this active matrix substrate, a liquid crystal module was manufactured according to Example 3, provided with a backlight 604 and a light guide plate 605, and covered with a cover 606, an active matrix type as shown in a part of its sectional view in FIG. The liquid crystal display device is completed. The cover and the liquid crystal module are attached to each other with an adhesive or an organic resin. When the substrate and the counter substrate are attached to each other, they may be surrounded by a frame and filled with an organic resin between the frame and the substrate for adhesion. Since it is a transmissive type, the polarizing plate 603 is attached to both the active matrix substrate and the counter substrate.

[Embodiment 5] In this embodiment, EL (Electr
FIG. 7 shows an example of manufacturing a light emitting display device including an o Luminescence) element.

FIG. 7A is a top view showing the EL module, and FIG. 7B is a sectional view taken along the line AA ′ in FIG. 7A. A pixel portion 902, a source side driver circuit 901, and a gate side driver circuit 903 are formed over a substrate 900 having an insulating surface (eg, a glass substrate, a crystallized glass substrate, a plastic substrate, or the like). These pixel portion and drive circuit can be obtained according to the above-described embodiment.
Reference numeral 918 is a sealant, 919 is a protective film made of a DLC film, a silicon nitride film, a silicon oxynitride film, or the like.
The pixel portion and the driving circuit portion are covered with a sealant 918, and the sealant is covered with a protective film 919. Further, it is sealed with a cover material 920 using an adhesive material. The cover material 920 is formed on the substrate 9 to withstand deformation due to heat or external force.
It is desirable to use the same material as that of No. 00, for example, a glass substrate, and the recess shape (depth 3 to 10 μm) shown in FIG. 7 is processed by a sandblast method or the like. A recess (depth 50 to 200 μm) in which the desiccant 921 can be set by further processing
It is desirable to form m). In addition, EL
In the case of manufacturing a module, after the substrate and the cover material are attached to each other, it may be cut using a CO ₂ laser or the like so that the end faces are aligned.

Although not shown here, in order to prevent the background from being reflected by the reflection of the metal layer used (here, cathode or the like), a circular polarizing plate including a retardation plate (λ / 4 plate) and a polarizing plate is used. A so-called circular polarization means may be provided on the substrate 900.

Reference numeral 908 denotes a wiring for transmitting a signal input to the source side driving circuit 901 and the gate side driving circuit 903, and a video signal or a clock signal from an FPC (flexible printed circuit) 909 which is an external input terminal. To receive. In addition, the light emitting device of this embodiment is
Digital drive may be used, analog drive may be used, and the video signal may be a digital signal or an analog signal. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to this FPC. The light emitting device in this specification includes not only the light emitting device main body but also F
It also includes the state where a PC or PWB is attached. In addition, a complicated integrated circuit (memory, CPU, controller, D
A / A converter, etc.) can be formed, but it is difficult to manufacture with a small number of masks. Therefore, the memory,
I equipped with CPU, controller, D / A converter, etc.
C chip is a COG (chip on glass) type or TAB (ta
It is preferable to mount by a pe automated bonding) method or a wire bonding method.

Next, the sectional structure will be described with reference to FIG. An insulating film 910 is provided on the substrate 900,
A pixel portion 902 and a gate side driver circuit 903 are formed above the insulating film 910, and the pixel portion 902 is formed by a plurality of pixels including a current control TFT 911 and a pixel electrode 912 electrically connected to its drain. To be done. Also,
The gate side driver circuit 903 is formed using a CMOS circuit in which an n-channel TFT 913 and a p-channel TFT 914 are combined.

These TFTs (911, 913, 914)
Can be produced according to the above-mentioned embodiment.

The pixel electrode 912 functions as the anode of the EL element. In addition, a bank 915 is provided at both ends of the pixel electrode 912.
And the EL layer 916 and the cathode 917 of the EL element are formed on the pixel electrode 912.

As the EL layer 916, an EL layer (a layer for emitting light and moving carriers therefor) may be formed by freely combining a light emitting layer, a charge transporting layer, or a charge injecting layer. For example, a low molecular weight organic EL material, a medium molecular weight organic EL material, or a high molecular weight organic EL material may be used. In addition, the EL layer emits light by singlet excitation (fluorescence)
A thin film made of a light emitting material (singlet compound) that emits light or a thin film made of a light emitting material (triplet compound) that emits light (phosphorescence) by triplet excitation can be used. Further, it is also possible to use an inorganic material such as silicon carbide for the charge transport layer and the charge injection layer. These organic EL
Known materials can be used as the material and the inorganic material.

The cathode 917 also functions as a wiring common to all pixels, and is electrically connected to the FPC 909 via the connection wiring 908. Further, all elements included in the pixel portion 902 and the gate side driver circuit 903 are covered with the cathode 917, the sealant 918, and the protective film 919.

As the sealing material 918, it is preferable to use a material that is as transparent or semitransparent to visible light as possible. Further, it is desirable that the sealing material 918 be a material that does not allow moisture and oxygen to pass therethrough as much as possible.

After the light emitting element is completely covered with the sealant 918, at least DLC as shown in FIG. 7 is obtained.
It is preferable to provide a protective film 919 formed of a film or the like on the surface (exposed surface) of the sealing material 918. Further, a protective film may be provided on the entire surface including the back surface of the substrate. Here, it is necessary to take care so that the protective film is not formed on the portion where the external input terminal (FPC) is provided. The protective film may be prevented from being formed using a mask, or the protective film may be prevented from being formed by covering the external input terminal portion with a masking tape or the like used in the CVD apparatus.

The EL element having the above structure is used as the sealing material 9.
By enclosing the EL element with the protective film 18 and the protective film, the EL element can be completely shielded from the outside, and a substance such as moisture or oxygen that promotes deterioration due to oxidation of the EL layer can be prevented from entering from the outside. Therefore, a highly reliable light emitting device can be obtained.

Further, the pixel electrode may be used as a cathode and the EL layer and the anode may be laminated to emit light in the direction opposite to that shown in FIG. FIG. 8 shows an example thereof. Since the top view is the same, it is omitted.

The sectional structure shown in FIG. 8 will be described below. As the substrate 1000, a semiconductor substrate or a metal substrate can be used as well as a glass substrate or a quartz substrate. An insulating film 1010 is provided over a substrate 1000, and a pixel portion 1002 and a gate side driver circuit 1003 are formed above the insulating film 1010. The pixel portion 1002 includes a current control TFT 1011 which is an n-channel TFT and its drain. Is formed by a plurality of pixels including a pixel electrode 1012 electrically connected to the. The gate side driver circuit 1003 is formed using a CMOS circuit in which an n-channel TFT 1013 and a p-channel TFT 1014 are combined.

The pixel electrode 1012 functions as the cathode of the EL element. In addition, the bank 1 is provided at both ends of the pixel electrode 1012.
015 is formed, and the EL layer 10 is formed on the pixel electrode 1012.
16 and the anode 1017 of the EL element are formed.

The anode 1017 also functions as a wiring common to all pixels, and the FPC 1009 is connected via the connection wiring 1008.
Electrically connected to. Further, all elements included in the pixel portion 1002 and the gate side driver circuit 1003 are covered with an anode 1017, a sealant 1018, and a protective film 1019 made of DLC or the like. Also, the cover material 1021
And the substrate 1000 were bonded together with an adhesive. In addition, a recess is provided in the cover material and a desiccant 1021 is placed therein.

As the sealant 1018, it is preferable to use a material which is as transparent or semitransparent to visible light as possible. Further, it is desirable that the sealing material 1018 be a material that does not allow moisture and oxygen to permeate as much as possible.

In FIG. 8, the pixel electrode is used as a cathode and E
Since the L layer and the anode are laminated, the light emitting direction is the direction of the arrow shown in FIG.

A pixel electrode made of a metal having a high work function is used as an anode, and an organic compound layer and a thin metal film (metal having a low work function such as Li, M
g, Cs, etc.) and a cathode formed by stacking a transparent conductive film may be laminated to emit light in a direction opposite to that of FIG. 7. When the pixel electrode is used as an anode, a current control TFT
Is preferably a p-channel TFT.

Note that this embodiment can be combined with Embodiment 1 or the embodiment mode.

[Embodiment 6] Various modules (active matrix type liquid crystal module, active matrix type EL) are formed in the driving circuit and the pixel portion formed by implementing the present invention.
Module, active matrix type EC module)
Can be completed. That is, by implementing the present invention, all electronic devices incorporating them are completed.

Examples of such electronic devices are video cameras, digital cameras, head mounted displays (goggles type displays), car navigations, projectors, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones, electronic books, etc.). ) And the like. Examples of those are shown in FIGS.
Shown in 1.

FIG. 9A shows a personal computer, which has a main body 2001, an image input section 2002, and a display section 200.
3, keyboard 2004 and the like.

FIG. 9B shows a video camera, which is a main body 2
101, display unit 2102, voice input unit 2103, operation switch 2104, battery 2105, image receiving unit 2106
Including etc.

FIG. 9C shows a mobile computer (mobile computer), which includes a main body 2201 and a camera section 2.
202, an image receiving unit 2203, operation switches 2204, a display unit 2205 and the like.

FIG. 9D shows a goggle type display, which includes a main body 2301, a display portion 2302 and an arm portion 2303.
Including etc.

FIG. 9E shows a player that uses a recording medium (hereinafter, referred to as a recording medium) in which a program is recorded, and has a main body 2401, a display section 2402, and a speaker section 240.
3, a recording medium 2404, operation switches 2405 and the like. This player uses a DVD (D
optical Versatile Disc), CD
It is possible to play music, watch movies, play games, and use the internet.

FIG. 9F shows a digital camera which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, operation switches 2504, an image receiving portion (not shown) and the like.

FIG. 10A shows a front type projector including a projection device 2601, a screen 2602 and the like. The fourth embodiment can be applied to the liquid crystal module 2808 forming a part of the projection device 2601 to complete the entire device.

FIG. 10B shows a rear type projector, which includes a main body 2701, a projection device 2702, and a mirror 270.
3, screen 2704 and the like. The fourth embodiment can be applied to the liquid crystal module 2808 forming a part of the projection device 2702 to complete the entire device.

Note that FIG. 10C is a diagram showing an example of the structure of the projection devices 2601 and 2702 in FIGS. 10A and 10B. Projection device 2601, 27
02 is a light source optical system 2801, mirrors 2802, 280
4 to 2806, dichroic mirror 2803, prism 2807, liquid crystal module 2808, retardation plate 280.
9, a projection optical system 2810. Projection optical system 28
Reference numeral 10 is composed of an optical system including a projection lens. Although the present embodiment shows an example of a three-plate type, it is not particularly limited and may be, for example, a single-plate type. Further, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, an IR film, etc. in the optical path indicated by the arrow in FIG. Good.

Further, FIG. 10D is a diagram showing an example of the structure of the light source optical system 2801 in FIG. 10C. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, a lens array 2813, and a lens array 2813.
814, a polarization conversion element 2815, and a condenser lens 2816. The light source optical system shown in FIG. 10D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, and an IR film in the light source optical system.

However, the projector shown in FIG. 10 shows a case where a transmissive electro-optical device is used, and an application example of a reflective electro-optical device and an EL module is not shown.

FIG. 11A shows a mobile phone, which has a main body 29.
01, voice output unit 2902, voice input unit 2903, display unit 2904, operation switch 2905, antenna 290
6. Image input unit (CCD, image sensor, etc.) 2907
Including etc.

FIG. 11B shows a portable book (electronic book) including a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, an antenna 3006.
Including etc.

FIG. 11C shows a display, which includes a main body 3101, a support base 3102, a display portion 3103 and the like.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to the manufacturing methods of electronic devices in all fields. In addition, the electronic device of the present embodiment is
It can be realized by using any combination of the five.

[Embodiment 7] In this embodiment, an experiment was conducted in the following procedure to obtain the relationship between the concentration of the rare gas element in the amorphous silicon film formed by the sputtering method and the film forming pressure.

An amorphous silicon film containing a rare gas element was formed over a glass substrate with a sputtering apparatus using an RF power source.
Use a silicon target and set the gas (Ar) flow rate to 50
(Sccm), the film forming power was 3 kW, the substrate temperature was 150 ° C., and the film forming pressure was changed for each thickness of 0.2 μm. The film forming pressure is adjusted by the conductance valve on the exhaust side. The deposition pressure on the glass substrate is 0.2P each
a, 0.4Pa, 0.6Pa, 0.8Pa, 1.0P
a and 1.2 Pa, a film having a thickness of 0.2 μm was sequentially formed under each condition, and the atomic concentration of Ar in the formed film was measured by secondary ion mass spectrometry (SIMS). The obtained results are shown in FIG. In FIG. 12, the vertical axis represents the atomic concentration of Ar and the horizontal axis represents the depth from the sample surface. in addition,
FIG. 12 also shows the ionic strength of silicon, where the vertical axis represents the secondary ion intensity and the horizontal axis represents the depth from the sample surface.

From FIG. 12, it is understood that the lower the film forming pressure, the higher the atomic concentration of Ar in the film, and the film suitable as a gettering site can be formed. The reason why the lower the film forming pressure is, the higher the atomic concentration of Ar in the film is that the lower the film forming pressure for sputtering is Ar gas and recoil atoms (Ar atoms reflected on the target surface). ), The probability of collision with
This is because recoil atoms are more likely to enter the substrate.

Therefore, the gettering site (amorphous silicon film containing argon) in the above embodiment may be formed by appropriately setting the film forming pressure with reference to FIG.

According to the experimental results of the present inventors, the film forming pressure was 0.3 Pa under the condition that the atomic concentration of Ar in the film was high and the distribution in the substrate was the best.

[Embodiment 8] In this embodiment, using the sample obtained in Embodiment 7 and FIG. 12, the internal stress of the film is measured, and the atoms of the rare gas element in the film formed by the sputtering method are measured. The relationship between the concentration and the internal stress of the film is shown in FIG.

From FIG. 12, the average atomic concentration of Ar in the film at the film forming pressure of 0.2 Pa was calculated, and the internal stress in the film was measured and plotted. Hereinafter, similarly, the film forming pressure is 0.4 Pa,
The average atomic concentration of Ar in the film at 0.8 Pa and 1.2 Pa was calculated, and the internal stress in the film was measured and plotted. The graph thus obtained is shown in FIG.

FIG. 13 shows that the higher the atomic concentration of Ar in the film, the higher the compressive stress.

Therefore, in the above embodiment, FIG.
To set the atomic concentration of Ar within the range where film peeling does not occur due to the subsequent heat treatment, and adjust the internal stress of the amorphous silicon film containing a rare gas element and the internal stress of the film laminated on the film. Is desirable.

[Embodiment 9] In this embodiment, an experiment was conducted in the following procedure to obtain the relationship between the gettering site, that is, the film thickness of the second semiconductor film and the nickel / silicon concentration ratio on the surface.

The sample was formed by stacking a base insulating film (film thickness: 150 nm) made of a silicon oxynitride film and an amorphous silicon film on a glass substrate without exposing them to the atmosphere, and crystallizing them by using nickel. A semiconductor film having a structure is used. Here, after applying a nickel acetate salt solution containing nickel of 10 ppm by weight on a spinner on a 50 nm-thick amorphous silicon film, a heat treatment (500 ° C., 1 hour) for dehydrogenation is performed in a furnace. Done, 5 more
Heat treatment was performed at 50 ° C. for 4 hours to obtain a silicon film having a crystal structure. At this stage, TXRF (Total Refrection
The nickel concentration and the silicon concentration on the surface were measured by X-Ray Fluorescence (total reflection X-ray fluorescence spectroscopy), and the ratio of the nickel concentration to the silicon concentration (nickel / silicon concentration ratio) was calculated to be 1.5 × 10 ⁻⁴ ~ 2 x 10
It became ^-4 .

Then, irradiation with laser light (XeCl) was performed to increase the crystallization rate and repair defects left in the crystal grains. A thin oxide film was formed on the silicon film having a crystalline structure by the irradiation of this laser beam. Further, at this stage, the nickel / silicon concentration ratio was calculated by TXRF to be 2 × 10 ⁻³ to 8 × 10 ⁻³ . It is considered that this is because the scattering effect due to the surface condition of the ridge formed by the irradiation of the laser beam is increased and nickel is segregated near the surface.

Next, in addition to the oxide film formed by laser light irradiation, the surface was treated with ozone water for 120 seconds to form a barrier layer made of an oxide film with a total thickness of 1 to 5 nm. Next, a silicon film containing a rare gas element which becomes a gettering site is formed over the barrier layer by a sputtering method. Here, the flow rate of Ar is 50 (sccm), the film formation pressure is 0.2 Pa,
With a power of 3 kW and a substrate temperature of 150 ° C., the film thickness is 5 nm to 150 n in order to investigate the film thickness dependence of the gettering site
The conditions were changed at m, and light was irradiated for 3 minutes at 650 ° C. in a multi-tasking lamp annealing apparatus using 21 tungsten halogen lamps in total, respectively, and gettering was performed. This lamp annealing device can monitor the temperature from the bottom of the substrate using a pyrometer,
The value displayed on the pyrometer is the heating temperature in the lamp annealing device in this specification. In addition,
The atomic concentration of the argon element contained in the gettering site under the above conditions is 3 × 10 ²⁰ / cm ^{3 to} 6 × 10 ²⁰ / c.
m ³ , the atomic concentration of oxygen is 1 × 10 ¹⁹ / cm ^{3 to} 3 × 10 ¹⁹
/ Cm ³ .

After performing gettering under each of the above irradiation conditions, the gettering site and the barrier layer are removed to remove TXR.
The nickel / silicon concentration ratio was calculated from F, and the relationship between the calculated value and the film thickness of the gettering site is shown in FIG.

As shown in FIG. 14, the thicker the gettering site is, the lower the nickel / silicon concentration ratio is, and the gettering effect is increased.

Therefore, the film thickness of the gettering site in the above embodiment may be set appropriately with reference to FIG.

Further, FIG. 14 shows that when the film thickness of the gettering site is less than 50 nm, there is a large variation in the formed film, and there is a portion where the nickel concentration is higher than the silicon concentration on the surface. ing. Therefore, for a silicon film having a crystal structure with a film thickness of 50 nm,
The thickness of the gettering site (amorphous silicon film containing a rare gas element) is preferably at least 50 nm or more.

FIG. 15 shows a photograph of the surface state of the gettering site before removing the gettering site observed by an optical microscope. Note that FIG. 15A shows a surface state in which the gettering site has a film thickness of 20 nm, and FIG. 15B shows the gettering site having a film thickness of 50 n.
FIG. 15C shows the surface state in which the thickness of the gettering site is 150 nm. As shown in FIG. 15, it was observed that crystal nuclei were generated on the surface of the gettering site by light irradiation (650 ° C., 3 minutes) performed during gettering.
Since the crystal nucleus tends to grow larger as the film thickness becomes thinner, increasing the film thickness of the gettering site not only increases the volume of the gettering site but also does not crystallize it. It is considered that the increase in the volume of the gettering site contributes to the increase in the gettering effect.

The thickness of the gettering site is set to 150.
and the light irradiation conditions for gettering were 650 ° C., 3 minutes, 650 ° C., 5 minutes, 700 ° C., and 3 minutes, respectively, and the surfaces of the gettering sites were compared. However, there was a tendency that the crystal nuclei grew larger as the treatment time was longer and the temperature was higher.

[Embodiment 10] In this embodiment, an experiment was conducted in the following procedure to examine the crystallinity of a silicon film having a crystal structure before and after gettering.

The sample used is one in which a base insulating film, a silicon film having a crystalline structure, a barrier layer made of an oxide film, and a gettering site are sequentially formed on a glass substrate by the same procedure as in Example 9. After forming the gettering site, heat treatment is performed at 500 ° C. for 40 seconds using a lamp annealing device, and then 600 times using a lamp annealing device.
Gettering was performed by heat treatment at 3 ° C. for 3 minutes and heat treatment at 700 ° C. for 3 minutes. Then, the gettering site and the barrier layer were removed, and the Raman optical characteristics of the silicon film having the crystal structure in each heat treatment were measured. The Raman shift thus obtained is shown in FIG. 16, and the Raman half-width at half maximum is shown in FIG. In addition, the data plotted at the position of 0 ° C. in FIG.
Only the heat treatment at 00 ° C. for 40 seconds was performed. Figure 1
6 and FIG. 17, the Raman shift becomes higher as the temperature at which the gettering is performed using the lamp annealing apparatus becomes higher, and the crystallinity of the silicon film having the crystal structure is improved at the same time as the gettering. Can be read.

Therefore, it is considered that the gettering in the above embodiment improves the crystallinity of the silicon film having the crystal structure at the same time as the gettering.

[Embodiment 11] In this embodiment, an experiment was conducted in the following procedure to obtain an optimum temperature when a lamp annealing apparatus was used as a heat treatment for gettering.

The sample has a film thickness of 50 provided on the quartz substrate.
After coating a nickel acetate salt solution containing 10 ppm of nickel by weight on a spin-on amorphous silicon film with a spinner, a total of 21 tungsten halogen lamps are used in a multitasking lamp annealing apparatus at 700 ° C., 11
A silicon film having a crystal structure obtained by performing irradiation with light for 0 seconds is used. Next, laser light (XeC) is used to increase the crystallization rate and repair defects left in the crystal grains.
The irradiation of 1) was performed. Next, in addition to the oxide film formed by laser light irradiation, the surface was treated with ozone water for 120 seconds to form a barrier layer composed of an oxide film having a total thickness of 1 to 5 nm. Next, a silicon film containing a rare gas element which becomes a gettering site is formed over the barrier layer by a sputtering method. Here, the gettering site is an amorphous silicon film containing argon and having a film thickness of 150 nm obtained by a sputtering method at a film forming pressure of 0.3 Pa. The atomic concentration of the argon element contained in the gettering site under the above conditions is 3 × 10 ²⁰ / cm ^{3 to} 6 × 10 ²⁰ / cm ³ , and the atomic concentration of oxygen is 1 × 10 ¹⁹ / cm ^{3 to} 3 ×. It is 10 ¹⁹ / cm ³ . After that, using a lamp annealing device,
After heat treatment for 40 seconds, further 500-750 ℃,
Heat treatment was performed for 3 minutes and gettering was performed.

The effect of gettering at each temperature is that the number of etch pits formed by treating the surface of the silicon film having a crystalline structure with FPM after removing the gettering site and the barrier layer is observed with an optical microscope. Comparison was made with the etch pit densities obtained by counting. FIG. 18 shows the experimental result of the etch pit density.

Most of the added nickel remains as nickel silicide in the silicon film having a crystal structure, but this can be etched by FPM (a mixed solution of hydrofluoric acid, hydrogen peroxide solution and pure water). Are known.
Therefore, the gettering effect can be confirmed by processing the gettered region (here, a silicon film having a crystal structure) by FPM and checking the presence or absence of etch pits. In this case, the smaller the number of etch pits, the higher the gettering effect.

From FIG. 18, it can be read that the temperature range in which the gettering effect is the highest is 650 ° C. to 700 ° C. Note that there was almost no change in the shape of the substrate of the sample that was gettered at 700 ° C. or lower.
The sample made at 50 ° C. showed a large change in the shape of the substrate.

Therefore, when the lamp annealing apparatus is used for gettering in the above-mentioned embodiment, the processing temperature is
It may be set appropriately using FIG.

[Embodiment 12] In this embodiment, an experiment was conducted in the following procedure to examine changes in concentration distribution of nickel element and argon element during gettering.

For the sample, after forming a base insulating film (film thickness 150 nm) made of a silicon oxynitride film on a glass substrate, a silicon film having a crystal structure (film thickness 50 nm) was formed by the same procedure as in Example 11. After obtaining a barrier layer (film thickness 1 to 5 nm) made of an oxide film, a gettering site was obtained by a sputtering method at a film forming pressure of 0.3 Pa and a film thickness of 150.
An amorphous silicon film having a thickness of nm and containing argon is used. The atomic concentration of the argon element contained in the gettering site under the above conditions is 3 × 10 ²⁰ / cm 3.
^{3 to} 6 × 10 ²⁰ / cm ³ , the atomic concentration of oxygen is 1 × 10 ¹⁹ /
cm ³ is ~3 × 10 ¹⁹ / cm ^3.

After forming the gettering site, the light irradiation conditions are set to 550 ° C. for 3 minutes, 650 ° C. for 3 minutes, and 750 ° C. by using a lamp annealing apparatus.
Gettering is performed for 3 minutes at ℃, and then S
The atomic concentration of nickel and the atomic concentration of argon were measured by IMS analysis.

FIG. 19 shows the nickel atom concentration distribution after the treatment at 550 ° C. for 3 minutes, and FIG. 20 shows the argon atom concentration. It can be seen from FIG. 19 that a part of nickel contained in the silicon film having the crystal structure is diffused to the gettering site, that is, gettering is performed. However, as can be seen from FIG. 19, the gettering is insufficient by the treatment at 550 ° C. for 3 minutes, and the nickel atom concentration in the silicon film having the crystal structure is 1 × 10 ¹⁷ / cm ³ to 1 × 10 ¹⁸ / cm ^3. Exists in.

FIG. 21 shows the nickel atom concentration distribution after the treatment at 650 ° C. for 3 minutes, and FIG. 22 shows the argon atom concentration. According to FIG. 21, the diffused nickel has a concentration range of 1 × 10 ¹⁸ / cm ³ to the gettering site.
The lower limit of detection was 5 × 10 ^{16 for} nickel contained in the silicon film having a crystal structure, which was contained at 3 × 10 ¹⁸ / cm ^3.
/ Up to cm ^3, is reduced, 650 ° C., it can be read sufficiently gettering is performed in the 3 minutes of treatment.

FIG. 23 shows the nickel atom concentration distribution after the treatment at 750 ° C. for 3 minutes, and FIG. 24 shows the argon atom concentration. From FIG. 23, it can be read that the gettering was sufficiently performed as at 650 ° C. Also,
It can be seen from FIG. 24 that the atomic concentration of argon contained in the gettering site is reduced as compared with FIGS. 20 and 22. It is considered that this is because the argon contained in the gettering site was released outside the film by the treatment at 750 ° C. for 3 minutes.

Therefore, from the results of FIGS. 19 to 24, it was confirmed that the nickel in the silicon film having a crystalline structure actually moved to the gettering site by the gettering in the above embodiment.

[Embodiment 13] In this embodiment, when an amorphous silicon film containing argon serving as a gettering site is formed by a sputtering method, a barrier layer is formed by an oxide film formed by laser light and an oxide film formed by ozone water. When formed, an experiment for confirming that argon was not added to the silicon film having a crystal structure was performed by the procedure shown below.

The sample was prepared by forming a base insulating film (film thickness 150 nm) made of a silicon oxynitride film on a quartz substrate,
A silicon film having a crystal structure is obtained by the same procedure as in Example 11. Then, a laser beam (Xe) for increasing the crystallization rate and repairing defects left in the crystal grains is used.
Cl) was irradiated. Next, in addition to the oxide film formed by laser light irradiation, the surface was treated with ozone water for 120 seconds to form a barrier layer composed of an oxide film having a total thickness of 1 to 5 nm. Then, the film formation pressure is 0.3 Pa by the sputtering method.
Then, an amorphous silicon film containing argon (thickness: 50 nm) was formed. Then, when the amorphous silicon film containing argon is removed, the barrier layer, that is, the argon /
TXR of silicon concentration ratio and nickel / silicon concentration ratio
It was measured by F, and further treated with dilute hydrofluoric acid (diluted by 1/100) for 30 seconds, 1 minute, 2 minutes, and 4 minutes, and measured by TXRF each time. Figure 2 shows the results of these measurements.
5 shows. It was confirmed that the oxide film was removed at the stage of treatment with diluted hydrofluoric acid for 1 minute. From FIG. 25, it can be seen that a large amount of argon is added to the surface of the oxide film.
On the other hand, argon was not detected in the silicon film having a crystal structure. That is, it was confirmed that the barrier layer prevented the addition of argon to the silicon film having the crystal structure during the film formation by the sputtering method.

The nickel / silicon concentration ratio shown in FIG. 25 has a substantially constant value (1.4 × 10 ^{−3 to} 3 × 10 3).
^-3 ). Since these samples are not subjected to gettering, it can be read that high concentration nickel is contained in the silicon film having a crystal structure.

For comparison, instead of the barrier layer, an oxide film formed by laser light was removed, and the surface was treated with ozone water for 120 seconds to prepare a sample having a barrier layer formed. When the argon / silicon concentration ratio was measured by TXRF, argon was detected in the silicon film having a slight crystal structure.

From the above experimental results, it is found that argon is added to the silicon film having a crystalline structure by forming the barrier layer in the above embodiment with the oxide film by laser light and the oxide film treated with ozone water. Can be prevented and is considered to be optimal.

[Embodiment 14] In this embodiment, gettering is performed with and without irradiation with laser light before forming gettering sites, and an experiment for comparing the two is performed by the procedure shown below. It was

As the sample, a sample obtained by forming a base insulating film (thickness: 150 nm) made of a silicon oxynitride film on a quartz substrate and then obtaining a silicon film having a crystal structure is used in the same procedure as in the thirteenth embodiment. . Then, a laser beam (Xe) for increasing the crystallization rate and repairing defects left in the crystal grains is used.
Cl) -irradiated samples and laser-irradiated samples were prepared. Then, the surface of each sample was treated with ozone water for 120 seconds to form a barrier layer made of an oxide film. Next, an amorphous silicon film containing argon (film thickness: 50 nm) was formed at a film forming pressure of 0.3 Pa in both samples by a sputtering method. After forming an amorphous silicon film containing argon to be a gettering site, light irradiation conditions are set to 650 ° C. for 3 minutes, 650 ° C. for 5 minutes, and 750 ° C. for 750 ° C., respectively. Gettering was performed for 3 minutes, 750 ° C., and 5 minutes, and the nickel / silicon concentration ratio on the gettering site surface was measured by TXRF. The measured experimental results are shown in FIG. It can be seen from FIG. 26 that the sample with laser has a nickel / silicon concentration ratio that is about one digit higher than that of the sample without laser, and more nickel in the silicon film having a crystalline structure moves to the gettering site. .

Subsequently, after removing the gettering site and the barrier layer, the nickel / silicon concentration ratio on the surface of the silicon film having a crystal structure was measured by TXRF. The measured experimental results are shown in FIG. Also in FIG. 27, it can be seen that the sample with laser has a nickel / silicon concentration ratio lower than that of the sample without laser by about one digit or more, and much nickel in the silicon film having a crystalline structure has moved to the gettering site. . Further, the temperature of 700 ° C., which is performed by using the lamp annealing apparatus, is higher, and the nickel / silicon concentration ratio on the surface of the silicon film having the crystal structure is reduced. In addition, the nickel / silicon concentration ratio on the surface of the silicon film having the crystal structure is reduced when the treatment time performed using the lamp annealing device is long for 5 minutes.

From these experimental results, it is considered that the irradiation with laser light is more suitable because the gettering effect is increased.

For comparison, a sample not irradiated with laser light was irradiated with laser light after removing the gettering site, and the nickel / silicon concentration ratio on the surface of the silicon film having a crystal structure was measured by TXRF. The results are shown in FIG. 27. When the laser light was irradiated after gettering, the nickel / silicon concentration ratio was further increased by about one digit as compared with the sample before the laser light irradiation.

From these experimental results, it is considered that irradiating the laser beam before gettering is optimal because the gettering effect is increased.

Therefore, the gettering in the above embodiment is performed by irradiating laser light (XeCl) to form an oxide film, further forming an oxide film treated with ozone water, and then forming a gettering site. It is considered that the order of steps for performing gettering is optimal.

[0227]

As described above, the gettering of the present invention, in which the semiconductor film containing a rare gas element is laminated and then heated, has an extremely excellent effect of gettering the metal element remaining in the semiconductor film having a crystalline structure. high. this is,
Not only can it contribute to high purification of a semiconductor film having a crystal structure which is formed using a metal element having a catalytic action, but it can also contribute to improvement of productivity of a semiconductor device using a semiconductor film having a crystal structure. it can.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment.

FIG. 2 is a diagram showing a manufacturing process of an active matrix substrate.

FIG. 3 is a diagram showing a manufacturing process of an active matrix substrate.

FIG. 4 is a diagram showing a manufacturing process of an active matrix substrate.

FIG. 5 is a top view showing an appearance of a liquid crystal module.

FIG. 6 is a diagram showing an example of a cross-sectional view of a liquid crystal display device.

FIG. 7 is a diagram showing a top surface and a cross section of an EL module.

FIG. 8 is a diagram showing a cross section of an EL module.

FIG. 9 is a diagram illustrating an example of an electronic device.

FIG. 10 illustrates an example of an electronic device.

FIG. 11 is a diagram illustrating an example of an electronic device.

FIG. 12 is a concentration profile showing the relationship between the sputtering film formation pressure and the Ar concentration.

FIG. 13: Internal stress and A at gettering site
It is a graph which shows the relationship of r concentration.

FIG. 14 is a graph showing film thickness dependence of gettering sites.

FIG. 15 is a photograph showing a surface state after gettering.

FIG. 16 is a graph showing a difference in Raman shift depending on the presence or absence of gettering.

FIG. 17 is a graph showing the difference in full width at half maximum with and without gettering.

FIG. 18 is a graph showing the relationship between gettering temperature and etch pit density.

FIG. 19 is a nickel concentration profile after gettering (550 ° C., 3 minutes).

FIG. 20 is an argon concentration / oxygen concentration profile after gettering (550 ° C., 3 minutes).

FIG. 21 is a nickel concentration profile after gettering (650 ° C., 3 minutes).

FIG. 22 is an argon concentration / oxygen concentration profile after gettering (650 ° C., 3 minutes).

FIG. 23 is a nickel concentration profile after gettering (750 ° C., 3 minutes).

FIG. 24 is an argon concentration / oxygen concentration profile after gettering (750 ° C., 3 minutes).

FIG. 25 is a graph showing changes in Ar concentration and Ni concentration depending on the etching time of an oxide film.

FIG. 26 is a graph showing a surface concentration ratio at a gettering site after gettering.

FIG. 27 is a graph showing a surface concentration ratio in a silicon film having a crystal structure after gettering.

FIG. 28 is SIMS data (RF indicating the Ar concentration in a silicon film formed by a sputtering method (RF method)).
Power dependence).

29 is an electrical characteristic (IV characteristic) of a pixel TFT manufactured according to Example 1. FIG.

FIG. 30. Pixel TF fabricated without gettering
Electrical characteristics of T (comparative example)

Front page continuation (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/786 H01L 29/78 627G (72) Inventor Toru Mitsugi 398 Hase, Atsugi, Kanagawa Prefecture Semiconductor Conductor Energy Research Co., Ltd. In-house (72) Toru Takayama 398 Hase, Atsugi-shi, Kanagawa Semiconductor Energy Research Institute Co., Ltd. (72) Inventor Kengo Akimoto 398, Hase, Atsugi-shi, Kanagawa Semi-conductor Energy Research Institute F-term (reference) 2H092 GA11 GA12 GA31 GA60 JA00 JA05 JA24 JA28 MA07 MA27 MA29 NA21 NA22 NA24 NA29 5F052 AA02 AA17 AA24 BB07 CA10 DA02 DA03 DB02 DB03 DB07 EA15 EA16 FA06 FA19 JA01 5F110 AA01 AA27 EE02EE02 EE02EE04EE14EE14EE14EE14EE14EE14EE15EE17EE02 GG01 GG02 GG13 GG32 GG43 GG45 GG47 HJ01 HJ13 HJ23 HM15 NN03 NN22 NN24 NN27 NN73 PP02 PP03 PP31 PP34 PP35 PP38 QQ21 QQ25 QQ28

Claims (17)

[Claims] 1. A first step of forming a first semiconductor film having an amorphous structure on an insulating film, and a second step of adding a metal element to the first semiconductor film having the amorphous structure. A third step of crystallizing the first semiconductor film to form a first semiconductor film having a crystal structure, and a fourth step of forming a barrier layer on the surface of the first semiconductor film having the crystal structure A fifth step of forming a second semiconductor film containing a rare gas element on the barrier layer, and a first semiconductor film having a crystalline structure by gettering the metal element to the second semiconductor film. A method of manufacturing a semiconductor device, comprising: a sixth step of removing or reducing the metal element therein, and a seventh step of removing the second semiconductor film. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film is a silicon nitride film. 3. The method for manufacturing a semiconductor device according to claim 1, wherein an oxygen concentration contained in the second semiconductor film is higher than an oxygen concentration contained in the first semiconductor film. . 4. The oxygen concentration contained in the first semiconductor film according to claim 1, wherein the oxygen concentration in the first semiconductor film is 5 × 10 ¹⁸ /
A method for manufacturing a semiconductor device, which has a density of ³ cm ³ or less. 5. The oxygen concentration contained in the second semiconductor film according to claim 1, wherein the oxygen concentration in the second semiconductor film is 5 × 10 ¹⁸ /
A method for manufacturing a semiconductor device, which is characterized by being higher than cm ³ . 6. The semiconductor device according to claim 1, wherein the second semiconductor film is formed by a sputtering method using a semiconductor as a target in an atmosphere containing a rare gas element. Manufacturing method. 7. The second semiconductor film according to claim 1, wherein the second semiconductor film is formed by a sputtering method targeting a semiconductor containing phosphorus or boron in an atmosphere containing a rare gas element. And a method for manufacturing a semiconductor device. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the sixth step is heat treatment. 9. The method for manufacturing a semiconductor device according to claim 1, wherein the sixth step is a process of irradiating the semiconductor film with strong light. 10. The method according to claim 1, wherein
8. The sixth step is a step of performing heat treatment and irradiating the semiconductor film with intense light.
13. The method for manufacturing a semiconductor device according to any one of items 1 to 12. 11. The strong light according to claim 9 or 10, wherein the strong light is light emitted from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A method for manufacturing a characteristic semiconductor device. 12. The method according to claim 1, wherein the fourth step of forming the barrier layer is a step of oxidizing the surface of the semiconductor film having the crystal structure with a solution containing ozone. A method for manufacturing a characteristic semiconductor device. 13. The method according to claim 1, wherein the fourth step of forming the barrier layer is a step of oxidizing the surface of the semiconductor film having the crystal structure by irradiation of ultraviolet rays. And a method for manufacturing a semiconductor device. 14. The fourth step of forming the barrier layer according to claim 1, wherein the surface of the semiconductor film having the crystal structure is oxidized by irradiation with laser light, and then ozone is further added. A method for manufacturing a semiconductor device, comprising the step of oxidizing the surface of the semiconductor film having the crystal structure with a solution containing the semiconductor film. 15. The metal element according to claim 1, wherein the metal element is Fe, Ni, Co, Ru, Rh, or P.
A method for manufacturing a semiconductor device, which is one or more selected from d, Os, Ir, Pt, Cu, and Au. 16. The method for manufacturing a semiconductor device according to claim 1, wherein the rare gas element is one or more selected from He, Ne, Ar, Kr, and Xe. . 17. The method for manufacturing a semiconductor device according to claim 1, wherein the internal stress of the second semiconductor film is a compressive stress.