JP5071035B2 - Piezoelectric device - Google Patents

Piezoelectric device Download PDF

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JP5071035B2
JP5071035B2 JP2007272165A JP2007272165A JP5071035B2 JP 5071035 B2 JP5071035 B2 JP 5071035B2 JP 2007272165 A JP2007272165 A JP 2007272165A JP 2007272165 A JP2007272165 A JP 2007272165A JP 5071035 B2 JP5071035 B2 JP 5071035B2
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electronic component
wiring
resin substrate
substrate
chip
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JP2009100398A (en
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裕吾 小山
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

<P>PROBLEM TO BE SOLVED: To provide a piezoelectric device in which an insulating film is formed on wirings of a substrate and electronic components are mounted on the insulating film, and in which air bubbles are not left between the insulating film and the electronic components, and which ensures stable adhesiveness of the electronic components. <P>SOLUTION: A crystal oscillator has a resin substrate 30 with wirings 31, an IC chip 20 arranged in an IC arrangement region 39 of the resin substrate 30, a crystal vibrator located over the IC chip 20, and a plurality of connection members connecting an external terminal of the crystal vibrator and the resin substrate 30 with a predetermined space between the resin substrate 20 and the crystal vibrator. In the IC arrangement region 39 of the resin substrate 30 of the crystal oscillator, a plurality of linear conductors 36 elongated by branching from a part of the wirings 31 are arranged so as to fill a gap between the wirings 31 in the IC arrangement region 39 without contacting with each other. Further, an insulating film 38 is formed so as to coat at least the wirings 31 and the linear conductor 36 existing in the IC arrangement region 39. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

本発明は、圧電振動子と電子部品を備えた圧電デバイスに関する。   The present invention relates to a piezoelectric device including a piezoelectric vibrator and an electronic component.

従来から、水晶発振器などを代表とする圧電デバイスが様々な電子機器に用いられている。圧電デバイスは水晶振動子などの圧電振動子とＩＣチップなどの電子部品から構成されている。近年、電子機器の小型化が広範囲に進み、それに用いられる圧電デバイスも小型・薄型化の要求がなされている。
例えば、小型化された圧電デバイスとして、特許文献１に示すように、積層基板に電子部品を実装して樹脂でモールドし、その上方に圧電振動子を搭載する構造の圧電デバイスが知られている。この圧電デバイスの積層基板は、小型化によって各配線が近接するため、積層した複数の基板の間に配線を設けてショートの防止をしている。 Conventionally, piezoelectric devices such as crystal oscillators have been used in various electronic devices. A piezoelectric device is composed of a piezoelectric vibrator such as a crystal vibrator and an electronic component such as an IC chip. In recent years, downsizing of electronic equipment has progressed in a wide range, and piezoelectric devices used therefor have been required to be downsized and thinned.
For example, as a miniaturized piezoelectric device, as shown in Patent Document 1, there is known a piezoelectric device having a structure in which an electronic component is mounted on a laminated substrate, molded with resin, and a piezoelectric vibrator is mounted thereon. . In the laminated substrate of this piezoelectric device, since the wirings are close to each other due to the miniaturization, wiring is provided between the plurality of laminated substrates to prevent a short circuit.

特開２００３−３４７８４６号公報JP 2003-347846 A

積層基板における基板の１枚辺りの厚みは５０〜６０μｍ程度であり、上記の圧電デバイスのように複数の基板を用いることで、基板厚みが厚くなり、圧電デバイスの薄型化において不利である。
そこで、圧電デバイスの小型・薄型化を図る構造として、１層の基板で構成した圧電デバイスとして、図９に示す構造の圧電デバイスを考えた。図９（ａ）は圧電デバイスの構成を説明する模式断面図であり、図９（ｂ）は、この圧電デバイスに用いられている基板を示す概略平面図である。 The thickness of one substrate in the multilayer substrate is about 50 to 60 μm, and using a plurality of substrates like the above-described piezoelectric device increases the substrate thickness, which is disadvantageous in reducing the thickness of the piezoelectric device.
Therefore, as a structure for reducing the size and thickness of the piezoelectric device, a piezoelectric device having the structure shown in FIG. 9 was considered as a piezoelectric device composed of a single layer substrate. FIG. 9A is a schematic cross-sectional view for explaining the configuration of the piezoelectric device, and FIG. 9B is a schematic plan view showing a substrate used in the piezoelectric device.

図９（ａ）に示すように、圧電デバイスとしての水晶発振器１０１は、セラミックパッケージ１１１内部に水晶振動片１１２が収容された水晶振動子１１０、ＩＣチップ１２０、樹脂基板１３０、樹脂基板１３０とその上方に位置する水晶振動子１１０とを接続する接続部材１４０を備えている。
樹脂基板１３０には配線１３１が形成され、この配線１３１の上にはレジストなどの絶縁膜１３８が形成されている。絶縁膜１３８の上にはＩＣチップ１２０がフィルム状の接合材１４１にて固着され、金属ワイヤ１２２によって樹脂基板１３０に接続されている。
また、樹脂基板１３０には接続部材配置用電極１３５が形成され、この接続部材配置用電極１３５と水晶振動子１１０の外部端子１１５とが接続部材１４０を介して接続されている。そして、水晶振動子１１０と樹脂基板１３０の間をモールド樹脂１４２にてモールドされている。 As shown in FIG. 9A, a crystal oscillator 101 as a piezoelectric device includes a crystal resonator 110 in which a crystal resonator element 112 is housed in a ceramic package 111, an IC chip 120, a resin substrate 130, a resin substrate 130, and A connection member 140 for connecting the crystal resonator 110 located above is provided.
A wiring 131 is formed on the resin substrate 130, and an insulating film 138 such as a resist is formed on the wiring 131. An IC chip 120 is fixed on the insulating film 138 with a film-like bonding material 141 and connected to the resin substrate 130 with a metal wire 122.
Further, a connection member arrangement electrode 135 is formed on the resin substrate 130, and the connection member arrangement electrode 135 and the external terminal 115 of the crystal unit 110 are connected via the connection member 140. The space between the crystal unit 110 and the resin substrate 130 is molded with a mold resin 142.

このように構成した水晶発振器１０１では、例えば図９（ｂ）に示すような樹脂基板１３０の配線パターンが採用されている。なお、図９（ｂ）では基板表面を覆う絶縁膜１３８を除去した状態の平面図を示している。
樹脂基板１３０には、配線１３１、ワイヤボンディング用電極１３２、接続部材配置用電極１３５、シールド電極１３６が配設されている。そして、ワイヤボンディング用電極１３２、接続部材配置用電極１３５を除き、配線１３１、シールド電極１３６を覆うようにして絶縁膜（図示せず）が形成されている。この絶縁膜は薄いため、その表面は配線１３１やシールド電極１３６を形成した面に倣った凹凸状態となっている。
樹脂基板１３０の中央部にはＩＣチップ１２０が配置されるＩＣ配置領域１３９が備えられている。このＩＣ配置領域１３９では配線１３１の隙間を埋めるように広い面積を有してシールド電極１３６が形成されている。 In the crystal oscillator 101 configured as described above, for example, a wiring pattern of the resin substrate 130 as shown in FIG. 9B is employed. FIG. 9B is a plan view showing a state where the insulating film 138 covering the substrate surface is removed.
On the resin substrate 130, wiring 131, wire bonding electrodes 132, connection member arrangement electrodes 135, and shield electrodes 136 are arranged. An insulating film (not shown) is formed so as to cover the wiring 131 and the shield electrode 136 except for the wire bonding electrode 132 and the connection member arrangement electrode 135. Since this insulating film is thin, the surface thereof is in an uneven state following the surface on which the wiring 131 and the shield electrode 136 are formed.
An IC placement area 139 in which the IC chip 120 is placed is provided at the center of the resin substrate 130. In this IC arrangement region 139, a shield electrode 136 is formed having a large area so as to fill a gap between the wirings 131.

そして、上記の樹脂基板１３０の絶縁膜１３８の上にＩＣチップ１２０がフィルム状の接合材１４１を用いて固着される。
このとき、シールド電極１３６が形成された上方の絶縁膜とＩＣチップ１２０の間に気泡（ボイド）が入り易い。これは、シールド電極１３６の上の絶縁膜１３８とＩＣチップ１２０の配置面とが、広い面積で面と面を受けるためである。
このような気泡が残った場合、樹脂基板１３０とＩＣチップ１２０の密着性を低下させる。また、製造工程において、この気泡が加わる熱により膨張することによる電子部品のはがれ、破損などの不具合が生ずる。さらに、製品では温度の変化に対応して気泡が膨張または収縮することで、圧電デバイスの特性を変化させ信頼性低下の原因となる。 Then, the IC chip 120 is fixed on the insulating film 138 of the resin substrate 130 using a film-like bonding material 141.
At this time, bubbles (voids) easily enter between the upper insulating film on which the shield electrode 136 is formed and the IC chip 120. This is because the insulating film 138 on the shield electrode 136 and the arrangement surface of the IC chip 120 receive the surface and the surface with a wide area.
When such bubbles remain, the adhesion between the resin substrate 130 and the IC chip 120 is lowered. Further, in the manufacturing process, problems such as peeling and breakage of electronic parts due to expansion by the heat applied by the bubbles occur. Further, in the product, bubbles expand or contract in response to a change in temperature, thereby changing the characteristics of the piezoelectric device and causing a decrease in reliability.

本発明は上記課題の少なくとも一部を解決するためになされたものであり、以下の形態または適用例として実現することが可能である。   SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

［適用例１］本適用例にかかる圧電デバイスは、配線を備え、一方の面に電子部品配置領域が設けられた基板と、前記基板の前記電子部品配置領域に配置された電子部品と、前記電子部品の上方に位置し、圧電振動片と、前記圧電振動片を内部に収容し外部端子を備えるパッケージと、を備えた圧電振動子と、前記基板と前記圧電振動子との間に配置され、前記圧電振動子の前記外部端子と前記基板とを接続する複数の接続部材と、を有する圧電デバイスであって、前記基板の前記電子部品配置領域において、複数の線状導体が、前記電子部品配置領域内の前記配線間の隙間を埋めるようにお互いに接触せずに配置されていることを特徴とする。   Application Example 1 A piezoelectric device according to this application example includes a substrate provided with wiring and provided with an electronic component placement region on one surface, an electronic component placed in the electronic component placement region of the substrate, Located above the electronic component, disposed between the substrate and the piezoelectric vibrator, a piezoelectric vibrator comprising a piezoelectric vibrator piece, a package containing the piezoelectric vibrator piece inside and having an external terminal. A piezoelectric device having a plurality of connecting members for connecting the external terminals of the piezoelectric vibrator and the substrate, wherein a plurality of linear conductors are arranged in the electronic component placement region of the substrate. It arrange | positions without mutually contacting so that the clearance gap between the said wirings in an arrangement | positioning area | region may be filled.

この構成によれば、基板の電子部品が配置される電子部品配置領域において、複数の線状導体が、電子部品配置領域内の配線間の隙間を埋めるようにお互いに接触せずに配置されている。この電子部品配置領域内の表面は、広い面積の平坦部がなく細かな凹凸を有した表面状態となる。このことから、基板の電子部品配置領域内に電子部品が固定される際に、固着面の表面積が増え、基板と電子部品の安定した密着性を得ることができる。
また、基板の電子部品配置領域内の表面が細かな凹凸状態であることから、基板と電子部品との間に気泡が残ることがなくなり、製造工程において、気泡の存在に起因する電子部品のはがれ、破損などの不具合が生ずることがなくなる。さらに、製品では気泡に起因する圧電デバイスの特性変化がなくなり、信頼性を向上させることができる。 According to this configuration, in the electronic component placement region where the electronic components on the board are placed, the plurality of linear conductors are placed without contacting each other so as to fill the gaps between the wirings in the electronic component placement region. Yes. The surface in the electronic component placement region is in a surface state having no flat portions with a large area and fine irregularities. Therefore, when the electronic component is fixed in the electronic component placement region of the substrate, the surface area of the fixing surface is increased, and stable adhesion between the substrate and the electronic component can be obtained.
In addition, since the surface in the electronic component placement region of the substrate is in a fine uneven state, bubbles do not remain between the substrate and the electronic components, and the electronic components are peeled off due to the presence of bubbles in the manufacturing process. This eliminates problems such as damage. Furthermore, in the product, the characteristic change of the piezoelectric device due to bubbles is eliminated, and the reliability can be improved.

［適用例２］上記適用例にかかる圧電デバイスにおいて、少なくとも前記電子部品配置領域に存在する前記配線および前記線状導体を被覆するように絶縁膜が形成されていることが望ましい。   Application Example 2 In the piezoelectric device according to the application example, it is preferable that an insulating film is formed so as to cover at least the wiring and the linear conductor existing in the electronic component placement region.

この構成によれば、基板上の電子部品配置領域内の細かな凹凸を有した表面を、絶縁膜で被覆することにより、絶縁膜の表面が細かな凹凸状態となる。よって、絶縁膜と電子部品との間に気泡が残ることがなくなり、製造工程において、気泡の存在に起因する電子部品のはがれ、破損などの不具合が生ずることがなくなる。さらに、製品では気泡に起因する圧電デバイスの特性変化がなくなり、信頼性を向上させることができる。さらに、電子部品の搭載による基板上の配線間のショートを防止できる。   According to this configuration, the surface of the insulating film is covered with the insulating film in the electronic component placement region on the substrate, so that the surface of the insulating film is in a fine uneven state. Therefore, bubbles do not remain between the insulating film and the electronic component, and problems such as peeling and breakage of the electronic component due to the presence of the bubbles do not occur in the manufacturing process. Furthermore, in the product, the characteristic change of the piezoelectric device due to bubbles is eliminated, and the reliability can be improved. Furthermore, it is possible to prevent a short circuit between wirings on the substrate due to the mounting of electronic components.

［適用例３］上記適用例にかかる圧電デバイスにおいて、前記複数の線状導体は、前記配線の一部から分岐されて延長されていることを特徴とする圧電デバイス。   Application Example 3 In the piezoelectric device according to the application example, the plurality of linear conductors are branched and extended from a part of the wiring.

この構成によれば、配線の一部を所定の電位とするだけで複数の線状導体全てを同じ電位に固定することができる。   According to this configuration, all of the plurality of linear conductors can be fixed at the same potential by simply setting a part of the wiring to a predetermined potential.

［適用例４］上記適用例にかかる圧電デバイスにおいて、前記線状導体と接続された前記配線が、前記電子部品および前記基板のグランド電極に接続されていることが望ましい。   Application Example 4 In the piezoelectric device according to the application example, it is preferable that the wiring connected to the linear conductor is connected to the electronic component and a ground electrode of the substrate.

この構成によれば、配線の一部から分岐されて電子部品配置領域内に延長された複数の線状導体が、シールド電極として機能する。このことから、電子部品から放射される電磁波ノイズや、圧電デバイスの外部から加わる電磁波ノイズによる圧電デバイスの特性に与える影響を無くすことができる。   According to this configuration, the plurality of linear conductors branched from a part of the wiring and extended into the electronic component arrangement region function as shield electrodes. From this, it is possible to eliminate the influence of the electromagnetic wave noise radiated from the electronic component and the electromagnetic wave noise applied from the outside of the piezoelectric device on the characteristics of the piezoelectric device.

［適用例５］上記適用例にかかる圧電デバイスは、前記基板の前記電子部品配置領域において、少なくとも前記電子部品の配置面の対角に位置する２つの角部と平面視で重なる、前記配線の一部より延長された平面部を有することが望ましい。   Application Example 5 In the piezoelectric device according to the application example, in the electronic component placement region of the substrate, at least two corner portions positioned at the diagonal of the placement surface of the electronic component overlap in plan view. It is desirable to have a flat portion that extends from a portion.

この構成によれば、配線の一部より延長された平面部の上の平坦な絶縁膜表面にて電子部品の角部を受けることができるため、電子部品を基板に固定する際に、電子部品の傾きを抑制することができ、基板とほぼ平行に電子部品を固定することができる。   According to this configuration, since the corner portion of the electronic component can be received on the flat insulating film surface on the flat portion extended from a part of the wiring, when the electronic component is fixed to the substrate, the electronic component The electronic component can be fixed substantially parallel to the substrate.

［適用例６］本適用例にかかる圧電デバイスにおいて、配線を備え、一方の面に電子部品配置領域と圧電振動子配置領域とが設けられた基板と、前記基板の前記電子部品配置領域に配置された電子部品と、圧電振動片と、前記圧電振動片を内部に収容し外部端子を備えるパッケージと、を備え前記圧電振動子配置領域に配置された圧電振動子と、を有する圧電デバイスであって、前記基板の前記電子部品配置領域において、複数の線状導体が、前記電子部品配置領域内の前記配線間の隙間を埋めるようにお互いに接触せずに配置されていることを特徴とする。   Application Example 6 In the piezoelectric device according to this application example, a substrate provided with wiring and provided with an electronic component placement region and a piezoelectric vibrator placement region on one surface, and placed in the electronic component placement region of the substrate And a piezoelectric vibrator disposed in the piezoelectric vibrator placement region. The piezoelectric device comprises: an electronic component, a piezoelectric vibrator piece; and a package containing the piezoelectric vibrator piece therein and having an external terminal. In the electronic component placement region of the substrate, a plurality of linear conductors are disposed without contacting each other so as to fill a gap between the wirings in the electronic component placement region. .

この構成によれば、基板の電子部品が配置される電子部品配置領域において、複数の線状導体が、電子部品配置領域内の配線間の隙間を埋めるようにお互いに接触せずに配置されている。この電子部品配置領域内の表面は、広い面積の平坦部がなく細かな凹凸を有した表面状態となる。このことから、基板の電子部品配置領域内に電子部品が固定される際に、固着面の表面積が増え、基板と電子部品の安定した密着性を得ることができる。
また、基板の電子部品配置領域内の表面が細かな凹凸状態であることから、基板と電子部品との間に気泡が残ることがなくなり、製造工程において、気泡の存在に起因する電子部品のはがれ、破損などの不具合が生ずることがなくなる。さらに、製品では気泡に起因する圧電デバイスの特性変化がなくなり、信頼性を向上させることができる。 According to this configuration, in the electronic component placement region where the electronic components on the board are placed, the plurality of linear conductors are placed without contacting each other so as to fill the gaps between the wirings in the electronic component placement region. Yes. The surface in the electronic component placement region is in a surface state having no flat portions with a large area and fine irregularities. Therefore, when the electronic component is fixed in the electronic component placement region of the substrate, the surface area of the fixing surface is increased, and stable adhesion between the substrate and the electronic component can be obtained.
In addition, since the surface in the electronic component placement region of the substrate is in a fine uneven state, bubbles do not remain between the substrate and the electronic components, and the electronic components are peeled off due to the presence of bubbles in the manufacturing process. This eliminates problems such as damage. Furthermore, in the product, the characteristic change of the piezoelectric device due to bubbles is eliminated, and the reliability can be improved.

［適用例７］上記適用例にかかる圧電デバイスにおいて、少なくとも前記電子部品配置領域に存在する前記配線および前記線状導体を被覆するように絶縁膜が形成されていることが望ましい。   Application Example 7 In the piezoelectric device according to the application example described above, it is preferable that an insulating film is formed so as to cover at least the wiring and the linear conductor existing in the electronic component placement region.

この構成によれば、基板上の電子部品配置領域内の細かな凹凸を有した表面を、絶縁膜で被覆することにより、絶縁膜の表面が細かな凹凸状態となる。よって、絶縁膜と電子部品との間に気泡が残ることがなくなり、製造工程において、気泡の存在に起因する電子部品のはがれ、破損などの不具合が生ずることがなくなる。さらに、製品では気泡に起因する圧電デバイスの特性変化がなくなり、信頼性を向上させることができる。さらに、電子部品の搭載による基板上の配線間のショートを防止できる。   According to this configuration, the surface of the insulating film is covered with the insulating film in the electronic component placement region on the substrate, so that the surface of the insulating film is in a fine uneven state. Therefore, bubbles do not remain between the insulating film and the electronic component, and problems such as peeling and breakage of the electronic component due to the presence of the bubbles do not occur in the manufacturing process. Furthermore, in the product, the characteristic change of the piezoelectric device due to bubbles is eliminated, and the reliability can be improved. Furthermore, it is possible to prevent a short circuit between wirings on the substrate due to the mounting of electronic components.

［適用例８］上記適用例にかかる圧電デバイスにおいて、前記複数の線状導体は、前記配線の一部から分岐されて延長されていることが望ましい。   Application Example 8 In the piezoelectric device according to the application example, it is preferable that the plurality of linear conductors are branched and extended from a part of the wiring.

この構成によれば、配線の一部を所定の電位とするだけで複数の線状導体全てを同じ電位に固定することができる。   According to this configuration, all of the plurality of linear conductors can be fixed at the same potential by simply setting a part of the wiring to a predetermined potential.

［適用例９］上記適用例にかかる圧電デバイスにおいて、前記線状導体と接続された前記配線が、前記電子部品および前記基板のグランド電極に接続されていることが望ましい。   Application Example 9 In the piezoelectric device according to the application example described above, it is preferable that the wiring connected to the linear conductor is connected to the electronic component and a ground electrode of the substrate.

この構成によれば、配線の一部から分岐されて電子部品配置領域内に延長された複数の線状導体が、シールド電極として機能する。このことから、電子部品から放射される電磁波ノイズや、圧電デバイスの外部から加わる電磁波ノイズによる圧電デバイスの特性に与える影響を無くすことができる。   According to this configuration, the plurality of linear conductors branched from a part of the wiring and extended into the electronic component arrangement region function as shield electrodes. From this, it is possible to eliminate the influence of the electromagnetic wave noise radiated from the electronic component and the electromagnetic wave noise applied from the outside of the piezoelectric device on the characteristics of the piezoelectric device.

［適用例１０］上記適用例にかかる圧電デバイスにおいて、前記基板の前記電子部品配置領域において、少なくとも前記電子部品の配置面の対角に位置する２つの角部と平面視で重なる、前記配線の一部より延長された平面部を有することが望ましい。   Application Example 10 In the piezoelectric device according to the application example described above, in the electronic component placement region of the substrate, at least two corner portions positioned at the diagonal of the placement surface of the electronic component overlap in plan view. It is desirable to have a flat portion that extends from a portion.

この構成によれば、配線の一部より延長された平面部の上の平坦な絶縁膜表面にて電子部品の角部を受けることができるため、電子部品を基板に固定する際に、電子部品の傾きを抑制することができ、基板とほぼ平行に電子部品を固定することができる。   According to this configuration, since the corner portion of the electronic component can be received on the flat insulating film surface on the flat portion extended from a part of the wiring, when the electronic component is fixed to the substrate, the electronic component The electronic component can be fixed substantially parallel to the substrate.

以下、本発明を具体化した実施形態について図面に従って説明する。以下の実施形態では、圧電デバイスとして代表的な水晶発振器を例にとり説明する。
（第１の実施形態） DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. In the following embodiments, a typical crystal oscillator will be described as an example of a piezoelectric device.
(First embodiment)

図１は本実施形態の水晶発振器の構成を示す説明図であり、図１（ａ）は概略平面図、図１（ｂ）は同図（ａ）のＡ−Ａ断線に沿う概略断面図、図１（ｃ）は同図（ａ）のＢ−Ｂ断線に沿う概略断面図である。   1A and 1B are explanatory views showing the configuration of the crystal oscillator of the present embodiment, FIG. 1A is a schematic plan view, and FIG. 1B is a schematic cross-sectional view taken along the line AA in FIG. FIG.1 (c) is a schematic sectional drawing in alignment with the BB disconnection of the figure (a).

水晶発振器１は、水晶振動子１０、ＩＣチップ２０、樹脂基板３０、接続部材４０、モールド樹脂４２とを備えている。この水晶発振器１は樹脂基板３０にＩＣチップ２０が固着され、その上方に水晶振動子１０が接続部材４０を介して樹脂基板３０に接続され、さらに水晶振動子１０と樹脂基板３０との間にモールド樹脂４２が充填された構造となっている。
水晶振動子１０は、セラミックパッケージ１１に水晶振動片１２が収容され、蓋体１３によりセラミックパッケージ１１内を気密に封止されている。水晶振動片１２にはＡＴカットの水晶片が用いられ、図示しないがその対向する面に励振電極が形成されている。水晶振動片１２はセラミックパッケージ１１内の接続端子１４と導電性接着剤１６を介して固着され、水晶振動片１２の励振電極とセラミックパッケージ１１の外面に形成された外部端子１５とが導通する構造となっている。 The crystal oscillator 1 includes a crystal resonator 10, an IC chip 20, a resin substrate 30, a connection member 40, and a mold resin 42. In this crystal oscillator 1, an IC chip 20 is fixed to a resin substrate 30, and a crystal resonator 10 is connected to the resin substrate 30 via a connecting member 40 above the crystal chip 10, and further between the crystal resonator 10 and the resin substrate 30. The mold resin 42 is filled.
In the crystal resonator 10, a crystal vibrating piece 12 is accommodated in a ceramic package 11, and the inside of the ceramic package 11 is hermetically sealed by a lid 13. As the crystal vibrating piece 12, an AT-cut crystal piece is used, and an excitation electrode is formed on the facing surface although not shown. The crystal vibrating piece 12 is fixed to the connection terminal 14 in the ceramic package 11 via the conductive adhesive 16 so that the excitation electrode of the crystal vibrating piece 12 and the external terminal 15 formed on the outer surface of the ceramic package 11 are electrically connected. It has become.

樹脂基板３０は、ガラスエポキシまたはポリイミドなどの平板に１０〜２０μｍ程度の銅箔を接着した基板が用いられ、銅箔をエッチングして所望の配線３１のパターンが形成されている。そして、樹脂基板３０の一方の面には、接続に用いられる端子を除き、配線３１のパターン表面にレジストなどで形成された絶縁膜３８が形成されている。
ＩＣチップ２０は、水晶振動子１０を励振させる発振回路、温度補償回路などを含んで構成されている。ＩＣチップ２０は、樹脂基板３０の絶縁膜３８の上にダイアタッチフィルム（ＤＡＦ）接着剤などの接合材４１を用いて固着されている。そして、ＩＣチップ２０のパッド２１と樹脂基板３０のワイヤボンディング用電極３２とが、Ａｕ線などの金属ワイヤ２２で接続されている。このワイヤボンディングでは、ファーストのボンディングを樹脂基板３０側とし、セカンドのボンディングをＩＣチップ２０側として、金属ワイヤ２２のループ高さを低くできるように構成している。 As the resin substrate 30, a substrate in which a copper foil of about 10 to 20 μm is bonded to a flat plate such as glass epoxy or polyimide is used, and a desired wiring 31 pattern is formed by etching the copper foil. On one surface of the resin substrate 30, an insulating film 38 made of resist or the like is formed on the pattern surface of the wiring 31 except for terminals used for connection.
The IC chip 20 includes an oscillation circuit that excites the crystal unit 10, a temperature compensation circuit, and the like. The IC chip 20 is fixed on the insulating film 38 of the resin substrate 30 by using a bonding material 41 such as a die attach film (DAF) adhesive. The pad 21 of the IC chip 20 and the wire bonding electrode 32 of the resin substrate 30 are connected by a metal wire 22 such as an Au wire. In this wire bonding, the first bonding is on the resin substrate 30 side and the second bonding is on the IC chip 20 side, so that the loop height of the metal wire 22 can be lowered.

接続部材４０は銅などの金属ボールをコアとし、その表面に半田層を形成している。この接続部材４０の半田層を溶融させて、樹脂基板３０の四隅に形成された接続部材配置用電極３５と水晶振動子１０の外部端子１５とが、接続部材４０を介して接続される。また、この接続部材４０は金属ボールをコアとすることで、水晶振動子１０と樹脂基板３０との間隔を一定に保つことができ、この間の寸法（厚み）を確実に管理することができる。
モールド樹脂４２は、エポキシ樹脂などが用いられ、水晶振動子１０と樹脂基板３０との間、および水晶振動子１０の側面にかけて樹脂モールドされている。なお、モールド樹脂４２は水晶振動子１０と樹脂基板３０との間のみに充填されていても良い。 The connecting member 40 has a metal ball such as copper as a core, and a solder layer is formed on the surface thereof. By melting the solder layer of the connection member 40, the connection member arrangement electrodes 35 formed at the four corners of the resin substrate 30 and the external terminals 15 of the crystal unit 10 are connected via the connection member 40. Further, since the connecting member 40 has a metal ball as a core, the distance between the crystal unit 10 and the resin substrate 30 can be kept constant, and the dimension (thickness) between them can be managed reliably.
The mold resin 42 is made of an epoxy resin or the like, and is resin-molded between the crystal resonator 10 and the resin substrate 30 and the side surface of the crystal resonator 10. The mold resin 42 may be filled only between the crystal resonator 10 and the resin substrate 30.

次に樹脂基板の構成について詳細に説明する。
図２は本実施形態の樹脂基板の構成を示す概略平面図である。図３は樹脂基板とＩＣチップの取り付け状態を説明する説明図であり、図３（ａ）は概略平面図、図３（ｂ）は同図（ａ）のＣ−Ｃ断線に沿う概略断面図である。なお、図２、図３の平面図において、樹脂基板の表面を覆う絶縁膜は除去して示してある。 Next, the configuration of the resin substrate will be described in detail.
FIG. 2 is a schematic plan view showing the configuration of the resin substrate of this embodiment. 3A and 3B are explanatory views for explaining a mounting state of the resin substrate and the IC chip. FIG. 3A is a schematic plan view, and FIG. 3B is a schematic cross-sectional view taken along the line CC in FIG. It is. In the plan views of FIGS. 2 and 3, the insulating film covering the surface of the resin substrate is removed.

図２に示すように、樹脂基板３０は１層の基板からなり、その一方の面には、配線３１、ワイヤボンディング用電極３２、導通部３４、接続部材配置用電極３５が配設され、配線パターンが形成されている。また、樹脂基板３０の他方の面には複数の外部端子３３が設けられている。
ワイヤボンディング用電極３２は配線３１を介して導通部３４に接続されている。この導通部３４は樹脂基板３０をビアホールにて貫通して設けられており、樹脂基板３０の他方の面に設けられた外部端子３３と直接に接続されている。
接続部材配置用電極３５は、樹脂基板３０上に水晶振動子１０を搭載するための接続部材４０が配置される電極である。本実施形態では４箇所の接続部材配置用電極３５を設け、そのうちの２箇所においてワイヤボンディング用電極３２と接続されている。 As shown in FIG. 2, the resin substrate 30 is composed of a single-layer substrate, and on one surface thereof, a wiring 31, a wire bonding electrode 32, a conduction portion 34, and a connection member arranging electrode 35 are arranged. A pattern is formed. A plurality of external terminals 33 are provided on the other surface of the resin substrate 30.
The wire bonding electrode 32 is connected to the conduction portion 34 via the wiring 31. The conductive portion 34 is provided through the resin substrate 30 through a via hole, and is directly connected to the external terminal 33 provided on the other surface of the resin substrate 30.
The connection member arrangement electrode 35 is an electrode on which the connection member 40 for mounting the crystal resonator 10 on the resin substrate 30 is arranged. In this embodiment, four connection member arrangement electrodes 35 are provided, and two of them are connected to the wire bonding electrode 32.

また、樹脂基板３０の中央部における配線３１の間には、配線３１の一部から分岐された複数の線状導体３６が形成されている。線状導体３６は配線３１と同様に、樹脂基板３０の銅箔をエッチングして得られるパターンであり、配線３１間の隙間を埋めるようにお互いに接触せずに配置されている。また、複数の線状導体３６は、隣接する線状導体３６とほぼ同じ間隔（３０μｍ〜５０μｍ）をあけて配置されている。例えば、線状導体３６の幅を３０μｍのとき、隣接する線状導体３６までの幅は３０μｍとしている。図２の網掛け部で示す部分が線状導体３６である。そして、この線状導体３６と接続される配線３１は一方で導通部３４を介してグランド電極として構成される一つの外部端子３３に接続され、他方でグランド電極として構成される一つのワイヤボンディング用電極３２に接続されている。
そして、樹脂基板３０の一方の面はワイヤボンディング用電極３２、接続部材配置用電極３５を除き、絶縁膜にて被覆されている（図示せず）。 In addition, a plurality of linear conductors 36 branched from a part of the wiring 31 are formed between the wirings 31 in the central portion of the resin substrate 30. Similar to the wiring 31, the linear conductor 36 is a pattern obtained by etching the copper foil of the resin substrate 30, and is arranged without contacting each other so as to fill a gap between the wirings 31. Further, the plurality of linear conductors 36 are arranged with substantially the same interval (30 μm to 50 μm) as the adjacent linear conductors 36. For example, when the width of the linear conductor 36 is 30 μm, the width to the adjacent linear conductor 36 is 30 μm. A portion indicated by a shaded portion in FIG. Then, the wiring 31 connected to the linear conductor 36 is connected to one external terminal 33 configured as a ground electrode on the one hand through the conducting portion 34, and one wire bonding configured as the ground electrode on the other side. It is connected to the electrode 32.
One surface of the resin substrate 30 is covered with an insulating film (not shown) except for the wire bonding electrode 32 and the connection member arrangement electrode 35.

次に、図３において、ＩＣチップが搭載される位置および状態について説明する。
図３（ａ）において、二点鎖線で囲んだ領域がＩＣ配置領域３９であり、ＩＣチップが搭載される領域である。このＩＣ配置領域３９では、前述したように、配線３１の一部から分岐されてＩＣ配置領域３９内に延長された複数の線状導体３６が、ＩＣ配置領域３９内の配線３１間の隙間を埋めるようにお互いに接触せずに配置されている。さらに、このＩＣ配置領域３９において、少なくともＩＣチップの配置面の対角に位置する２つの角部と平面視で重なる、配線３１の一部より延長された平面部３７を有している。なお、この平面部は対角に位置する２つの角部に他のもう一つの角部を追加して設けても良いし、４つの角部に平面部を形成しても良い。 Next, in FIG. 3, the position and state where the IC chip is mounted will be described.
In FIG. 3A, an area surrounded by a two-dot chain line is an IC placement area 39, which is an area where an IC chip is mounted. In the IC placement area 39, as described above, the plurality of linear conductors 36 branched from a part of the wiring 31 and extended into the IC placement area 39 cause gaps between the wirings 31 in the IC placement area 39. Arranged without touching each other so as to fill. Further, the IC placement region 39 has a flat portion 37 extended from a part of the wiring 31 and overlapping at least two corner portions located at the opposite corners of the placement surface of the IC chip in plan view. In addition, this plane part may be provided by adding another other corner part to two corner parts positioned diagonally, or a plane part may be formed at four corner parts.

図３（ｂ）はＩＣチップ２０を樹脂基板３０に搭載した状態を示す概略断面図である。樹脂基板３０の表面に形成された絶縁膜３８の表面は、絶縁膜３８が５〜２０μｍ程度で薄いため、配線３１などの凹凸に倣って同様な凹凸状態となっている。ＩＣチップ２０と搭載するＩＣ配置領域も、配線３１および複数の線状導体３６の上に絶縁膜３８が形成されることから絶縁膜３８の表面は、細かな凹凸状態となっている。この絶縁膜３８の表面に、ＩＣチップ２０がダイアタッチフィルム（ＤＡＦ）接着剤などの接合材４１を用いて固着される。
このとき、ＩＣチップ２０の対角に位置する２つの角部が平面部３７上の平坦な絶縁膜３８で受けることができるため、ＩＣチップ２０の傾きを抑制し、樹脂基板３０とほぼ平行にＩＣチップ２０を固定することができる。また、ＩＣ配置領域の絶縁膜３８表面が凹凸表面となるため固着面の表面積が増え、樹脂基板３０とＩＣチップ２０の安定した密着性を得ることができる。 FIG. 3B is a schematic cross-sectional view showing a state where the IC chip 20 is mounted on the resin substrate 30. The surface of the insulating film 38 formed on the surface of the resin substrate 30 has a similar uneven state following the unevenness of the wiring 31 and the like because the insulating film 38 is as thin as about 5 to 20 μm. Also in the IC placement area to be mounted on the IC chip 20, since the insulating film 38 is formed on the wiring 31 and the plurality of linear conductors 36, the surface of the insulating film 38 is in a fine uneven state. The IC chip 20 is fixed to the surface of the insulating film 38 by using a bonding material 41 such as a die attach film (DAF) adhesive.
At this time, since the two corners located diagonally to the IC chip 20 can be received by the flat insulating film 38 on the flat surface portion 37, the inclination of the IC chip 20 is suppressed and the resin substrate 30 is substantially parallel. The IC chip 20 can be fixed. In addition, since the surface of the insulating film 38 in the IC arrangement region is an uneven surface, the surface area of the fixing surface is increased, and stable adhesion between the resin substrate 30 and the IC chip 20 can be obtained.

樹脂基板３０にＩＣチップ２０を搭載した後は、図４に示すように、ＩＣチップ２０のパッド２１と樹脂基板３０のワイヤボンディング用電極３２とが金属ワイヤ２２により接続される。
図５は水晶振動子の底面を示す平面図である。水晶振動子１０の底面には外部基板との接続がなされる外部端子１５が四隅に設けられている。図４に示すように、この外部端子１５に対応した位置に、樹脂基板３０の接続部材配置用電極３５が形成されている。
そして、図１に示したように樹脂基板３０の四隅に形成された接続部材配置用電極３５と水晶振動子１０の外部端子１５とが、接続部材４０を介して接続される。
最後に、モールド樹脂４２が、水晶振動子１０と樹脂基板３０との間、および水晶振動子１０の側面にかけて充填されて水晶発振器１が製造される。 After the IC chip 20 is mounted on the resin substrate 30, the pads 21 of the IC chip 20 and the wire bonding electrodes 32 of the resin substrate 30 are connected by the metal wires 22 as shown in FIG. 4.
FIG. 5 is a plan view showing the bottom surface of the crystal resonator. External terminals 15 that are connected to an external substrate are provided at the four corners on the bottom surface of the crystal unit 10. As shown in FIG. 4, the connection member arranging electrode 35 of the resin substrate 30 is formed at a position corresponding to the external terminal 15.
As shown in FIG. 1, the connection member arrangement electrodes 35 formed at the four corners of the resin substrate 30 and the external terminals 15 of the crystal resonator 10 are connected via the connection member 40.
Finally, the mold resin 42 is filled between the crystal resonator 10 and the resin substrate 30 and over the side surface of the crystal resonator 10 to manufacture the crystal oscillator 1.

以上、本実施形態の水晶発振器１によれば、樹脂基板３０のＩＣチップ２０が配置されるＩＣ配置領域３９において、配線３１の一部から分岐されてＩＣ配置領域３９内に延長された複数の線状導体３６が、ＩＣ配置領域３９内の配線３１間の隙間を埋めるようにお互いに接触せずに配置されている。そして、少なくともＩＣ配置領域３９に存在する配線３１および線状導体３６を被覆するように絶縁膜３８が形成されている。このＩＣ配置領域３９内の絶縁膜３８表面は、広い面積の平坦部がなく細かな凹凸を有した表面状態となる。このことから、樹脂基板３０のＩＣ配置領域３９内にＩＣチップ２０が固定される際に、固着面の表面積が増え、樹脂基板３０とＩＣチップ２０の安定した密着性を得ることができる。
また、絶縁膜３８の表面が細かな凹凸状態であることから、絶縁膜３８とＩＣチップ２０との間に気泡が残ることがなくなり、製造工程において、気泡の存在に起因するＩＣチップ２０のはがれ、破損などの不具合が生ずることがなくなる。さらに、製品では気泡に起因する水晶発振器１の特性変化がなくなり、信頼性を向上させることができる。
また、線状導体３６と接続された配線３１が、グランド電極に接続されていることから、配線３１の一部から分岐されてＩＣ配置領域３９内に延長された複数の線状導体３６が、シールド電極として機能し、ＩＣチップ２０から放射される電磁波ノイズや水晶発振器１の外部から加わる電磁波ノイズの影響をなくすことができる。
さらに、ＩＣチップ２０の対角に位置する２つの角部と平面視で重なる、配線３１の一部より延長された平面部３７を有することから、平面部３７の上の絶縁膜３８表面にてＩＣチップ２０の角部を受けることができる。このため、ＩＣチップ２０を樹脂基板３０に固定する際に、ＩＣチップ２０の傾きを抑制することができ、樹脂基板３０とほぼ平行にＩＣチップ２０を固定することができる。
（第２の実施形態） As described above, according to the crystal oscillator 1 of the present embodiment, in the IC placement region 39 where the IC chip 20 of the resin substrate 30 is placed, a plurality of branches branched from a part of the wiring 31 and extended into the IC placement region 39. The linear conductors 36 are arranged without contacting each other so as to fill the gap between the wirings 31 in the IC arrangement region 39. An insulating film 38 is formed so as to cover at least the wiring 31 and the linear conductor 36 existing in the IC arrangement region 39. The surface of the insulating film 38 in the IC arrangement region 39 is in a surface state having no flat portions with a large area and having fine irregularities. From this, when the IC chip 20 is fixed in the IC placement region 39 of the resin substrate 30, the surface area of the fixing surface is increased, and stable adhesion between the resin substrate 30 and the IC chip 20 can be obtained.
Further, since the surface of the insulating film 38 is in a fine uneven state, no bubbles remain between the insulating film 38 and the IC chip 20, and the IC chip 20 is peeled off due to the presence of the bubbles in the manufacturing process. This eliminates problems such as damage. Further, in the product, the characteristic change of the crystal oscillator 1 due to bubbles is eliminated, and the reliability can be improved.
Further, since the wiring 31 connected to the linear conductor 36 is connected to the ground electrode, a plurality of linear conductors 36 branched from a part of the wiring 31 and extended into the IC placement region 39 are provided. It functions as a shield electrode and can eliminate the influence of electromagnetic wave noise radiated from the IC chip 20 and electromagnetic wave noise applied from the outside of the crystal oscillator 1.
Furthermore, since it has a planar part 37 extended from a part of the wiring 31 that overlaps two corners located diagonally of the IC chip 20 in plan view, on the surface of the insulating film 38 on the planar part 37. The corners of the IC chip 20 can be received. For this reason, when the IC chip 20 is fixed to the resin substrate 30, the inclination of the IC chip 20 can be suppressed, and the IC chip 20 can be fixed substantially parallel to the resin substrate 30.
(Second Embodiment)

次に、水晶発振器における第２の実施形態について説明する。本実施形態では水晶発振器の薄型化を図った態様であり、水晶振動子とＩＣチップを並列に配置した構造である。
図６は第２の実施形態における水晶発振器の構成を示す説明図であり、図６（ａ）は概略平面図、図６（ｂ）は同図（ａ）のＥ−Ｅ断線に沿う概略断面図である。なお、第１の実施形態と同様な構成については同符号を付し、説明を省略する。 Next, a second embodiment of the crystal oscillator will be described. In this embodiment, the crystal oscillator is thinned, and a crystal resonator and an IC chip are arranged in parallel.
6A and 6B are explanatory views showing the configuration of the crystal oscillator according to the second embodiment. FIG. 6A is a schematic plan view, and FIG. 6B is a schematic cross section taken along the line EE in FIG. FIG. In addition, about the structure similar to 1st Embodiment, the same code | symbol is attached | subjected and description is abbreviate | omitted.

水晶発振器２は、水晶振動子１０、ＩＣチップ２０、樹脂基板５０、モールド樹脂４２とを備えている。
樹脂基板５０は、ガラスエポキシまたはポリイミドなどの平板に銅箔を接着した基板が用いられ、銅箔をエッチングして所望の配線のパターンが形成されている。そして、樹脂基板５０の一方の面には、接続に用いられる端子を除き、配線のパターン表面にレジストなどで形成された絶縁膜が形成されている。
この水晶発振器２は樹脂基板５０にＩＣチップ２０が固着され、その横に並列して水晶振動子１０が樹脂基板５０に接続され、さらに水晶振動子１０およびＩＣチップを覆うようにモールド樹脂４２が形成された構造となっている。
水晶振動子１０の外部端子１５は、樹脂基板５０の接続端子６２と半田４３を介して接続され、水晶振動子１０が樹脂基板５０に固定されている。
また、ＩＣチップ２０は、樹脂基板５０の表面に被覆された絶縁膜５８上にダイアタッチフィルム（ＤＡＦ）接着剤などの接合材４１を用いて固着されている。そして、ＩＣチップ２０のパッド２１と樹脂基板３０のワイヤボンディング用電極とが、Ａｕ線などの金属ワイヤ２２で接続されている。 The crystal oscillator 2 includes a crystal resonator 10, an IC chip 20, a resin substrate 50, and a mold resin 42.
As the resin substrate 50, a substrate in which a copper foil is bonded to a flat plate such as glass epoxy or polyimide is used, and a desired wiring pattern is formed by etching the copper foil. On one surface of the resin substrate 50, an insulating film formed of a resist or the like is formed on the pattern surface of the wiring except for terminals used for connection.
In this crystal oscillator 2, the IC chip 20 is fixed to the resin substrate 50, the crystal resonator 10 is connected to the resin substrate 50 in parallel to the side, and a mold resin 42 is provided so as to cover the crystal resonator 10 and the IC chip. It has a formed structure.
The external terminal 15 of the crystal resonator 10 is connected to the connection terminal 62 of the resin substrate 50 via the solder 43, and the crystal resonator 10 is fixed to the resin substrate 50.
Further, the IC chip 20 is fixed to the insulating film 58 covered on the surface of the resin substrate 50 by using a bonding material 41 such as a die attach film (DAF) adhesive. The pad 21 of the IC chip 20 and the wire bonding electrode of the resin substrate 30 are connected by a metal wire 22 such as an Au wire.

次に樹脂基板の構成について詳細に説明する。
図７は本実施形態の樹脂基板の構成を示す概略平面図である。図８は樹脂基板とＩＣチップおよび水晶振動子の取り付け状態を説明する概略平面図である。なお、図７、図８において、樹脂基板の表面を覆う絶縁膜は除去して示してある。 Next, the configuration of the resin substrate will be described in detail.
FIG. 7 is a schematic plan view showing the configuration of the resin substrate of this embodiment. FIG. 8 is a schematic plan view for explaining a mounting state of the resin substrate, the IC chip, and the crystal resonator. 7 and 8, the insulating film covering the surface of the resin substrate is removed.

図７に示すように、樹脂基板５０は１層の基板からなり、その一方の面には、配線５１、ワイヤボンディング用電極５２、導通部５４、振動子接続用電極５５が配設され、配線パターンが形成されている。また、樹脂基板５０の他方の面には複数の外部端子（図示せず）が設けられている。樹脂基板５０の一方の面には、水晶振動子１０が搭載される振動子配置領域４５と、ＩＣチップが搭載されるＩＣ配置領域５９に区分され、それぞれ横に並んだ形態である。
ワイヤボンディング用電極５２は配線５１を介して導通部５４に接続されている。この導通部５４は樹脂基板５０をビアホールにて貫通して設けられており、樹脂基板５０の他方の面に設けられた外部端子に接続されている。 As shown in FIG. 7, the resin substrate 50 is composed of a single layer substrate, and on one surface thereof, a wiring 51, a wire bonding electrode 52, a conduction portion 54, and a vibrator connection electrode 55 are disposed. A pattern is formed. A plurality of external terminals (not shown) are provided on the other surface of the resin substrate 50. One surface of the resin substrate 50 is divided into a vibrator arrangement region 45 in which the crystal resonator 10 is mounted and an IC placement region 59 in which an IC chip is mounted, which are arranged side by side.
The wire bonding electrode 52 is connected to the conduction portion 54 via the wiring 51. The conductive portion 54 is provided through the resin substrate 50 through a via hole, and is connected to an external terminal provided on the other surface of the resin substrate 50.

また、樹脂基板５０のＩＣ配置領域５９における配線５１の間には、配線５１の一部から分岐された複数の線状導体５６が形成されている。線状導体５６は配線５１と同様に、樹脂基板５０の銅箔をエッチングして得られるパターンであり、配線５１間の隙間を埋めるようにお互いに接触せずに配置されている。また、複数の線状導体５６は、隣接する線状導体５６とほぼ同じ間隔をあけて配置されている。図７の網掛け部で示す部分が線状導体５６である。そして、この線状導体５６と接続される配線５１は一方で導通部５４を介してグランド端子として構成される一つの外部端子に接続され、他方でグランド端子として構成される一つのワイヤボンディング用電極５２に接続されている。さらに、このＩＣ配置領域５９において、少なくともＩＣチップの配置面の対角に位置する２つの角部と平面視で重なる、配線５１の一部より延長された平面部５７を有している。
そして、樹脂基板５０の一方の面はワイヤボンディング用電極５２を除き、絶縁膜にて被覆されている（図示せず）。 In addition, a plurality of linear conductors 56 branched from a part of the wiring 51 are formed between the wirings 51 in the IC placement region 59 of the resin substrate 50. Similar to the wiring 51, the linear conductor 56 is a pattern obtained by etching the copper foil of the resin substrate 50, and is arranged without contacting each other so as to fill a gap between the wirings 51. In addition, the plurality of linear conductors 56 are arranged at substantially the same interval as the adjacent linear conductors 56. A portion indicated by a shaded portion in FIG. The wiring 51 connected to the linear conductor 56 is connected to one external terminal configured as a ground terminal on the one hand via the conducting portion 54 and one wire bonding electrode configured as a ground terminal on the other side. 52. Further, the IC placement region 59 has a flat portion 57 extending from a part of the wiring 51 and overlapping at least two corner portions located at the opposite corners of the placement surface of the IC chip in plan view.
One surface of the resin substrate 50 is covered with an insulating film except for the wire bonding electrode 52 (not shown).

次に、ＩＣチップおよび水晶振動子が搭載される位置および状態について、図８を用いて説明する。
樹脂基板５０の表面に形成された絶縁膜の表面は、配線５１などの凹凸に倣って同様な凹凸状態となっている。ＩＣチップ２０を搭載するＩＣ配置領域も、配線５１および複数の線状導体５６の上に絶縁膜が形成されることから絶縁膜の表面は、細かな凹凸状態となっている。この絶縁膜の表面に、ＩＣチップ２０がダイアタッチフィルム（ＤＡＦ）接着剤などの接合材を用いて固着される。
このとき、ＩＣチップ２０の対角に位置する２つの角部が平面部５７上の平坦な絶縁膜で受けることができるため、ＩＣチップ２０の傾きを抑制し、樹脂基板５０とほぼ平行にＩＣチップ２０を固定することができる。また、ＩＣ配置領域の絶縁膜表面が凹凸表面となるため固着面の表面積が増え、樹脂基板５０とＩＣチップ２０の安定した密着性を得ることができる。 Next, the position and state where the IC chip and the crystal resonator are mounted will be described with reference to FIG.
The surface of the insulating film formed on the surface of the resin substrate 50 is in the same uneven state following the unevenness of the wiring 51 and the like. Also in the IC placement area where the IC chip 20 is mounted, since the insulating film is formed on the wiring 51 and the plurality of linear conductors 56, the surface of the insulating film is in a fine uneven state. The IC chip 20 is fixed to the surface of the insulating film using a bonding material such as a die attach film (DAF) adhesive.
At this time, since the two corners located diagonally of the IC chip 20 can be received by the flat insulating film on the plane part 57, the inclination of the IC chip 20 is suppressed and the IC substrate 20 is substantially parallel to the resin substrate 50. The chip 20 can be fixed. In addition, since the surface of the insulating film in the IC arrangement region is an uneven surface, the surface area of the fixing surface is increased, and stable adhesion between the resin substrate 50 and the IC chip 20 can be obtained.

樹脂基板５０にＩＣチップ２０を搭載した後は、ＩＣチップ２０のパッド２１と樹脂基板５０のワイヤボンディング用電極５２とが金属ワイヤ２２により接続される。
そして、樹脂基板５０の振動子接続用電極５５と水晶振動子１０の外部端子とが、半田を介して接続される。
最後に、図６に示すように、モールド樹脂４２が、水晶振動子１０およびＩＣチップ２０を覆うようにモールド樹脂４２が形成されて水晶発振器２が製造される。 After the IC chip 20 is mounted on the resin substrate 50, the pad 21 of the IC chip 20 and the wire bonding electrode 52 of the resin substrate 50 are connected by the metal wire 22.
The vibrator connection electrode 55 of the resin substrate 50 and the external terminal of the crystal vibrator 10 are connected via solder.
Finally, as shown in FIG. 6, the mold resin 42 is formed so as to cover the crystal resonator 10 and the IC chip 20, and the crystal oscillator 2 is manufactured.

以上、本実施形態の水晶発振器２によれば、樹脂基板５０のＩＣチップ２０が配置されるＩＣ配置領域５９において、配線５１の一部から分岐されてＩＣ配置領域５９内に延長された複数の線状導体５６が、ＩＣ配置領域５９内の配線５１間の隙間を埋めるようにお互いに接触せずに配置されている。そして、少なくともＩＣ配置領域５９に存在する配線５１および線状導体５６を被覆するように絶縁膜５８が形成されている。このＩＣ配置領域５９内の絶縁膜５８表面は、広い面積の平坦部がなく細かな凹凸を有した表面状態となる。このことから、樹脂基板５０のＩＣ配置領域５９内にＩＣチップ２０が固定される際に、固着面の表面積が増え、樹脂基板５０とＩＣチップ２０の安定した密着性を得ることができる。
また、線状導体５６と接続された配線５１が、グランド電極に接続されていることから、配線５１の一部から分岐されてＩＣ配置領域５９内に延長された複数の線状導体５６が、シールド電極として機能し、ＩＣチップ２０から放射される電磁波ノイズや水晶発振器２の外部から加わる電磁波ノイズの影響をなくすことができる。
さらに、ＩＣチップ２０の対角に位置する２つの角部と平面視で重なる、配線５１の一部より延長された平面部５７を有することから、平面部５７の上の絶縁膜５８表面にてＩＣチップ２０の角部を受けることができる。このため、ＩＣチップ２０を樹脂基板５０に固定する際に、ＩＣチップ２０の傾きを抑制することができ、樹脂基板５０とほぼ平行にＩＣチップ２０を固定することができる。 As described above, according to the crystal oscillator 2 of the present embodiment, in the IC placement region 59 where the IC chip 20 of the resin substrate 50 is placed, a plurality of branches branched from a part of the wiring 51 and extended into the IC placement region 59. The linear conductors 56 are arranged without being in contact with each other so as to fill a gap between the wirings 51 in the IC arrangement region 59. An insulating film 58 is formed so as to cover at least the wiring 51 and the linear conductor 56 existing in the IC placement region 59. The surface of the insulating film 58 in the IC placement region 59 is in a surface state having no flat portions with a large area and fine irregularities. Therefore, when the IC chip 20 is fixed in the IC placement region 59 of the resin substrate 50, the surface area of the fixing surface is increased, and stable adhesion between the resin substrate 50 and the IC chip 20 can be obtained.
Further, since the wiring 51 connected to the linear conductor 56 is connected to the ground electrode, a plurality of linear conductors 56 branched from a part of the wiring 51 and extended into the IC placement region 59 are provided. It functions as a shield electrode and can eliminate the influence of electromagnetic wave noise radiated from the IC chip 20 and electromagnetic wave noise applied from the outside of the crystal oscillator 2.
Further, since the planar portion 57 extended from a part of the wiring 51 overlaps with the two corners positioned diagonally of the IC chip 20 in plan view, the surface of the insulating film 58 on the planar portion 57 is provided. The corners of the IC chip 20 can be received. For this reason, when the IC chip 20 is fixed to the resin substrate 50, the tilt of the IC chip 20 can be suppressed, and the IC chip 20 can be fixed substantially parallel to the resin substrate 50.

なお、第１実施形態、第２の実施形態では、基板として樹脂基板を用いて説明をしたが、セラミック基板を用いても実施することが可能である。
また、第１実施形態、第２の実施形態では、圧電振動子として水晶振動子を例示したが、他の圧電振動子として振動ジャイロセンサ、ＳＡＷ共振子などを用いて圧電デバイスを構成することも可能である。 In the first and second embodiments, the resin substrate is used as the substrate. However, the present invention can also be implemented using a ceramic substrate.
In the first embodiment and the second embodiment, the crystal resonator is exemplified as the piezoelectric vibrator. However, a piezoelectric device may be configured using a vibration gyro sensor, a SAW resonator, or the like as another piezoelectric vibrator. Is possible.

第１の実施形態における水晶発振器の構成を示す説明図であり、（ａ）は概略平面図、（ｂ）は（ａ）のＡ−Ａ断線に沿う概略断面図、（ｃ）は（ａ）のＢ−Ｂ断線に沿う概略断面図。It is explanatory drawing which shows the structure of the crystal oscillator in 1st Embodiment, (a) is a schematic plan view, (b) is a schematic sectional drawing in alignment with the AA disconnection of (a), (c) is (a). The schematic sectional drawing in alignment with BB disconnection. 第１の実施形態における樹脂基板の構成を示す概略平面図。The schematic plan view which shows the structure of the resin substrate in 1st Embodiment. 第１の実施形態における樹脂基板とＩＣチップの取り付け状態を説明する説明図であり、（ａ）は概略平面図、（ｂ）は（ａ）のＣ−Ｃ断線に沿う概略断面図。It is explanatory drawing explaining the attachment state of the resin substrate and IC chip in 1st Embodiment, (a) is a schematic plan view, (b) is a schematic sectional drawing in alignment with CC disconnection of (a). 第１の実施形態におけるＩＣチップのワイヤボンディング状態を示す概略平面図。The schematic plan view which shows the wire bonding state of the IC chip in 1st Embodiment. 第１実施形態における水晶振動子の底面を示す平面図。The top view which shows the bottom face of the crystal oscillator in 1st Embodiment. 第２の実施形態における水晶発振器の構成を示す説明図であり、（ａ）は概略平面図、（ｂ）は（ａ）のＥ−Ｅ断線に沿う概略断面図。It is explanatory drawing which shows the structure of the crystal oscillator in 2nd Embodiment, (a) is a schematic plan view, (b) is a schematic sectional drawing in alignment with the EE disconnection of (a). 第２の実施形態における樹脂基板の構成を示す概略平面図。The schematic plan view which shows the structure of the resin substrate in 2nd Embodiment. 第２の実施形態における樹脂基板とＩＣチップおよび水晶振動子の取り付け状態を説明する概略平面図。The schematic plan view explaining the attachment state of the resin substrate in 2nd Embodiment, an IC chip, and a crystal oscillator. 小型・薄型化を図った構造の圧電デバイスを説明する説明図であり、（ａ）は圧電デバイスの模式断面図、（ｂ）は基板の構成を示す概略平面図。It is explanatory drawing explaining the piezoelectric device of the structure which aimed at size reduction and thickness reduction, (a) is a schematic cross section of a piezoelectric device, (b) is a schematic plan view which shows the structure of a board | substrate.

符号の説明Explanation of symbols

１，２…圧電デバイスとしての水晶発振器、１０…圧電振動子としての水晶振動子、１１…セラミックパッケージ、１２…圧電振動片としての水晶振動片、１３…蓋体、１４…接続端子、１５…外部端子、１６…導電性接着剤、２０…電子部品としてのＩＣチップ、２１…パッド、２２…金属ワイヤ、３０…樹脂基板、３１…配線、３２…ワイヤボンディング用電極、３３…外部端子、３４…導通部、３５…接続部材配置用電極、３６…線状導体、３７…平面部、３８…絶縁膜、３９…電子部品配置領域としてのＩＣ配置領域、４０…接続部材、４１…接合材、４２…モールド樹脂、４３…半田、４５…振動子配置領域、５０…樹脂基板、５１…配線、５２…ワイヤボンディング用電極、５３…外部端子、５４…導通部、５５…振動子接続用電極、５６…線状導体、５７…平面部、５８…絶縁膜、５９…電子部品配置領域としてのＩＣ配置領域、６２…接続端子。   DESCRIPTION OF SYMBOLS 1, 2 ... Quartz crystal oscillator as a piezoelectric device, 10 ... Quartz vibrator as a piezoelectric vibrator, 11 ... Ceramic package, 12 ... Quartz vibrating piece as a piezoelectric vibrating piece, 13 ... Lid, 14 ... Connection terminal, 15 ... External terminal, 16 ... conductive adhesive, 20 ... IC chip as electronic component, 21 ... pad, 22 ... metal wire, 30 ... resin substrate, 31 ... wiring, 32 ... electrode for wire bonding, 33 ... external terminal, 34 DESCRIPTION OF SYMBOLS ... Conducting part 35 ... Electrode for connection member arrangement, 36 ... Linear conductor, 37 ... Planar part, 38 ... Insulating film, 39 ... IC arrangement | positioning area | region as electronic component arrangement | positioning area, 40 ... Connection member, 41 ... Bonding material, 42 ... Mold resin, 43 ... Solder, 45 ... Vibrator placement region, 50 ... Resin substrate, 51 ... Wiring, 52 ... Wire bonding electrode, 53 ... External terminal, 54 ... Conducting part, 55 ... For vibrator connection Pole, 56 ... linear conductor, 57 ... flat portion, 58 ... insulating film, 59 ... IC arrangement region of the electronic component placement region, 62 ... connection terminal.

Claims (8)

配線を備え、一方の面に電子部品配置領域が設けられている基板と、
前記電子部品配置領域に配置されている、平面視が四角形の電子部品と、
圧電振動片を内部に収容し、外部端子を備えているパッケージを有し、前記電子部品の上方に位置している圧電振動子と、を備え、
前記電子部品配置領域において、少なくとも前記電子部品の外形における対角に位置する２つの角部と平面視で重なっている位置に、前記配線の一部である平面部を備え、
前記電子部品配置領域に、前記平面部同士を結んでいる仮想上の線分に交差している方向に沿って両端を備え、２つ以上の屈曲部を有して該両端間に延在している複数の線状導体が、互いに接触せずに配置されていることを特徴とする圧電デバイス。 A board provided with wiring and provided with an electronic component placement region on one side;
An electronic component that is arranged in the electronic component arrangement area and has a quadrangular plan view;
A piezoelectric vibrator that houses a piezoelectric vibrating piece and has an external terminal, and a piezoelectric vibrator positioned above the electronic component;
In the electronic component placement area, at least a two corners located diagonally in the outer shape of the electronic component, and a plane portion that is a part of the wiring at a position overlapping in plan view,
The electronic component placement region has both ends along a direction intersecting a virtual line segment connecting the flat portions, and has two or more bent portions and extends between the both ends. A plurality of linear conductors arranged without being in contact with each other. 請求項１に記載の圧電デバイスであって、
少なくとも前記電子部品配置領域に存在している前記配線および前記線状導体を被覆するように絶縁膜が形成されていることを特徴とする圧電デバイス。 The piezoelectric device according to claim 1,
An insulating film is formed so as to cover at least the wiring and the linear conductor existing in the electronic component placement region. 請求項１または２に記載の圧電デバイスであって、
前記複数の線状導体の一端が、前記配線に繋がっていることを特徴とする圧電デバイス。 The piezoelectric device according to claim 1 or 2,
One end of the plurality of linear conductors is connected to the wiring. 請求項３に記載の圧電デバイスであって、
前記線状導体と繋がっている前記配線が、前記電子部品および前記基板のグランド電極に接続されていることを特徴とする圧電デバイス。 The piezoelectric device according to claim 3,
The piezoelectric device, wherein the wiring connected to the linear conductor is connected to the electronic component and a ground electrode of the substrate. 配線を備え、一方の面に電子部品配置領域と圧電振動子配置領域とが設けられている基板と、
前記電子部品配置領域に配置されている、平面視が四角形の電子部品と、
圧電振動片を内部に収容し、外部端子を備えているパッケージを有し、前記圧電振動子配置領域に配置された圧電振動子と、を備え、
前記電子部品配置領域において、少なくとも前記電子部品の外形における対角に位置する２つの角部と平面視で重なっている位置に、前記配線の一部である平面部を備え、
前記電子部品配置領域に、前記平面部同士を結んでいる仮想上の線分に交差している方向に沿って両端を備え、２つ以上の屈曲部を有して該両端間に延在している複数の線状導体が、互いに接触せずに配置されていることを特徴とする圧電デバイス。 A substrate provided with wiring and provided with an electronic component placement region and a piezoelectric vibrator placement region on one surface;
An electronic component that is arranged in the electronic component arrangement area and has a quadrangular plan view;
A piezoelectric vibrator that houses a piezoelectric vibrating piece and has a package having external terminals, and a piezoelectric vibrator disposed in the piezoelectric vibrator placement region;
In the electronic component placement area, at least a two corners located diagonally in the outer shape of the electronic component, and a plane portion that is a part of the wiring at a position overlapping in plan view,
The electronic component placement region has both ends along a direction intersecting a virtual line segment connecting the flat portions, and has two or more bent portions and extends between the both ends. A plurality of linear conductors arranged without being in contact with each other. 請求項５に記載の圧電デバイスであって、
少なくとも前記電子部品配置領域に存在している前記配線および前記線状導体を被覆するように絶縁膜が形成されていることを特徴とする圧電デバイス。 The piezoelectric device according to claim 5,
An insulating film is formed so as to cover at least the wiring and the linear conductor existing in the electronic component placement region. 請求項５または６に記載の圧電デバイスであって、
前記複数の線状導体の一端が、前記配線に繋がっていることを特徴とする圧電デバイス。 The piezoelectric device according to claim 5 or 6,
One end of the plurality of linear conductors is connected to the wiring. 請求項７に記載の圧電デバイスであって、
前記線状導体と繋がっている前記配線が、前記電子部品および前記基板のグランド電極に接続されていることを特徴とする圧電デバイス。 The piezoelectric device according to claim 7,
The piezoelectric device, wherein the wiring connected to the linear conductor is connected to the electronic component and a ground electrode of the substrate.
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