JP5056004B2 - Three-dimensional inter-substrate connection structure and three-dimensional circuit device using the same - Google Patents

Three-dimensional inter-substrate connection structure and three-dimensional circuit device using the same Download PDF

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JP5056004B2
JP5056004B2 JP2006349164A JP2006349164A JP5056004B2 JP 5056004 B2 JP5056004 B2 JP 5056004B2 JP 2006349164 A JP2006349164 A JP 2006349164A JP 2006349164 A JP2006349164 A JP 2006349164A JP 5056004 B2 JP5056004 B2 JP 5056004B2
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connection structure
connection terminal
substrate
dimensional
circuit board
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JP2008159983A (en
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羽生 岩本
将人 森
能彦 八木
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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本発明は、電子部品を搭載し複数の回路基板間を接続する三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置に関する。   The present invention relates to a three-dimensional inter-substrate connection structure that mounts electronic components and connects a plurality of circuit boards, a manufacturing method thereof, and a three-dimensional circuit device using the same.

従来、ICチップやチップ部品などの電子部品を搭載した回路基板間を接続するための基板接合部材(以下、「三次元基板間接続構造体」と記す)として、プラグ側とソケット側からなる多極接続タイプコネクタや樹脂製基板に複数個の接続ピンを固定したピンコネクタなどが用いられている。   Conventionally, as a substrate bonding member (hereinafter referred to as a “three-dimensional inter-substrate connection structure”) for connecting circuit boards on which electronic components such as IC chips and chip components are mounted, there are many plugs and sockets. A pole connection type connector or a pin connector in which a plurality of connection pins are fixed to a resin substrate is used.

近年、モバイル機器などの軽薄短小化や高機能化の進展につれて、回路基板間の接続端子数が増加し、ピンコネクタ接続端子の狭ピッチ化が進んでいる。   In recent years, the number of connection terminals between circuit boards has increased and the pitch of pin connector connection terminals has been narrowed with the progress of miniaturization and high functionality of mobile devices and the like.

そこで、例えば、圧接コネクタのハウジングの底部から、電気回路基板の導電部に圧接し、接点を含む弾性変位可能な変位部を有する多数のピン端子をハウジングの長手方向に千鳥足状に露出させて配置したコネクタが開示されている(例えば、特許文献1参照)。これにより、ピン端子相互間のピッチを狭くして圧接コネクタの大型化を回避し、電気回路基板の導電部との安定な接触ができるとしている。   Therefore, for example, a large number of pin terminals having elastically displaceable displacement parts including contacts are arranged in a staggered manner in the longitudinal direction of the housing from the bottom of the housing of the pressure contact connector to the conductive part of the electric circuit board. A connector is disclosed (see, for example, Patent Document 1). Accordingly, the pitch between the pin terminals is narrowed to avoid an increase in size of the pressure contact connector, and stable contact with the conductive portion of the electric circuit board can be achieved.

また、端子形状が台形形状で、端子の引き出し線との接続側に台形形状の平行を成す長辺と短辺とが交互に並ぶように配置し、端子の幅の広い部分を外部回路とのコンタクト領域として千鳥足状に配置した回路基板が開示されている(例えば、特許文献2参照)。これにより、接続信頼性を低下させずに端子形成領域を狭小化できる。   Also, the terminal shape is trapezoidal, and the long side and the short side parallel to the trapezoidal shape are arranged alternately on the connection side with the lead wire of the terminal, and the wide part of the terminal is connected to the external circuit A circuit board arranged in a staggered pattern as a contact region is disclosed (for example, see Patent Document 2). Thereby, the terminal formation region can be narrowed without lowering the connection reliability.

一方、携帯情報機器などにおいては、機器の高速、高周波数化に伴い、外来電磁波による誤動作や放射電磁波による他機器への妨害などのEMC(電磁両立性:Electromagnetic Compatibility)に対する要求が厳しくなっている。そのため、電磁シールドを確実に行える回路基板実装技術への要望が高い。そこで、制御ICチップなどの高周波部品を搭載した複数の回路基板間を接続する三次元基板間接続構造体においても、外部からの電磁波や高周波部品などで内部から放射される電磁波を確実に電磁シールドすることが要求される。
特開平11−265747号公報 特開2002−334736号公報
On the other hand, with respect to portable information devices and the like, with the increase in the speed and frequency of devices, demands for EMC (Electromagnetic Compatibility) such as malfunction due to external electromagnetic waves and interference with other devices due to radiated electromagnetic waves have become severe. . Therefore, there is a high demand for circuit board mounting technology that can reliably perform electromagnetic shielding. Therefore, even in a three-dimensional board-to-board connection structure that connects multiple circuit boards on which high-frequency components such as control IC chips are mounted, electromagnetic waves from outside and electromagnetic waves radiated from the inside by high-frequency parts are reliably shielded. It is required to do.
JP-A-11-265747 Japanese Patent Laid-Open No. 2002-334736

上記特許文献1のコネクタによれば、弾性変位可能なピン端子をハウジングの長手方向に千鳥足状に配置し、耐衝撃性を高めるとともに、ピン端子間の狭ピッチを実現している。しかし、コネクタの薄型化が困難であり、製造コストが高くなる課題がある。   According to the connector of Patent Document 1, the pin terminals that can be elastically displaced are arranged in a staggered pattern in the longitudinal direction of the housing to improve impact resistance and realize a narrow pitch between the pin terminals. However, there is a problem that it is difficult to reduce the thickness of the connector and the manufacturing cost increases.

一方、特許文献2によれば、端子形成領域を狭小化するため、回路基板端子のコンタクト領域を千鳥足状に配置する構成については記載されているが、外部回路あるいは三次元基板間接続構造体との接続に関しては開示されていない。   On the other hand, according to Patent Document 2, there is described a configuration in which contact regions of circuit board terminals are arranged in a staggered pattern in order to narrow a terminal formation region, but an external circuit or a three-dimensional inter-substrate connection structure and No connection is disclosed.

また、特許文献1および特許文献2ともに、例えば接合することによって生じる反りなどの機械的な変形を有する回路基板や三次元基板間接続構造体との良好な接続状態を得る手段に関しては開示されていない。   Further, both Patent Document 1 and Patent Document 2 disclose a means for obtaining a good connection state with a circuit board having a mechanical deformation such as warpage caused by joining or a three-dimensional inter-substrate connection structure. Absent.

本発明は上記課題を解決するためになされたもので、反りなどの機械的変形のある複数の回路基板間を薄型で確実に接続するとともに、電磁シールド機能を備えた三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置を提供することを目的とする。   The present invention has been made to solve the above-described problem, and is a three-dimensional board-to-board connection structure having a thin and reliable connection between a plurality of circuit boards having mechanical deformation such as warpage and having an electromagnetic shielding function. And a manufacturing method thereof and a three-dimensional circuit device using the same.

上述したような目的を達成するために、本発明の三次元基板間接続構造体は、内周部と外周部とを有する枠状のハウジングと、ハウジングの上下面を接続する複数の接続端子電極と、ハウジングの少なくとも一方の面の複数の接続端子電極上に設けられたバンプと、を有する。   In order to achieve the above-described object, a three-dimensional inter-substrate connection structure according to the present invention includes a frame-shaped housing having an inner periphery and an outer periphery, and a plurality of connection terminal electrodes that connect the upper and lower surfaces of the housing. And bumps provided on the plurality of connection terminal electrodes on at least one surface of the housing.

さらに、バンプは、複数の接続端子電極の位置で、少なくともその高さが異なる構成を有する。   Furthermore, the bumps have a configuration in which the height is different at least at the positions of the plurality of connection terminal electrodes.

このような構成によれば、回路基板間を三次元基板間接続構造体で接続する場合、反りなどにより生じる間隙をバンプによって吸収し両者を良好に接合することが可能となる。   According to such a configuration, when the circuit boards are connected by the three-dimensional inter-substrate connection structure, the gap caused by the warp or the like can be absorbed by the bumps, and both can be bonded satisfactorily.

さらに、複数の接続端子電極の接触領域が千鳥足状に配置されている構成であってもよい。   Furthermore, the structure by which the contact area | region of several connection terminal electrodes is arrange | positioned at zigzag form may be sufficient.

このような構成によれば、複数の接続端子電極を有効に配置でき、端子数を増加した高密度実装用の三次元基板間接続構造体を実現できる。   According to such a configuration, a plurality of connection terminal electrodes can be effectively arranged, and a three-dimensional inter-substrate connection structure for high-density mounting with an increased number of terminals can be realized.

さらに、ハウジングの外周部の側面にシールド電極が形成され、ハウジングの上下面にシールド電極と接続する接地電極が形成されている構成であってもよい。   Further, a shield electrode may be formed on the side surface of the outer peripheral portion of the housing, and a ground electrode connected to the shield electrode may be formed on the upper and lower surfaces of the housing.

さらに、複数の接続端子電極が、内周部の側面を介してハウジングの上下面に設けられている構成であってもよい。   Furthermore, the structure by which the some connection terminal electrode is provided in the upper and lower surfaces of the housing via the side surface of the inner peripheral part may be sufficient.

このような構成によれば、回路基板の電気信号が集中する多数の接続端子電極から外部へ発生するノイズや電磁波の放射を防止するとともに、外部からのノイズや電磁波の放射を確実に防止できる。   According to such a configuration, it is possible to prevent noise and electromagnetic waves radiating from a large number of connection terminal electrodes where electrical signals of the circuit board are concentrated, and to reliably prevent noise and electromagnetic waves from being radiated from the outside.

さらに、複数の接続端子電極が、内周部および外周部の両側面を介してハウジングの上下面に設けられている構成であってもよい。   Furthermore, the structure by which the some connection terminal electrode is provided in the upper and lower surfaces of the housing via the inner peripheral part and the both sides | surfaces of an outer peripheral part may be sufficient.

このような構成によれば、ハウジングの内周部および外周部の側面に形成する複数の接続端子電極間の距離を大きくすることができ、また、接続端子電極の引出し領域が、隣接する接続端子電極の接触領域間を通過することがないため、隣接する接続端子電極の相互間の電気信号の干渉やノイズを減少させることができる。また、接続端子電極を大幅に増加できる端子構造にも展開できる。   According to such a configuration, the distance between the plurality of connection terminal electrodes formed on the side surfaces of the inner peripheral portion and the outer peripheral portion of the housing can be increased, and the lead-out region of the connection terminal electrode is adjacent to the connection terminal. Since it does not pass between the contact areas of the electrodes, it is possible to reduce interference of electric signals and noise between adjacent connection terminal electrodes. Further, it can be developed to a terminal structure that can greatly increase the number of connection terminal electrodes.

さらに、バンプがスタッドバンプにより形成されている構成であってもよい。さらに、バンプがハウジングの少なくとも一方の面上に形成された突起を含む基板バンプで構成されていてもよい。   Furthermore, the structure by which the bump is formed with the stud bump may be sufficient. Further, the bump may be constituted by a substrate bump including a protrusion formed on at least one surface of the housing.

このような構成によれば、三次元基板間接続構造体に形成したスタッドバンプや基板バンプの先端部を加熱圧接して、回路基板の接続端子電極上に変形接触させ熱収縮性の樹脂によって固定することによって良好な接合状態を実現できる。   According to such a configuration, the stud bump formed on the three-dimensional inter-substrate connection structure or the tip of the substrate bump is heated and pressed to be deformed and contacted on the connection terminal electrode of the circuit board and fixed by the heat-shrinkable resin. By doing so, a good bonding state can be realized.

さらに、バンプがはんだバンプにより形成されている構成であってもよい。   Furthermore, the structure by which the bump is formed with the solder bump may be sufficient.

このような構成によれば、加熱することによってはんだバンプを直接溶融させ回路基板の接続端子電極と接合できる。   According to such a configuration, the solder bumps can be directly melted by heating and bonded to the connection terminal electrodes of the circuit board.

また、本発明の三次元基板間接続構造体の製造方法は、内周部と外周部とを有する枠状のハウジングを型成型する工程と、ハウジング上に接続端子電極を形成する工程と、ハウジングの少なくとも一方の面の接続端子電極上にバンプを形成する工程と、を含む。   Further, the manufacturing method of the three-dimensional inter-substrate connection structure of the present invention includes a step of molding a frame-shaped housing having an inner peripheral portion and an outer peripheral portion, a step of forming connection terminal electrodes on the housing, Forming bumps on the connection terminal electrodes on at least one of the surfaces.

このような方法によれば、反りなどの機械的な変形を吸収して複数の回路基板間を良好に接合できる薄型の三次元基板間接続構造体を容易に作製できる。   According to such a method, it is possible to easily produce a thin three-dimensional inter-substrate connection structure that can absorb mechanical deformation such as warpage and can satisfactorily join a plurality of circuit boards.

また、本発明の三次元基板間接続構造体の製造方法は、内周部と外周部とを有する枠状のハウジングを型成型する工程と、ハウジング上にレジストパターンを形成する工程と、レジストパターン上にめっき層を形成する工程と、ハウジングの少なくとも一方の面のめっき層で覆われたレジストパターンの開口部にはんだを挿入しはんだバンプを形成する工程と、レジストパターンを除去し接続端子電極を形成する工程と、を含む。   The method for manufacturing a three-dimensional inter-substrate connection structure of the present invention includes a step of molding a frame-shaped housing having an inner peripheral portion and an outer peripheral portion, a step of forming a resist pattern on the housing, and a resist pattern A step of forming a plating layer thereon, a step of forming solder bumps by inserting solder into the opening of the resist pattern covered with the plating layer on at least one surface of the housing, and removing the resist pattern and connecting terminal electrodes Forming.

このような方法によれば、レジストの開口部にはんだ量を変えて挿入し、はんだバンプを形成することにより、反りなどの機械的変形を吸収するとともに回路基板の接続端子電極と直接接合するはんだバンプを有する薄型の三次元基板間接続構造体を容易に製造することができる。   According to such a method, the solder which is inserted into the opening of the resist while changing the amount of solder and forms a solder bump absorbs mechanical deformation such as warpage and is directly bonded to the connection terminal electrode of the circuit board. A thin three-dimensional inter-substrate connection structure having bumps can be easily manufactured.

また、本発明の三次元基板間接続構造体の製造方法は、少なくとも一方の面の接続端子電極に位置する領域にあらかじめ突起を備えた内周部と外周部とを有する枠状のハウジングを型成型する工程と、ハウジング上にめっき層を形成する工程と、突起を含むめっき層上にレジストパターンを形成する工程と、レジストパターンで覆われた以外のめっき層をエッチングする工程と、レジストパターンを剥離し、接続端子電極に基板バンプを形成する工程と、を含む。   In the method for manufacturing a three-dimensional inter-substrate connection structure according to the present invention, a frame-shaped housing having an inner peripheral portion and an outer peripheral portion provided with protrusions in advance in a region located on at least one surface of the connection terminal electrode is formed. A step of forming, a step of forming a plating layer on the housing, a step of forming a resist pattern on the plating layer including protrusions, a step of etching a plating layer other than that covered with the resist pattern, and a resist pattern Peeling off and forming a substrate bump on the connection terminal electrode.

このような方法によれば、接続端子電極上に、突起を形成したハウジングを一体に成型することによって容易に基板バンプを形成できる。   According to such a method, the substrate bump can be easily formed by integrally molding the housing in which the protrusion is formed on the connection terminal electrode.

また、本発明の立体回路装置は、上記三次元基板間接続構造体を介して、少なくとも第1の回路基板と第2の回路基板とを接続する構成である。   The three-dimensional circuit device of the present invention is configured to connect at least the first circuit board and the second circuit board via the three-dimensional inter-substrate connection structure.

このような構成によれば、複数の回路基板間を反りなどの機械的変形を吸収し良好に接続することができるとともに、複数の接続端子電極や回路基板に実装された、三次元基板間接続構造体の内周部内に位置する回路部品を電磁シールドできる立体回路装置が得られる。   According to such a configuration, it is possible to absorb a mechanical deformation such as a warp between a plurality of circuit boards and to make a good connection, and a connection between three-dimensional boards mounted on a plurality of connection terminal electrodes or a circuit board. A three-dimensional circuit device capable of electromagnetically shielding circuit components located in the inner periphery of the structure is obtained.

本発明によれば、回路基板間の接続時の信頼性に優れるとともに、シールド効果を有する薄型の三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置を実現できる。   ADVANTAGE OF THE INVENTION According to this invention, while being excellent in the reliability at the time of the connection between circuit boards, the thin three-dimensional board | substrate connection structure which has a shielding effect, its manufacturing method, and a three-dimensional circuit apparatus using the same are realizable.

以下、本発明の実施の形態について、図面を参照しながら説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(第1の実施の形態)
図1(A)は本発明の第1の実施の形態における三次元基板間接続構造体の構成を示す平面図、図1(B)、図1(C)および図1(D)はそれぞれ図1(A)中のA−A線断面図、B−B線断面図およびC−C線断面図である。
(First embodiment)
FIG. 1A is a plan view showing the configuration of the three-dimensional inter-substrate connection structure according to the first embodiment of the present invention, and FIG. 1B, FIG. 1C, and FIG. It is the sectional view on the AA line in 1 (A), the BB sectional view, and the CC sectional view.

図1に示すように、三次元基板間接続構造体2は、例えば四角形状の外周部4と内周部6を有する額縁形の枠状のガラスエポキシ樹脂などからなるハウジング8を備えている。また、ハウジング8の上部面14と下部面16で千鳥足状に複数個配設された接続端子電極18、20を有する。そして、接続端子電極18は、上部面14上に形成された上面接続端子電極18a、下部面16上に形成された下面接続端子電極18bと内周部6の側面上に形成された側面接続電極18cと一体的に形成して構成される。同様に、接続端子電極20は、上面接続端子電極20a、下面接続端子電極20bと側面接続電極20cとを一体的に形成して構成される。さらに、上面接続端子電極と下面接続端子電極は、接続する回路基板の接続端子と接触する四角の領域(以下、「接触領域」と記す)と、その接触領域から引き出され側面接続電極と接続する帯状の領域(以下、「引出し領域」と記す)から構成されている。ここで、上面接続端子電極18aと上面接続端子電極20aとの違いは、接触領域が千鳥足状に配置され、上面接続端子電極18aの外周部4側に位置するため引出し領域の長さが、上面接続端子電極20aより長いことである。また、下面接続端子電極18b、20bとの差異も同様である。   As shown in FIG. 1, the three-dimensional inter-substrate connection structure 2 includes a housing 8 made of a frame-shaped frame-like glass epoxy resin having a rectangular outer peripheral portion 4 and an inner peripheral portion 6, for example. In addition, a plurality of connection terminal electrodes 18 and 20 are arranged in a staggered pattern on the upper surface 14 and the lower surface 16 of the housing 8. The connection terminal electrode 18 includes an upper surface connection terminal electrode 18 a formed on the upper surface 14, a lower surface connection terminal electrode 18 b formed on the lower surface 16, and a side connection electrode formed on the side surface of the inner peripheral portion 6. It is formed integrally with 18c. Similarly, the connection terminal electrode 20 is configured by integrally forming an upper surface connection terminal electrode 20a, a lower surface connection terminal electrode 20b, and a side connection electrode 20c. Furthermore, the upper surface connection terminal electrode and the lower surface connection terminal electrode are connected to the rectangular region (hereinafter referred to as “contact region”) in contact with the connection terminal of the circuit board to be connected and the side surface connection electrode drawn from the contact region. It is composed of a band-like region (hereinafter referred to as “drawer region”). Here, the difference between the upper surface connection terminal electrode 18a and the upper surface connection terminal electrode 20a is that the contact region is arranged in a staggered pattern and is located on the outer peripheral portion 4 side of the upper surface connection terminal electrode 18a, so that the length of the extraction region is It is longer than the connection terminal electrode 20a. The difference from the lower surface connection terminal electrodes 18b and 20b is the same.

また、ハウジング8の外周部4の側面上に全体にわたってシールド電極10が形成されている。そして、ハウジング8の上部面14や下部面16上には、例えばハウジング8の四隅の位置にシールド電極10と接続する接地電極12a、12bが一体的に形成されている。   A shield electrode 10 is formed over the entire side surface of the outer peripheral portion 4 of the housing 8. On the upper surface 14 and the lower surface 16 of the housing 8, for example, ground electrodes 12 a and 12 b connected to the shield electrode 10 are integrally formed at the four corner positions of the housing 8.

そして、以下で説明する、例えばスタッドバンプなどの複数のバンプ22が、ハウジング8の少なくとも上面接続端子電極18a、20aの各々の接触領域上、すなわち回路基板の接続電極(図示せず)に対応する位置に形成されている。この時、以下で図2を用いて詳細に説明するように、バンプ22のサイズ(大きさ、高さなど)が、三次元基板間接続構造体2の、例えば反りなどの変形に対応した形状で形成される。   A plurality of bumps 22 such as stud bumps, which will be described below, correspond to at least contact areas of the upper surface connection terminal electrodes 18a and 20a of the housing 8, that is, connection electrodes (not shown) of the circuit board. Formed in position. At this time, as will be described in detail with reference to FIG. 2 below, the size (size, height, etc.) of the bumps 22 corresponds to the deformation of the three-dimensional inter-substrate connection structure 2 such as warpage. Formed with.

これにより、三次元基板間接続構造体を介して、接続される回路基板の反りなどの機械的な変形を有効に吸収し、均一で安定した接続ができる。   Thereby, mechanical deformation such as warpage of the circuit board to be connected is effectively absorbed through the three-dimensional inter-substrate connection structure, and a uniform and stable connection can be achieved.

以下に、本発明の第1の実施の形態における三次元基板間接続構造体を用いて、回路基板の反りなどの機械的な変形を吸収するメカニズムについて説明する。   Hereinafter, a mechanism for absorbing mechanical deformation such as warping of a circuit board using the three-dimensional inter-substrate connection structure according to the first embodiment of the present invention will be described.

図2(A)は本発明の第1の実施の形態における第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板と接続する前の状態を示す断面図で、図2(B)は第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板に接合した時の状態を示す断面図である。   FIG. 2A is a cross-sectional view showing a state before connecting the three-dimensional inter-substrate connection structure joined to the first circuit board in the first embodiment of the present invention to the second circuit board. FIG. 2B is a cross-sectional view showing a state when the three-dimensional inter-substrate connection structure bonded to the first circuit board is bonded to the second circuit board.

まず、図2(A)に示すように、第1の回路基板24の接続電極(図示せず)と三次元基板間接続構造体2の下面接続端子電極18bとをはんだなどによって接合(下面接続端子電極20bも同様)した場合、第1の回路基板24と三次元基板間接続構造体2の熱膨張係数とが異なる。例えば、第1の回路基板24の熱膨張係数が三次元基板間接続構造体2よりも大きい場合、三次元基板間接続構造体2は第1の回路基板24によって引張り力を受けて下方に凸状の形状となる。   First, as shown in FIG. 2A, the connection electrode (not shown) of the first circuit board 24 and the lower surface connection terminal electrode 18b of the three-dimensional inter-substrate connection structure 2 are joined by solder or the like (lower surface connection). In the case of the terminal electrode 20b, the thermal expansion coefficients of the first circuit board 24 and the three-dimensional inter-substrate connection structure 2 are different. For example, when the thermal expansion coefficient of the first circuit board 24 is larger than that of the three-dimensional inter-board connection structure 2, the three-dimensional inter-board connection structure 2 receives a tensile force from the first circuit board 24 and protrudes downward. It becomes a shape.

そこで、図2(A)に示すように、凸状の三次元基板間接続構造体2と第2の回路基板26とを接続する際に、バンプ22の大きさや高さを、凸状の反りの形状に対応させて変化させる。例えば、上記の場合、反りの中心線(D−D)から外側に向かうにしたがって接続端子電極の接触領域上(以下、詳細には接続端子電極の接触領域上であるが単に接続端子電極上と表現する)に高さの高いバンプ22を形成するものである。   Therefore, as shown in FIG. 2A, when the convex three-dimensional inter-substrate connection structure 2 and the second circuit board 26 are connected, the size and height of the bumps 22 are set to the convex warpage. It changes according to the shape of. For example, in the above case, on the contact region of the connection terminal electrode as it goes outward from the center line (DD) of warping (hereinafter, in detail, on the contact region of the connection terminal electrode, but simply on the connection terminal electrode) The bumps 22 having a high height are formed.

ここで、バンプ22として、以下の製造方法で説明するように、ワイヤボンダを用いて金バンプを形成するスタッドバンプを用いることができる。   Here, as described in the following manufacturing method, stud bumps that form gold bumps using a wire bonder can be used as the bumps 22.

つぎに、図2(B)に示すように、三次元基板間接続構造体2の上面接続端子電極上に形成したバンプ22と対向する第2の回路基板26の接続電極(図示せず)面側に、例えば熱硬化性エポキシ樹脂を主成分とする接着層28を塗布する。   Next, as shown in FIG. 2B, the connection electrode (not shown) surface of the second circuit board 26 facing the bumps 22 formed on the upper surface connection terminal electrodes of the three-dimensional inter-substrate connection structure 2. On the side, for example, an adhesive layer 28 mainly composed of a thermosetting epoxy resin is applied.

そして、三次元基板間接続構造体2のバンプ22を接着層28の上から熱圧着して変形させて、第2の回路基板26の接続電極(図示せず)と圧接させるとともに、接着層28を熱硬化させる。この時、接着層28の熱収縮によって、バンプ22が第2の回路基板26の接続電極に押し付けられて、三次元基板間接続構造体2と接続される。これにより、第2の回路基板26が三次元基板間接続構造体2の反りに沿うように変形する必要がなくなるため、変形からの復元力による応力の発生がなく剥離強度の高い接続が得られる。すなわち、反りなどの機械的な変形をサイズの異なるバンプによって吸収し、第2の回路基板26と三次元基板間接続構造体2との均一な接続状態を実現できる。その結果、落下衝撃や耐振動性に優れた構造を有する三次元基板間接続構造体が得られる。   Then, the bumps 22 of the three-dimensional inter-substrate connection structure 2 are deformed by thermocompression bonding from above the adhesive layer 28, and are brought into pressure contact with connection electrodes (not shown) of the second circuit board 26. Heat cure. At this time, the bumps 22 are pressed against the connection electrodes of the second circuit board 26 due to the thermal contraction of the adhesive layer 28 and are connected to the three-dimensional inter-substrate connection structure 2. This eliminates the need for the second circuit board 26 to be deformed so as to follow the warp of the three-dimensional inter-substrate connection structure 2, so that a connection with a high peel strength can be obtained without generation of stress due to a restoring force from the deformation. . That is, mechanical deformation such as warpage is absorbed by bumps having different sizes, and a uniform connection state between the second circuit board 26 and the three-dimensional inter-substrate connection structure 2 can be realized. As a result, a three-dimensional inter-substrate connection structure having a structure excellent in drop impact and vibration resistance is obtained.

ここで、三次元基板間接続構造体2のハウジング8の材料として、例えばガラスエポキシ樹脂や液晶ポリマー、ポリフェニレンサルファイド、ポリブチレンテレフタレートなどの絶縁性樹脂が用いられる。さらに、高い形状精度や高い伝熱性などが要求される場合には、セラミック基板などの絶縁性基板を用いてもよい。   Here, as a material of the housing 8 of the three-dimensional inter-substrate connection structure 2, an insulating resin such as glass epoxy resin, liquid crystal polymer, polyphenylene sulfide, polybutylene terephthalate, or the like is used. Furthermore, when high shape accuracy, high heat conductivity, and the like are required, an insulating substrate such as a ceramic substrate may be used.

また、接続端子電極、シールド電極10や接地電極12a、12bの材料として、例えば銅(Cu)や銀(Ag)、アルミニウム(Al)などの導電率の大きな金属材料で形成することが好ましい。さらに、接続の安定性や各電極の経時的な劣化を防止して信頼性を向上させるために、それらの材料の上に、例えば金からなる膜を形成することが望ましい。   Further, it is preferable to form the connection terminal electrode, the shield electrode 10 and the ground electrodes 12a and 12b with a metal material having a high conductivity such as copper (Cu), silver (Ag), or aluminum (Al). Furthermore, in order to improve the reliability by preventing the connection stability and the deterioration of each electrode over time, it is desirable to form a film made of, for example, gold on these materials.

なお、本実施の形態では、反りの形状を下方に凸状とした例で説明したが、これに限られない。例えば第1の基板の熱膨張係数が三次元基板間接続構造体の熱膨張係数より小さい場合には凹状になる場合もある。また、回路基板自体が平坦でなくどちらかに反りを発生した形状を有する場合もありうる。その場合においても、三次元基板間接続構造体の接続端子電極上のバンプサイズを回路基板の反り形状に合わせて設計することにより容易に対応できる。例えば、バンプのサイズを接続する回路基板と三次元基板間接続構造体の接触面間距離(接触面間隙)に対応させて、接続端子電極上に配置形成すればよい。   In this embodiment, the example in which the shape of the warp is convex downward has been described, but the present invention is not limited to this. For example, when the thermal expansion coefficient of the first substrate is smaller than the thermal expansion coefficient of the three-dimensional inter-substrate connection structure, the first substrate may be concave. In addition, the circuit board itself may not have a flat shape and may have a shape in which either one is warped. Even in such a case, the bump size on the connection terminal electrode of the three-dimensional inter-substrate connection structure can be easily coped with by designing according to the warpage shape of the circuit board. For example, the bumps may be arranged and formed on the connection terminal electrodes so as to correspond to the distance between the contact surfaces (contact surface gap) between the circuit board to which the bump size is connected and the three-dimensional substrate connection structure.

また、本実施の形態では、反りなどの機械的な変形が二次元的に生じる場合を例に説明したが、これに限られない。例えば、三次元的な変形に対しては、ハウジング8の他の枠辺の接続端子電極に形成するバンプの高さなどを変えて配設すればよいことはいうまでもない。   In this embodiment, the case where mechanical deformation such as warpage occurs two-dimensionally has been described as an example, but the present invention is not limited to this. For example, for three-dimensional deformation, it goes without saying that the height of bumps formed on the connection terminal electrodes on the other frame sides of the housing 8 may be changed.

また、本実施の形態では、三次元基板間接続構造体2と第1の回路基板24とをはんだで接合した例で説明した、これに限られない。例えば、異方導電性シートや異方導電性樹脂を用いてもよい。これにより、さらに接続が容易となる。   Moreover, in this Embodiment, it was not restricted to this demonstrated in the example which joined the three-dimensional board-connection structure 2 and the 1st circuit board 24 with the solder. For example, an anisotropic conductive sheet or anisotropic conductive resin may be used. This further facilitates connection.

本実施の形態によれば、反りなどの変形を有する回路基板間においても、落下や衝撃などの信頼性の高い接続を異なるバンプ形状を備えた三次元基板間接続構造体を実現できる。   According to the present embodiment, it is possible to realize a three-dimensional inter-substrate connection structure having different bump shapes for reliable connection such as dropping and impact even between circuit boards having deformation such as warping.

また、ハウジング8の外周部の側面上に配設したシールド電極10および上下面に配設した接地電極12a、12bにより、接続端子電極や回路基板に実装された高周波部品などから発生するノイズや電磁波などの放射や外部からのノイズを有効にシールドすることができる。   Further, the shield electrode 10 disposed on the side surface of the outer peripheral portion of the housing 8 and the ground electrodes 12a and 12b disposed on the upper and lower surfaces cause noises and electromagnetic waves generated from the connection terminal electrodes and the high-frequency components mounted on the circuit board. It is possible to effectively shield radiation and external noise.

以下に、本発明の第1の実施の形態における三次元基板間接続構造体の製造方法について説明する。   A method for manufacturing the three-dimensional inter-substrate connection structure in the first embodiment of the present invention will be described below.

図3は、本発明の第1の実施の形態における三次元基板間接続構造体の製造方法の主な工程図である。そして、図3(A)、図3(D)、図3(G)、図3(J)は、三次元基板間接続構造体の各製造工程における平面図である。また、図3(B)、図3(E)、図3(H)、図3(K)は、各平面図中のB−B線断面図、図3(C)、図3(F)、図3(I)、図3(L)は、同E−E線断面図である。なお、B−B線は図1(A)中に示す複数の上面接続端子電極18a上に配設したバンプの中心を通る線と同一であり、E−E線の位置は内周部の一側面の位置を示している。   FIG. 3 is a main process diagram of the method of manufacturing the three-dimensional inter-substrate connection structure according to the first embodiment of the present invention. 3A, 3D, 3G, and 3J are plan views in each manufacturing process of the three-dimensional inter-substrate connection structure. 3B, FIG. 3E, FIG. 3H, and FIG. 3K are cross-sectional views taken along line B-B in each plan view, FIG. 3C, and FIG. 3F. FIGS. 3I and 3L are cross-sectional views taken along the line EE. Note that the BB line is the same as the line passing through the center of the bumps disposed on the plurality of upper surface connection terminal electrodes 18a shown in FIG. 1A, and the position of the EE line is one in the inner periphery. The position of the side is shown.

まず、図3(A)、図3(B)、図3(C)に示すように、例えばガラスエポキシ樹脂などを型成型して絶縁性基板(ハウジング)30を用意する。   First, as shown in FIGS. 3A, 3B, and 3C, an insulating substrate (housing) 30 is prepared by molding a glass epoxy resin or the like, for example.

つぎに、図3(D)、図3(E)、図3(F)に示すように、絶縁性基板30の上部面、下部面、外周部側面、内周部側面を粗化して、例えばパラジウム塩などのめっき触媒を全体に塗布する。そして、例えば無電解銅めっき法を用いて、絶縁性基板30上に所定の厚みの銅めっき層32を形成する。具体的には、例えば絶縁性基板30を、以下に示す無電解銅めっき液に2時間浸漬し、約10μm厚の銅を析出させ、全面に銅めっき層32が形成される。ここで、無電解銅めっき液としては、例えば硫酸銅・5水和物/エチレンジアミン4酢酸/ポリエチレングリコール/l2.2−ジビリジル/ホルムアルデヒド混合液を水酸化ナトリウムでPH12.5に調整したものが用いられ、液温70℃で使用される。なお、無電解めっきと電解銅めっきを組み合わせても効果的であり、銅めっき層32を短時間で形成できる。   Next, as shown in FIGS. 3D, 3E, and 3F, the upper surface, the lower surface, the outer peripheral side surface, and the inner peripheral side surface of the insulating substrate 30 are roughened, for example, A plating catalyst such as a palladium salt is applied to the entire surface. Then, a copper plating layer 32 having a predetermined thickness is formed on the insulating substrate 30 by using, for example, an electroless copper plating method. Specifically, for example, the insulating substrate 30 is immersed in an electroless copper plating solution shown below for 2 hours to deposit about 10 μm thick copper, and the copper plating layer 32 is formed on the entire surface. Here, as the electroless copper plating solution, for example, a copper sulfate pentahydrate / ethylenediaminetetraacetic acid / polyethylene glycol / l2.2-dibilidyl / formaldehyde mixed solution adjusted to PH12.5 with sodium hydroxide is used. And used at a liquid temperature of 70 ° C. It is effective to combine electroless plating and electrolytic copper plating, and the copper plating layer 32 can be formed in a short time.

つぎに、図3(G)、図3(H)、図3(I)に示すように、形成した銅めっき層32上の全体にエッチング用のレジストを塗布し、紫外線を照射して所定のパターンで露光処理する。この時、エッチング用のレジストとしては、例えば電着レジスト(例えば、日本ペイント株式会社製の「フォトED P−1000」)を用い、25℃で50mA/dmで3分間電着させ、約8μmの厚さに塗布する。そして、フォトマスクを装着し、紫外線(散乱光)を約400mj/cmで照射し、所定のパターンを露光した。その後、32℃の1%メタ珪酸ナトリウムをスプレー装置を用いて120秒間スプレーしてレジストを現像する。これにより、最終的に上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極上を覆うレジストパターン34が得られる。 Next, as shown in FIGS. 3 (G), 3 (H), and 3 (I), an etching resist is applied to the entire surface of the formed copper plating layer 32, and ultraviolet rays are irradiated to form a predetermined layer. An exposure process is performed with a pattern. At this time, as an etching resist, for example, an electrodeposition resist (for example, “Photo ED P-1000” manufactured by Nippon Paint Co., Ltd.) is used, and electrodeposition is performed at 25 ° C. and 50 mA / dm 2 for 3 minutes. Apply to a thickness of. Then, a photomask was attached, and ultraviolet rays (scattered light) were irradiated at about 400 mj / cm 2 to expose a predetermined pattern. Thereafter, 1% sodium metasilicate at 32 ° C. is sprayed for 120 seconds using a spray device to develop the resist. Thereby, a resist pattern 34 that finally covers the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode, and the shield electrode is obtained.

つぎに、図3(J)、図3(K)、図3(L)に示すように、レジストパターン34を形成した後、40℃の塩化第2鉄の36%溶液に2〜3分間浸漬して銅めっき層32をエッチングする。その後、50℃の5%メタ珪酸ナトリウムを120秒間スプレーしてレジストを剥離し所定の上面接続端子電極18a、20a、下面接続端子電極18b、20b、側面接続電極18c、20c、シールド電極10および接地電極12a、12bを形成する。   Next, as shown in FIG. 3 (J), FIG. 3 (K), and FIG. 3 (L), after forming a resist pattern 34, it is immersed in a 36% solution of ferric chloride at 40 ° C. for 2 to 3 minutes. Then, the copper plating layer 32 is etched. Thereafter, 5% sodium metasilicate at 50 ° C. is sprayed for 120 seconds to remove the resist, and predetermined upper surface connection terminal electrodes 18a and 20a, lower surface connection terminal electrodes 18b and 20b, side surface connection electrodes 18c and 20c, shield electrode 10 and ground Electrodes 12a and 12b are formed.

その後、少なくとも上面接続端子電極18a、20a上に、ワイヤボンダを用いて金バンプなどのバンプ22を形成する。具体的には、金ワイヤの先端を放電溶融させてボールを形成し、上面接続端子電極18a、20a上に超音波を加えながら加圧加熱して接合させてワイヤを切断することによりバンプ22は形成される。この時、放電溶融を行う際に放電印加電圧を変化させることによってボールの大きさを変えることができる。これにより、例えば図3(K)に示す反りの中心線(D−D)から遠ざかるにつれ上面接続端子電極上のサイズ(大きさ、高さなど)を変化させたバンプ22が形成される。   Thereafter, a bump 22 such as a gold bump is formed on at least the upper surface connection terminal electrodes 18a and 20a using a wire bonder. Specifically, the tip of the gold wire is melted by discharge to form a ball, and the bump 22 is formed by cutting the wire by applying pressure and heating while applying ultrasonic waves to the upper surface connection terminal electrodes 18a and 20a. It is formed. At this time, the size of the ball can be changed by changing the discharge applied voltage when performing the discharge melting. Thereby, for example, bumps 22 are formed in which the size (size, height, etc.) on the upper surface connection terminal electrode is changed as the distance from the center line (DD) of warpage shown in FIG.

以上の工程により、例えば、ハウジングの寸法として、長さ10.6mm、幅9mm、厚み0.45mmで、接続端子電極の引き出し線幅は約75μm、上面接続端子電極のピッチが約300μm程度の高密度実装に対応した三次元基板間接続構造体が作製される。   Through the above steps, for example, the housing has a length of 10.6 mm, a width of 9 mm, a thickness of 0.45 mm, a connection terminal electrode lead-out line width of about 75 μm, and a top connection terminal electrode pitch of about 300 μm. A three-dimensional inter-substrate connection structure corresponding to density mounting is produced.

なお、本実施の形態では、上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極などを同時に一括して形成する例で説明したがこれに限られず、相前後して形成してもよい。   In the present embodiment, the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode, the shield electrode, and the like have been described as being formed at the same time. May be.

また、本実施の形態においては、絶縁性基板の全面にわたって、例えばエポキシ樹脂と合成ゴム、架橋剤、硬化剤、フィラーを組み合わせた接着促進層を形成しその表面を粗化した後、めっき処理工程をしてもよい。これにより、絶縁性基板の表面へのめっきの固着強度を向上させることができる。   In the present embodiment, the entire surface of the insulating substrate is formed with an adhesion promoting layer combining, for example, an epoxy resin and synthetic rubber, a crosslinking agent, a curing agent, and a filler, and the surface is roughened, followed by a plating process. You may do. Thereby, the adhesion strength of the plating to the surface of the insulating substrate can be improved.

また、本実施の形態においては、上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極の表面を金めっきすることが望ましい。これにより、接続の安定性や耐湿性などの信頼性を向上できる。   In the present embodiment, it is desirable that the surfaces of the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode, and the shield electrode are plated with gold. Thereby, reliability, such as connection stability and moisture resistance, can be improved.

また、本実施の形態では、上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極の形成方法として、無電解めっき法、フォトリソ技術とエッチング技術を用いて形成する例で説明したが、これに限られない。例えば、所定の膜厚でパターン形成できる方法であれば、特に制限されずに適用することができる。   In the present embodiment, an example of forming the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode and the shield electrode by using an electroless plating method, a photolithography technique and an etching technique will be described. However, it is not limited to this. For example, any method that can form a pattern with a predetermined film thickness can be applied without particular limitation.

なお、上記製造方法では、めっき層を形成後、レジストパターンで各電極を形成する例で説明したが、これに限られない。例えば、レジストパターンを形成後、めっき層を形成して、各電極をリフトオフ法などで形成してもよい。この場合、レジストパターンの位置が最終的に得られる各電極以外の領域を覆う形で形成される。   In addition, although the said manufacturing method demonstrated by the example which forms each electrode with a resist pattern after forming a plating layer, it is not restricted to this. For example, after forming a resist pattern, a plating layer may be formed, and each electrode may be formed by a lift-off method or the like. In this case, the position of the resist pattern is formed so as to cover a region other than each electrode finally obtained.

(第2の実施の形態)
以下に、本発明の第2の実施の形態における三次元基板間接続構造体について説明する。
(Second Embodiment)
The three-dimensional inter-substrate connection structure in the second embodiment of the present invention will be described below.

図4(A)は本発明の第2の実施の形態における三次元基板間接続構造体36の構成を示す平面図、図4(B)、図4(C)および図4(D)はそれぞれ図4(A)中のA−A線断面図、B−B線断面図およびC−C線断面図である。   4A is a plan view showing a configuration of the three-dimensional inter-substrate connection structure 36 according to the second embodiment of the present invention, and FIGS. 4B, 4C, and 4D are respectively shown. It is the sectional view on the AA line in FIG. 4 (A), the BB sectional drawing, and the CC sectional view.

本発明の第2の実施の形態は、バンプとして、はんだバンプを設ける点で第1の実施の形態とは異なるものである。そこで、以下では、第1の実施の形態の構成および製造方法の異なる点について主として説明する。なお、第1の実施の形態と同じ要素には同一符号を付し説明する。   The second embodiment of the present invention is different from the first embodiment in that solder bumps are provided as bumps. In the following, therefore, differences between the configuration and the manufacturing method of the first embodiment will be mainly described. In addition, the same code | symbol is attached | subjected and demonstrated to the same element as 1st Embodiment.

図4に示すように、三次元基板間接続構造体36は、第1の実施の形態と同様、ガラスエポキシ樹脂のハウジング8の上部面14上に上面接続端子電極18a、20a、接地電極12a、下部面16上に下面接続端子電極18b、20b、接地電極12b、外周部4の側面上にシールド電極10、内周部6の側面上に側面接続電極18c、20cなどを備えている。   As shown in FIG. 4, the three-dimensional inter-substrate connection structure 36 is similar to the first embodiment in that the upper surface connection terminal electrodes 18 a and 20 a, the ground electrode 12 a, and the ground electrode 12 a are formed on the upper surface 14 of the glass epoxy resin housing 8. On the lower surface 16, there are provided lower surface connection terminal electrodes 18 b and 20 b, a ground electrode 12 b, a shield electrode 10 on the side surface of the outer peripheral portion 4, and side connection electrodes 18 c and 20 c on the side surface of the inner peripheral portion 6.

そして、図4(C)と図4(D)に示すように、この三次元基板間接続構造体36の上面接続端子電極18a、20aには、反りの中心線(D−D)から遠ざかるにしたがって、サイズの異なるはんだバンプ38が複数形成される。この時、以下で図5を用いて詳細に説明するように、はんだバンプ38のサイズ(大きさ、高さなど)が、三次元基板間接続構造体36の、例えば反りなどの変形に対応した形状で形成される。   As shown in FIGS. 4C and 4D, the upper surface connection terminal electrodes 18a and 20a of the three-dimensional inter-substrate connection structure 36 are moved away from the center line (DD) of warpage. Therefore, a plurality of solder bumps 38 having different sizes are formed. At this time, as will be described in detail with reference to FIG. 5 below, the size (size, height, etc.) of the solder bump 38 corresponds to the deformation of the three-dimensional inter-substrate connection structure 36 such as warpage. Formed in shape.

これにより、三次元基板間接続構造体を介して、接続される回路基板の反りなどの機械的な変形を有効に吸収することができる。   Accordingly, mechanical deformation such as warping of the circuit board to be connected can be effectively absorbed via the three-dimensional inter-substrate connection structure.

以下に、本発明の第2の実施の形態における三次元基板間接続構造体を用いて、回路基板の反りなどの機械的な変形を吸収するメカニズムについて、第1の実施の形態と同様な反りを想定し説明する。   Hereinafter, a mechanism for absorbing mechanical deformation such as warping of a circuit board using the three-dimensional inter-substrate connection structure according to the second embodiment of the present invention will be warped as in the first embodiment. This will be explained.

図5(A)は本発明の第2の実施の形態における第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板と接続する前の状態を示す断面図で、図5(B)は第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板に接合した時の状態を示す断面図である。   FIG. 5A is a cross-sectional view showing a state before connecting the three-dimensional inter-substrate connection structure joined to the first circuit board in the second embodiment of the present invention to the second circuit board. FIG. 5B is a cross-sectional view showing a state when the three-dimensional inter-substrate connection structure bonded to the first circuit board is bonded to the second circuit board.

図5(A)に示すように、第1の回路基板24の接続電極(図示せず)と三次元基板間接続構造体36の下面接続端子電極18bとをはんだなどによって接合(下面接続端子電極20bも同様)した場合、第1の回路基板24と三次元基板間接続構造体36の熱膨張係数とが異なる。例えば、第1の回路基板24の熱膨張係数が三次元基板間接続構造体36よりも大きい場合、三次元基板間接続構造体36は第1の回路基板24によって引張り力を受けて下方に凸状の形状となる。   As shown in FIG. 5A, the connection electrode (not shown) of the first circuit board 24 and the lower surface connection terminal electrode 18b of the three-dimensional inter-substrate connection structure 36 are joined by solder or the like (lower surface connection terminal electrode). 20b, the thermal expansion coefficients of the first circuit board 24 and the three-dimensional inter-substrate connection structure 36 are different. For example, when the thermal expansion coefficient of the first circuit board 24 is larger than that of the three-dimensional inter-board connection structure 36, the three-dimensional inter-board connection structure 36 receives a tensile force from the first circuit board 24 and protrudes downward. It becomes a shape.

そこで、図5(A)に示すように、凸状の三次元基板間接続構造体36と第2の回路基板26とを接続する際に、はんだバンプ38の大きさや高さを、凸状の反りの形状に対応させて変化させる。例えば、上記の場合、反りの中心線(D−D)から外側に向かうにしたがって接続端子電極上に高さの高い、例えば錫、銀、銅(SnAgCu)系などのはんだバンプ38を形成するものである。   Therefore, as shown in FIG. 5A, when connecting the convex three-dimensional inter-substrate connection structure 36 and the second circuit board 26, the size and height of the solder bumps 38 are set to be convex. Change according to the shape of the warp. For example, in the above case, a solder bump 38 of a height such as tin, silver, copper (SnAgCu) is formed on the connection terminal electrode as it goes outward from the warp center line (DD). It is.

なお、はんだバンプ38は、以下の製造方法で説明するように、製造時のレジストパターンの開口部に挿入するはんだ量によってそのサイズ(高さや大きさなど)を制御することができる。   Note that the size (height, size, etc.) of the solder bump 38 can be controlled by the amount of solder inserted into the opening of the resist pattern at the time of manufacture, as will be described in the following manufacturing method.

つぎに、図5(B)に示すように、三次元基板間接続構造体36の上面接続端子電極上に形成したはんだバンプ38を加熱加圧し、第2の回路基板26の接続電極(図示せず)にはんだを溶融させて接合する。この場合、第1の実施の形態とは異なり第2の回路基板26の接続端子とは直接に接合される。   Next, as shown in FIG. 5B, the solder bumps 38 formed on the upper surface connection terminal electrodes of the three-dimensional inter-substrate connection structure 36 are heated and pressed to connect the connection electrodes (not shown) of the second circuit board 26. 2) Solder is melted and joined. In this case, unlike the first embodiment, the connection terminal of the second circuit board 26 is directly joined.

これにより、反りなどの機械的な変形をサイズの異なるはんだバンプ38によって吸収し、強固な接続を得ることができる。さらに、第1の実施の形態のように、第2の回路基板26の接続電極(図示せず)の周囲に熱硬化性エポキシ樹脂を主成分とする接着層28を塗布して硬化させてもよい。   Thereby, mechanical deformation such as warpage can be absorbed by the solder bumps 38 having different sizes, and a firm connection can be obtained. Further, as in the first embodiment, an adhesive layer 28 mainly composed of a thermosetting epoxy resin may be applied around the connection electrode (not shown) of the second circuit board 26 and cured. Good.

以下に、本発明の第2の実施の形態における三次元基板間接続構造体の製造方法について説明する。   Below, the manufacturing method of the three-dimensional board-to-board connection structure in the 2nd Embodiment of this invention is demonstrated.

図6は、本発明の第2の実施の形態における三次元基板間接続構造体の製造方法の主な工程図である。そして、図6(A)、図6(D)、図6(G)、図6(J)は、三次元基板間接続構造体の各製造工程における平面図である。また、図6(B)、図6(E)、図6(H)、図6(K)は、各平面図中のB−B線断面図、図6(C)、図6(F)、図6(I)、図6(L)は、同E−E線断面図である。   FIG. 6 is a main process diagram of the method for manufacturing the three-dimensional inter-substrate connection structure according to the second embodiment of the present invention. 6A, 6D, 6G, and 6J are plan views in each manufacturing process of the three-dimensional inter-substrate connection structure. 6B, FIG. 6E, FIG. 6H, and FIG. 6K are cross-sectional views taken along line BB in each plan view, FIG. 6C, and FIG. 6F. 6 (I) and FIG. 6 (L) are sectional views taken along the line EE.

まず、図6(A)、図6(B)、図6(C)に示すように、例えばガラスエポキシ樹脂などを型成型して絶縁性基板(ハウジング)30を用意する。   First, as shown in FIG. 6A, FIG. 6B, and FIG. 6C, an insulating substrate (housing) 30 is prepared by molding, for example, glass epoxy resin.

つぎに、図6(D)、図6(E)、図6(F)に示すように、型成型した絶縁性基板30の全面にエッチング用のレジストを塗布し、紫外線を照射して所定のパターンで露光・現像処理を行いレジストパターン34を得る。   Next, as shown in FIGS. 6 (D), 6 (E), and 6 (F), an etching resist is applied to the entire surface of the molded insulating substrate 30, and ultraviolet rays are irradiated to form a predetermined pattern. The resist pattern 34 is obtained by performing exposure / development processing with the pattern.

つぎに、図6(G)、図6(H)、図6(I)に示すように、レジストパターン34が形成されていない絶縁性基板30が露出した面を粗化して、例えばパラジウム塩などのめっき触媒を全体に塗布する。そして、無電解銅めっき法を用いて、全面に所定の厚みの銅めっき層32を形成する。その後、少なくとも上面接続端子電極の位置に相当する開口部に、レジストパターン34で形成された開口部中の銅めっき層32上に、SnAgCu系などのはんだ量を、反りの中心線(D−D)から遠ざかる上面接続端子電極18a、20aほど多く挿入し、はんだバンプ38のサイズを制御する。すなわち、はんだバンプ38のサイズを反りの中心ほど小さく、遠ざかるほど大きく形成する。レジストパターン34の開口部中にはんだが挿入されるため、隣接する上面接続端子電極に流動して電気的に接触するなどの問題が発生することがない。   Next, as shown in FIGS. 6 (G), 6 (H), and 6 (I), the surface on which the insulating substrate 30 on which the resist pattern 34 is not formed is roughened, for example, palladium salt or the like. The plating catalyst is applied to the whole. Then, a copper plating layer 32 having a predetermined thickness is formed on the entire surface by using an electroless copper plating method. Thereafter, at least in the opening corresponding to the position of the upper surface connection terminal electrode, the amount of solder such as SnAgCu based on the copper plating layer 32 in the opening formed by the resist pattern 34 is set to the center line (DD) of the warp. The upper surface connection terminal electrodes 18a and 20a that are farther away from each other are inserted as many as possible, and the size of the solder bumps 38 is controlled. That is, the size of the solder bump 38 is reduced as the warp center increases and increases as the distance increases. Since the solder is inserted into the opening of the resist pattern 34, there is no problem of flowing into an electrical contact with the adjacent upper surface connection terminal electrode.

つぎに、図6(J)、図6(K)、図6(L)に示すように、レジストパターンをリフトオフして、上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極を形成する。   Next, as shown in FIGS. 6 (J), 6 (K), and 6 (L), the resist pattern is lifted off, and the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode, and the shield. An electrode is formed.

以上の工程により、図4に示す三次元基板間接続構造体36が作製される。   Through the above steps, the three-dimensional inter-substrate connection structure 36 shown in FIG. 4 is produced.

なお、レジストの塗布、露光条件や材料、無電解銅めっき法の条件や材料などは第1の実施の形態と同様である。   Note that resist application, exposure conditions and materials, and conditions and materials for the electroless copper plating method are the same as those in the first embodiment.

(第3の実施の形態)
以下に、本発明の第3の実施の形態における三次元基板間接続構造体について説明する。
(Third embodiment)
Hereinafter, a three-dimensional inter-substrate connection structure according to the third embodiment of the present invention will be described.

図7(A)は本発明の第3の実施の形態における三次元基板間接続構造体36の構成を示す平面図、図7(B)、図7(C)および図7(D)はそれぞれ図7(A)中のA−A線断面図、B−B線断面図およびC−C線断面図である。   FIG. 7A is a plan view showing the configuration of the three-dimensional inter-substrate connection structure 36 according to the third embodiment of the present invention, and FIGS. 7B, 7C, and 7D are respectively shown. It is the sectional view on the AA line in FIG. 7 (A), the BB sectional view, and the CC sectional view.

本発明の第3の実施の形態は、スタッドバンプやはんだバンプの代わりに絶縁性基板自体に形状(特に、高さ)の異なる突起を形成しバンプ(以下、「基板バンプ」と記す)とする点で、第1の実施の形態や第2の実施の形態とは異なるものである。そこで、以下では、第1の実施の形態や第2の実施の形態の構成および製造方法と異なる点について主として説明する。なお、第1の実施の形態や第2の実施の形態と同じ要素には同一符号を付し説明する。   In the third embodiment of the present invention, bumps (hereinafter referred to as “substrate bumps”) are formed by forming protrusions having different shapes (particularly heights) on the insulating substrate itself instead of stud bumps or solder bumps. In this respect, this embodiment is different from the first embodiment and the second embodiment. Therefore, the following description will mainly focus on differences from the configuration and the manufacturing method of the first embodiment and the second embodiment. In addition, the same code | symbol is attached | subjected and demonstrated to the same element as 1st Embodiment or 2nd Embodiment.

図7に示すように、三次元基板間接続構造体40は、ガラスエポキシ樹脂のハウジング46の少なくとも上部面14上に突起44を形成し、その突起44を覆うように上面接続端子電極18a、20aが形成されて基板バンプ42を備えた構成を有する。そして、第1の実施の形態と同様に、ハウジング46の上部面14上には、上面接続端子電極18a、20a、接地電極12a、下部面16上には下面接続端子電極18b、20b、接地電極12b、外周部4の側面上にはシールド電極10、内周部6の側面上に側面接続電極18c、20cなどを備えている。   As shown in FIG. 7, in the three-dimensional inter-substrate connection structure 40, a protrusion 44 is formed on at least the upper surface 14 of the glass epoxy resin housing 46, and the upper surface connection terminal electrodes 18a, 20a are covered so as to cover the protrusion 44. Is formed and the substrate bump 42 is provided. Similarly to the first embodiment, the upper surface connection terminal electrodes 18 a and 20 a and the ground electrode 12 a are formed on the upper surface 14 of the housing 46, and the lower surface connection terminal electrodes 18 b and 20 b and the ground electrode are formed on the lower surface 16. 12 b, the shield electrode 10 is provided on the side surface of the outer peripheral portion 4, and the side connection electrodes 18 c and 20 c are provided on the side surface of the inner peripheral portion 6.

そして、図7(C)と図7(D)に示すように、この三次元基板間接続構造体40は反りの中心線(D−D)から遠ざかるにしたがってサイズの大きくなる基板バンプ42が複数設けられている。この時、基板バンプ42のサイズ(大きさ、高さなど)は、回路基板の変形量に対応して、ハウジング46の面上の突起44のサイズをあらかじめ型成型時に、設定して成型される。   As shown in FIGS. 7C and 7D, the three-dimensional inter-substrate connection structure 40 has a plurality of substrate bumps 42 that increase in size as the distance from the center line (DD) of warpage increases. Is provided. At this time, the size (size, height, etc.) of the substrate bump 42 is formed by setting the size of the protrusion 44 on the surface of the housing 46 in advance at the time of molding, corresponding to the amount of deformation of the circuit board. .

これにより、三次元基板間接続構造体を介して、接続される回路基板の反りなどの機械的な変形に対して、均一な接触を実現できる。   Thereby, uniform contact can be realized against mechanical deformation such as warpage of the circuit board to be connected via the three-dimensional inter-substrate connection structure.

以下に、本発明の第3の実施の形態における三次元基板間接続構造体を用いて、回路基板の反りなどの機械的な変形を吸収するメカニズムについて、第1の実施の形態と同様な反りを想定し説明する。   Hereinafter, a mechanism for absorbing mechanical deformation such as warping of the circuit board using the three-dimensional inter-substrate connection structure according to the third embodiment of the present invention will be warped as in the first embodiment. This will be explained.

図8(A)は本発明の第3の実施の形態における第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板と接続する前の状態を示す断面図で、図8(B)は第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板に接合した時の状態を示す断面図である。   FIG. 8A is a cross-sectional view showing a state before connecting the three-dimensional inter-substrate connection structure joined to the first circuit board in the third embodiment of the present invention to the second circuit board. FIG. 8B is a cross-sectional view showing a state when the three-dimensional inter-substrate connection structure bonded to the first circuit board is bonded to the second circuit board.

図8(A)に示すように、第1の回路基板24の接続電極(図示せず)と三次元基板間接続構造体40の下面接続端子電極18bとをはんだなどによって接合(下面接続端子電極20bも同様)した場合、第1の回路基板24と三次元基板間接続構造体40の熱膨張係数とが異なる。例えば、第1の回路基板24の熱膨張係数が三次元基板間接続構造体40よりも大きい場合、三次元基板間接続構造体40は第1の回路基板24によって引張り力を受けて下方に凸状の形状となる。   As shown in FIG. 8A, the connection electrode (not shown) of the first circuit board 24 and the lower surface connection terminal electrode 18b of the three-dimensional inter-substrate connection structure 40 are joined by solder or the like (lower surface connection terminal electrode). 20b), the thermal expansion coefficients of the first circuit board 24 and the three-dimensional inter-substrate connection structure 40 are different. For example, when the thermal expansion coefficient of the first circuit board 24 is larger than that of the three-dimensional inter-board connection structure 40, the three-dimensional inter-board connection structure 40 receives a tensile force from the first circuit board 24 and protrudes downward. It becomes a shape.

そこで、図8(A)に示すように、凸状の三次元基板間接続構造体40と第2の回路基板26とを接続する際、基板バンプ42の大きさや高さを、凸状の反りの形状に対応させて変化させる。例えば、上記の場合、反りの中心線(D−D)から外側に向かうにしたがって接続端子電極上にサイズの大きい基板バンプ42を形成したものである。   Therefore, as shown in FIG. 8A, when the convex three-dimensional inter-substrate connection structure 40 and the second circuit board 26 are connected, the size and height of the substrate bumps 42 are set to convex warpage. It changes according to the shape of. For example, in the above case, a substrate bump 42 having a larger size is formed on the connection terminal electrode from the center line (DD) of warpage toward the outside.

つぎに、図8(B)に示すように、三次元基板間接続構造体40上で、例えば銅めっき層32の上面接続端子電極18a、20aで覆われて形成された基板バンプ42と対向する第2の回路基板26の接続電極(図示せず)の面側に、例えば熱硬化性エポキシ樹脂を主成分とする接着層28を塗布する。   Next, as shown in FIG. 8B, the substrate bumps 42 are formed on the three-dimensional inter-substrate connection structure 40 so as to be covered with the upper surface connection terminal electrodes 18a and 20a of the copper plating layer 32, for example. An adhesive layer 28 mainly composed of, for example, a thermosetting epoxy resin is applied to the surface side of the connection electrode (not shown) of the second circuit board 26.

そして、三次元基板間接続構造体40の基板バンプ42を接着層28の上から熱圧着して、基板バンプ42の先端を覆う銅めっき層32を変形させ第2の回路基板26の接続端子電極(図示せず)に圧接させるとともに、接着層28を熱硬化させる。この時、接着層28の熱収縮によって、基板バンプ42が第2の回路基板26の接続端子電極に押し付けられて、三次元基板間接続構造体40と均一に接続する。すなわち、反りなどの機械的な変形を有する回路基板に対しても、サイズの異なる基板バンプで均一に接続させることができる。また、均一に接続できるため、バンプを部分的に変形させる必要がなく、低荷重での接続が可能となる。   Then, the substrate bump 42 of the three-dimensional inter-substrate connection structure 40 is thermocompression-bonded from above the adhesive layer 28 to deform the copper plating layer 32 that covers the tip of the substrate bump 42 to connect the connection terminal electrode of the second circuit board 26. (Not shown), and the adhesive layer 28 is thermally cured. At this time, the substrate bumps 42 are pressed against the connection terminal electrodes of the second circuit board 26 by the thermal contraction of the adhesive layer 28, and are uniformly connected to the three-dimensional inter-substrate connection structure 40. That is, even a circuit board having mechanical deformation such as warpage can be uniformly connected by board bumps having different sizes. Further, since the connection can be made uniformly, it is not necessary to partially deform the bump, and connection with a low load is possible.

以下に、本発明の第3の実施の形態における三次元基板間接続構造体の製造方法について説明する。   Below, the manufacturing method of the connection structure between three-dimensional boards in the 3rd Embodiment of this invention is demonstrated.

図9は、本発明の第3の実施の形態における三次元基板間接続構造体の製造方法の主な工程図である。そして、図9(A)、図9(D)、図9(G)、図9(J)は、三次元基板間接続構造体の各製造工程における平面図である。また、図9(B)、図9(E)、図9(H)、図9(K)は、各平面図中のB−B線断面図、図9(C)、図9(F)、図9(I)、図9(L)は、同E−E線断面図である。   FIG. 9 is a main process diagram of the method of manufacturing the three-dimensional inter-substrate connection structure according to the third embodiment of the present invention. 9A, 9D, 9G, and 9J are plan views in each manufacturing process of the three-dimensional inter-substrate connection structure. 9B, FIG. 9E, FIG. 9H, and FIG. 9K are cross-sectional views taken along line BB in each plan view, FIG. 9C, and FIG. 9F. 9 (I) and FIG. 9 (L) are cross-sectional views taken along the line EE.

まず、図9(A)、図9(B)、図6(C)に示すように、例えばガラスエポキシ樹脂などを型成型して複数のサイズの異なる突起44が一体的に形成された絶縁性基板(ハウジング)47を用意する。この時、突起44は、回路基板などの反りに対応して、例えば下向きで凸状の場合には、反りの中心線(D−D)に近いほどサイズが小さく、遠ざかるほどサイズが大きく形成される。   First, as shown in FIGS. 9 (A), 9 (B), and 6 (C), for example, a glass epoxy resin or the like is molded and a plurality of protrusions 44 having different sizes are integrally formed. A substrate (housing) 47 is prepared. At this time, the protrusion 44 is formed to correspond to the warp of the circuit board or the like, for example, when it is downward and convex, the size is smaller as it is closer to the warp center line (DD), and the size is larger as it is farther away. The

つぎに、図9(D)、図9(E)、図9(F)に示すように、突起44を含む絶縁性基板47の上部面、下部面、外周部側面、内周部の側面を粗化して、例えばパラジウム塩などのめっき触媒を全体に塗布する。そして、無電解銅めっき法を用いて、所定の厚みの銅めっき層32を形成する。   Next, as shown in FIGS. 9D, 9E, and 9F, the upper surface, the lower surface, the outer peripheral side surface, and the inner peripheral side surface of the insulating substrate 47 including the protrusions 44 are arranged. After roughening, for example, a plating catalyst such as a palladium salt is applied to the entire surface. And the copper plating layer 32 of predetermined thickness is formed using an electroless copper plating method.

つぎに、図9(G)、図9(H)、図9(I)に示すように、形成した銅めっき層32上の全体にわたってエッチング用のレジストを塗布し、紫外線を照射して所定のパターンで露光・現像処理する。これにより、最終的に上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極上を覆うレジストパターン34が得られる。   Next, as shown in FIGS. 9 (G), 9 (H), and 9 (I), an etching resist is applied over the formed copper plating layer 32 and irradiated with ultraviolet rays to form a predetermined Perform exposure and development with patterns. Thereby, a resist pattern 34 that finally covers the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode, and the shield electrode is obtained.

つぎに、図9(J)、図9(K)、図9(L)に示すように、レジストパターン34を形成した後、所定の溶液で銅をエッチングする。そして、レジストパターン34を剥離し所定の上面接続端子電極18a、20a、下面接続端子電極18b、20b、側面接続電極18c、20c、シールド電極10および接地電極12a、12bを形成する。この時、銅めっき層32で覆われた突起44を含む基板バンプ42が、所定の形状で形成される。上記工程により、図7に示す三次元基板間接続構造体40が作製される。   Next, as shown in FIGS. 9J, 9K, and 9L, after forming a resist pattern 34, copper is etched with a predetermined solution. Then, the resist pattern 34 is peeled off to form predetermined upper surface connection terminal electrodes 18a and 20a, lower surface connection terminal electrodes 18b and 20b, side surface connection electrodes 18c and 20c, shield electrode 10 and ground electrodes 12a and 12b. At this time, the substrate bump 42 including the protrusion 44 covered with the copper plating layer 32 is formed in a predetermined shape. Through the above steps, the three-dimensional inter-substrate connection structure 40 shown in FIG. 7 is produced.

なお、レジストに用いる条件および材料、無電解銅めっき法に用いる条件および材料などは第1の実施の形態と同様である。   The conditions and materials used for the resist and the conditions and materials used for the electroless copper plating method are the same as those in the first embodiment.

また、上記製造方法では、第1の実施の形態と同様に、めっき層を形成後、レジストパターンで各電極を形成する例で説明したが、これに限られない。例えば、レジストパターンを形成後、めっき層を形成して、各電極をリフトオフ法などで形成してもよい。この場合、レジストパターンの位置が最終的に得られる各電極以外の領域を覆う形で形成される。   Moreover, although the said manufacturing method demonstrated the example which forms each electrode with a resist pattern after forming a plating layer like 1st Embodiment, it is not restricted to this. For example, after forming a resist pattern, a plating layer may be formed, and each electrode may be formed by a lift-off method or the like. In this case, the position of the resist pattern is formed so as to cover a region other than each electrode finally obtained.

以下に、本発明の第3の実施の形態における三次元基板間接続構造体の製造方法の別の例について、図10を用いて説明する。なお、図10(A)から図10(F)は、上述した製造工程と同じであるため説明は省略する。   Hereinafter, another example of the method for manufacturing the three-dimensional inter-substrate connection structure according to the third embodiment of the present invention will be described with reference to FIG. Note that FIG. 10A to FIG. 10F are the same as the manufacturing steps described above, and thus description thereof is omitted.

すなわち、図10(G)、図10(H)、図10(I)に示すように、絶縁性基板(ハウジング)47の全面に、例えば銅めっき層32を形成した後、レーザビームを用いて、直接、上面接続端子電極、下面接続端子電極、側面接続電極、接地電極およびシールド電極以外の箇所の銅めっき層32を除去しパターンニングする。   That is, as shown in FIGS. 10G, 10H, and 10I, for example, a copper plating layer 32 is formed on the entire surface of the insulating substrate (housing) 47, and then a laser beam is used. Directly, the copper plating layer 32 at portions other than the upper surface connection terminal electrode, the lower surface connection terminal electrode, the side surface connection electrode, the ground electrode and the shield electrode is removed and patterned.

これにより、図7に示すような基板バンプ42が形成された三次元基板間接続構造体40を容易に作製できる。   Thereby, the three-dimensional inter-substrate connection structure 40 in which the substrate bumps 42 as shown in FIG. 7 are formed can be easily manufactured.

上記実施の形態によれば、レジスト処理・現像工程を省くことができ、工程を簡略化でき、生産性を高めることができる。   According to the above embodiment, the resist processing / development process can be omitted, the process can be simplified, and the productivity can be improved.

なお、上記製造方法では、レーザビームを用いたが、電子ビームも有効である。   In the above manufacturing method, a laser beam is used, but an electron beam is also effective.

(第4の実施の形態)
以下に、本発明の第4の実施の形態における三次元基板間接続構造体について説明する。
(Fourth embodiment)
The three-dimensional inter-substrate connection structure in the fourth embodiment of the present invention will be described below.

図11(A)は本発明の第4の実施の形態における三次元基板間接続構造体48の構成を示す平面図、図11(B)、図11(C)および図11(D)はそれぞれ図11(A)中のA−A線断面図、B−B線断面図およびC−C線断面図である。   FIG. 11A is a plan view showing the configuration of the three-dimensional inter-substrate connection structure 48 in the fourth embodiment of the present invention, and FIG. 11B, FIG. 11C, and FIG. They are AA sectional view taken on the line in FIG. 11 (A), BB sectional drawing, and CC sectional view.

本発明の第4の実施の形態は、ハウジングの外周部側面にシールド電極を配設しない点で、上記各実施の形態とは異なるものである。以下では、上記各実施の形態の構成と異なる点について主として説明する。なお、上記各実施の形態と同じ要素には同一符号を付し説明する。   The fourth embodiment of the present invention is different from the above-described embodiments in that no shield electrode is provided on the outer peripheral side surface of the housing. Hereinafter, differences from the configuration of each of the above embodiments will be mainly described. In addition, the same code | symbol is attached | subjected and demonstrated to the same element as said each embodiment.

一般に、シールド電極は、回路基板で扱われる信号の種類によっては必ずしも必要ではない。そのため、シールド電極が必要でない場合には、本実施の形態のように同じサイズの額縁形の枠状のハウジング8の外周部4と内周部6の側面上の両方に、側面接続電極を設けることができる。なお、以下では、第1の実施の形態と同様に、上面接続端子電極上にバンプとしてスタッドバンプを用いた例で説明する。そして、三次元基板間接続構造体の製造方法に関しても、各電極を形成するレジストパターンが異なるが、基本的に第1の実施の形態と同様であるので、説明は省略する。   In general, the shield electrode is not always necessary depending on the type of signal handled on the circuit board. Therefore, when the shield electrode is not necessary, side connection electrodes are provided on both the outer peripheral portion 4 and the inner peripheral portion 6 of the frame-shaped frame-shaped housing 8 of the same size as in the present embodiment. be able to. Hereinafter, as in the first embodiment, an example in which stud bumps are used as bumps on the upper surface connection terminal electrodes will be described. The method for manufacturing the three-dimensional inter-substrate connection structure is also different from the resist pattern for forming each electrode, but is basically the same as that in the first embodiment, and thus the description thereof is omitted.

図11に示すように、三次元基板間接続構造体48は、例えば四角形状の外周部4と内周部6を有する額縁形の枠状のガラスエポキシ樹脂などからなるハウジング8を備えている。また、ハウジング8の上部面14と下部面16で千鳥足状に複数個配設された接続端子電極18、50を有する。そして、接続端子電極18は、上部面14に形成された上面接続端子電極18a、下部面16上に形成された下面接続端子電極18bと内周部6の側面上に形成された側面接続電極18cと一体的に形成して構成される。一方、接続端子電極50は、上面接続端子電極50a、下面接続端子電極50bと外周部4の側面上に形成された側面接続電極50cとを一体的に形成して構成される。さらに、上面接続端子電極と下面接続端子電極は、接続する回路基板の接続端子と接触する千鳥足状に配置された接触領域と、その接触領域から引き出され側面接続電極と接続する引出し領域から構成されている。   As shown in FIG. 11, the three-dimensional inter-substrate connection structure 48 includes a housing 8 made of, for example, a frame-shaped frame-shaped glass epoxy resin having a rectangular outer peripheral portion 4 and an inner peripheral portion 6. In addition, a plurality of connection terminal electrodes 18 and 50 arranged in a staggered pattern on the upper surface 14 and the lower surface 16 of the housing 8 are provided. The connection terminal electrode 18 includes an upper surface connection terminal electrode 18a formed on the upper surface 14, a lower surface connection terminal electrode 18b formed on the lower surface 16, and a side connection electrode 18c formed on the side surface of the inner peripheral portion 6. And formed integrally. On the other hand, the connection terminal electrode 50 is configured by integrally forming an upper surface connection terminal electrode 50 a, a lower surface connection terminal electrode 50 b, and a side connection electrode 50 c formed on the side surface of the outer peripheral portion 4. Furthermore, the upper surface connection terminal electrode and the lower surface connection terminal electrode are composed of a contact region arranged in a staggered pattern that contacts the connection terminal of the circuit board to be connected, and a lead region that is drawn from the contact region and connected to the side connection electrode. ing.

そして、第1の実施の形態と同様に、例えばスタッドバンプなどの複数のバンプ22が、ハウジングの少なくとも上面接続端子電極18a、50aの各々の接触領域上に(回路基板の接続電極(図示せず)に対応する位置に)形成されている。この時、バンプ22のサイズ(大きさ、高さなど)が、三次元基板間接続構造体48の、例えば反りなどの変形に対応して形状で形成される。   Similarly to the first embodiment, a plurality of bumps 22 such as stud bumps are formed on at least the contact regions of the upper surface connection terminal electrodes 18a and 50a (connection electrodes on the circuit board (not shown)). ) Is formed at a position corresponding to). At this time, the size (size, height, etc.) of the bump 22 is formed in a shape corresponding to the deformation of the three-dimensional inter-substrate connection structure 48 such as warpage.

これにより、三次元基板間接続構造体を介して、接続される回路基板の反りなどの機械的な変形を有効に吸収することができる。   Accordingly, mechanical deformation such as warping of the circuit board to be connected can be effectively absorbed via the three-dimensional inter-substrate connection structure.

また、ハウジングの上部面から下部面にいたる側面接続電極間の間隔を広くできるとともに、第1の実施の形態のような隣接する上面接続端子電極の間に配線する引出し領域を除くことができる。その結果、隣接する側面接続電極相互間のノイズ、電磁波放射などの相互干渉を低減するとともに、接続端子電極の数を増すことができる。   In addition, the distance between the side connection electrodes from the upper surface to the lower surface of the housing can be widened, and the lead region for wiring between adjacent upper surface connection terminal electrodes as in the first embodiment can be eliminated. As a result, it is possible to reduce mutual interference such as noise and electromagnetic wave radiation between adjacent side surface connection electrodes and increase the number of connection terminal electrodes.

また、接地電極を省略できるため、その領域にさらに接続端子電極を形成し、接続端子電極の数を増加させることができる。   Further, since the ground electrode can be omitted, a connection terminal electrode can be further formed in the region, and the number of connection terminal electrodes can be increased.

なお、さらに接続端子電極数を増加させるには、以下で説明する図12の接続端子電極構成とすることができる。   In order to further increase the number of connection terminal electrodes, the connection terminal electrode configuration shown in FIG. 12 described below can be employed.

図12(A)は、本発明の第4の実施の形態における三次元基板間接続構造体の別の例を示す平面図、図12(B)、図12(C)および図12(D)はそれぞれ図12(A)中のA−A線断面図、B−B線断面図およびC−C線断面図である。   FIG. 12A is a plan view showing another example of the three-dimensional inter-substrate connection structure in the fourth embodiment of the present invention, FIG. 12B, FIG. 12C, and FIG. These are the sectional view on the AA line in FIG. 12 (A), the sectional view on the BB line, and the sectional view on the CC line, respectively.

図12に示すように、三次元基板間接続構造体52は、上部面14で上面接続端子電極20aと上面接続端子電極50aとを、下部面16上で下面接続端子電極20bと下面接続端子電極50bとを相対するように配置したものである。そして、上面接続端子電極20aと下面接続端子電極20bは内周部6の側面上の側面接続電極20cと接続し、上面接続端子電極50aと下面接続端子電極50bは外周部4の側面上の側面接続電極50cと電気的に接続している。   As shown in FIG. 12, the three-dimensional inter-substrate connection structure 52 includes an upper surface connection terminal electrode 20 a and an upper surface connection terminal electrode 50 a on the upper surface 14, and a lower surface connection terminal electrode 20 b and a lower surface connection terminal electrode on the lower surface 16. 50b is arranged so as to face each other. The upper surface connection terminal electrode 20a and the lower surface connection terminal electrode 20b are connected to the side surface connection electrode 20c on the side surface of the inner peripheral portion 6, and the upper surface connection terminal electrode 50a and the lower surface connection terminal electrode 50b are side surfaces on the side surface of the outer peripheral portion 4. It is electrically connected to the connection electrode 50c.

これにより、接続端子電極の数を大幅に増加させた三次元基板間接続構造体52を実現できる。同様に、図12に示すようにハウジング8の四隅の領域にも接続端子電極を配置することによってさらに増すことも可能である。   Thereby, the three-dimensional inter-substrate connection structure 52 in which the number of connection terminal electrodes is significantly increased can be realized. Similarly, as shown in FIG. 12, it is possible to further increase by arranging connection terminal electrodes in the four corner regions of the housing 8.

なお、本実施の形態では、バンプとしてスタッドバンプを例に説明したが、はんだバンプ、基板バンプの場合も同様に構成することができる。   In the present embodiment, the stud bump is described as an example of the bump. However, a solder bump and a substrate bump can be similarly configured.

なお、上記各実施の形態では、三次元基板間接続構造体の片面だけにバンプを配置したが、必要に応じて両面にバンプを設けてもよいことは説明するまでもない。   In each of the above embodiments, bumps are arranged only on one side of the three-dimensional inter-substrate connection structure, but needless to say, bumps may be provided on both sides as necessary.

(第5の実施の形態)
以下に、本発明の第5の実施の形態における立体回路装置について説明する。
(Fifth embodiment)
The three-dimensional circuit device according to the fifth embodiment of the present invention will be described below.

図13(A)は本発明の第5の実施の形態における立体回路装置の構成を示す斜視図で、図13(B)は図13(A)の部分拡大断面図である。   FIG. 13A is a perspective view showing a configuration of a three-dimensional circuit device according to the fifth embodiment of the present invention, and FIG. 13B is a partially enlarged sectional view of FIG.

なお、以下では、第1の実施の形態で説明した三次元基板間接続構造体2を用い、第1の実施の形態と同じ要素には同一符号を付し説明する。また、図13(A)において、説明を分かりやすくするために、回路基板の配線パターンを一部省略し、かつ回路基板間に挟まれた三次元基板間接続構造体2を透視して図示している。   In the following description, the three-dimensional inter-substrate connection structure 2 described in the first embodiment is used, and the same reference numerals are given to the same elements as those in the first embodiment. Further, in FIG. 13A, for ease of explanation, a part of the wiring pattern of the circuit board is omitted, and the three-dimensional inter-substrate connection structure 2 sandwiched between the circuit boards is shown in a perspective view. ing.

図13に示すように、立体回路装置54は、第1の回路基板24と第2の回路基板26とを三次元基板間接続構造体2を間に挟んで対向して接続した構成を有する。   As shown in FIG. 13, the three-dimensional circuit device 54 has a configuration in which the first circuit board 24 and the second circuit board 26 are connected to face each other with the three-dimensional inter-substrate connection structure 2 interposed therebetween.

ここで、第1の回路基板24には三次元基板間接続構造体2の内周部6内に収まるように、例えば高周波回路などのICチップからなる回路部品56が、第1の回路基板24に形成した配線パターン60の接続端子(図示せず)と、例えばはんだで接続し、所定の位置に実装されている。   Here, a circuit component 56 made of an IC chip such as a high-frequency circuit is placed on the first circuit board 24 so that the first circuit board 24 fits in the inner peripheral portion 6 of the three-dimensional inter-substrate connection structure 2. The wiring terminals 60 are connected to the connection terminals (not shown) of the wiring pattern 60 formed by soldering, for example, and mounted at predetermined positions.

そして、三次元基板間接続構造体2の下面接続端子電極18b、20bと第1の回路基板24の所定の配線パターン60の接続端子(図示せず)がはんだなどで接続されている。さらに、三次元基板間接続構造体2の上面接続端子電極18a、20a上のバンプ22と第2の回路基板26に設けた所定の配線パターン62の接続端子(図示せず)とが接続されている。   The lower surface connection terminal electrodes 18b and 20b of the three-dimensional inter-substrate connection structure 2 and the connection terminals (not shown) of the predetermined wiring pattern 60 of the first circuit board 24 are connected by solder or the like. Further, the bumps 22 on the upper surface connection terminal electrodes 18a and 20a of the three-dimensional inter-substrate connection structure 2 and the connection terminals (not shown) of a predetermined wiring pattern 62 provided on the second circuit board 26 are connected. Yes.

また、三次元基板間接続構造体2に設けられた接地電極12aと第1の回路基板24、接地電極12bと第2の回路基板26にそれぞれ設けた接地配線パターン64、66間とを接続してアース電位に接地されている。   In addition, the ground electrode 12a provided in the three-dimensional inter-substrate connection structure 2 and the first circuit board 24, and the ground electrode 12b and the ground wiring patterns 64 and 66 provided in the second circuit board 26, respectively, are connected. To earth potential.

さらに、接地電極12a、12bは、三次元基板間接続構造体2に設けたシールド電極10と接続される。   Furthermore, the ground electrodes 12 a and 12 b are connected to the shield electrode 10 provided in the three-dimensional inter-substrate connection structure 2.

これにより、三次元基板間接続構造体2で内包された回路部品56や上面接続端子電極18a、20a、下面接続端子電極18b、20b、側面接続電極18c、20cをシールドし、外部からのノイズや接続端子電極および回路部品56で発生する内部ノイズの放射などを効率よく遮蔽する。   As a result, the circuit component 56, the upper surface connection terminal electrodes 18a and 20a, the lower surface connection terminal electrodes 18b and 20b, and the side surface connection electrodes 18c and 20c included in the three-dimensional inter-substrate connection structure 2 are shielded, and external noise and Emission of internal noise generated in the connection terminal electrode and the circuit component 56 is efficiently shielded.

本実施の形態によれば、サイズの異なるバンプを有しシールド電極を備えた三次元基板間接続構造体を介して、複数の回路基板間を、反りなどの機械的な変形を有効に吸収して良好に接続できる。さらに、ノイズなどによる誤動作を生じない信頼性に優れた薄型の立体回路装置を実現できる。   According to the present embodiment, mechanical deformation such as warpage is effectively absorbed between a plurality of circuit boards via a three-dimensional board-to-board connection structure having bumps of different sizes and having shield electrodes. Can be connected well. Furthermore, it is possible to realize a thin three-dimensional circuit device with excellent reliability that does not cause malfunction due to noise or the like.

なお、本実施の形態において、第1の回路基板に回路部品を実装する例で説明したが、これに限らない。例えば、第2の回路基板や、第1の回路基板と第2の回路基板の両方に回路部品を実装してもよい。これにより、シールドが必要なる回路部品を多数実装することができる。   In this embodiment, the example in which circuit components are mounted on the first circuit board has been described, but the present invention is not limited to this. For example, the circuit components may be mounted on the second circuit board or on both the first circuit board and the second circuit board. As a result, a large number of circuit components that require shielding can be mounted.

また、本実施の形態では、第1の実施の形態の三次元基板間接続構造体2を用いて説明したが、上記各実施の形態で説明した三次元基板間接続構造体を用いてもよく、同様な効果を奏するものである。   In the present embodiment, the three-dimensional board-to-board connection structure 2 of the first embodiment has been described. However, the three-dimensional board-to-board connection structure described in the above embodiments may be used. , Have the same effect.

また、本実施の形態では、三次元基板間接続構造体を介して回路基板を2枚接続する例で説明したが、これに限られない。例えば、3枚以上の複数枚をそれぞれ三次元基板間接続構造体を介して多段接続してもよい。これにより、シールドが必要な回路部品を独立にシールドできるため、電磁波干渉を未然に防ぐことができる。また、複数の回路基板間を別々に中継できるため、複雑な回路基板配置などに容易に対応できる。さらに、複数の三次元基板間接続構造体により、立体回路装置の機械的な強度の向上や取り扱いが容易な構成とすることができる。   In the present embodiment, an example in which two circuit boards are connected via a three-dimensional inter-substrate connection structure has been described. However, the present invention is not limited to this. For example, a plurality of three or more sheets may be connected in multiple stages via a three-dimensional inter-substrate connection structure. Thereby, since the circuit component which needs a shield can be shielded independently, electromagnetic interference can be prevented beforehand. In addition, since a plurality of circuit boards can be relayed separately, it is possible to easily cope with complicated circuit board arrangements. Furthermore, the plurality of three-dimensional inter-substrate connection structures can make the structure of the three-dimensional circuit device easy to improve and handle.

また、上記各実施の形態において、接続端子電極をハウジングの全周にわたって設けた例で説明したが、これに限られない。例えば、ハウジング形状が四角形の場合、一辺、対向する辺または三辺など部分的に設けてもよい。   Moreover, in each said embodiment, although the example which provided the connection terminal electrode over the perimeter of the housing demonstrated, it is not restricted to this. For example, when the housing shape is a quadrangle, it may be partially provided such as one side, opposite sides, or three sides.

また、上記各実施の形態において、枠状のハウジングを例に説明したが、これに限られない。例えば、円形、多角形など接続する構成に合わせた任意の形状としてもよい。   Moreover, in each said embodiment, although the frame-shaped housing was demonstrated to the example, it is not restricted to this. For example, it is good also as arbitrary shapes according to the structure to connect, such as circular and a polygon.

本発明に係る三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置は、軽薄短小化が進む情報携帯機器などの技術分野において有用である。   The three-dimensional inter-substrate connection structure according to the present invention, the manufacturing method thereof, and the three-dimensional circuit device using the same are useful in technical fields such as portable information devices that are becoming lighter and thinner.

(A)本発明の第1の実施の形態における三次元基板間接続構造体の構成を示す平面図(B)図1(A)のA−A線断面図(C)図1(A)のB−B線断面図(D)図1(A)のC−C線断面図(A) Plan view showing the configuration of the three-dimensional inter-substrate connection structure in the first embodiment of the present invention (B) Cross-sectional view taken along the line A-A in FIG. 1 (A) (C) in FIG. BB sectional view (D) CC sectional view of FIG. 1 (A) (A)同実施の形態における第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板と接続する前の状態を示す断面図(B)第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板に接合した時の状態を示す断面図(A) Cross-sectional view showing a state before connecting the three-dimensional inter-substrate connection structure bonded to the first circuit board in the embodiment to the second circuit board. (B) Bonded to the first circuit board. Sectional drawing which shows a state when the three-dimensional inter-substrate connection structure is joined to the second circuit board 同実施の形態における三次元基板間接続構造体の製造方法の主な工程図The main process drawing of the manufacturing method of the connection structure between three-dimensional boards in the embodiment (A)本発明の第2の実施の形態における三次元基板間接続構造体の構成を示す平面図(B)図4(A)のA−A線断面図(C)図4(A)のB−B線断面図(D)図4(A)のC−C線断面図(A) Plan view showing the configuration of the three-dimensional inter-substrate connection structure according to the second embodiment of the present invention (B) A-A line cross-sectional view of FIG. 4 (A) (C) FIG. 4 (A) BB line sectional view (D) CC line sectional view of FIG. 4 (A) (A)同実施の形態における第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板と接続する前の状態を示す断面図(B)第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板に接合した時の状態を示す断面図(A) Cross-sectional view showing a state before connecting the three-dimensional inter-substrate connection structure bonded to the first circuit board in the embodiment to the second circuit board. (B) Bonded to the first circuit board. Sectional drawing which shows a state when the three-dimensional inter-substrate connection structure is joined to the second circuit board 同実施の形態における三次元基板間接続構造体の製造方法の主な工程図The main process drawing of the manufacturing method of the connection structure between three-dimensional boards in the embodiment (A)本発明の第3の実施の形態における三次元基板間接続構造体の構成を示す平面図(B)図7(A)のA−A線断面図(C)図7(A)のB−B線断面図(D)図7(A)のC−C線断面図(A) Plan view showing the configuration of the three-dimensional inter-substrate connection structure in the third embodiment of the present invention (B) AA cross-sectional view of FIG. 7 (A) (C) FIG. 7 (A) BB sectional view (D) CC sectional view of FIG. 7 (A) (A)同実施の形態における第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板と接続する前の状態を示す断面図(B)第1の回路基板と接合した三次元基板間接続構造体を第2の回路基板に接合した時の状態を示す断面図(A) Cross-sectional view showing a state before connecting the three-dimensional inter-substrate connection structure bonded to the first circuit board in the embodiment to the second circuit board. (B) Bonded to the first circuit board. Sectional drawing which shows a state when the three-dimensional inter-substrate connection structure is joined to the second circuit board 同実施の形態における三次元基板間接続構造体の製造方法の主な工程図The main process drawing of the manufacturing method of the connection structure between three-dimensional boards in the embodiment 同実施の形態における三次元基板間接続構造体の製造方法の別の例を示す工程図Process drawing which shows another example of the manufacturing method of the connection structure between three-dimensional boards in the embodiment (A)本発明の第4の実施の形態における三次元基板間接続構造体の構成を示す平面図(B)図11(A)のA−A線断面図(C)図11(A)のB−B線断面図(D)図11(A)のC−C線断面図(A) Plan view showing the configuration of the three-dimensional inter-substrate connection structure according to the fourth embodiment of the present invention (B) A-A line cross-sectional view of FIG. 11 (A) (C) of FIG. 11 (A) BB sectional view (D) CC sectional view of FIG. 11 (A) (A)本発明の第4の実施の形態における三次元基板間接続構造体の別の例を示す平面図(B)図12(A)のA−A線断面図(C)図12(A)のB−B線断面図(D)図12(A)のC−C線断面図(A) Plan view showing another example of the three-dimensional inter-substrate connection structure according to the fourth embodiment of the present invention (B) A cross-sectional view taken along line AA in FIG. 12 (A) (C) FIG. BB line sectional view of () (D) CC line sectional view of FIG. 12 (A) (A)本発明の第5の実施の形態における立体回路装置の構成を示す斜視図(B)図13(A)の部分拡大断面図(A) Perspective view showing the configuration of the three-dimensional circuit device according to the fifth embodiment of the present invention (B) Partial enlarged sectional view of FIG. 13 (A)

符号の説明Explanation of symbols

2,36,40,48,52 三次元基板間接続構造体
4 外周部
6 内周部
8,46 ハウジング
10 シールド電極
12a,12b 接地電極
14 上部面
16 下部面
18,20,50 接続端子電極
18a,20a,50a 上面接続端子電極
18b,20b,50b 下面接続端子電極
18c,20c,50c 側面接続電極
22 バンプ
24 第1の回路基板
26 第2の回路基板
28 接着層
30,47 絶縁性基板
32 銅めっき層
34 レジストパターン
38 はんだバンプ
42 基板バンプ
44 突起
54 立体回路装置
56 回路部品
60,62 配線パターン
64,66 接地配線パターン
2, 36, 40, 48, 52 Three-dimensional inter-substrate connection structure 4 Outer peripheral portion 6 Inner peripheral portion 8, 46 Housing 10 Shield electrode 12a, 12b Ground electrode 14 Upper surface 16 Lower surface 18, 20, 50 Connection terminal electrode 18a , 20a, 50a Upper surface connection terminal electrodes 18b, 20b, 50b Lower surface connection terminal electrodes 18c, 20c, 50c Side connection electrodes 22 Bumps 24 First circuit board 26 Second circuit board 28 Adhesive layer 30, 47 Insulating substrate 32 Copper Plating layer 34 Resist pattern 38 Solder bump 42 Substrate bump 44 Protrusion 54 Solid circuit device 56 Circuit component 60, 62 Wiring pattern 64, 66 Ground wiring pattern

Claims (6)

内周部と外周部とを有する枠状のハウジングと、
前記ハウジングの上下面を接続する複数の接続端子電極と、
前記ハウジングの一方の面の前記複数の接続端子電極上に設けられたバンプとを有する三次元基板間接続構造体であり、
前記バンプは、前記内周部より前記外周部に近い前記接続端子電極上に位置する第1バンプと、前記外周部より前記内周部に近い前記接続端子電極上に位置する第2バンプとを有し、
さらに、前記バンプは、前記一方の面の前記ハウジング全周に渡って、前記第1バンプと前記第2バンプとが千鳥配置で配置され
前記複数の接続端子電極が、前記内周部および前記外周部の両側面を介して前記ハウジングの上下面に設けられていることを特徴とする三次元基板間接続構造体。
A frame-shaped housing having an inner periphery and an outer periphery;
A plurality of connection terminal electrodes connecting the upper and lower surfaces of the housing;
A three-dimensional inter-substrate connection structure having bumps provided on the plurality of connection terminal electrodes on one surface of the housing;
The bump includes a first bump located on the connection terminal electrode closer to the outer peripheral portion than the inner peripheral portion, and a second bump located on the connection terminal electrode closer to the inner peripheral portion than the outer peripheral portion. Have
Further, the bump is arranged in a staggered arrangement of the first bump and the second bump over the entire circumference of the housing on the one surface .
The three-dimensional inter-substrate connection structure, wherein the plurality of connection terminal electrodes are provided on the upper and lower surfaces of the housing through both side surfaces of the inner peripheral portion and the outer peripheral portion.
前記ハウジングの前記外周部の側面にシールド電極が形成され、
前記ハウジングの上下面に前記シールド電極と接続する接地電極が形成されていることを特徴とする請求項1に記載の三次元基板間接続構造体。
A shield electrode is formed on a side surface of the outer peripheral portion of the housing,
Three-dimensional inter-board connection structure according to claim 1, characterized in that the ground electrode connected to the shield electrode on the upper and lower surfaces of the housing are formed.
前記バンプがスタッドバンプにより形成されていることを特徴とする請求項に記載の三次元基板間接続構造体。 The three-dimensional inter-substrate connection structure according to claim 1 , wherein the bumps are formed by stud bumps. 前記バンプが前記ハウジングの少なくとも一方の面上に形成された突起を含む基板バンプで構成されていることを特徴とする請求項に記載の三次元基板間接続構造体。 2. The three-dimensional inter-substrate connection structure according to claim 1 , wherein the bump is constituted by a substrate bump including a protrusion formed on at least one surface of the housing. 前記バンプがはんだバンプにより形成されていることを特徴とする請求項に記載の三次元基板間接続構造体。 The three-dimensional inter-substrate connection structure according to claim 1 , wherein the bump is formed of a solder bump. 請求項1から請求項のいずれか1項に記載の三次元基板間接続構造体を介して、少なくとも第1の回路基板と第2の回路基板とを接続したことを特徴とする立体回路装置。 A three-dimensional circuit device comprising at least a first circuit board and a second circuit board connected to each other through the three-dimensional inter-substrate connection structure according to any one of claims 1 to 5. .
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