JP4876906B2 - Three-dimensional inter-substrate connection structure and three-dimensional circuit device using the same - Google Patents

Three-dimensional inter-substrate connection structure and three-dimensional circuit device using the same Download PDF

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JP4876906B2
JP4876906B2 JP2006349165A JP2006349165A JP4876906B2 JP 4876906 B2 JP4876906 B2 JP 4876906B2 JP 2006349165 A JP2006349165 A JP 2006349165A JP 2006349165 A JP2006349165 A JP 2006349165A JP 4876906 B2 JP4876906 B2 JP 4876906B2
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circuit board
connection structure
dimensional
housing
terminal electrode
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JP2008159984A (en
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羽生 岩本
将人 森
能彦 八木
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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本発明は、電子部品を搭載した複数の回路基板間を接続する三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置に関する。   The present invention relates to a three-dimensional inter-substrate connection structure that connects a plurality of circuit boards on which electronic components are mounted, a manufacturing method thereof, and a three-dimensional circuit device using the same.

従来、ICチップやチップ部品などの電子部品を搭載した回路基板間を接続するための基板接合部材(以下、「三次元基板間接続構造体」と記す)として、プラグ側とソケット側からなる多極接続タイプコネクタや樹脂製基板に複数個の接続ピンを固定したピンコネクタなどが用いられている。   Conventionally, as a substrate bonding member (hereinafter referred to as a “three-dimensional inter-substrate connection structure”) for connecting circuit boards on which electronic components such as IC chips and chip components are mounted, there are many plugs and sockets. A pole connection type connector or a pin connector in which a plurality of connection pins are fixed to a resin substrate is used.

近年、モバイル機器などの軽薄短小化や高機能化の進展につれて、回路基板間の接続端子数の増加や薄型に対応するために、回路基板間を立体的に接続する方法が提案されている。   In recent years, with the progress of miniaturization and high functionality of mobile devices and the like, a method for three-dimensional connection between circuit boards has been proposed in order to cope with an increase in the number of connection terminals between circuit boards and a reduction in thickness.

一例として、電子部品が実装された回路基板の接続端子と、スルーホールを有しその両端に銅箔ランドが形成された中継回路基板とを、はんだ付けにより接続固定することが開示されている(例えば、特許文献1参照)。これにより、高密度実装の立体的回路基板装置が安価に得られるとしている。   As an example, it is disclosed that a connection terminal of a circuit board on which electronic components are mounted and a relay circuit board having through holes and having copper foil lands formed at both ends thereof are connected and fixed by soldering ( For example, see Patent Document 1). As a result, a high-density mounting three-dimensional circuit board device can be obtained at low cost.

また、回路基板間を接続基板を介して電気的に接続するとともに、接続基板自体に回路パターンや電子部品を実装することが開示されている(例えば、特許文献2参照)。特許文献2によれば、互いに平行な配線基板間を方形板状の接続基板を介して接続するものである。そして接続基板は、配線基板と接続する対向する2端面の位置に設けた半分割状の端面スルーホールと、端面スルーホールの間を接続する接続基板の側面に形成した回路パターンを設けた構成を有している。   Further, it is disclosed that circuit boards are electrically connected via a connection board, and a circuit pattern or an electronic component is mounted on the connection board itself (see, for example, Patent Document 2). According to Patent Document 2, wiring boards parallel to each other are connected via a rectangular plate-like connection board. The connection board has a configuration in which a half-divided end face through hole provided at the position of two opposing end faces connected to the wiring board and a circuit pattern formed on the side face of the connection board connecting between the end face through holes are provided. Have.

一方、携帯情報機器などにおいては、機器の高速、高周波数化に伴い、外部からの電磁波による誤動作や放射電磁波による他機器への妨害などのEMC(電磁両立性:Electromagnetic Compatibility)に対する要求が厳しくなっている。そのため、電磁シールドを確実に行える回路基板実装技術への要望が高い。そこで、制御ICチップなどの高周波部品を搭載した複数の回路基板間を接続する三次元基板間接続構造体においても、外部からの電磁波や高周波部品などで内部から放射される電磁波を確実に電磁シールドすることが要求される。
特開2002−76561号公報 特開2005−268544号公報
On the other hand, in portable information devices and the like, with the increase in the speed and frequency of devices, the requirements for EMC (Electromagnetic Compatibility) such as malfunction due to external electromagnetic waves and interference with other devices due to radiated electromagnetic waves become severe. ing. Therefore, there is a high demand for circuit board mounting technology that can reliably perform electromagnetic shielding. Therefore, even in a three-dimensional board-to-board connection structure that connects multiple circuit boards on which high-frequency components such as control IC chips are mounted, electromagnetic waves from outside and electromagnetic waves radiated from the inside by high-frequency parts are reliably shielded. It is required to do.
JP 2002-76561 A JP 2005-268544 A

上記特許文献1によれば、回路基板間を、スルーホールを有しかつ両面に銅箔ランドが形成された中継回路基板を介して、はんだで接続することが述べられている。しかし、接続強度の向上や高密度実装に対応する中継回路基板上の接続端子の配置および構成に関しては開示されていない。   According to Patent Document 1, it is described that circuit boards are connected by solder via a relay circuit board having through holes and copper foil lands formed on both sides. However, there is no disclosure regarding the arrangement and configuration of the connection terminals on the relay circuit board corresponding to improvement in connection strength and high-density mounting.

また、特許文献2によれば、接続基板を縦置きで配置し、その側面に設けた回路パターンを介して回路基板間を接続するため、接続基板の側面に回路パターンによる回路形成や電子部品の実装を可能としている。しかし、接続基板を縦置きに配置するため、立体回路装置の薄型が困難である。   Further, according to Patent Document 2, since the connection boards are arranged vertically and the circuit boards are connected via the circuit patterns provided on the side surfaces thereof, circuit formation by circuit patterns and electronic components are arranged on the side surfaces of the connection boards. Implementation is possible. However, since the connection substrate is arranged vertically, it is difficult to thin the three-dimensional circuit device.

また、特許文献1および特許文献2ともに、例えば接合することによって生じる反りなどの機械的な変形を有する回路基板と中継回路基板や接続基板との良好な接続状態を得る手段に関しては開示されていない。さらに、ノイズおよび電磁波に対するシールドに関しては開示されていない。   Neither Patent Document 1 nor Patent Document 2 discloses a means for obtaining a good connection state between a circuit board having mechanical deformation such as warpage caused by joining, a relay circuit board, and a connection board. . In addition, no shields against noise and electromagnetic waves are disclosed.

本発明は上記課題を解決するためになされたもので、回路基板間を確実に接続するとともに、電磁シールド機能を備えた薄型の三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置を提供することを目的とする。   The present invention has been made in order to solve the above-described problems. A thin three-dimensional inter-substrate connection structure having an electromagnetic shielding function, a manufacturing method thereof, and a three-dimensional object using the same, while reliably connecting circuit boards. An object is to provide a circuit device.

上述したような目的を達成するために、本発明の三次元基板間接続構造体は、第1の回路基板と第2の回路基板とを接続する外周部と凹部を設けた内周部とを有する枠状のハウジングからなる三次元基板間接続構造体であって、ハウジングは、ハウジングの上下面を貫通するスルーホールとハウジングの上下面に設けたスルーホールと接続されるランドからなる第1端子電極と、凹部に設けた第2端子電極と、外周部の側面に設けたシールド電極とハウジングの上下面に形成しシールド電極と接続した接地電極と、を少なくとも有する。   In order to achieve the above-described object, the three-dimensional inter-substrate connection structure of the present invention includes an outer peripheral portion that connects the first circuit board and the second circuit board, and an inner peripheral portion provided with a recess. A three-dimensional inter-substrate connection structure comprising a frame-shaped housing having a first terminal comprising a through hole penetrating the upper and lower surfaces of the housing and a land connected to a through hole provided on the upper and lower surfaces of the housing An electrode; a second terminal electrode provided in the recess; a shield electrode provided on a side surface of the outer peripheral portion; and a ground electrode formed on the upper and lower surfaces of the housing and connected to the shield electrode.

さらに、第1端子電極と第2端子電極とを枠状のハウジングの上下面で千鳥足状に配置してもよい。また、ランドの面積が枠状のハウジングの上下面の第2端子電極の面積より大である。また、ランドの面積が第1の回路基板または第2の回路基板の接続端子の面積より大であってもよい。   Furthermore, the first terminal electrode and the second terminal electrode may be arranged in a staggered pattern on the upper and lower surfaces of the frame-shaped housing. Further, the area of the land is larger than the area of the second terminal electrode on the upper and lower surfaces of the frame-shaped housing. Further, the land area may be larger than the connection terminal area of the first circuit board or the second circuit board.

このような構成によれば、スルーホールを有する第1端子電極と凹部に設けた第2端子電極により、狭ピッチ化を実現できる。また、回路基板の反りなどの機械的変形に対して、外周近傍に設けた第1端子電極の大きな面積を有するランドで、高い接続強度が得られる。また、第2端子電極を凹部に形成することにより、電極面積を大きくし配線抵抗の低下を回避できる。また、各端子電極からのノイズや電磁波の外部への放射や外部からのノイズや電磁波を遮蔽し、高速伝送や誤動作の防止など信頼性に優れた三次元基板間接続構造体を実現できる。   According to such a configuration, a narrow pitch can be realized by the first terminal electrode having a through hole and the second terminal electrode provided in the recess. Further, with respect to mechanical deformation such as warping of the circuit board, a high connection strength can be obtained with a land having a large area of the first terminal electrode provided in the vicinity of the outer periphery. In addition, by forming the second terminal electrode in the recess, the electrode area can be increased and the decrease in wiring resistance can be avoided. In addition, it is possible to realize a three-dimensional inter-substrate connection structure excellent in reliability, such as high-speed transmission and prevention of malfunction, by shielding noise from each terminal electrode and radiation of electromagnetic waves to the outside and noise and electromagnetic waves from the outside.

さらに、枠状のハウジングの上下面の第2端子電極の面積が第1の回路基板または第2の回路基板の接続端子の面積より小であってもよい。   Furthermore, the area of the second terminal electrode on the upper and lower surfaces of the frame-shaped housing may be smaller than the area of the connection terminal of the first circuit board or the second circuit board.

このような構成によれば、回路基板の接続端子と第2端子電極の凹部とを大きな面積のフィレット部を形成して高い接続強度で三次元基板間接続構造体と回路基板を接続できる。   According to such a configuration, the connection terminal of the circuit board and the recess of the second terminal electrode form a fillet portion having a large area, and the three-dimensional inter-substrate connection structure and the circuit board can be connected with high connection strength.

さらに、ハウジングが低熱膨張係数を有する材料からなる。そして、材料が、液晶ポリマーからなってもよい。   Furthermore, the housing is made of a material having a low coefficient of thermal expansion. The material may be made of a liquid crystal polymer.

このような構成によれば、製造工程や環境温度の変化に対して、変形の生じにくい安定な三次元基板間接続構造体を実現できる。   According to such a configuration, it is possible to realize a stable three-dimensional inter-substrate connection structure that is unlikely to be deformed with respect to changes in the manufacturing process and environmental temperature.

また、本発明の三次元基板間接続構造体の製造方法は、外周部と凹部を含む内周部とを有する枠状のハウジングを型成型する成型工程と、ハウジングの上下面を貫通するスルーホールとハウジングの上下面に設けたスルーホールと接続されるランドからなる第1端子電極と、凹部に設けた第2端子電極と、外周部の側面に設けたシールド電極とハウジングの上下面に形成しシールド電極と接続する接地電極とを形成する電極形成工程と、を少なくとも含む。さらに、成型工程で、ハウジングに貫通孔を形成してもよい。さらに、電極形成工程が、ハウジングに貫通孔を形成する工程をさらに含んでもよい。   The method for manufacturing a three-dimensional inter-substrate connection structure according to the present invention includes a molding step of molding a frame-shaped housing having an outer peripheral portion and an inner peripheral portion including a recess, and a through-hole penetrating the upper and lower surfaces of the housing. And a first terminal electrode comprising lands connected to through holes provided in the upper and lower surfaces of the housing, a second terminal electrode provided in the recess, a shield electrode provided on the side surface of the outer peripheral portion, and formed on the upper and lower surfaces of the housing. And an electrode forming step of forming a ground electrode connected to the shield electrode. Furthermore, you may form a through-hole in a housing at a shaping | molding process. Furthermore, the electrode forming step may further include a step of forming a through hole in the housing.

さらに、電極形成工程が、ハウジング上にめっき層を形成する工程と、めっき層上に第1端子電極、第2端子電極、シールド電極および接地電極のレジストパターンを形成する工程と、レジストパターン以外のめっき層をエッチングする工程と、レジストパターンを除去する工程と、を含んでもよい。   Further, the electrode forming step includes a step of forming a plating layer on the housing, a step of forming a resist pattern of the first terminal electrode, the second terminal electrode, the shield electrode, and the ground electrode on the plating layer, and other than the resist pattern. You may include the process of etching a plating layer, and the process of removing a resist pattern.

このような方法によれば、スルーホールを有する第1端子電極と凹部に設けた第2端子電極により、狭ピッチ化を実現するとともに、回路基板の反りなどの機械的変形に対して、外周近傍に設けた第1端子電極の大きな面積を有するランドで、高い接続強度を有する三次元基板間接続構造体を容易に作製できる。   According to such a method, the first terminal electrode having a through hole and the second terminal electrode provided in the concave portion realize a narrow pitch, and in the vicinity of the outer periphery against mechanical deformation such as warping of the circuit board. A three-dimensional inter-substrate connection structure having a high connection strength can be easily produced with a land having a large area of the first terminal electrode provided on the substrate.

また、本発明の立体回路装置は、上記三次元基板間接続構造体を介して、少なくとも第1の回路基板と第2の回路基板とを接続した構成を有する。さらに、第1の回路基板および第2の回路基板の少なくとも一方の、三次元基板間接続構造体で囲まれた領域に電子部品を実装してもよい。   The three-dimensional circuit device of the present invention has a configuration in which at least a first circuit board and a second circuit board are connected via the three-dimensional inter-substrate connection structure. Further, an electronic component may be mounted in a region surrounded by the three-dimensional inter-substrate connection structure on at least one of the first circuit board and the second circuit board.

このような構成によれば、複数の回路基板間を反りなどの機械的変形に対しても高い接続強度で接続することができるとともに、複数の各端子電極や回路基板に実装された、三次元基板間接続構造体の内周部内に配置する電子部品を電磁シールドできる立体回路装置が得られる。   According to such a configuration, a plurality of circuit boards can be connected with high connection strength against mechanical deformation such as warpage, and the three-dimensional mounted on each terminal electrode or circuit board. A three-dimensional circuit device capable of electromagnetically shielding electronic components arranged in the inner periphery of the inter-substrate connection structure is obtained.

本発明によれば、回路基板間を安定で、かつ高い接続強度で接続するとともに、さらにシールド効果を有する薄型の三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置を実現できる。   According to the present invention, a thin three-dimensional inter-substrate connection structure having a shielding effect and a three-dimensional circuit device using the same is realized while connecting circuit boards with a stable and high connection strength. it can.

以下、本発明の実施の形態について、図面を参照しながら説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(第1の実施の形態)
図1(A)は本発明の第1の実施の形態における三次元基板間接続構造体の構成を示す平面図、図1(B)、図1(C)および図1(D)はそれぞれ図1(A)中のA−A線断面図、B−B線断面図およびC−C線断面図である。
(First embodiment)
FIG. 1A is a plan view showing the configuration of the three-dimensional inter-substrate connection structure according to the first embodiment of the present invention, and FIG. 1B, FIG. 1C, and FIG. It is the sectional view on the AA line in 1 (A), the BB sectional view, and the CC sectional view.

図1に示すように、三次元基板間接続構造体2は、例えば四角形状の外周部4と内周部6を有する額縁形の枠状の液晶ポリマーからなるハウジング8で構成されている。そして、枠状のハウジング8の内周部6の側面には、その上下面に達する、例えば半円形状の断面を有する凹部9と、その上下面を貫通する貫通孔22が形成され、凹部9には第2端子電極11、貫通孔22には第1端子電極24の一部を構成するスルーホール21が設けられている。   As shown in FIG. 1, the three-dimensional inter-substrate connection structure 2 includes a housing 8 made of a frame-shaped liquid crystal polymer having, for example, a rectangular outer peripheral portion 4 and an inner peripheral portion 6. Then, on the side surface of the inner peripheral portion 6 of the frame-shaped housing 8, a concave portion 9 having a semicircular cross section, for example, reaching the upper and lower surfaces and a through hole 22 penetrating the upper and lower surfaces are formed. The second terminal electrode 11 and the through hole 22 are provided with a through hole 21 constituting a part of the first terminal electrode 24.

ここで、第1端子電極24は、ハウジング8の上部面14および下部面16に、例えば銅などのめっき層などで形成された、例えば五角形状の上面ランド18aおよび下面ランド18bからなるランド18と、それらを接続する貫通孔22に形成されたスルーホール21で構成される。また、第2端子電極11は、ハウジング8の内周部6に形成された凹部9に、例えば銅などのめっき層などで形成され、その上端部20aおよび下端部20bはハウジング8の上部面14および下部面16に露出させて構成される。このとき、第1端子電極24の上面ランド18a、下面ランド18bの面積は、第2端子電極11の上端部20aや下端部20bの面積より大きい面積で形成される。さらに、第1端子電極24と第2端子電極11は、ハウジング8の上部面14および下部面16において、例えば千鳥足状に配置して設けられている。   Here, the first terminal electrode 24 is formed on the upper surface 14 and the lower surface 16 of the housing 8 with a land 18 made of, for example, a pentagonal upper surface land 18a and a lower surface land 18b. The through hole 21 is formed in the through hole 22 connecting them. The second terminal electrode 11 is formed in a recess 9 formed in the inner peripheral portion 6 of the housing 8 with a plating layer such as copper, and the upper end portion 20 a and the lower end portion 20 b thereof are the upper surface 14 of the housing 8. And exposed on the lower surface 16. At this time, the area of the upper surface land 18 a and the lower surface land 18 b of the first terminal electrode 24 is formed to be larger than the areas of the upper end portion 20 a and the lower end portion 20 b of the second terminal electrode 11. Furthermore, the first terminal electrode 24 and the second terminal electrode 11 are provided on the upper surface 14 and the lower surface 16 of the housing 8 so as to be arranged in a staggered pattern, for example.

すなわち、回路基板の変形および落下や衝撃において、応力が集中するハウジング8の外周部に、接続面積を大きくした上面ランド18aや下面ランド18bを配置することにより、接続強度を大幅に向上させることができる。その結果、安定で、信頼性の高い接続を実現する三次元基板間接続構造体2が得られる。また、第2端子電極11を、凹部9で形成するため、狭ピッチで形成しても、電極の幅を大きくでき、配線抵抗を低減することができる。例えば、凹部9を半円形状とすれば、平面状の幅に対して、1.57倍程度に電極幅を拡大でき、その結果、配線抵抗を1/1.57程度(幅以外を同じとすれば)に低減できる。さらに、第1端子電極24と第2端子電極11をハウジング8の上下面において千鳥足状に配置することにより、狭ピッチ配置を実現し、高密度実装に容易に対応できる。   That is, when the upper surface land 18a and the lower surface land 18b having a large connection area are arranged on the outer peripheral portion of the housing 8 where stress is concentrated when the circuit board is deformed, dropped or impacted, the connection strength can be greatly improved. it can. As a result, the three-dimensional inter-substrate connection structure 2 that achieves stable and reliable connection can be obtained. In addition, since the second terminal electrode 11 is formed by the concave portion 9, even if it is formed at a narrow pitch, the width of the electrode can be increased and the wiring resistance can be reduced. For example, if the recess 9 has a semicircular shape, the electrode width can be increased by about 1.57 times the planar width, and as a result, the wiring resistance can be reduced to about 1 / 1.57 (except for the width is the same) Can be reduced. Further, by arranging the first terminal electrode 24 and the second terminal electrode 11 in a staggered pattern on the upper and lower surfaces of the housing 8, a narrow pitch arrangement can be realized, and high-density mounting can be easily handled.

また、ハウジング8の外周部4の側面上には、全体にわたってシールド電極10が設けられ、ハウジング8の上部面14および下部面16上の、例えば4隅の位置に形成された接地電極12a、12bと接続されている。なお、このシールド電極10と接地電極12a、12bとにより、以下で説明する回路基板間を接続する第1端子電極24や第2端子電極11の高速な信号伝送に伴うノイズや電磁波などの放射をシールドすることができる。さらに、三次元基板間接続構造体2で囲まれた領域の回路基板に実装された電子部品などの、外部のノイズによる誤動作を未然に防止することができる。   In addition, a shield electrode 10 is provided on the entire side surface of the outer peripheral portion 4 of the housing 8, and ground electrodes 12 a and 12 b formed at, for example, four corner positions on the upper surface 14 and the lower surface 16 of the housing 8. Connected with. The shield electrode 10 and the ground electrodes 12a and 12b emit radiation such as noise and electromagnetic waves accompanying high-speed signal transmission of the first terminal electrode 24 and the second terminal electrode 11 that connect between circuit boards described below. Can be shielded. Furthermore, malfunctions due to external noise such as electronic components mounted on the circuit board in the region surrounded by the three-dimensional inter-substrate connection structure 2 can be prevented.

以下に、本発明の第1の実施の形態における三次元基板間接続構造体2の第1端子電極24と第2端子電極11を介して回路基板と接続する場合の接続状態について、図2を用いて説明する。   FIG. 2 shows the connection state when connecting to the circuit board via the first terminal electrode 24 and the second terminal electrode 11 of the three-dimensional inter-substrate connection structure 2 in the first embodiment of the present invention. It explains using.

図2(A)は、本発明の第1の実施の形態における第1の回路基板26と第2の回路基板28とを三次元基板間接続構造体2を介して接続した状態を示す図1(A)のE−E線断面図で、図2(B)は図1(A)のF−F線断面図である。   FIG. 2A shows a state in which the first circuit board 26 and the second circuit board 28 are connected via the three-dimensional inter-substrate connection structure 2 in the first embodiment of the present invention. 2A is a cross-sectional view taken along line EE in FIG. 2A, and FIG. 2B is a cross-sectional view taken along line FF in FIG.

すなわち、図2(A)は、第1の回路基板26の接続端子30および第2の回路基板28の接続端子32と、三次元基板間接続構造体2の第1端子電極24の上部面14の上面ランド18aおよび下部面16の下面ランド18bとを位置合わせして、はんだを用いて接続した状態を示している。このとき、第1端子電極24の上面ランド18aの面積を第1の回路基板26の接続端子30の面積より大きく形成して、はんだのフィレット部34を形成し、より広い面積で接続している。同様に、第1端子電極24の下面ランド18bの面積も第2の回路基板28の接続端子32の面積より大きく形成して、はんだのフィレット部34を形成し、より広い面積で接続している。さらに、スルーホール21の内面上にもフィレット部36を形成して接続している。   That is, FIG. 2A shows the connection surface 30 of the first circuit board 26 and the connection terminal 32 of the second circuit board 28, and the upper surface 14 of the first terminal electrode 24 of the three-dimensional inter-substrate connection structure 2. The upper surface land 18a and the lower surface land 18b of the lower surface 16 are aligned and connected using solder. At this time, the area of the upper surface land 18a of the first terminal electrode 24 is formed to be larger than the area of the connection terminal 30 of the first circuit board 26 to form a solder fillet 34, and the connection is made in a wider area. . Similarly, the area of the lower surface land 18b of the first terminal electrode 24 is also made larger than the area of the connection terminal 32 of the second circuit board 28 to form a solder fillet portion 34, which is connected in a wider area. . Further, a fillet portion 36 is formed on the inner surface of the through hole 21 and connected.

これにより、第1の回路基板26の接続端子30と上面ランド18a間の接続強度および第2の回路基板28の接続端子32と下面ランド18b間の接続強度を大幅に向上させることができる。   Thereby, the connection strength between the connection terminal 30 of the first circuit board 26 and the upper surface land 18a and the connection strength between the connection terminal 32 of the second circuit board 28 and the lower surface land 18b can be greatly improved.

また、図2(B)は、第1の回路基板26の接続端子40および第2の回路基板28の接続端子42と、三次元基板間接続構造体2の第2端子電極11の上端部20aおよび下端部20bとを位置合わせして、はんだを用いて接続した状態を示している。このとき、各回路基板の接続端子40、42の面積と比較して、第2端子電極11の上端部20aおよび下端部20bの接続面積(ここでは、めっき層の断面積に相当)は小さい。しかし、はんだはハウジング8の凹部9に形成された第2端子電極11と各接続端子間を大きな面積で接続するフィレット部38を形成する。   2B shows the connection terminal 40 of the first circuit board 26 and the connection terminal 42 of the second circuit board 28, and the upper end portion 20a of the second terminal electrode 11 of the three-dimensional inter-substrate connection structure 2. And the lower end 20b are aligned and connected using solder. At this time, the connection area of the upper end portion 20a and the lower end portion 20b of the second terminal electrode 11 (corresponding to the cross-sectional area of the plating layer here) is smaller than the area of the connection terminals 40 and 42 of each circuit board. However, the solder forms a fillet portion 38 that connects the second terminal electrode 11 formed in the recess 9 of the housing 8 and each connection terminal with a large area.

これにより、第2端子電極11の接続面積が小さくても、第1の回路基板26の接続端子40および第2の回路基板28の接続端子42と第2端子電極11間とをはんだのフィレット部38の形成により強固に接続できる。   Thus, even if the connection area of the second terminal electrode 11 is small, the solder fillet between the connection terminal 40 of the first circuit board 26 and the connection terminal 42 of the second circuit board 28 and the second terminal electrode 11 is achieved. The formation of 38 makes it possible to connect firmly.

なお、上記実施の形態では、スルーホール21や第2端子電極11にめっき層を形成した例で説明したが、これに限られない。例えば、スルーホール21や凹部9に導電性樹脂などの導電体を埋め込んで形成してもよい。   In the above embodiment, the example in which the plated layer is formed in the through hole 21 or the second terminal electrode 11 has been described. However, the present invention is not limited to this. For example, a conductive material such as a conductive resin may be embedded in the through hole 21 or the recess 9.

また、上記実施の形態では、回路基板の接続端子を、第1端子電極24の面積(図面上では、幅)より小さくした例で説明したが、これに限られない。例えば、回路基板の接続端子を、第1端子電極の面積より大きくしてもよい。さらに、回路基板に形成した接続端子の大きさは、必ずしも同じである必要はなく、三次元基板間接続構造体2の第1端子電極24や第2端子電極11に対応した異なる大きさで設けてもよい。   In the above embodiment, the connection terminal of the circuit board has been described as being smaller than the area (width in the drawing) of the first terminal electrode 24. However, the present invention is not limited to this. For example, the connection terminal of the circuit board may be larger than the area of the first terminal electrode. Furthermore, the size of the connection terminals formed on the circuit board is not necessarily the same, and is provided in different sizes corresponding to the first terminal electrode 24 and the second terminal electrode 11 of the three-dimensional inter-substrate connection structure 2. May be.

本発明の第1の実施の形態によれば、回路基板に反りなどの機械的変形、落下や衝撃などにより、三次元基板間接続構造体と回路基板の接続部に応力が加わっても、三次元基板間接続構造体の外周部近傍に設けた面積の広い第1端子電極により接続強度を向上させ、安定で信頼性の高い接続が得られる。また、第2端子電極を凹部に形成し、さらに千鳥足状に配置することにより、狭ピッチ化による配線抵抗の増加を抑制するとともに、高密度実装を実現できる。   According to the first embodiment of the present invention, even if stress is applied to the connection part between the three-dimensional inter-board connection structure and the circuit board due to mechanical deformation such as warping, dropping or impact, the circuit board is Connection strength is improved by the first terminal electrode having a large area provided in the vicinity of the outer peripheral portion of the original inter-substrate connection structure, and stable and highly reliable connection is obtained. Further, by forming the second terminal electrode in the recess and further arranging it in a staggered pattern, it is possible to suppress an increase in wiring resistance due to a narrow pitch and realize high-density mounting.

ここで、三次元基板間接続構造体2のハウジング8の材料としては、例えば液晶ポリマーのように熱膨張係数が小さく温度変化に対して安定な材料を用いることが好ましい。また、使用する環境に応じては、例えばガラスエポキシ樹脂、ポリフェニレンサルファイド、ポリブチレンテレフタレートなどの絶縁性樹脂を用いてもよい。さらに、形状精度や高い伝熱性などが要求される場合には、セラミック基板などの絶縁性基板を用いてもよい。   Here, as the material of the housing 8 of the three-dimensional inter-substrate connection structure 2, it is preferable to use a material that has a small coefficient of thermal expansion and is stable with respect to temperature change, such as a liquid crystal polymer. Further, depending on the environment to be used, for example, an insulating resin such as glass epoxy resin, polyphenylene sulfide, polybutylene terephthalate may be used. Furthermore, when shape accuracy, high heat conductivity, and the like are required, an insulating substrate such as a ceramic substrate may be used.

また、第1端子電極、第2端子電極、シールド電極および接地電極の材料としては、例えば銅(Cu)や銀(Ag)、アルミニウム(Al)などの導電率の大きな金属材料で形成することが好ましい。さらに、それらの材料の上に、例えば金(Au)からなる膜を形成することが望ましい。これにより、接続の安定性や経時的による劣化を防止して、さらに信頼性を向上させることができる。   The first terminal electrode, the second terminal electrode, the shield electrode, and the ground electrode may be formed of a metal material having a high conductivity such as copper (Cu), silver (Ag), or aluminum (Al). preferable. Furthermore, it is desirable to form a film made of, for example, gold (Au) on these materials. As a result, the stability of the connection and deterioration over time can be prevented, and the reliability can be further improved.

以下に、本発明の第1の実施の形態における三次元基板間接続構造体2の製造方法について説明する。   Hereinafter, a method for manufacturing the three-dimensional inter-substrate connection structure 2 according to the first embodiment of the present invention will be described.

図3は、本発明の第1の実施の形態における三次元基板間接続構造体2の製造方法の主な工程図である。そして、図3(A)、図3(D)、図3(G)、図3(J)は、三次元基板間接続構造体2の各製造工程における平面図である。また、図3(B)、図3(E)、図3(H)、図3(K)は、各平面図中のB−B線断面図、図3(C)、図3(F)、図3(I)、図3(L)は、C−C線断面図である。なお、B−B線は図1(A)中に示す複数の第1端子電極24の上面ランド18a上を通る線と同一であり、C−C線の位置は内周部の一側面の位置を示している。   FIG. 3 is a main process diagram of the method for manufacturing the three-dimensional inter-substrate connection structure 2 according to the first embodiment of the present invention. 3A, 3D, 3G, and 3J are plan views in each manufacturing process of the three-dimensional inter-substrate connection structure 2. FIG. 3B, FIG. 3E, FIG. 3H, and FIG. 3K are cross-sectional views taken along line B-B in each plan view, FIG. 3C, and FIG. 3F. 3 (I) and FIG. 3 (L) are cross-sectional views taken along the line CC. The BB line is the same as the line passing on the upper surface land 18a of the plurality of first terminal electrodes 24 shown in FIG. 1A, and the position of the CC line is the position of one side surface of the inner peripheral portion. Is shown.

まず、図3(A)、図3(B)、図3(C)に示すように、例えば液晶ポリマーなどを型成型して外周部4と厚み方向に複数の凹部9が形成された内周部6を有する額縁形状の絶縁性基板(ハウジング)44を用意する。さらに、複数の貫通孔22を、例えばレーザ法やドリリング法により所定の位置に形成する。なお、貫通孔22は、型成型によって同時に絶縁性基板44に形成してもよい。これにより、工程をさらに簡略化し、短時間で形成することができる。   First, as shown in FIGS. 3 (A), 3 (B), and 3 (C), for example, a liquid crystal polymer is molded to form an outer periphery 4 and a plurality of recesses 9 in the thickness direction. A frame-shaped insulating substrate (housing) 44 having the portion 6 is prepared. Further, the plurality of through holes 22 are formed at predetermined positions by, for example, a laser method or a drilling method. The through hole 22 may be formed in the insulating substrate 44 at the same time by molding. Thereby, a process can be further simplified and it can form in a short time.

つぎに、図3(D)、図3(E)、図3(F)に示すように、絶縁性基板44の上部面、下部面、外周部側面、凹部を含む内周部側面および貫通孔を、例えば粗化して、例えばパラジウム塩などのめっき触媒を全体に塗布する。そして、例えば無電解銅めっき法を用いて、絶縁性基板44上に所定の厚みの銅のめっき層46を形成する。具体的には、例えば絶縁性基板44を、以下に示す無電解銅めっき液に2時間浸漬し、約10μm厚の銅を析出させ、全面に銅のめっき層46が形成される。ここで、無電解銅めっき液としては、例えば硫酸銅・5水和物/エチレンジアミン4酢酸/ポリエチレングリコール/l2.2−ジビリジル/ホルムアルデヒド混合液を水酸化ナトリウムでPH12.5に調整されたものが用いられ、液温70℃で使用される。なお、無電解めっきと電解めっきを組み合わせても効果的であり、短時間で銅のめっき層46が形成できる。   Next, as shown in FIGS. 3D, 3E, and 3F, the upper surface, the lower surface, the outer peripheral side surface, the inner peripheral side surface including the concave portion, and the through hole of the insulating substrate 44. Is roughened, and a plating catalyst such as a palladium salt is applied to the whole. Then, a copper plating layer 46 having a predetermined thickness is formed on the insulating substrate 44 using, for example, an electroless copper plating method. Specifically, for example, the insulating substrate 44 is immersed in the following electroless copper plating solution for 2 hours to deposit about 10 μm thick copper, and a copper plating layer 46 is formed on the entire surface. Here, as the electroless copper plating solution, for example, a solution in which a mixed solution of copper sulfate pentahydrate / ethylenediaminetetraacetic acid / polyethylene glycol / l2.2-dibilidyl / formaldehyde is adjusted to PH12.5 with sodium hydroxide is used. Used at a liquid temperature of 70 ° C. It is also effective to combine electroless plating and electrolytic plating, and the copper plating layer 46 can be formed in a short time.

つぎに、図3(G)、図3(H)、図3(I)に示すように、形成した銅のめっき層46上の全体にエッチング用のレジストを塗布し、紫外線を照射して所定のパターンで露光処理する。このとき、エッチング用のレジストとしては、例えば電着レジスト(例えば、日本ペイント株式会社製の「フォトED P−1000」)を用い、25℃で50mA/dmで3分間電着させ、約8μmの厚さに塗布する。そして、フォトマスクを装着し、紫外線(散乱光)を約400mj/cmで照射し、所定のパターンを露光した。その後、32℃の1%メタ珪酸ナトリウムをスプレー装置を用いて120秒間スプレーしてレジストを現像する。これにより、最終的に第1端子電極、第2端子電極、接地電極およびシールド電極上を覆うレジストパターン48が得られる。 Next, as shown in FIGS. 3 (G), 3 (H), and 3 (I), a resist for etching is applied to the entire surface of the formed copper plating layer 46, and ultraviolet rays are irradiated to give a predetermined value. The exposure process is performed with the pattern. At this time, as a resist for etching, for example, an electrodeposition resist (for example, “Photo EDP-1000” manufactured by Nippon Paint Co., Ltd.) is used, and electrodeposition is performed at 25 ° C. and 50 mA / dm 2 for 3 minutes, and approximately 8 μm. Apply to a thickness of. Then, a photomask was attached, and ultraviolet rays (scattered light) were irradiated at about 400 mj / cm 2 to expose a predetermined pattern. Thereafter, 1% sodium metasilicate at 32 ° C. is sprayed for 120 seconds using a spray device to develop the resist. As a result, a resist pattern 48 that finally covers the first terminal electrode, the second terminal electrode, the ground electrode, and the shield electrode is obtained.

つぎに、図3(J)、図3(K)、図3(L)に示すように、レジストパターン48を形成した後、40℃の塩化第2鉄の36%溶液に2〜3分間浸漬して銅のめっき層46をエッチングする。その後、50℃の5%メタ珪酸ナトリウムを120秒間スプレーしてレジストを剥離し所定の第1端子電極24、第2端子電極11、シールド電極10および接地電極12a、12bを形成する。   Next, as shown in FIG. 3 (J), FIG. 3 (K), and FIG. 3 (L), after forming a resist pattern 48, it is immersed in a 36% solution of ferric chloride at 40 ° C. for 2 to 3 minutes. Then, the copper plating layer 46 is etched. Thereafter, 5% sodium metasilicate at 50 ° C. is sprayed for 120 seconds to remove the resist, thereby forming predetermined first terminal electrode 24, second terminal electrode 11, shield electrode 10, and ground electrodes 12a and 12b.

以上の工程により、例えば、ハウジング8の寸法として、長さ10.6mm、幅9mm、厚み0.45mmの極めて厚みの薄い三次元基板間接続構造体2が得られる。さらに、例えば、第2端子電極11の最大径(半円の直径)は約75μm、第1端子電極24の上面ランド18a−18a間は約0.3mm程度の高密度実装に対応した三次元基板間接続構造体2が作製される。   By the above process, for example, the housing 8 has a three-dimensional inter-substrate connection structure 2 having a very thin thickness of 10.6 mm, a width of 9 mm, and a thickness of 0.45 mm. Furthermore, for example, the maximum diameter (diameter of a semicircle) of the second terminal electrode 11 is about 75 μm, and the space between the upper surface lands 18a to 18a of the first terminal electrode 24 is about 0.3 mm. The inter-connection structure 2 is produced.

なお、本実施の形態は、平面図上で見た凹部9の断面形状(上端部20aおよび下端部20b)が半円形を例に説明したが、これに限られない。例えば、四角、三角などの多角形など任意の形状としてもよい。また、上面ランド18aや下面ランド18bの形状として五角形を例に説明したが、これに限られない。例えば、第2端子電極11と千鳥足状に配置できるものであれば、特に限定されるものではなく任意の形状とすることができる。   In the present embodiment, the sectional shape (the upper end portion 20a and the lower end portion 20b) of the concave portion 9 viewed on the plan view is described as an example of a semicircular shape, but is not limited thereto. For example, an arbitrary shape such as a polygon such as a square or a triangle may be used. Further, although the pentagonal shape has been described as an example of the shape of the upper surface land 18a and the lower surface land 18b, it is not limited thereto. For example, as long as it can be arranged in a staggered pattern with the second terminal electrode 11, the shape is not particularly limited and can be an arbitrary shape.

また、本実施の形態では、第1端子電極24、第2端子電極11、接地電極12a、12bおよびシールド電極10などを同時に一括して形成する例で説明したがこれに限られず、相前後して形成してもよい。   In the present embodiment, the example in which the first terminal electrode 24, the second terminal electrode 11, the ground electrodes 12a and 12b, the shield electrode 10 and the like are formed at the same time has been described. However, the present invention is not limited to this. May be formed.

また、本実施の形態において、絶縁性基板44の全面にわたって、例えばエポキシ樹脂と合成ゴム、架橋剤、硬化剤、フィラーを組み合わせた接着促進層を形成しその表面を粗化した後、めっき処理をしてもよい。これにより、絶縁性基板44の表面へのめっきの付着強度を向上させることができる。   In the present embodiment, an adhesion promoting layer combining, for example, an epoxy resin and a synthetic rubber, a crosslinking agent, a curing agent, and a filler is formed over the entire surface of the insulating substrate 44 and the surface is roughened, and then the plating treatment is performed. May be. Thereby, the adhesion strength of the plating to the surface of the insulating substrate 44 can be improved.

また、第1端子電極24、第2端子電極11、シールド電極10および接地電極12a、12bの表面を金(Au)めっきすることが好ましい。これにより、接続の安定性や耐湿性など耐環境性に対する信頼性を向上できる。   The surfaces of the first terminal electrode 24, the second terminal electrode 11, the shield electrode 10, and the ground electrodes 12a and 12b are preferably plated with gold (Au). Thereby, the reliability with respect to environmental resistance, such as connection stability and moisture resistance, can be improved.

また、本実施の形態では、第1端子電極24、第2端子電極11、シールド電極10および接地電極12a、12bの形成方法として、無電解めっき法、フォトリソ技術とエッチング技術を用いて形成する例で説明したが、これに限られない。例えば、レーザ加工など所定の膜厚でパターン形成できる方法であれば、特に制限されずに適用することができる。   In the present embodiment, the first terminal electrode 24, the second terminal electrode 11, the shield electrode 10, and the ground electrodes 12a and 12b are formed using an electroless plating method, a photolithography technique, and an etching technique. However, this is not a limitation. For example, any method that can form a pattern with a predetermined film thickness, such as laser processing, can be applied without particular limitation.

なお、上記製造方法では、めっき層を形成後、レジストパターンで各電極を形成する例で説明したが、これに限られない。例えば、レジストパターンを形成後、めっき層を形成して、各電極をリフトオフ法などで形成してもよい。この場合、レジストパターンの位置が最終的に得られる各電極以外の領域を覆う形で形成される。   In addition, although the said manufacturing method demonstrated by the example which forms each electrode with a resist pattern after forming a plating layer, it is not restricted to this. For example, after forming a resist pattern, a plating layer may be formed, and each electrode may be formed by a lift-off method or the like. In this case, the position of the resist pattern is formed so as to cover a region other than each electrode finally obtained.

(第2の実施の形態)
以下に、本発明の第2の実施の形態における立体回路装置について説明する。
(Second Embodiment)
The three-dimensional circuit device according to the second embodiment of the present invention will be described below.

図4(A)は本発明の第2の実施の形態における立体回路装置50の構成を示す斜視図で、図4(B)は図4(A)の部分拡大断面図である。なお、以下では、第1の実施の形態で説明した三次元基板間接続構造体2を用い、第1の実施の形態と同じ要素には同一符号を付し説明する。また、図4(A)において、説明を分かりやすくするため、回路基板の配線パターンを一部省略し、かつ回路基板間に挟まれた三次元基板間接続構造体2を透視した状態で図示している。   FIG. 4A is a perspective view showing the configuration of the three-dimensional circuit device 50 according to the second embodiment of the present invention, and FIG. 4B is a partially enlarged sectional view of FIG. In the following description, the three-dimensional inter-substrate connection structure 2 described in the first embodiment is used, and the same reference numerals are given to the same elements as those in the first embodiment. Further, in FIG. 4A, for easy understanding, a part of the wiring pattern of the circuit board is omitted, and the three-dimensional inter-substrate connecting structure 2 sandwiched between the circuit boards is shown in a perspective view. ing.

図4に示すように、立体回路装置50は、第1の回路基板26と第2の回路基板28とを三次元基板間接続構造体2を間に挟んで対向して接続した構成を有する。   As shown in FIG. 4, the three-dimensional circuit device 50 has a configuration in which a first circuit board 26 and a second circuit board 28 are connected to face each other with the three-dimensional inter-substrate connection structure 2 interposed therebetween.

ここで、第1の回路基板26には三次元基板間接続構造体2の内周部6内に収まるように、例えば高周波回路などのICチップからなる電子部品52が、第1の回路基板26に形成した配線パターン54の接続端子(図示せず)と、例えばはんだで接続され、所定の位置に実装されている。   Here, an electronic component 52 made of an IC chip such as a high-frequency circuit is placed on the first circuit board 26 so that the first circuit board 26 fits in the inner peripheral portion 6 of the three-dimensional inter-substrate connection structure 2. The connection terminals (not shown) of the wiring pattern 54 formed in the above are connected with, for example, solder and mounted at predetermined positions.

そして、三次元基板間接続構造体2の第1端子電極24の上面ランド18aおよび第2端子電極11の上端部20aと第2の回路基板28の所定の配線パターン56の接続端子(図示せず)がはんだなどで接続されている。同様に、第1端子電極24の下面ランド18bおよび第2端子電極11の下端部20bと第1の回路基板26の所定の配線パターン54の接続端子(図示せず)がはんだなどで接続されている。   And the connection terminal (not shown) of the predetermined | prescribed wiring pattern 56 of the upper surface land 18a of the 1st terminal electrode 24 of the three-dimensional board | substrate connection structure 2, the upper end part 20a of the 2nd terminal electrode 11, and the 2nd circuit board 28. ) Is connected with solder. Similarly, the lower surface land 18b of the first terminal electrode 24 and the lower end portion 20b of the second terminal electrode 11 and the connection terminals (not shown) of the predetermined wiring pattern 54 of the first circuit board 26 are connected by solder or the like. Yes.

また、三次元基板間接続構造体2に設けられた接地電極12a、12bは第1の回路基板26と第2の回路基板28にそれぞれ設けた接地配線パターン58、60間とに接続されアース電位に接地されている。   The ground electrodes 12a and 12b provided on the three-dimensional inter-substrate connection structure 2 are connected between the ground wiring patterns 58 and 60 provided on the first circuit board 26 and the second circuit board 28, respectively, and ground potential. Is grounded.

さらに、接地電極12a、12bは、三次元基板間接続構造体2に設けたシールド電極10と接続される。これにより、三次元基板間接続構造体2で囲まれた領域の回路基板上に実装された電子部品52や第1端子電極24、第2端子電極11などの各電極をシールドし、外部からのノイズや各電極および電子部品52で発生する内部ノイズの放射などを効率よく遮蔽する。   Furthermore, the ground electrodes 12 a and 12 b are connected to the shield electrode 10 provided in the three-dimensional inter-substrate connection structure 2. This shields each electrode such as the electronic component 52, the first terminal electrode 24, and the second terminal electrode 11 mounted on the circuit board in the region surrounded by the three-dimensional inter-substrate connection structure 2, Noise and radiation of internal noise generated in each electrode and electronic component 52 are efficiently shielded.

本実施の形態によれば、三次元基板間接続構造体2を介して、複数の回路基板間を、反りなどの機械的変形に対して剥離などの生じにくい高い接続強度で接続できる。さらに、ノイズなどによる誤動作を生じない信頼性に優れた薄型の立体回路装置50を実現できる。   According to the present embodiment, a plurality of circuit boards can be connected via the three-dimensional board-connecting structure 2 with a high connection strength that is unlikely to cause peeling due to mechanical deformation such as warping. Furthermore, it is possible to realize a thin three-dimensional circuit device 50 excellent in reliability that does not cause malfunction due to noise or the like.

なお、本実施の形態において、第1の回路基板26に電子部品52を実装する例で説明したが、これに限らない。例えば、第2の回路基板28や、第1の回路基板26と第2の回路基板28の両方に電子部品を実装してもよい。これにより、シールドが必要な電子部品を多数実装することができる。   In the present embodiment, the example in which the electronic component 52 is mounted on the first circuit board 26 has been described. However, the present invention is not limited to this. For example, electronic components may be mounted on the second circuit board 28 or both the first circuit board 26 and the second circuit board 28. As a result, a large number of electronic components that require shielding can be mounted.

また、本実施の形態では、三次元基板間接続構造体2を介して第1の回路基板26、第2の回路基板28を2枚接続する例で説明したが、これに限られない。例えば、3枚以上の複数枚をそれぞれ三次元基板間接続構造体2を介して多段で接続してもよい。これにより、シールドが必要な電子部品を独立にシールドできるため、電磁波干渉を未然に防ぐことができる。また、複数の回路基板間を別々に中継して接続できるため、複雑な回路基板配置などに容易に対応できる。さらに、複数の三次元基板間接続構造体2により、立体回路装置50の機械的な強度の向上や取り扱いが容易な構成とすることができる。   In the present embodiment, an example in which two first circuit boards 26 and two second circuit boards 28 are connected via the three-dimensional inter-substrate connection structure 2 has been described. However, the present invention is not limited to this. For example, a plurality of three or more sheets may be connected in multiple stages via the three-dimensional inter-substrate connection structure 2. Thereby, since the electronic component which needs a shield can be shielded independently, electromagnetic wave interference can be prevented beforehand. Further, since a plurality of circuit boards can be separately relayed and connected, it is possible to easily cope with complicated circuit board arrangements. Further, the plurality of three-dimensional inter-substrate connection structures 2 can make the structure of the three-dimensional circuit device 50 easy to improve and handle.

また、上記各実施の形態において、第1端子電極24、第2端子電極11をハウジング8の全周にわたって設けた例で説明したが、これに限られない。例えば、ハウジング形状が四角形の場合、一辺、対向する辺または三辺など部分的に設けてもよい。   In each of the above embodiments, the first terminal electrode 24 and the second terminal electrode 11 have been described as being provided over the entire circumference of the housing 8, but the present invention is not limited thereto. For example, when the housing shape is a quadrangle, it may be partially provided such as one side, opposite sides, or three sides.

本発明における三次元基板間接続構造体とその製造方法およびそれを用いた立体回路装置は、軽薄短小化が進む情報携帯機器などの技術分野において有用である。   The three-dimensional inter-substrate connection structure according to the present invention, the manufacturing method thereof, and the three-dimensional circuit device using the same are useful in technical fields such as portable information devices that are becoming lighter and thinner.

(A)本発明の第1の実施の形態における三次元基板間接続構造体の構成を示す平面図(B)図1(A)のA−A線断面図(C)図1(A)のB−B線断面図(D)図1(A)のC−C線断面図(A) Plan view showing the configuration of the three-dimensional inter-substrate connection structure in the first embodiment of the present invention (B) Cross-sectional view taken along the line A-A in FIG. 1 (A) (C) in FIG. BB sectional view (D) CC sectional view of FIG. 1 (A) (A)同実施の形態における第1の回路基板と第2の回路基板とを三次元基板間接続構造体を介して接続した状態を示す図1(A)のE−E線断面図(B)図1(A)のF−F線断面図(A) EE sectional view taken on the line EE of FIG. 1 (A) which shows the state which connected the 1st circuit board and 2nd circuit board in the same embodiment via the three-dimensional board | substrate connection structure (B) ) Cross-sectional view taken along line FF in FIG. 同実施の形態における三次元基板間接続構造体の製造方法の主な工程図The main process drawing of the manufacturing method of the connection structure between three-dimensional boards in the embodiment (A)本発明の第2の実施の形態における立体回路装置の構成を示す斜視図(B)図4(A)の部分拡大断面図(A) Perspective view showing the configuration of the three-dimensional circuit device according to the second embodiment of the present invention (B) Partial enlarged sectional view of FIG. 4 (A)

符号の説明Explanation of symbols

2 三次元基板間接続構造体
4 外周部
6 内周部
8 ハウジング
9 凹部
10 シールド電極
11 第2端子電極
12a,12b 接地電極
14 上部面
16 下部面
18 ランド
18a 上面ランド
18b 下面ランド
20a 上端部
20b 下端部
21 スルーホール
22 貫通孔
24 第1端子電極
26 第1の回路基板
28 第2の回路基板
30,32,40,42 接続端子
34,36,38 フィレット部
44 絶縁性基板
46 めっき層
48 レジストパターン
50 立体回路装置
52 電子部品
54,56 配線パターン
58,60 接地配線パターン
2 3D inter-substrate connection structure 4 Outer periphery 6 Inner periphery 8 Housing 9 Recess 10 Shield electrode 11 Second terminal electrode 12a, 12b Ground electrode 14 Upper surface 16 Lower surface 18 Land 18a Upper surface land 18b Lower surface land 20a Upper end 20b Lower end portion 21 Through hole 22 Through hole 24 First terminal electrode 26 First circuit substrate 28 Second circuit substrate 30, 32, 40, 42 Connection terminal 34, 36, 38 Fillet portion 44 Insulating substrate 46 Plating layer 48 Resist Pattern 50 Three-dimensional circuit device 52 Electronic component 54, 56 Wiring pattern 58, 60 Ground wiring pattern

Claims (8)

第1の回路基板と第2の回路基板とを接続する外周部と凹部を設けた内周部とを有する枠状のハウジングからなる三次元基板間接続構造体であって、
前記ハウジングは、
前記ハウジングの上下面を貫通するスルーホールと前記ハウジングの上下面に設けた前記スルーホールと接続されるランドからなる第1端子電極と、
前記凹部に設けた第2端子電極と、
前記外周部の側面に設けたシールド電極と前記ハウジングの上下面に形成し前記シールド電極と接続した接地電極とを少なくとも有し、
前記ランドの面積が前記枠状のハウジングの上下面の前記第2端子電極の面積より大なることを特徴とする記載の三次元基板間接続構造体。
A three-dimensional inter-substrate connection structure comprising a frame-shaped housing having an outer peripheral portion for connecting a first circuit board and a second circuit board and an inner peripheral portion provided with a recess,
The housing is
A first terminal electrode comprising a through hole penetrating the upper and lower surfaces of the housing and a land connected to the through hole provided on the upper and lower surfaces of the housing;
A second terminal electrode provided in the recess;
Also has the least a ground electrode formed on the upper and lower surfaces of the shield electrode provided on a side surface of the outer peripheral portion housing connected to the shield electrode,
The three-dimensional inter-substrate connection structure according to claim 1, wherein an area of the land is larger than an area of the second terminal electrode on the upper and lower surfaces of the frame-shaped housing.
第1の回路基板と第2の回路基板とを接続する外周部と凹部を設けた内周部とを有する枠状のハウジングからなる三次元基板間接続構造体であって、
前記ハウジングは、
前記ハウジングの上下面を貫通するスルーホールと前記ハウジングの上下面に設けた前記スルーホールと接続されるランドからなる第1端子電極と、
前記凹部に設けた第2端子電極と、
前記外周部の側面に設けたシールド電極と前記ハウジングの上下面に形成し前記シールド電極と接続した接地電極とを少なくとも有し、
前記ランドの面積が前記第1の回路基板または前記第2の回路基板の接続端子の面積より大なることを特徴とする三次元基板間接続構造体。
A three-dimensional inter-substrate connection structure comprising a frame-shaped housing having an outer peripheral portion for connecting a first circuit board and a second circuit board and an inner peripheral portion provided with a recess,
The housing is
A first terminal electrode comprising a through hole penetrating the upper and lower surfaces of the housing and a land connected to the through hole provided on the upper and lower surfaces of the housing;
A second terminal electrode provided in the recess;
At least a shield electrode provided on a side surface of the outer peripheral portion and a ground electrode formed on the upper and lower surfaces of the housing and connected to the shield electrode ,
3. The three-dimensional inter-substrate connection structure according to claim 1, wherein an area of the land is larger than an area of connection terminals of the first circuit board or the second circuit board.
前記第1端子電極と前記第2端子電極とを前記枠状のハウジングの上下面で千鳥足状に配置したことを特徴とする請求項1または2に記載の三次元基板間接続構造体。 The three-dimensional inter-substrate connection structure according to claim 1 or 2 , wherein the first terminal electrode and the second terminal electrode are arranged in a staggered pattern on the upper and lower surfaces of the frame-shaped housing. 前記枠状のハウジングの上下面の前記第2端子電極の面積が前記第1の回路基板または前記第2の回路基板の接続端子の面積より小なることを特徴とする請求項1から請求項のいずれか1項に記載の三次元基板間接続構造体。 Claims 1 to 3, characterized in that the area of the second terminal electrodes on the upper and lower surfaces of the frame-like housing is smaller than the area of the connection terminals of the first circuit board or said second circuit board The three-dimensional inter-substrate connection structure according to any one of the above. 前記ハウジングが低熱膨張係数を有する材料からなることを特徴とする請求項1から請求項のいずれか1項に記載の三次元基板間接続構造体。 The three-dimensional inter-substrate connection structure according to any one of claims 1 to 4 , wherein the housing is made of a material having a low coefficient of thermal expansion. 前記材料が、液晶ポリマーからなることを特徴とする請求項に記載の三次元基板間接続構造体。 The three-dimensional inter-substrate connection structure according to claim 5 , wherein the material is made of a liquid crystal polymer. 請求項1から請求項のいずれか1項に記載の三次元基板間接続構造体を介して、少なくとも第1の回路基板と第2の回路基板とを接続したことを特徴とする立体回路装置。 A three-dimensional circuit device comprising at least a first circuit board and a second circuit board connected via the three-dimensional inter-substrate connection structure according to any one of claims 1 to 6. . 前記第1の回路基板および前記第2の回路基板の少なくとも一方の、前記三次元基板間接続構造体で囲まれた領域に電子部品を実装したことを特徴とする請求項に記載の立体回路装置。
8. The three-dimensional circuit according to claim 7 , wherein an electronic component is mounted in a region surrounded by the three-dimensional inter-substrate connection structure of at least one of the first circuit board and the second circuit board. apparatus.
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