KR100498977B1 - Method of plating the conductive layer on the wall of the cavity in E-BGA PCB - Google Patents

Abstract

The present invention is a substrate used in a high heat generation environment, such as a graphic support chip, a method of manufacturing a so-called enhanced BGA (E-BGA) printed circuit board which is a chip substrate having a heat sink for heat dissipation. It is about. More specifically, the present invention relates to a method of manufacturing an E-BGA printed circuit board having a wall plated cavity of an E-BGA printed circuit board. More specifically, it relates to a method of plating the inner wall of the cavity.

The present invention utilizes a conventional manufacturing process of E-BGA, which does not plate the inner wall of the cavity, by plating a thin Au that is not etched by the etching solution on the inner wall of the cavity to protect the plating layer formed on the wall of the cavity even by etching. It is an object to provide a manufacturing method.

Description

Method of plating the conductive layer on the wall of the cavity in E-BGA PCB

The present invention relates to a method for manufacturing a so-called enhanced BGA (E-BGA) printed circuit board, which is a chip substrate having a heat sink for heat dissipation, which is used in a heat generating environment such as a graphic support chip. It is about. More specifically, the present invention relates to a method of manufacturing an E-BGA printed circuit board having a wall plated cavity of the E-BGA printed circuit board. More specifically, it relates to a method of plating the inner wall surrounding the cavity.

The printed circuit board includes a single-sided PCB in which wiring is formed only on one side of the insulated substrate, a double-sided PCB in which wiring is formed on both sides, and an MLB (Multi Layered Board) that is wired in multiple layers. In the past, single-sided PCBs were used because of simple components and simple circuit patterns. However, in recent years, due to increased complexity of circuits and increasing demand for high density and miniaturized circuits, it is common to use double-sided PCBs or MLBs. The multilayer printed circuit board generally means a PCB having four or more layers, and an insulating material such as a prepreg is inserted between the circuit layers for insulation.

A BGA printed circuit board is a generic term for a surface mount package in which ball bumps are arranged in a matrix form on the bottom surface of a package.

In the future, the package applied to electronic products is going from a single chip package to a multichip package or modularization.

The most common and efficient package utilizing printed circuit boards is a so-called area array (CSP) or ball grid array (BGA) that uses a solder ball to connect the package to the motherboard. There is. Dual BGA boards have been evaluated as the most common and efficient packages since the 1990s because they can maximize the number of pins per unit area.

There are various kinds of BGA printed circuit boards such as FP BGA (fine pitch BGA), T BGA (taped BGA), and P BGA (plastic BGA).

The E-BGA printed circuit board is a new type of BGA printed circuit board different from the conventional BGA printed circuit board. The E-BGA (Enhanced BGA) printed circuit board is mainly used for graphic support chips installed in game machines or computers. It is a substrate. Unlike conventional BGA printed circuit boards, the E-BGA printed circuit board has a heat sink for heat dissipation and is covered with an adhesive. The solder bumps for chip mounting and other boards or motherboards are all covered. It has a structure disposed on the other side. The part where the chip is to be mounted is empty in a cavity.

Fig. 1 is a photograph of an E-BGA printed circuit board product for graphic support composed of four layers of multilayer printed circuit boards, which is not plated on a conventional inner wall of a cavity 11 in which a chip is to be mounted as an example of the prior art. The opposite side (not shown) of the illustrated product picture is a heat sink for heat dissipation, in which a metal film on which chips or solder bumps are not mounted is formed, and a terminal part which is a metal film on which a chip or solder bump is mounted only on the side shown in the product picture ( 12) is formed.

Around the cavity 11, a ground 13 connected to circuits in the substrate and a power supply 14, which is an electrode for power supply, are disposed. After mounting the chip, wire bonding must be done to connect the power and ground.

2 is a cross-sectional view taken along the line AA ′ of the product shown in FIG. 1.

It is a four-layer multilayer PCB composed of inner layer circuits L2 and L3 and outer layer circuits L1 and L4.

The cavity 21 (cavity) in the center is empty as a part where the chip will be mounted later, and the material of the cavity inner wall 22 is mainly made of resin or glass fiber such as prepreg and resin coated copper (RCC). It consists of an insulating material made of fiber).

Reference numeral 24 denotes a solder resist, and reference numeral 25 denotes a Ni / Au plating layer for surface treatment of copper plating.

Surface treatment is performed to prevent oxidation of the exposed copper foil without being covered with the solder resist, to improve solderability of the mounted component, and to provide good conductivity.

At this time, the surface treatment method of the copper plated substrate is Hot Solder Air Leveling (HASL), Organic Solderability Percervatives (OSP) (Pre-flux coating method), Electroless Ni / Au plating, Electroless Pd plating, Electroless Electrolytic Ag plating and electroless tin plating are used. Among them, electroless Ni / Au plating is widely used in mobile phones and video cameras, etc., and nickel is first coated in order to improve the adhesion of gold. Take the method of plating.

Reference numeral 26 denotes a heat sink for heat dissipation.

Reference numeral 27 denotes an adhesive layer for bonding the heat sink and the substrate.

Reference numeral 28 denotes a plating through hole for electrical connection between the inner layer circuit and the outer layer circuit.

After the substrate is formed once, the heat sink 26 is subjected to surface treatment such as blackening treatment and the heat sink and the substrate are adhered with the adhesive 27 to form the E-BGA of the type shown in FIG.

Hereinafter, a method of manufacturing the E-BGA according to the related art shown in FIGS. 1 and 2 will be described.

3 shows a method for producing an E-BGA in which the inner wall of the cavity is not plated according to the prior art.

(A) is a cross-sectional view of a four-layer printed circuit board in which an inner layer circuit is formed and finished up to Cu plating 31 for forming an insulating material 32 and an outer layer circuit thereon.

In (B), a cavity 33 having a diameter of about 1 cm is formed in the center of the substrate by punching, and the blind via hole 34 is processed by laser drilling.

In multilayer printed circuit boards and double-sided printed circuit boards, electrical connections between layers and both sides are made through the inner walls of the via holes.

The via hole means a hole in which two or more PCBs are plated inside after processing holes in the substrate in order to connect interlayers, and parts are not inserted. In the multilayer printed circuit board (4 or more layers printed circuit board), blind via holes are also processed in addition to the via holes.

The blind via hole means a through hole for connecting an outer layer and an inner layer of a multilayer printed circuit board. The blind via hole is a via hole having a shape in which one side is blocked. Since the outer layer and inner layer of the PCB are connected, no hole is observed on one side of the outer layer.

Returning to Fig. 3, in (C), the hole wall of the blind via hole is plated with Cu plating 35.

In (D), the etching resist pattern 36 is formed of a dry film.

The etching resist pattern is formed by adhering an artwork film on which a designed circuit pattern is printed and irradiating ultraviolet rays thereto.

When irradiated with ultraviolet rays, the dry film of the unprinted portion of the artwork film is cured by ultraviolet rays, and the dry film of the printed portion is not cured because ultraviolet rays do not pass. When the dry film of the part which is not hardened with the developing solution is removed here, only the dry film of the hardened part remains and an etching resist pattern is formed. As a developer, sodium carbonate (1% Na ₂ CO ₃ ) or potassium carbonate (K ₂ CO ₃ ) is used.

In (E), when etching, only a portion without the etching resist is corroded to form a circuit pattern. In (F), the etching pattern is peeled off to complete the circuit pattern. NaOH or KOH is used as the stripping solution. A photo solder resist 37 (PSR) pattern is formed on the remaining portions except for portions to be connected with other substrates or chips in (G), and Ni / Au 38 is plated in (H). The pattern acts as a plating resist, and Ni / Au is plated only at the portion to be connected with another substrate or chip.

Ni / Au plating is a final finishing treatment for the substrate, and is intended to prevent oxidation of the exposed copper foil without being covered with solder resist, to improve solderability of components to be mounted, and to impart good conductivity. First, Ni is plated and then Au is plated.

Here, when the surface of the heat sink is blackened and attached to the substrate with an adhesive, an E-BGA without plating is completed on a conventional cavity inner wall, as shown in FIG.

Black oxide treatment is a process performed to enhance adhesion and heat resistance before bonding a substrate. This process oxidizes the surface of copper foil by chemical method, and gives roughness (roughness).

More specifically, by depositing Cu ₂ O (brown) or CuO (black) on the surface of the copper foil, it becomes red, yellow, black depending on their composition ratio. In the blackening process, it is more important how dense and uniform the crystal structure is than the thickness of the oxide film. This is because these factors affect the improvement of adhesion and heat resistance, which is the purpose of the blackening treatment.

Referring back to FIG. 2, the above circuit requires a terminal for grounding the circuits formed in the inner layer and the outer layer. Typically, one of the inner layer circuits L2 or L3 is configured as a ground layer. In FIG. 2, L2 is used as the ground layer 23.

This ground layer is to be electrically connected to another circuit layer through one of the plated through holes 28 fabricated in the substrate. That is, the through holes plated with the inner wall are micro holes having a narrow diameter, and an electrical signal flows through the inner walls of the plated through holes.

Recently, the trend is to use high-frequency signals to provide more advanced information in accordance with IT development. As the high-frequency signal increases, interference by impedance increases, causing interference with other circuits on the board.

The current flows along the surface of the conductor, especially when high frequency current flows through the conductor with a small surface area, an impedance is inversely proportional to the area of the conductor, and the impedance interferes with other circuits causing the circuit to malfunction. do.

In order to improve such a problem, in recent E-BGA, due to the interference problem caused by the use of high frequency, the trend is to replace the through-holes by plating the inner wall of the cavity having a much larger diameter instead of the through-holes.

The through hole has a diameter of about 70 μm, and the diameter of the cavity is 10 ⁴ μm, and the surface area of the inner wall of the cavity is much larger than the surface area of the inner wall of the through hole. It is negligible compared to that by.

According to this recent trend, a process for plating a cavity inner wall of an E-BGA printed circuit board using a liquid type dry film, which is called an ED (Electro-Deposit) process, is known. Discarding the process and adopting a new process is very inefficient in terms of cost.

Therefore, there is a need for a method capable of plating an inner wall of a cavity without significant deformation in the conventional manufacturing method.

In the case of plating the inner wall of the cavity by the conventional manufacturing method, if the plating layer of the inner wall of the cavity can be protected by applying the method of protecting the plating layer plated on the inner wall of the blind via hole as follows, it is not necessary to greatly modify the conventional manufacturing method. do.

That is, in the method shown in Fig. 4, in the step (D) of the conventional method (step (D) in Fig. 3), a tenting layer is formed on the inner wall of the cavity so that the dry film 41 covers the cavity. By protecting the plated plating layer, the plating layer 42 of the cavity inner wall remains unetched even in the etching of step (E).

However, Figs. 4 (D), (E), (F), and (G) are only theories, and this cannot be realized. The reason for this is as follows.

As shown in Fig. 5, the diameter of the cavity is about 1 cm, and the width of the tenting layer support configured to support the dry film formed to cover the cavity is very narrow depending on the circuit pattern. The diameters of the other blind via holes are around 70 μm, which can be sufficiently protected by the tenting layer. However, the plating layer plated on the inner wall of the cavity up to about 1 cm in diameter cannot be protected in this manner.

The dry film for protecting the plating layer of the cavity inner wall is very thin, about 25 μm, and the support portion supporting the cavity is also narrow, so that it does not withstand the pressure of the etching solution during etching and protects the plating layer as shown in FIG. 5 (B). can not do.

As a result, the etching liquid leaks at the time of etching and penetrates the tent and penetrates into the inner wall of the cavity to irregularly corrode the plating layer of the inner wall, thereby damaging the plating layer of the inner wall.

Although such a method by tenting is a method which can use a conventional process equipment as it is, using the method by tenting to protect the plating layer of the cavity inner wall cannot be realized as an unrealistic method as mentioned above. Therefore, there is a need for a method that replaces this method.

The present invention provides a method for producing an E-BGA plated with a cavity inner wall in accordance with the recent trend by utilizing a manufacturing process of an E-BGA in which a conventional cavity inner wall is not plated, thereby ultimately the cavity inner wall is plated. The aim is to drastically reduce the manufacturing cost of E-BGA.

According to the present invention, there is provided a method of manufacturing an E-BGA (Enhanced BGA) multilayer printed circuit board having a cavity for mounting a chip, the method comprising: applying a dry film to an entire substrate except an inner wall of the cavity; Plating Au on the inner wall of the cavity; And surface treating the Au plated cavity inner wall by metal plating.

With reference to the drawings, the present invention will be described in more detail.

6a to 6b show a method according to the invention.

6A to 6C are the same as the method according to the prior art shown in FIG.

That is, (A) is a cross-sectional view of a multilayer printed circuit board which forms an inner layer circuit and is finished up to Cu plating 601 for forming an insulating material 602 and an outer layer circuit thereon. In (B), a cavity 603 having a diameter of about 1 cm is formed in the center of the substrate by punching, and the blind via hole 604 is processed by laser drilling. The size of the cavity depends on the size of the chip to be mounted. In (C), the hole wall of the blind via hole 604 is plated with Cu plating 605.

In (D-1), the dry film 606 is apply | coated to the whole board | substrate except the inner wall of the said cavity, and it exposes and develops. This dry film serves as a plating resist.

In (D-2), Au is plated. The plating layer is not formed at the portion where the dry film is applied, and the Au plating layer 607 is formed only at the remaining portion.

In (D-3), the dry film pattern is formed by exposure and development to form an etching dry film pattern 608 for circuit formation of the outer layer.

In (E), etching is performed. At this time, the Au plating layer 607 is left without being corroded even by etching.

The Au-plated surface has a strong chemical, physical durability, chemical resistance, etc., and can sufficiently serve as a structurally stable resist film. Au-plated masking remains robust against many chemicals such as etching solutions and is not attacked by the etching solution on the cavity walls.

In addition, as described above, in the case of the E-BGA printed circuit board having no plating layer on the inner wall of the conventional cavity shown in FIG. 1, a grounding part 13 and a power supply part 14 are separately provided for grounding and power connection. Although wire bonding must be performed, in the E-BGA substrate according to the present invention, the chip can be directly connected to the plating layer of the cavity inner wall to replace one of these ground portions 13 and the power supply portion 14, thereby making the process easier.

In (F), a dry film is peeled off.

In (G), the photo solder resist 610 is applied, and in (H), the Ni / Au layer 611 is plated.

In this manner, the Ni / Au plating layer additionally coated in addition to the Au plating layer to be plated as a resist does not cause any problem of thickness difference. That is, the Au plating layer for etching resists has a thickness of about 0.1-5 μm, and the Ni / Au plating layer has a thickness of 0.5-10 μm, so that problems such as thickness differences due to double plating of Au do not occur. In addition, since no wire bonding will be applied to the inner wall of the cavity, there is no problem of flatness, and therefore the possibility of a problem due to Au double plating is even less.

Here, the surface of the heat dissipation plate for heat dissipation, such as blackening treatment and the like, and bonded to the printed circuit board prepared as described above is completed the E-BGA printed circuit board plated with the cavity inner wall according to the present invention.

In accordance with the manufacturing method of the present invention, by utilizing the conventional manufacturing process of the E-BGA is not plated inner cavity wall, by providing a method for producing an E-BGA plated cavity inner wall in accordance with the recent trend, Process and ultimately reduce costs.

The above description of the present invention is not intended to limit the present invention, but is merely a description. Those skilled in the art will be able to make various modifications thereto within the scope of the present invention. The scope of the present invention is not limited by the above-described embodiment, but is limited only by the interpretation of the following claims.

1 is a product photograph of an E-BGA printed circuit board which is a graphics chip-substrate.

FIG. 2 is a cross-sectional view taken along line AA ′ of the E-BGA printed circuit board of FIG. 1; FIG.

Figure 3 is a flow chart showing a conventional E-BGA printed circuit board manufacturing method without a plating layer on the inner wall of the cavity.

4 is a flow chart of an ideal case as a method for protecting a plating layer of a cavity inner wall using a conventional manufacturing method.

5 illustrates a problem with the method presented in FIG.

6A and 6B are flowcharts illustrating a method of forming a plating layer on a cavity inner wall utilizing a conventional process according to the present invention.

※ Description of main parts of drawing

(21): cavity (22): Au plating layer

(61): Au plating layer

Claims (7)

In the manufacturing method of E-BGA (Enhanced BGA) multilayer printed circuit board having a cavity for mounting the chip, Stacking Cu for an insulating layer and an outer layer circuit after forming an inner layer circuit of the E-BGA multilayer printed circuit board; Forming the cavity in the portion where the chip is to be mounted by punching; Cu plating the surface of the substrate and the inner wall of the cavity; Applying a dry film to the entire substrate except the inner wall of the cavity; Plating Au on Cu plating of the inner wall of the cavity not coated with the dry film to protect Cu plating of the inner wall of the cavity; Forming a dry film pattern for forming an outer layer circuit on the substrate; Etching the substrate; Peeling off the dry film; Forming a photo solder resist layer; And A method of plating a cavity inner wall of an E-BGA printed circuit board, comprising the step of surface treatment by metal plating. delete The method of claim 1, After forming the cavity by the punching, forming blind via holes by laser drilling; And In the plating of the inner wall of the surface of the substrate and the cavity by the Cu plating, simultaneously plating the inner wall of the blind via hole further by plating the cavity inner wall of the E-BGA printed circuit board. Way. The method of claim 1, Surface treatment on a heat sink for heat dissipation; And And bonding the printed circuit board and the heat sink to each other with an adhesive. The method of claim 1, The metal of the metal used in the surface treatment step by the metal plating is Ni / Au plating method for plating a cavity inner wall of the E-BGA printed circuit board. The method of claim 1, The Au plating layer has a thickness of 0.1-5㎛ method for plating a cavity inner wall of the E-BGA printed circuit board. The method of claim 5, The thickness of the Ni / Au plating layer is a method for plating a cavity inner wall of the E-BGA printed circuit board, characterized in that 0.5-10㎛.