JP5043360B2 - 所定のピン配列を有するメモリモジュール - Google Patents
所定のピン配列を有するメモリモジュール Download PDFInfo
- Publication number
- JP5043360B2 JP5043360B2 JP2006108504A JP2006108504A JP5043360B2 JP 5043360 B2 JP5043360 B2 JP 5043360B2 JP 2006108504 A JP2006108504 A JP 2006108504A JP 2006108504 A JP2006108504 A JP 2006108504A JP 5043360 B2 JP5043360 B2 JP 5043360B2
- Authority
- JP
- Japan
- Prior art keywords
- pins
- pin
- memory
- ground
- memory module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 claims description 14
- 239000003990 capacitor Substances 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 9
- 238000001514 detection method Methods 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 4
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/108,245 US7545651B2 (en) | 2005-04-18 | 2005-04-18 | Memory module with a predetermined arrangement of pins |
| US11/108,245 | 2005-04-18 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006303490A JP2006303490A (ja) | 2006-11-02 |
| JP2006303490A5 JP2006303490A5 (enExample) | 2009-05-21 |
| JP5043360B2 true JP5043360B2 (ja) | 2012-10-10 |
Family
ID=37234201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006108504A Expired - Fee Related JP5043360B2 (ja) | 2005-04-18 | 2006-04-11 | 所定のピン配列を有するメモリモジュール |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7545651B2 (enExample) |
| JP (1) | JP5043360B2 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103163974A (zh) * | 2011-12-09 | 2013-06-19 | 鸿富锦精密工业(深圳)有限公司 | 固态硬盘组合 |
| CN103163987A (zh) * | 2011-12-15 | 2013-06-19 | 鸿富锦精密工业(深圳)有限公司 | 固态硬盘组合 |
| CN103186178A (zh) * | 2011-12-29 | 2013-07-03 | 鸿富锦精密工业(深圳)有限公司 | 主板 |
| US9357649B2 (en) | 2012-05-08 | 2016-05-31 | Inernational Business Machines Corporation | 276-pin buffered memory card with enhanced memory system interconnect |
| US9519315B2 (en) | 2013-03-12 | 2016-12-13 | International Business Machines Corporation | 276-pin buffered memory card with enhanced memory system interconnect |
| CN104424150A (zh) * | 2013-08-28 | 2015-03-18 | 鸿富锦精密电子(天津)有限公司 | 存储扩展系统 |
| KR20220169545A (ko) * | 2021-06-21 | 2022-12-28 | 삼성전자주식회사 | 인쇄 회로 기판 및 메모리 모듈 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5012389A (en) * | 1988-12-14 | 1991-04-30 | Hand Held Products, Inc. | Board wiring pattern for a high density memory module |
| KR940016243A (ko) * | 1992-12-26 | 1994-07-22 | 김광호 | 싱글 인 라인 메모리 모듈(simm; single in line memory module) |
| US5513135A (en) * | 1994-12-02 | 1996-04-30 | International Business Machines Corporation | Synchronous memory packaged in single/dual in-line memory module and method of fabrication |
| US6711666B1 (en) * | 1995-11-29 | 2004-03-23 | Zf Micro Solutions, Inc. | IBM PC compatible multi-chip module |
| JP3718008B2 (ja) * | 1996-02-26 | 2005-11-16 | 株式会社日立製作所 | メモリモジュールおよびその製造方法 |
| US6210175B1 (en) * | 1998-02-20 | 2001-04-03 | Hewlett-Packard Company | Socket rails for stacking integrated circuit components |
| US5870325A (en) * | 1998-04-14 | 1999-02-09 | Silicon Graphics, Inc. | Memory system with multiple addressing and control busses |
| US6097619A (en) * | 1998-06-19 | 2000-08-01 | Compaq Computer Corp. | Symmetric memory board |
| US6061263A (en) * | 1998-12-29 | 2000-05-09 | Intel Corporation | Small outline rambus in-line memory module |
| US6502161B1 (en) * | 2000-01-05 | 2002-12-31 | Rambus Inc. | Memory system including a point-to-point linked memory subsystem |
| JP2001274323A (ja) * | 2000-03-24 | 2001-10-05 | Hitachi Ltd | 半導体装置とそれを搭載した半導体モジュール、および半導体装置の製造方法 |
| US6625687B1 (en) * | 2000-09-18 | 2003-09-23 | Intel Corporation | Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing |
| US6658530B1 (en) * | 2000-10-12 | 2003-12-02 | Sun Microsystems, Inc. | High-performance memory module |
| KR100454123B1 (ko) * | 2001-12-06 | 2004-10-26 | 삼성전자주식회사 | 반도체 집적 회로 장치 및 그것을 구비한 모듈 |
| US6956387B2 (en) * | 2003-08-15 | 2005-10-18 | Intel Corporation | Socket connection test modules and methods of using the same |
| US7224595B2 (en) * | 2004-07-30 | 2007-05-29 | International Business Machines Corporation | 276-Pin buffered memory module with enhanced fault tolerance |
-
2005
- 2005-04-18 US US11/108,245 patent/US7545651B2/en active Active
-
2006
- 2006-04-11 JP JP2006108504A patent/JP5043360B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20060245119A1 (en) | 2006-11-02 |
| JP2006303490A (ja) | 2006-11-02 |
| US7545651B2 (en) | 2009-06-09 |
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