JP5031216B2 - Manufacturing method of imaging apparatus - Google Patents

Description

  The present invention relates to a method for manufacturing an image pickup apparatus using a photoelectric conversion element, and particularly relates to a method for manufacturing the light collecting portion.

  In an imaging apparatus used for a digital camera or a camcorder, pixels are miniaturized by downsizing and increasing the number of pixels. Along with this, the area of the light receiving portion of the photoelectric conversion element decreases, and the amount of incident light decreases, resulting in a decrease in sensitivity.

  In order to improve this decrease in sensitivity, an on-chip microlens is formed on the light incident surface of the imaging device, and the light is condensed on the light receiving unit, thereby suppressing the decrease in sensitivity. Further, in recent years, a configuration is known in which an optical waveguide that collects light using reflection of light is formed between an on-chip microlens and a photoelectric conversion element.

  In general, an optical waveguide manufacturing method in such an imaging apparatus includes a step of burying a well-shaped digging portion after a step of digging a well-like shape in an insulating layer on a photoelectric conversion element. The embedded material has a higher refractive index than the insulating layer. Due to the difference in refractive index, light is reflected and collected.

  However, as the pixels become finer, the aspect ratio of the well-like digging portion becomes higher, and a void may be generated inside the well in the filling step. This is particularly likely to occur in CMOS image sensors having multilayer wiring.

  Therefore, there is the following technique as a solution to the problem in such an embedding process. That is a method of dividing an optical waveguide into a plurality of pieces as shown in FIG. 8 (see Patent Document 1).

  In FIG. 8, 802 is a semiconductor substrate, 804 is a light receiving sensor portion formed on the semiconductor substrate, and 803 is an element isolation region. On the light receiving sensor portion 804, a high refractive index layer 815 is arranged, and wells indicated by low refractive index layers 808, 814A and 814B are formed. This well is a so-called optical waveguide. A well is formed from a plurality of layers having different diameters.

  That is, by forming an optical waveguide composed of a plurality of layers for each layer, it is possible to satisfactorily embed without generating voids when embedding a high refractive index material. The manufacturing method is as shown in FIG. 9, and after the step of digging a well shape, the step of filling the inside of the well shape is repeated to form an optical waveguide without voids.

Also, as shown in FIG. 10, it is known that an etching stopper film 1012 is formed in order to make the depth of the digging structure constant when forming the well-like digging 1021 (see Patent Document 2). .
JP 2004-193500 A JP 2000-150845 A

  However, there are the following concerns with this technology.

  This well-like digging is generally performed by plasma etching. Specifically, an etching stop layer (for example, a silicon nitride layer) having an etching selectivity with respect to the insulating layer is formed on the photoelectric conversion element, and plasma etching is performed up to just above the photoelectric conversion element. This etching stop layer and the previous etching stopper film have the same function.

  Here, the plasma etching on the photoelectric conversion element may increase defects of the photoelectric conversion element and increase a dark current that is a noise component of the sensor.

  In improving the performance of the sensor, it is important to increase the S / N ratio, which is the ratio of the signal (S) component and the noise (N) component. The optical waveguide is configured to improve the light collection efficiency of incident light and increase the signal component. However, at the same time, the noise component may be increased by plasma etching in the digging process. In particular, in an amplification type imaging device such as a CMOS sensor having a multi-layer wiring layer, the damage is considered to be large as the digging amount is large.

  On the other hand, Patent Document 2 describes that by providing the etching stopper film 1012 shown in FIG. 10, the etching is stopped and the sensor surface is not damaged during the etching. However, there is a case where the etching damage is not sufficiently reduced with the film thickness for functioning as a normal etching stop. As described above, in the configuration having a plurality of wiring layers, such as an amplification type imaging device, the etching conditions may be different from those of the imaging device described in Patent Document 2, and etching damage may occur. Further reduction is desired.

  In the configuration of Patent Document 2, when the thickness of the etching stopper film 1012 is simply increased, a thick etching stopper film remains on the optical waveguide and the photoelectric conversion element, which may impair the function of the optical waveguide. There is.

  Further, in Patent Document 2, as shown in FIG. 10, a light shielding film 1006 that defines an opening of a light receiving portion 1002 that is a photoelectric conversion element is formed earlier than an etching stopper film 1012. Therefore, the area of the etching stopper film 1012 in the horizontal direction with respect to the semiconductor substrate 1001 is defined by the light shielding film 1006, and the light receiving surface of the light receiving unit 1002 may not be sufficiently used. Furthermore, since the area of the opening of the insulating layer 1007 that forms the optical waveguide must be smaller than the area of the etching stopper film 1012, it is difficult to fully utilize the light receiving surface of the light receiving portion 1002. Furthermore, in the configuration as in Patent Document 2, it is difficult to form a structure having a thick etching stopper film 1012 and a high aspect ratio. This is because, as described above, the area of the etching stopper film 1012 is defined by the light shielding film 1006, and the shape design of the etching stopper film 1012 is low.

  In addition, there is a method of suppressing an increase in dark current by improving defects formed by plasma etching after forming an optical waveguide by annealing, but it is difficult to completely suppress the increase.

  Therefore, an object of the present invention is to provide a method for manufacturing an imaging device having an optical waveguide that can suppress an increase in dark current due to plasma etching during the formation of the optical waveguide and can improve light collection efficiency. .

The manufacturing method of the imaging device of the present invention has a lower surface facing at least a part of the light receiving surface of the photoelectric conversion element by patterning a transparent layer formed on the semiconductor substrate having the photoelectric conversion element. A first step of forming a first region comprising a part of the transparent layer, and a first refractive index lower than that of the first region covering the first region after the first step. A second step of forming a second insulating layer; a third step of forming a second insulating layer covering the first region and the first insulating layer after the second step; After the third step, a fourth step of forming a digging exposing the upper surface of the first region by etching the second insulating layer and the first insulating layer, and the fourth step Compared with the first insulating layer and the second insulating layer after the step of By embedding a transparent material having a high refractive index in the digging, a first portion where the first insulating layer exists in the direction along the light receiving surface and a periphery thereof in the direction along the light receiving surface And a second step of forming the second region made of the transparent material, the second step including the second portion where the second insulating layer exists, and the second step and the third step. A first conductive layer is formed during the process, a second conductive layer is formed between the third process and the fourth process, and the fourth process and the fifth process are performed in the first process . Is located between the first portion and the light receiving surface, and the cross-sectional area of the first portion along the light receiving surface is along the light receiving surface of the second portion. It is characterized by being performed so as to be smaller than the cross-sectional area of the surface.

  According to the present invention, an increase in dark current due to the formation of an optical waveguide can be suppressed.

  In the manufacturing method of an imaging device according to the present invention, a high refractive index region that becomes an optical waveguide is formed on a photoelectric conversion element, an insulating layer that embeds the high refractive index region is formed, and then a conductive material that defines an opening of the photoelectric conversion element is formed. It has the process of forming a layer, It is characterized by the above-mentioned. A conductive layer such as a wiring is generally used as the pattern for defining the opening, but the pattern is not limited to this, and any desired pattern may be used.

  Here, the high refractive index region is formed on the semiconductor substrate corresponding to the photoelectric conversion element, and both have a higher refractive index than the insulating layer constituting the optical waveguide. Specifically, it is formed of silicon nitride or silicon oxynitride. Hereinafter, this region is referred to as a high refractive index region. Here, the high refractive index region and the high refractive index layer in Patent Document 1 have the same function. However, the high refractive index layer in the present invention indicates a layer for forming a high refractive index region. The insulating layer is formed of silicon oxide having a lower refractive index.

  Thus, by forming the high refractive index region on the photoelectric conversion element first, it is not necessary to form a well-like dig directly above the photoelectric conversion element by plasma etching. That is, it is possible to suppress an increase in dark current that becomes a noise signal and to improve sensitivity by the optical waveguide. Of course, even when the digging is formed, damage to the photoelectric conversion element due to plasma etching can be reduced.

  Here, this high refractive index region is preferably between 200 nm and 2000 nm in the film thickness direction. Preferably, the thickness is 500 nm or more. Such a high refractive index region can reduce damage to the photoelectric conversion element when an etching process is performed after the formation. This will be described below.

  FIG. 7 shows the relationship between the distance from the light receiving surface of the photoelectric conversion element to the bottom of the well-shaped digging portion and the dark current when a well-shaped digging is performed in the imaging apparatus. Here, the imaging device uses a well-shaped digging before forming the high refractive index region. The dark current is shown as a relative ratio, where 1 is a value where no well-like digging is performed.

  From this graph, it can be seen that the dark current increases as the distance from the light receiving surface of the photoelectric conversion element decreases, and that the dark current is small at 500 nm or more. Therefore, when the thickness of the high refractive index region formed on the photoelectric conversion element is thicker, damage at the time of plasma etching can be further reduced preferably at 500 nm or more.

  The high refractive index region may also serve as an etching stop layer. Here, the etching stop layer and the etching stopper film have the same function.

Here, an LDD (Lightly Doped Drain) structure may be used for the field effect transistor included in the imaging device as suppression of dark current due to electric field concentration in the vicinity of the drain diffusion region. In this LDD structure, a sidewall is formed on the gate electrode of the transistor. (Not shown)
In the case of having this LDD structure, the sidewall can be formed using the high refractive index layer that forms the high refractive index region. As a specific process, after forming a gate electrode of a transistor, a high refractive index layer is formed to cover the gate electrode. The high refractive index layer can be anisotropically etched to form the high refractive index region and the sidewall at the same time. In addition, by forming in such a process, it is possible to reduce the man-hours and protect the photoelectric conversion element from etching at the time of forming the sidewall. Of course, even when each etching is performed in a separate process, the same high refractive index layer is used, so that the number of steps can be reduced.

  However, when the high refractive index layer is formed thick in order to protect it from etching damage, the side wall may not be formed by etching. Even when the thickness is reduced, the thickness of the layer may be insufficient and the sidewall may not be formed. The preferable thickness is the same thickness as the gate electrode, for example, 200 nm. From FIG. 7, it can be seen that even with this thickness, damage to the photoelectric conversion element in the etching process can be reduced.

  In any structure, it is possible to effectively utilize the function as an optical waveguide that utilizes reflection at the interface between the high refractive index region and the insulating layer at each thickness.

  In addition, by forming the high refractive index region before the conductive layer, it is possible to effectively utilize the light receiving surface of the photoelectric conversion element and reduce damage to the photoelectric conversion element during patterning of the light shielding layer as shown in FIG. It becomes.

  Here, the pattern defining the opening of the photoelectric conversion element is for determining the outer edge of the region of light incident on the photoelectric conversion element. This can be understood by performing optical simulation or the like of the element cross section to determine which layer has a pattern in which the opening is determined.

  Hereinafter, a semiconductor substrate that is a material substrate is expressed as a “substrate”, but includes cases where the material substrate is processed as follows. For example, a member in which one or a plurality of semiconductor regions and the like are formed, a member in the middle of a series of manufacturing steps, or a member that has undergone a series of manufacturing steps can be referred to as a substrate.

  Further, “on the semiconductor substrate” represents the main surface of the semiconductor substrate on which the pixels are formed. The direction from the main surface of the semiconductor substrate to the inside of the substrate is the downward direction, and the opposite is the upward direction.

(Pixel circuit configuration)
FIG. 13 shows an example of a circuit configuration of a pixel in a CMOS type imaging device which is a kind of imaging device. Each pixel is indicated at 1310.

  The pixel 1310 includes a photodiode 1300 which is a photoelectric conversion element, a transfer transistor 1301, a reset transistor 1302, an amplification transistor 1303, and a selection transistor 1304. Here, the power supply line is indicated by Vcc, and the output line is indicated by 1305.

  The photodiode 1300 has an anode connected to the ground line and a cathode connected to the source of the transfer transistor 1301. In addition, the source of the transfer transistor can also serve as the cathode of the photodiode.

  The drain of the transfer transistor 1301 forms a floating diffusion (hereinafter referred to as FD) which is a transfer region, and the gate thereof is connected to the transfer signal line. Further, the reset transistor 1302 has a drain connected to the power supply line Vcc, a source constituting the FD, and a gate connected to the reset signal line.

  The amplification transistor 1303 has a drain connected to the power supply line Vcc, a source connected to the drain of the selection transistor 1304, and a gate connected to the FD. The selection transistor 1304 has its drain connected to the source of the amplification transistor 1303, its source connected to the output line 1305, and its gate connected to a vertical selection line driven by a vertical selection circuit (not shown).

  The circuit configuration shown here can be applied to all the embodiments of the present invention. However, for example, the circuit configuration can be applied to a configuration without a transfer transistor and other circuit configurations in which a plurality of pixels share a transistor. Similarly, a photodiode, a phototransistor, or the like can be used as the photoelectric conversion element.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 1 is a schematic cross-sectional view in the direction perpendicular to the semiconductor substrate for one pixel of the CMOS type imaging device described above. In an actual imaging device, a plurality of pixels are formed on a semiconductor substrate.

  The image pickup apparatus of the present embodiment has the following configuration. A first high refractive index region 3 and a first insulating layer 4 are arranged on a semiconductor substrate 1 having a photodiode 2 that is a photoelectric conversion element. There are a first pattern 5 provided on the first insulating layer 4, a second insulating layer 6 covering the first pattern 5, and a second pattern 7 provided on the first pattern 5. The first high refractive index A second high refractive index region 8 is disposed on the region 3. A planarizing layer 9, a color filter layer 10, a planarizing layer 11, and an on-chip microlens 12 provided on the high refractive index region 8 are provided in this order.

  The first high-refractive index region 3 is a transparent material that transmits light, and has a higher refractive index than the first insulating layer 4 present around the first high-refractive index region 3. preferable.

  In the present embodiment, the area of the second surface on the photoelectric conversion element 2 side is larger than that of the first surface than the first surface having the first high refractive index region 3. That is, the high refractive index region is formed in a tapered shape. According to this shape, light leakage can be reduced. Further, according to the conventional manufacturing method, the process of etching the insulating layer and the process of embedding the photorefractive index material in this shape are difficult, but can be easily formed by the manufacturing method of this embodiment. Of course, the interface between the first high refractive index region 3 and the insulating layer 4 may be perpendicular to the light receiving surface of the photoelectric conversion element 2.

  Here, the “surface” of the high refractive index region refers to a surface in the horizontal direction with respect to the light receiving surface of the photoelectric conversion element 2 in the high refractive index region. The same applies to any optical refractive index region in the following embodiments.

As a method of forming a tapered shape in which the area of the second surface of the first high refractive index region 3 is larger than the area of the first surface, various conditions during dry etching are controlled. For example, anisotropic etching is performed using a gas such as CF ₄ , CHF ₃ , CH ₂ F ₂ , CO, O ₂ , and Ar in a plasma etching apparatus. At that time, it is possible to process into a tapered shape by controlling various parameters such as gas flow rate, pressure, temperature, power, and distance between electrodes.

  Moreover, in the Example which concerns on this invention, the 1st high refractive index area | region 3 is formed ahead of the 1st insulating layer 4 which exists around it. This specific manufacturing method and its effects will be described later.

  The first insulating layer 4 covers the photoelectric conversion element 2 and the first high refractive index region 3. The first insulating layer 4 is preferably an insulator having a refractive index lower than that of the first high refractive index region 3. Specifically, silicon oxide or silicon oxide doped with phosphorus, boron, fluorine, or the like can be given. For example, a gate insulating layer and a gate electrode may be interposed between the semiconductor substrate 1 and the first insulating layer 4 (not shown).

  Thereafter, the first pattern 5 formed on the first insulating layer 4 is a wiring layer made of a conductive material such as aluminum or copper.

  The second insulating layer 6 only needs to have a refractive index lower than that of the first high refractive index region 3. Specifically, a silicon oxide etc. are mentioned.

  The second pattern 7 is made of a conductive material such as aluminum or copper, and has a light shielding film for shielding incident light incident on the photoelectric conversion element 2 in addition to a function as a wiring. There is also.

  The second high refractive index region 8 is provided on the photoelectric conversion element 2 between the second patterns 7 in contact with the first high refractive index region 3. The second high refractive index region 8 is made of a transparent material that transmits light and made of a material having a higher refractive index than the first insulating layer 4 and the second insulating layer 6. Specifically, a silicon nitride layer is preferable.

  The second high refractive index region 8 may also serve as a passivation layer that covers the second pattern 7. In the present embodiment, the second high refractive index region 8 is formed in a shape in which the cross-sectional area of the first surface is larger than the cross-sectional area of the second surface. However, the interface between the second high refractive index region 8 and the insulating layer 6 may have a shape perpendicular to the light receiving surface of the photoelectric conversion element 2.

  The planarizing layer 9 is provided on the second high refractive index region 8 as necessary. The color filter layer 10 is provided above the planarizing layer 9 as necessary, and for example, three colors of red, green, and blue are formed in a Bayer array. Furthermore, the planarization layer 11 is provided above the color filter layer 10 as necessary.

  Finally, the on-chip microlens 12 is provided on the flattening layer 11 and plays a role of effectively taking light into the high refractive index region.

  Next, a specific manufacturing method of this embodiment will be described.

  FIG. 2 shows a manufacturing flow for forming the first high refractive index region 3. First, a high refractive index material is formed in layers on the semiconductor substrate 1 on which the photoelectric conversion element 2 is formed. The high refractive index layer is preferably silicon nitride using LPCVD (refractive index n = 2.0) or silicon nitride using plasma CVD (n = 2.0). Here, the gate insulating layer and the gate electrode may be formed before the first high refractive index region 3 is formed.

  Then, the 1st high refractive index area | region 3 is formed in a desired area | region using a general semiconductor processing technique. As described above, the thickness of the high refractive index region 3 is preferably 500 nm or more. Further, the upper limit of the thickness is preferably equal to the bottom side of the first pattern 5. Specifically, it is about 2000 nm. This is because the formation of the first pattern 5 is facilitated.

  Thus, by forming the high refractive index region 3 first, damage to the photoelectric conversion element can be reduced as compared with the manufacturing method as shown in FIG. Further, it is possible to reduce damage to the photodiode due to etching when the high refractive index region 8 is formed.

  Here, the area of the surface facing the light receiving surface of the photoelectric conversion element 2, that is, the lowermost surface of the first high refractive index region 3 is preferably smaller than the surface area of the photoelectric conversion element 2. This is to reduce the leakage of light to other than the photoelectric conversion element 2, and is particularly effective when a shift during manufacture is taken into consideration.

  Further, in the case of forming an LDD structure of a transistor, as described above, the first high refractive index region 3 is preferably equal in thickness to the gate electrode in the film thickness direction, for example, about 200 nm in thickness. . With such a thickness, the sidewall of the LDD structure and the first high refractive index region 3 can be formed at the same time. In addition to reducing damage to the photoelectric conversion element 2, it is possible to reduce the number of steps. It becomes. Of course, even when each etching is performed in a separate process, the same high refractive index layer is used, so that the number of steps can be reduced. In addition, as shown in FIG. 7, it is possible to reduce damage to the photoelectric conversion element in the etching process even at this thickness.

  In any structure, it is possible to effectively use the function as an optical waveguide that utilizes reflection at the interface between the high refractive index region and the insulating layer at each thickness.

  In the case of a general process in which an etching stop layer is first formed among the layers formed on the photoelectric conversion element, the etching stop layer remains on the optical waveguide and the photoelectric conversion element. Therefore, the function of the optical waveguide may be impaired. Further, it is considered that etching is further performed on a portion of the etching stop layer corresponding to the optical waveguide (see Patent Document 1), but the photoelectric conversion element is damaged by this etching process.

  However, according to the present embodiment, among the layers formed on the photoelectric conversion element, the high refractive index layer for constituting the optical waveguide is formed first. Therefore, it becomes possible to configure an optical waveguide while reducing etching damage to the photoelectric conversion element.

  Then, as shown in FIG. 2C, the first insulating layer 4 is formed so as to cover the first high refractive index region 3. The first insulating layer 4 is preferably a BPSG film in which silicon oxide is doped with phosphorus and boron. After forming the first insulating layer 4, a planarization process such as CMP is performed as necessary.

  In FIG. 2C, the first insulating layer 4 completely covers the upper portion of the first high refractive index region 3. This is because the flatness is improved when CMP is performed because the insulating layer 4 is formed on the entire surface. Of course, after the first insulating layer 4 is formed, the upper portion of the high refractive index region 3 may be exposed by performing a planarization process such as CMP.

  FIG. 3 is a manufacturing flow from the formation of the first high refractive index region 3 to the formation of the second high refractive index region 8.

  After forming the insulating layer 4, a first pattern 5 is formed. As the material of the first pattern 5, for example, aluminum is suitable. Further, it may be a copper pattern formed by a damascene process. The same applies to the following embodiments.

  According to the process sequence of this embodiment, since the first high refractive index region 3 is formed first, the optical waveguide can be formed by fully utilizing the area of the light receiving surface of the photoelectric conversion element 2. Since the degree of freedom in designing the high refractive index region is increased, the cross-sectional area of the high refractive index region can be maximized with respect to the surface area of the photoelectric conversion element. This is particularly effective when the pixels are miniaturized and the aspect ratio of the high refractive index region is increased.

  Further, according to this order of steps, it is possible to protect the photoelectric conversion element from etching damage when patterning a light shielding film or the like formed on the photoelectric conversion element as shown in FIG.

  Thereafter, a second insulating layer 6 and a second pattern 7 are formed. For example, the insulating layer 6 is plasma silicon oxide and the pattern 7 is aluminum.

  FIG. 4 is a manufacturing flow for forming the second high refractive index region 8.

  After the second pattern 7 is formed, a photoresist is formed, and a photoresist pattern 13 for forming the second high refractive index region 8 is formed using a patterning technique. Then, the second insulating layer 6 and the first insulating layer 4 are etched by plasma etching.

When the second insulating layer 6 is plasma silicon oxide and the first insulating layer 4 is BPSG, plasma is generated using, for example, a CF-based gas typified by C ₄ F ₈ and C ₅ F ₈ , O ₂ , and Ar. Etching is performed. At this time, if an etching condition that can maintain a higher selection ratio than the first high refractive index region 3 is selected, the amount of abrasion of the first high refractive index region 3 can be reduced. Further, if etching conditions are selected, it is possible to perform etching in a tapered shape as shown in FIG. 4B, but it is not always necessary to have a tapered shape.

  Thereafter, a second high refractive index region 8 is formed by embedding a high refractive index material. For example, silicon nitride by high density plasma CVD or a high refractive index material by spin coating is embedded.

  After embedding the high refractive index material, the upper portion may be processed flat using resist etch back or CMP as necessary.

  Here, it is more preferable that the first high refractive index region 3 and the second high refractive index region 8 are made of a material having the same refractive index. This is because it becomes possible to reduce reflection at the interface at the joint portion. However, it does not have to be the same. In such a case, an antireflection film for reducing reflection at the interface may be provided at the interface.

  In this embodiment, a well-shaped dig is formed by etching to form the second high-refractive index region 8. As in the first high-refractive index region 3, the second high-refractive index region 3 is first formed. The high refractive index region 8 may be patterned and formed.

  As mentioned above, according to the manufacturing method of this invention, it becomes possible to reduce the damage by the plasma etching at the time of forming an optical waveguide directly on a photoelectric conversion element. Therefore, an increase in dark current that is a noise component of the sensor can be suppressed.

  The same effect can be obtained even when the optical waveguide is composed of a single region as well as a plurality of high refractive index regions.

(Second embodiment)
An imaging apparatus according to the second embodiment is shown in FIG. The same members as those in the first embodiment described above are denoted by the same reference numerals and description thereof is omitted. Also, the description about the same manufacturing method is omitted.

  In the image pickup apparatus according to the second embodiment, after the second pattern 7 is formed, the third insulating layer 14 is formed, and a planarization process such as CMP is performed. Then, a well-like digging is performed thereafter to form the second high refractive index region 8. By performing the planarization process on the third insulating layer 14, the exposure process in the etching process for forming the second high refractive index region 8 can be stably performed.

  In the present embodiment, by first forming the first high refractive index region 3 present closest to the photoelectric conversion element 2, it is possible to suppress an increase in noise components due to damage caused by plasma etching. . At the same time, by flattening the insulating layer and then performing a well-like digging, it becomes possible to accurately perform this, and the light collection efficiency is improved.

(Third embodiment)
FIG. 6 shows an imaging apparatus according to this embodiment. In addition to the second high refractive index region 8, a third high refractive index region 16 is formed. Furthermore, 14 represents a third insulating layer, and 15 represents a third wiring layer.

  Here, the same members as those in the first embodiment described above are denoted by the same reference numerals, description thereof is omitted, and descriptions relating to the same manufacturing method are also omitted.

  In the case of forming a high aspect ratio optical waveguide for multi-layer wiring, by increasing the number of layers, the aspect ratio of each layer is reduced, and embedding of a high refractive index material is facilitated.

  In this embodiment, as in the first embodiment, the first high refractive index region 3 existing closest to the photoelectric conversion element 2 is formed first, thereby suppressing an increase in noise components due to plasma damage. Is possible. In particular, it is effective because a plurality of optical waveguides are formed. At the same time, by forming the high refractive index region into three layers, good embeddability can be obtained even when a high aspect ratio optical waveguide is formed by multilayering of the wiring layers.

(Application to imaging module)
FIG. 11 is a configuration diagram illustrating an example in which the imaging apparatus manufactured by the imaging apparatus manufacturing method described in the first to third embodiments of the present invention is applied to an imaging module used in a portable device. is there.

  There is a cover member 1104 for mounting and sealing the imaging device 1100 on a substrate 1107 made of ceramic or the like. The substrate 1107 is electrically connected to the imaging device 1100. On the imaging device 1100, an optical portion 1105 for capturing light and an optical low-pass filter 1106 are installed. Further, the imaging lens 1102 and the lens barrel member 1101 for fixing the imaging lens 1102 cover the cover member 1104 and are well sealed with the substrate 1107.

In this application, not only the imaging device of the present invention but also an imaging signal processing circuit, an A / D converter (analog / digital converter), and a module control unit may be mounted on the substrate 1107. Further, they may be formed in the same process on the same semiconductor substrate (FIGS. 1 and 1) as the imaging device.
(Application to digital cameras)
FIG. 12 is a block diagram when the imaging apparatus manufactured by the imaging apparatus manufacturing method described in the first to third embodiments of the present invention is applied to a digital camera which is an example of an imaging system.

  As a configuration for taking light into a solid-state imaging device 1204 which is an imaging device, there are a shutter 1201, an imaging lens 1202, and a diaphragm 1203. The shutter 1201 controls exposure to the solid-state image sensor 1204, and incident light is imaged on the solid-state image sensor 1204 by the imaging lens 1202. At this time, the amount of light is controlled by the diaphragm 1203.

  A signal output from the solid-state imaging device 1204 according to the captured light is processed by the imaging signal processing circuit 1205 and converted from an analog signal to a digital signal by the A / D converter 1206. The output digital signal is further processed by the signal processing unit 1207 to generate captured image data. The captured image data can be stored in the memory 1210 mounted on the digital camera or transmitted to an external device such as a computer or printer through the external I / F unit 1213 according to the setting of the operation mode of the user. The captured image data can also be recorded on a recording medium 1212 that can be attached to and detached from the digital camera through the recording medium control I / F unit 1211.

  The solid-state imaging device 1204, the imaging signal processing circuit 1205, the A / D converter 1206, and the signal processing unit 1207 are controlled by a timing generation unit 1208, and the entire system is controlled by an overall control unit / calculation unit 1209. In addition, these systems can be formed on the same semiconductor substrate (FIGS. 1 and 1) as the solid-state imaging device 1204 by the same process.

  As described above, in each of the embodiments, the CMOS type imaging device is described as an example, but the present invention can be applied to other types of imaging devices.

  In addition, the shape of the optical waveguide is not limited to that shape. Further, in each example, a plurality of high refractive index regions are formed. The effect can be obtained.

It is sectional drawing of the imaging device of 1st Example of this invention. It is a manufacturing flow of the 1st example of the present invention. It is a manufacturing flow of the 1st example of the present invention. It is a manufacturing flow of the 1st example of the present invention. It is sectional drawing of the imaging device of the 2nd Example of this invention. It is sectional drawing of the imaging device of the 3rd Example of this invention. It is a relationship figure of a film thickness and dark current. It is sectional drawing of the imaging device of background art. It is a manufacturing flow of the imaging device of background art. It is sectional drawing of the imaging device of background art. It is a block diagram of an example imaging module which applied the imaging device of this invention. It is a block diagram which shows the structure of an example digital camera which applied the imaging device of this invention. It is an example of the equivalent circuit of the imaging device of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Photodiode 3 1st high refractive index area | region 4 1st insulating layer 5 1st pattern 6 2nd insulating layer 7 2nd pattern 8 2nd high refractive index area | region 9 Planarizing layer 10 Color Filter layer 11 Planarizing layer 12 On-chip microlens 13 Photoresist 14 Third insulating layer 15 Third pattern 16 Third high refractive index region

Claims (16)

By patterning a transparent layer formed on a semiconductor substrate having a photoelectric conversion element, a first layer comprising a part of the transparent layer having a lower surface facing at least a part of a light receiving surface of the photoelectric conversion element. A first step of forming a region;
After the first step, a second step of forming a first insulating layer covering the first region and having a refractive index lower than that of the first region;
A third step of forming a second insulating layer covering the first region and the first insulating layer after the second step;
A fourth step of forming a digging exposing the upper surface of the first region by etching the second insulating layer and the first insulating layer after the third step;
After the fourth step, a transparent material having a higher refractive index than that of the first insulating layer and the second insulating layer is embedded in the digging so that the surroundings in the direction along the light receiving surface. a first portion of the first insulating layer is present, in the direction along the light receiving surface and a second portion where the second insulating layer is present around the second consisting of the transparent material A fifth step of forming the region of
Forming a first conductive layer between the second step and the third step; forming a second conductive layer between the third step and the fourth step;
In the fourth step and the fifth step, the first region is located between the first portion and the light receiving surface in a direction perpendicular to the light receiving surface, and the light receiving of the first portion is performed. A method for manufacturing an imaging device, wherein a cross-sectional area in a plane along a plane is smaller than a cross-sectional area in a plane along the light-receiving surface of the second portion.   The method for manufacturing an imaging device according to claim 1, wherein the first insulating layer is planarized between the second step and the third step. A third insulating layer covering the first region, the first insulating layer, the second insulating layer, and the second conductive layer is formed between the third step and the fourth step. And having a process of
In the fourth step, the digging is formed by etching the third insulating layer,
The fifth step is performed such that the second region includes a third portion around which the third insulating layer exists in a direction along the light receiving surface. A method for manufacturing the imaging device according to 1 or 2 . The material of the first conductive layer is a copper, a manufacturing method of an imaging apparatus according to any one of claims 1 to 3, characterized in that formed by said first conductive layer a damascene process. The imaging device manufacturing method according to any one of claims 1 to 4 wherein the dug characterized by having a tapered shape. In the fourth step and the fifth step, the second area is in contact with the upper surface of the first area, and the cross-sectional area of the first portion along the light receiving surface is the imaging device manufacturing method according to any one of claims 1 to 5, characterized in that to be smaller than the area of the light-receiving surface. Wherein the fifth step, the second area is the cross-sectional area in a plane along the light-receiving surface includes a fourth portion larger than the area of the light receiving surface, the second portion is the first portion And between the fourth part and the fourth part,
After the fifth step, the micro-lens corresponding to the photoelectric conversion element, in any one of claims 1 to 6, characterized in that a step of forming a state where the fourth portion there was The manufacturing method of the imaging device as described. The method of manufacturing an imaging apparatus according to claim 7 , wherein after the fifth step, the fourth portion is planarized by etch back or CMP. 2. The material of the first insulating layer is silicon oxide or silicon oxide doped with at least one of phosphorus and boron, and the material of the second insulating layer is silicon oxide. The manufacturing method of the imaging device of any one of thru | or 8 . The imaging device manufacturing method according to any one of claims 1 to 9, wherein the etching is plasma etching. The material of the transparent layer is silicon nitride, imaging device manufacturing method according to any one of claims 1 to 10, wherein the transparent material is silicon nitride. The transparent material is silicon nitride, a manufacturing method of an imaging apparatus according to any one of claims 1 to 11, wherein the embedding into the digging of the transparent material by high-density plasma CVD. Wherein in the fifth step, the manufacturing method of the imaging apparatus according to any one of claims 1 to 10, characterized in that embedding the transparent material to the digging by spin-coating. The first region has a cross-sectional area on a second surface along the light-receiving surface closer to the photoelectric conversion element than the first surface, compared to a cross-sectional area on the first surface along the light-receiving surface. the imaging device manufacturing method according to any one of claims 1 to 13, characterized in that it is the larger of. The distance between the upper surface and the light receiving surface, a manufacturing method of an imaging apparatus according to any one of claims 1 to 14, characterized in that it is 200nm to 2000 nm. The semiconductor substrate has a transistor, using the transparent layer, the manufacturing method of the imaging apparatus according to any one of claims 1 to 15, characterized by forming the LDD structure in the transistor.

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