JP4987142B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine that can quickly detect the fact that the gaming machine is illegally modified after the game hall is closed and prevent illegal gaming.

  A ball game machine such as a pachinko machine has a symbol start opening provided on the game board, a symbol display section for displaying a series of symbol variation patterns by a plurality of display symbols, and a big winning opening for opening and closing the opening and closing plate. Configured. When the detection switch provided at the symbol start port detects the passage of the game ball, the winning state is entered, and after the game ball is paid out as a prize ball, the display symbol is changed for a predetermined time in the symbol display section. Thereafter, when the symbol is stopped in a predetermined manner such as 7-7-7, a big hit state is established, and the big winning opening is repeatedly opened to generate a profit state advantageous to the player. However, in actuality, whether or not the big hit state is determined in advance by the big hit lottery process based on the winning of the game ball, and the symbol display section performs the symbol changing operation exclusively to increase the player.

  Usually, this type of gaming machine is composed of a main control board for overall control of gaming operations and a sub control board for executing individual control operations based on control commands received from the main control board. . The computer circuit of the main control board operates based on a control program including the big hit lottery process. Therefore, if this control program is changed, it is possible to arbitrarily invite a big hit state, and such illegal acts have been reported.

  As a specific illegal act, for example, after the game hall is closed, the main control board of the gaming machine is replaced with an illegally modified product. Therefore, various measures are taken to deal with such illegal acts (for example, Patent Document 1).

  In the invention described in Patent Document 1, a reflective photosensor having a light emitting element and a light receiving element is arranged on the back surface of a control board, and a battery for operating the sensor is provided separately from the power supply board.

JP 2005-137429 A

  However, in the above configuration, if a member that reflects sensing light from the light emitting element is inserted into the gap between the control board and the photosensor, the control board can be replaced without any problem. In addition, it is necessary to secure a place where a photo sensor and a battery are provided separately, which requires drastic changes in the device configuration, and also complicates the assembly process of the gaming machine.

  The present invention has been made in view of the above problems, and provides a gaming machine that does not require an additional member for crime prevention and can detect an illegal remodeling action with only a necessary minimum circuit change. Objective.

To achieve the above object, the present invention executes a lottery process for determining whether or not a game state advantageous to a player is generated, and controls the game operation centrally based on the lottery result. And a sub-control unit that executes individual control operations based on a command from the main control unit, a steady DC voltage generated based on an AC voltage received from the outside, and the AC voltage are cut off. And a power supply unit that supplies a backup DC voltage that maintains a predetermined level for a predetermined period to the main control unit and / or the sub control unit. A conversion circuit that converts the AC voltage into the steady DC voltage, an abnormality detection circuit that detects a voltage abnormality or current abnormality of the backup DC voltage, and an intermediate circuit that receives a detection signal of the abnormality detection circuit are provided, Intermediate circuit , The steady state DC voltage and functions as a power supply voltage, which is configured so as not to transmit to other circuits the detection signal of the abnormality detection circuit and turned ON so long as to maintain a normal level. In addition to the ball and ball game machines, the spinning machine is typical as the game machine.

  As described above, according to the present invention, it is possible to realize a gaming machine that can detect an illegal remodeling action with only a necessary minimum circuit change without requiring an additional member for crime prevention.

It is a perspective view of the pachinko machine which shows the embodiment of the present invention. It is the front view which illustrated in detail the game board of the pachinko machine of FIG. It is a block diagram which shows the whole structure of the pachinko machine of FIG. It is a circuit diagram which shows the power supply circuit of a power supply board. FIG. 5 is a circuit diagram illustrating a part of FIG. 4 in detail. FIG. 6 is a circuit diagram in which a part of FIG. 5 is modified. FIG. 5 is another circuit diagram illustrating a part of FIG. 4 in detail. It is a circuit diagram of the power supply circuit which does not utilize a shutdown function. It is another circuit diagram of the power supply circuit which does not use a shutdown function. FIG. 10 is a circuit diagram showing a modified circuit of FIG. 9.

  Hereinafter, embodiments of the present invention will be described in detail. FIG. 1 is a perspective view showing a pachinko machine GM of the present embodiment. This pachinko machine GM includes a rectangular frame-shaped wooden outer frame 1 that is detachably mounted on an island structure, and a front frame 3 that is pivotably mounted via a hinge 2 fixed to the outer frame 1. It is configured. A game board 5 is detachably attached to the front frame 3 from the front side, not from the back side, and a glass door 6 and a front plate 7 are pivotally attached to the front side so as to be openable and closable.

  On the outer periphery of the glass door 6, an electric lamp such as an LED lamp is arranged in a substantially C shape. An upper plate 8 for storing game balls for launch is mounted on the front plate 7, and a lower plate 9 for storing game balls overflowing from or extracted from the upper plate 8 and a launch handle 10 are mounted at the bottom of the front frame 3. (HD) is provided. The launch handle 10 is interlocked with the launch motor, and a game ball is launched by a striking rod that operates according to the rotation angle of the launch handle 10.

  A chance button 11 is provided on the outer peripheral surface of the upper plate 8. The chance button 11 is provided at a position where it can be operated with the left hand of the player, and the player can operate the chance button 11 without releasing the right hand from the firing handle 10. The chance button 11 does not function normally, but when the game state becomes the button chance state, the built-in lamp is turned on and can be operated. The button chance state is a game state provided as necessary.

  On the right side of the upper plate 8, an operation panel 12 for ball lending operation with respect to the card-type ball lending machine is provided, a frequency display unit for displaying the remaining amount of the card with a three-digit number, and a ball of game balls for a predetermined amount A ball lending switch for instructing lending and a return switch for instructing to return the card at the end of the game are provided.

  As shown in FIG. 2, the game board 5 is provided with a guide rail 13 formed of a metal outer rail and an inner rail in an annular shape, and a liquid crystal color display DISP is provided at the approximate center of the game area 5a inside. Has been placed. In addition, at a suitable place in the game area 5a, a symbol starting port 15, a big winning port 16, a plurality of normal winning ports 17 (four on the right and left sides of the big winning port 16), and a gate 18 serving as two passing ports are arranged. Has been. Each of these winning openings 15 to 18 has a detection switch inside, and can detect the passage of a game ball.

  The liquid crystal display DISP is a device that variably displays a specific symbol related to a big hit state and displays a background image and various characters in an animated manner. This liquid crystal display DISP has special symbol display portions Da to Dc in the center portion and a normal symbol display portion 19 in the upper right portion. And, in the special symbol display parts Da to Dc, a reach effect is executed that expects a big hit state to be invited, or in the special symbol display parts Da to Dc and the surroundings, a notice effect that informs the result of the success / failure is executed. Is done.

The normal symbol display unit 19 displays a normal symbol. When a game ball that has passed through the gate 18 is detected, the normal symbol fluctuates for a predetermined time, and the lottery extracted at the time when the game ball passes through the gate 18 is extracted. The stop symbol determined by the random number for use is displayed and stopped.

For example, the symbol start port 15 is configured to be opened and closed by an electric tulip having a pair of left and right opening and closing claws 15a. When the stop symbol after fluctuation of the normal symbol display unit 19 displays a winning symbol, it is opened and closed. The claw 15a is opened only for a predetermined time or until a predetermined number of game balls are detected.

  When a game ball wins the symbol start port 15, the display symbols of the special symbol display portions Da to Dc change for a predetermined time and are determined based on the lottery result corresponding to the winning timing of the game ball to the symbol start port 15. Stop at the stop symbol. In addition, in special symbol display parts Da-Dc and its circumference, a notice effect may be performed between a series of symbol effects.

  The big winning opening 16 is controlled to open and close by, for example, an opening / closing plate 16a that can be opened forward, but when the stop symbol after the symbol change of the special symbol display portions Da to Dc is a big hit symbol such as “777”, the “big hit game” Is started, and the opening / closing plate 16a is opened.

  After the opening / closing plate 16a of the big prize opening 16 is opened, the opening / closing plate 16a is closed when a predetermined time elapses or when a predetermined number (for example, 10) of game balls wins. In such an operation, the special game is continued up to 15 times, for example, and is controlled in a state advantageous to the player. In addition, when the stop symbol after the change of the special symbol display parts Da to Dc is a specific symbol of the special symbols, a privilege that the game after the end of the special game is in a high probability state is given.

  FIG. 3 is a block diagram showing an overall circuit configuration of the pachinko machine according to the embodiment. Broken lines in the figure mainly indicate DC voltage lines.

  As shown in the figure, this pachinko machine is centrally responsible for the game control operation and the power supply board 20 that outputs various DC voltages, system reset signal (power reset signal) SYS, RAM clear signal CLR, etc. upon receiving AC 24V. A main control board 21, an effect control board 22 that executes a lamp effect and a sound effect based on a control command CMD ′ received from the main control board 21, and an effect interface that transmits a signal received from the effect control board 22 to each part. The substrate 23, the liquid crystal control board 24 that drives the liquid crystal display DISP based on the control command CMD "received from the effect interface board 23, and the payout motor M based on the control command CMD received from the main control board 21. In response to the operation of the payout control board 25 for paying out the game ball and the launch handle HD by the player. It is organized around a firing control board 26 of firing game ball.

  Here, the main control board 21, the effect control board 22, the liquid crystal control board 24, and the payout control board 25 are each mounted with a computer circuit including a one-chip microcomputer. Therefore, in this specification, the main control board 21, the production control board 22, the liquid crystal control board 24, the circuits mounted on the payout control board 25, and the operations realized by the circuits are collectively referred to as functions. The control unit 21, the production control unit 22, the liquid crystal control unit 24, and the payout control unit 25 may be referred to. Further, all or a part of the control units excluding the main control unit 21 are collectively referred to as a sub control unit.

  The main control unit 21 transmits a control command CMD in one direction to the payout control unit 25, while the payout control unit 25 relates to a prize ball count signal indicating a payout operation of game balls and an abnormality in the payout operation. The status signal CON is received. The status signal CON includes, for example, a replenishment signal, a payout shortage error signal, and a lower plate full signal.

  As shown in the figure, a backup power supply BK of DC 5V is supplied from the power supply board 20 to the main control unit 21 and the payout control unit 25. Therefore, even after the AC power supply 24V is shut off due to the end of business or a power failure, the RAM data in the one-chip microcomputer is retained.

  Further, the power supply board 20 is configured to output a voltage drop signal ABN to the main control unit 21 and the payout control unit 25 when the AC power supply 24V is shut off. The main control unit 21 and the payout control unit 25 grasp the level drop of the voltage drop signal ABN by the flag sense method, and then save necessary data in the RAM. Therefore, coupled with the operation of the backup power supply BK described above, the main control unit 21 and the payout control unit 25 can resume the operation before the power interruption at the start of business or at the time of recovery from a power failure. Note that only the main control unit 21 may have a backup function, that is, the backup power source BK and the voltage drop signal ABN may be supplied only to the main control unit 21.

  Furthermore, the power supply board 20 outputs a RAM clear signal CLR indicating an operator's switch operation to the main control unit 21 and the payout control unit 25. This switch operation is mainly performed when the power is turned on, but is an operation for erasing the stored contents of the RAM held by the backup power source BK. Therefore, in each control board 21 and 25, the presence or absence of the switch operation by the attendant can be grasped by determining the level of the RAM clear signal CLR. When only the main control unit 21 has a backup function, the RAM clear signal CLR is supplied only to the main control unit 21.

  FIG. 4 is a circuit diagram showing a power supply circuit of the power supply board 20. The power supply circuit of the embodiment includes an AC input unit 41 that receives an AC voltage of 24 V, a rectifier 42 that converts the AC voltage output from the AC input unit 41 into a pulsating current, and a smoothing circuit 43 that smoothes the pulsating voltage. DC power supply units 44 to 46 that receive pulsating voltage and output various DC voltages, power supply monitoring unit PRH that prohibits the operation of DC power supply unit 44 based on feedback voltage RET received from main control board 21, backup A power storage unit 47 that generates power, an AC blocking unit 48 that shuts off the AC power line Lac when receiving an excessive AC voltage, a DC generation circuit 49 that rectifies the AC voltage output from the AC input unit 41, When receiving an excessive AC voltage, the level monitoring unit 50 operates to be turned on when the output voltage of the DC generation circuit 49 is lowered, and the DC shield that performs ON / OFF operation according to the output voltage level of the DC generation circuit 49. A unit 51, and a power source monitoring circuit 52 for generating a power reset signal SYS and the voltage drop signal ABN. The power reset signal is nothing but the system reset signal SYS.

  The AC input unit 41 includes a fusing fuse Fu1 that blows one of the power input lines PW, a power switch SW that cuts both the power input lines PW and PW, and a line filter that prevents external noise from leaking to the outside. L1, C1 to C3, R1) and antistatic portions (Sa, VR1 to VR3) for discharging static electricity such as game balls. The line filter is connected to each power supply input line PW, PW between a pair of coils L1 connected in series, a pair of capacitors C1 connecting both ends of the pair of coils L1, and between each power supply input line PW, PW and ground. Capacitors C2 and C3 and a resistor R1 connected between power input lines PW and PW.

  The antistatic unit includes a surge absorber Sa connected to a conductive plate provided in a game ball tank (not shown) for storing game balls, a varistor VR1 connected between the power input lines PW and PW, and each power source. The varistors VR2 and VR3 are connected between the input lines PW and PW and the ground. The connection point between the tank conductive plate and the surge absorber Sa is connected to the frame ground FG.

  The rectifier 42 is configured by three bridge-type full-wave rectifier circuits. That is, the diodes D1, D2, D3, and D4 constitute a first rectifier circuit, the diodes D1, D2, D5, and D6 constitute a second rectifier circuit, and the diodes D1, D2, D7, and D8 constitute a third rectifier circuit. It is configured.

The smoothing circuit 43 includes a capacitor C4 that smoothes the pulsating current output from the first rectifier circuit, and a blow fuse Fu2 that blows the DC power supply line. The + 32V DC voltage output from the smoothing circuit 43 is supplied to the solenoids via the main control board 21 and the like. When an excessive current flows through the + 32V DC power supply line, the blow fuse Fu2 is blown.

  The DC power supply unit 44 includes a smoothing capacitor C5 and a step-down switching regulator SR1, and outputs a + 12V DC voltage. The + 12V DC voltage is supplied to the main control board 21, the payout control board 25, and the liquid crystal control board 24.

  The DC power supply unit 45 includes a smoothing capacitor C6 and a step-down switching regulator SR2, and outputs a + 15V DC voltage. The + 15V DC voltage is supplied only to the digital amplifier mounted on the effect interface board 23.

  The DC power supply unit 46 includes a smoothing capacitor C6 and a step-down switching regulator SR3, and outputs a + 5V DC voltage. The + 5V DC voltage is supplied to the liquid crystal control board 24 and the effect interface board 23. The DC 5V voltage required for the main control board 21 and the payout control board 25 is generated by stepping down the DC 12V voltage received by the control boards 21 and 25.

  The power storage unit 47 includes a diode D9 and a capacitor C7. The DC voltage of + 5V serves as a backup power source for holding data in the built-in RAM of the one-chip microcomputer of the main control unit 21 and the payout control unit 25.

  The AC blocking unit 48 includes two diodes D13 and D14 connected to an AC power supply line Lac1 and Lac2 of AC 24V, a series circuit of a Zener diode ZD2 and a resistor R7 connected to a connection point of the diodes D13 and D14, a diode On the upstream side of D13 and D14, a fusing fuse Fu3 connected in series to one AC power supply line Lac1, and on the downstream side of the diodes D13 and D14, a fusing fuse Fu4 connected in series to one AC power supply line Lac1; It consists of

  The two diodes D13 and D14 are connected in series in a direction that prevents the intrusion of current so that an alternating current does not enter from the AC power supply lines Lac1 and Lac2. The Zener diode ZD2 is connected in a direction in which a breakdown current flows from the AC power supply line Lac2 on the other side toward the connection point of the diodes D13 and D14.

  The Zener diode ZD2 is normally in an OFF state, but when an excessive AC voltage (for example, AC 100V) is applied to the AC power supply lines Lac1 and Lac2, the Zener diode ZD2 enters a breakdown state. In this breakdown state, since the breakdown current of the Zener diode ZD2 flows through the path of the AC power supply line Lac2, the resistor R7, the Zener diode ZD2, the diode D13, and the AC power supply line Lac1, the fusing fuse Fu3 is blown. The resistor R7 is a protective resistor that prevents the Zener diode ZD2 and the diode D13 from being damaged.

The DC generation circuit 49 is a double-wave rectification circuit provided between two AC power supply lines Lac1 and Lac2 and the frame ground FG. Then, two diodes D10 and D11 connected in series between the two AC power supply lines Lac1 and Lac2, a current limiting resistor R4, a smoothing capacitor C9, and a load resistor in which resistors R5 and R6 are connected in series. Has been. The two diodes D10 and D11 have their anode terminals connected to the AC power supply lines Lac1 and Lac2, while the cathode terminals are commonly connected to the current limiting resistor R4 and the Zener diode ZD1. The resistor R4 is a current limiting resistor for the level monitoring unit 50, and the resistors R5 and R6 connected in series are also bias resistors for the power transistor Q2 that performs switching operation.

  Since the DC generation circuit 49 is configured as described above, the smoothing capacitor C9 is charged to a value close to the peak value of the AC voltage of the AC power supply lines Lac1 and Lac2. The voltage across the resistors R5 and R6 that function as load resistors is a smoothed DC voltage.

  The level monitoring unit 50 includes a bias circuit (R2, R3, C8) and a switching transistor Q1, and monitors whether any of the AC power supply lines Lac1 and Lac2 is at an abnormal level. Two diodes D10 and D11, a Zener diode ZD1, and bias resistors R2 and R3 are connected in series between the AC power supply lines Lac1 and Lac2 and the frame ground FG. A Zener diode ZD1 is connected in series to the connection point of the diodes D10 and D11 in the direction opposite to the diodes D10 and D11, that is, in the direction of blocking current.

  Further, a capacitor C8 is connected in parallel to both ends of the bias resistors R2 and R3 connected in series. The base terminal of the transistor Q1 is connected to a connection point between the bias resistors R2 and R3 connected in series. The collector terminal of the transistor Q1 is connected to the connection point between the current limiting resistor R4 and the smoothing capacitor C9, and the emitter terminal of the transistor Q1 is connected to the frame ground FG.

  On the other hand, the DC cut-off unit 51 includes a power transistor Q2 having a large current capacity and resistors R5 and R6 connected in parallel to the smoothing capacitor C9. The two resistors R5 and R6 are connected in series, and the connection point is connected to the base terminal of the powered transistor Q2. The resistor R6 is connected between the base terminal and the emitter terminal of the powered transistor Q2. These two resistors R5 and R6 function as a bias resistor for the powered transistor Q2. The collector terminal of the power transistor Q2 is connected to the ground, and the emitter terminal is connected to the frame ground FG.

  In a normal state, a predetermined level of DC voltage is generated across the smoothing capacitor C9 of the DC generation circuit 49. For this reason, the power transistor Q2 is turned on by receiving a sufficient positive voltage at the base terminal, and the collector terminal and the emitter terminal are brought into conduction. Therefore, the frame ground FG and the ground are also conductive.

  The collector terminal and the emitter terminal of the transistor Q2 are arranged at a position where the rectifying unit 42 and the smoothing circuit 43 are connected, and the smoothing circuit 43, the DC power supply units 44 to 46, etc. are provided on the condition that the transistor Q2 is in the ON state. Will work.

  Here, it is assumed that the potential difference between one of the AC power supply lines Lac1 and Lac2 and the frame ground FG exceeds the breakdown voltage of the Zener diode ZD1. At the time of such an abnormality, current flows in the direction of the diode D10 or the diode D11 → the Zener diode ZD1 → the bias resistors R2 and R3, and raises the base potential of the transistor Q1. Therefore, the transistor Q1 transitions from the OFF state to the ON state, and the voltage across the smoothing capacitor C9 is suddenly dropped.

  Then, since the base potential of the power transistor Q2 also drops, the power transistor Q2 changes from the ON state to the OFF state. And power transistor Q2 will be in an open state, power supply to smoothing circuit 43 and direct-current power supplies 44-46 will be stopped, and each circuit will be in a non-operating state.

  In the power supply circuit of the embodiment, in addition to the four blow fuses Fu1 to Fu4, an AC interrupting section 48 and a DC interrupting section 51 are characteristically provided. Therefore, even when AC 100V is accidentally applied to the AC 24V AC power supply line, damage to the IC and other electronic elements is effectively prevented. That is, the excessive voltage of AC100V causes the transistor Q1 to be turned on via the bias resistors R2 and R3, so that the transistor Q2 is immediately turned off and the ground line is cut to protect the DC power supply units 44 to 46. At the same time, the ICs and electronic elements on each control board that are supplied with DC power are protected. Moreover, when the AC voltage returns to a normal value, the transistor Q2 also returns to the ON state, and the power supply circuit resumes normal operation.

  FIG. 5 shows a part of FIG. 4 in detail, and maintains a predetermined voltage level (+5 V) even after the power is cut off, and the rectifying unit 42, the DC power supply unit 46 that generates a power supply voltage of + 5V. A power storage unit 47, a DC power supply unit 44 that generates a power supply voltage of +12 V, and a power supply monitoring unit PRH that monitors an abnormality on the output side of the DC power supply unit 44 (switching regulator SR1) are specifically illustrated.

  As illustrated, the power supply board 20 and the main control board 21 are connected via the connector CN1 of the power supply board 20 and the connector CN2 of the main control board 21. A backup power supply BK of DC 5V, DC 12V, and a RAM clear signal CLR are supplied from the power supply board 20 to the main control board 21 together with a power reset signal SYS and a voltage drop signal ABN (not shown).

  The RAM clear signal CLR includes a RAM clear switch SW connected to the power supply board 20, a current limiting resistor r1 mounted on the main control board 21, and a power supply voltage stepped down from 12V to 5V by the power supply circuit of the main control board 21. It is generated at 5V. When the RAM clear switch SW is turned on, the RAM clear signal CLR becomes L level.

  The backup power supply BK supplied from the power supply board 20 to the main control unit 21 is supplied to the RAM of the one-chip microcomputer, and this backup power supply BK is directly returned to the power supply board 20 as the feedback voltage RET. As shown in the figure, in this circuit example, the feedback voltage RET is supplied to the photodiode of the photocoupler PH through the current limiting resistor r2.

  The power supply monitoring unit PRH has a determination circuit (abnormality detection circuit) CR1 that determines whether or not the feedback voltage RET is normal, an intermediate circuit CR2 that receives the output of the determination circuit CR1, and a DC power supply unit that receives the output of the determination circuit CR1. And an operation prohibiting circuit CR3 for prohibiting the operation of 44. Here, the power supply voltage of the intermediate circuit CR <b> 2 is a DC voltage 12 V output from the DC power supply unit 44. On the other hand, the determination circuit CR1 and the operation prohibition circuit CR3 operate by receiving the backup power supply BK. Therefore, the determination circuit CR1 and the operation prohibition circuit CR3 continue to function even after the game hall is closed and the power is shut off.

  Specifically, the determination circuit CR1 includes a photocoupler PH, and current limiting resistors r2 and r3 and a reverse current blocking diode Ds are connected to the photodiode and the phototransistor of the photocoupler PH. Yes.

In the intermediate circuit CR2, a short circuit transistor Q5, a base resistor r8, a collector resistor r7, and a reverse current blocking diode Ds constitute a switching circuit. Since the intermediate circuit functions with a DC voltage of 12 V output from the DC power supply unit 44, the short-circuit transistor Q5 is always turned on after the power is turned on and the gaming machine starts operating normally. Therefore, during the game operation, even if the detection transistor Q4 changes from the ON state to the OFF state due to the influence of noise, the rise of the output voltage of the detection transistor Q4 is transmitted to the D-type flip-flop 60. Absent.

  The operation prohibiting circuit CR3 includes a D-type flip-flop 60 that is a latch circuit. The D-type flip-flop 60 is configured by, for example, SN7474 which is a general-purpose digital IC. The SN7474 has a D input terminal, a clock terminal CLK, a Q output terminal, and a clear terminal CLR. When the signal of the clock terminal CLK rises to H level, the input voltage of the D input terminal at that time is changed. The signal is output to the Q output terminal, and thereafter the state is maintained. On the other hand, when an L level signal is received by the clear terminal CLR, the Q output terminal becomes L level.

  In the circuit configuration of FIG. 5, an H level voltage is fixedly supplied to the D input terminal of the D flip-flop 60. On the other hand, the clock terminal CLK is connected to the collector terminal of the phototransistor of the photocoupler PH. Therefore, when the input signal to the clock terminal CLK of the D-type flip-flop 60, that is, the output signal of the photocoupler PH rises to the H level, the Q output terminal of the D-type flip-flop 60 becomes the H level. To maintain.

  On the other hand, the RAM clear signal CLR is supplied to the clear terminal CLR of the D-type flip-flop 60. Therefore, when the RAM clear switch SW is turned ON by the attendant, the Q output terminal of the D-type flip-flop 60 becomes L level, and then maintains that state unless the output signal of the photocoupler PH rises to H level. .

  The switching regulators SR1 and SR3 are configured by, for example, a step-down chopper type power supply IC, and here, an LM2576 whose equivalent circuit is shown in FIG. 5B is used. In order to simplify the circuit diagram, a fixed output type IC (LM2576) is used, and + 12V and + 5V are generated without externally attaching voltage dividing resistors R1 and R2 to the feedback path, respectively. is doing. Further, from the viewpoint of simplification, FIG. 5A shows only the choke coils L01 and L02, the flyhole diodes D01 and D02, and the output capacitor Co.

  Incidentally, the switching regulators SR1, SR3 (LM2576) have an external shutdown function. When an H level voltage is supplied to the ON / OFF input terminal, the switching regulator enters a standby state, and then stops functioning until an L level voltage is received at the ON / OFF input terminal. .

  Therefore, in this embodiment, the switching regulator SR1 exhibits its external shutdown function based on a signal from the D-type flip-flop 60 that is an operation prohibiting circuit. That is, the Q output of the D-type flip-flop 60 is supplied to the ON / OFF input terminal of the switching regulator SR1, and the shutdown function is exhibited by the H level Q output to inhibit the operation of the DC power supply unit 44. .

  Hereinafter, this operation prohibiting operation will be described in accordance with illegal acts. For example, when an illegal actor illegally modifies a gaming machine, it seems that it is after the game hall where the power of the gaming machine is cut off is closed. In such a time zone, the AC input voltage (AC 24 V) is interrupted, so that the DC power supply units 44 and 46 are not functioning. Therefore, the intermediate circuit CR2 maintains the OFF state and does not affect other circuits.

  On the other hand, since the backup power supply BK is functioning, the determination circuit CR1 and the operation prohibition circuit CR3 using this as the power supply voltage function effectively together with the RAM of the main control unit 21.

  In this state, when an illegal person replaces the main control board 21, it is necessary to remove at least the regular main control board 21 from the connector CN2. It should be noted that the legitimate main control board 21 is strictly sealed in the board case, so that the illegal person seems to replace the main control board with the board case. In any case, when the connector CN2 is disconnected from the main control board 21, the feedback voltage RET previously supplied to the photocoupler PH is interrupted, the current of the phototransistor is also interrupted, and the output voltage of the photocoupler Rises from L level to H level.

  This change is transmitted to the clock terminal CLK of the D-type flip-flop 60. As a result, the Q output of the D-type flip-flop 60 rises to the H level. After that, even if the feedback voltage RET returns to a normal value due to illegal connection of the main control board 21, the clock terminal CLK of the D-type flip-flop 60 only falls to L level, and H level The Q output is maintained. Further, even if the level of the clock terminal CLK is repeatedly changed due to chattering during illegal work, the Q output of the D-type flip-flop 60 maintains the H level.

  The gaming machine illegally modified in this way reaches the start of business the next day in that state. Since the AC voltage is supplied to the gaming machine prior to the start of business, the DC power supply unit 45 and the DC power supply unit 46 start to operate as switching regulators. However, since the ON / OFF terminal of the switching regulator SR1 is maintained at the H level for the DC power supply unit 44, the shutdown function is exhibited, the standby state is maintained, and + 12V is not output. Therefore, the main control board 21 cannot start the operation, and the fact of the illegal act is revealed by this abnormal situation. If the power supply monitoring unit PRH malfunctions, pressing the RAM clear switch SW returns the Q output of the D-type flip-flop 60 to the L level, so that the operation of the DC power supply unit 44 is started. Can.

  As described above, according to the circuit configuration of FIG. 5, an illegally modified gaming machine does not start a gaming operation, so that illegal gaming can be surely prevented. Note that the gaming machine that has started normal operation always receives the feedback voltage RET during the game operation. In this embodiment, the intermediate circuit CR2 in the ON operation state short-circuits the output of the determination circuit CR1. Therefore, noise superimposed on the wiring cable is not a problem at all.

  The circuit diagram using the LM2576 has been described above, but it is natural that the circuit configuration of the power supply monitoring unit PRH is changed when the IC used is changed. FIG. 6A is a circuit example using the LM2586, and includes an equivalent circuit of the LM2586 (FIG. 6B). In this circuit, voltage dividing resistors R1 and R2 are externally attached, and an output voltage of +12 V is set according to the resistance ratio. Further, the Q bar output of the D-type flip-flop 60 is supplied to the ON / OFF input terminal of the LM 2586 via the NOT gate G. This circuit configuration requires the pull-up resistor r4, the isolation diode Da, and the adjustment resistor ra that defines the switching frequency, but the other circuit configuration is the same as in the case of FIG.

By the way, in the circuit configurations of FIGS. 5 and 6, after the AC voltage is cut off, current continuously flows from the backup power source BK to the photodiode and the phototransistor, and the charge of the capacitor C7 is discharged. There is a risk of cutting. Therefore, in such a case, it is preferable to arrange a rechargeable battery for the backup power source BK instead of the capacitor C7.

  Further, when the current consumption in the photocoupler PH becomes a problem, the circuit configuration of FIG. 7 should be adopted instead of the circuit configuration of FIG. 5 or FIG. 7 includes a detection transistor Q4 for the feedback voltage RET, a short-circuit transistor Q5 for short-circuiting the collector voltage of the detection transistor Q4, and a D-type flip-flop 60.

  The detection transistor Q4, the base resistor r5, the collector resistor r6, and the diode Ds that prevents the reverse current flow constitute a determination circuit that determines whether or not the feedback voltage RET is normal. This determination circuit operates based on the backup power supply BK, and the detection transistor Q4 is always in the ON state when it is normal. However, in this circuit configuration, the ON current of the detection transistor Q4 can be sufficiently reduced by setting the resistance values of the base resistor r5 and the collector resistor r6 to be sufficiently large.

  Incidentally, the short-circuit transistor Q5, the base resistor r8, the collector resistor r7, and the diode Ds for preventing the backflow of current constitute another switching circuit (intermediate circuit). Then, after the gaming machine starts operating normally, the short-circuit transistor Q5 is always turned on. Therefore, during the game operation, even if the detection transistor Q4 changes from the ON state to the OFF state due to the influence of noise, the rise of the output voltage of the detection transistor Q4 is transmitted to the D-type flip-flop 60. Absent.

  On the other hand, after the game hall is closed and the AC input voltage is cut off, the power supply voltage of the short-circuit transistor Q5 disappears. Therefore, the short-circuit transistor Q5 is not turned on, and the output voltage of the detection transistor Q4 is transmitted to the D-type flip-flop 60 as it is.

  After the game hall is closed, if the main control board 21 is removed from the connector CN2 in order to replace the main control board 21, the detection transistor Q4 is turned off. Since the rise of the collector voltage of the detection transistor Q4 is directly transmitted to the clock terminal CLK of the D-type flip-flop 60, the ON / OFF input terminal of the switching regulator SR1 becomes H level. And since this H level is maintained until the business start of the next day, after the power supply to the gaming machine is turned on, the switching regulator SR1 enters a standby state and does not output + 12V. Therefore, the main control board 21 cannot start operation, and this fact reveals the fact of illegal activities.

  As described above, it is assumed that the legitimate main control board 21 will be removed from the connector CN2 together with the board case at the time of illegal modification. However, it is also conceivable to make a hole in the board case of the main control board 21 and replace only the one-chip microcomputer. Such an illegal act remains in the substrate case, so the possibility of occurrence is low, but measures are still necessary.

  Therefore, regardless of whether or not the regular main control board 21 is removed from the connector CN2 together with the board case, the circuit configuration of FIG. 8 is adopted to detect illegal actions. The power supply monitoring unit PRH in FIG. 8 includes a comparator Q6 that detects a voltage increase of the backup power supply BK, a short-circuit transistor Q5 that short-circuits the output of the comparator Q6, a D-type flip-flop 60, and an abnormality notification circuit 61. Yes. Since the output current limiting circuit is built in the comparator Q6, there is no problem even if the output terminal is continuously short-circuited by the short-circuit transistor Q5.

In the power supply monitoring unit PRH, when the main control board 21 is removed from the connector CN2 or the one-chip microcomputer of the main control board 21 is removed from the IC socket, the voltage value of the backup power supply BK slightly increases. We are using. And as backup power supply BK, in order to ensure sufficient current capacity, a rechargeable battery is preferably used. In this circuit configuration, the shutdown function of the switching regulator SR1 is not used. This is because in the circuit configuration of FIG. 8, since the voltage increase of the backup power supply BK is determined, the possibility of misrecognizing illegal activities cannot be denied.

  As illustrated, the abnormality notification circuit 61 includes a diode Dm connected to the Q output terminal of the D-type flip-flop 60, a capacitor Cm that receives the output voltage of the diode Dm, a NOT gate Gm that receives the voltage across the capacitor Cm, It is composed of a light emitting diode De and a notification buzzer BZ.

  The Q output of the D-type flip-flop 60 is supplied to the capacitor Cm via the diode Dm, and the H level Q output that is an abnormal level is stored in the capacitor Cm. Further, the voltage across the capacitor Cm is transmitted to the main control board 21 as an abnormal signal ERR via a NOT gate Gm that also serves as an output driver. When the main control board 21 receives the abnormality signal ERR from the power supply board 20, it is preferable to transmit information for prohibiting the payout to the payout control unit 25. It is also preferable to stop the firing operation. These prohibition operations are canceled when, for example, the RAM clear signal CLR is received.

  Further, when the output of the NOT gate Gm becomes L level, the light emitting diode De is abnormally turned on and the notification buzzer BZ is sounded. However, the NOT gate Gm operates in response to the power supply voltage 5V output from the switching regulator SR3, and therefore does not function until the game machine is turned on. Further, a power reset signal SYS is supplied to the clear terminal CLR of the D-type flip-flop 60 instead of the RAM clear signal CLR. Therefore, when the gaming machine is turned on, the Q output terminal of the D-type flip-flop 60 is always at the L level. Therefore, it is not necessary to operate the RAM clear switch SW one by one.

  In the power supply monitoring unit PRH, a comparator Q6 that operates with the backup power supply BK is disposed as an abnormality detection circuit. Here, the non-inverting input terminal (+) of the comparator Q6 is supplied with a detection voltage Ei obtained by dividing the backup power source BK with the voltage dividing resistors r10 and r11. On the other hand, the reference voltage Er of the Zener diode DZ is supplied to the inverting input terminal (−). Note that the Zener diode DZ is connected to the backup power source BK via the current limiting resistor r9.

  The reference voltage Er is set so that the detection voltage Ei <the reference voltage Er when the backup power supply BK is normally supplied to the main control board 21. Therefore, at the normal time, the output of the comparator Q6 is always at the L level, and the clock input terminal CLK of the D-type flip-flop 60 is also at the L level regardless of the ON / OFF state of the short-circuit transistor Q5.

  Consider a case in which the main control board 21 or its one-chip microcomputer is replaced after the AC input voltage is cut off in the gaming machine having such a circuit configuration. In such a case, the voltage value of the backup power supply BK slightly increases at the timing when the power supply from the backup power supply BK is stopped. Then, the detection voltage Ei increases by the increase in the voltage value of the backup power supply BK, and the detection voltage Ei> the reference voltage Er. As a result, since the output of the comparator Q6 changes from L level to H level, the D-type flip-flop 60 that receives this change at the clock terminal CLK has its Q output turned to H level, and this H level passes through the diode Dm. And stored in the capacitor Cm. At this timing, the NOT gate Gm does not function because it does not receive the power supply voltage.

  Thereafter, when an AC input voltage is supplied prior to the start of business, the Q output of the D-type flip-flop 60 is returned to the L level by the power reset signal SYS. However, since the diode Dm exists, the charging voltage of the capacitor Cm does not drop immediately. The H-level voltage across the capacitor Cm is supplied as an abnormal signal ERR to the main control board 21 via the NOT gate that has started the operation. Further, the light emitting diode De is abnormally lit and the alarm buzzer BZ sounds. The charging voltage of the capacitor Cm gradually decreases as the operation of the NOT gate Gm starts, but a large-capacity capacitor Cm is used for about several tens of seconds to maintain the H level, and for several tens of seconds The alarm sound continues.

  In any case, the main control board 21 that has received the L level abnormality signal ERR notifies the hall computer of the occurrence of an abnormal situation, or in addition to this, performs a notification operation such as displaying an alarm. become. According to the circuit configuration of FIG. 8, since the switching regulator SR1 is not put into the standby mode in any case, there is no possibility that power supply to the main control board 21 is stopped due to malfunction. Further, in the circuit configuration of FIG. 8, since the feedback voltage RET from the main control board 21 to the power supply board 20 is not necessary, all the circuits can be accommodated in the power supply board 20, and therefore, the countermeasures against illegal actors are possible. Measures are extremely difficult.

  By the way, the abnormality notification circuit 61 that outputs the abnormality signal ERR to another circuit board is provided, and in any case, the circuit configuration of FIG. 8 in which the switching regulator SR1 is not set to the standby mode is shown in FIGS. Of course, this circuit can also be suitably employed. In this case, it is preferable to supply the power reset signal SYS to the clear terminal CLR of the D-type flip-flop 60.

  Further, in the circuit configuration of FIG. 8, a configuration for detecting a voltage abnormality of the backup power source BK is adopted, but instead, a configuration for detecting a current change in the power source line of the backup power source BK may be employed. For example, as shown in FIG. 9, a configuration in which a detection primary coil Ls1 provided on a power supply line and a detection secondary coil Ls2 connected to a comparator are electromagnetically coupled closely is exemplified. In this circuit configuration, since the voltage drop of the backup power supply BK does not become a problem, a rechargeable battery is unnecessary and a large-capacitance capacitor C7 is sufficient.

  When the main control board is removed from the connector CN2 or the one-chip microcomputer is removed from the socket, the current of the power supply line is cut off, so that the change is detected by the detection coil and the output of the comparator Q6 rises. . Therefore, the Q output of the D-type flip-flop 60 becomes H level, and the occurrence of an abnormal situation is stored and held until the next day.

  As mentioned above, although embodiment of this invention was described concretely, the concrete description content does not limit this invention at all, and various modifications are possible.

  For example, in the power supply monitoring unit PRH shown in FIGS. 8 to 10, the Q output of the D-type flip-flop 60 may be supplied to the ON / OFF input terminal of the switching regulator SR1. However, in this case, the RAM clear signal CLR is supplied to the clear terminal CLR of the D-type flip-flop 60.

  Furthermore, it is also preferable to add an abnormality notification circuit 61 as shown in FIG. 8 in the circuit configurations of FIGS. 5 to 7 that utilize the shutdown function of the switching regulator SR1. In such a case, as shown in FIG. 10, if the RAM clear signal CLR is supplied to the clear terminal CLR of the D-type flip-flop 60, the diode Dm and the capacitor Cm are unnecessary. Note that, as indicated by a broken line, the shutdown function of the switching regulator SR1 may be utilized.

  In the above description, illegal modification of the main control board 21 has been a problem. However, if illegal modification of the payout control board 25 is concerned, the power supply board 20 and the payout control board 25 may be A circuit configuration similar to that of each circuit described above is employed.

GM gaming machine 20 power supply board BK backup DC voltage 21 main control unit CR1 abnormality detection circuit CR3 operation prohibition circuit

Claims (8)

A main control unit that executes a lottery process for determining whether or not to generate a gaming state advantageous to the player, and centrally controls the game operation based on the lottery result;
Based on a command from the main control unit, a sub-control unit that executes individual control operations;
A stationary DC voltage generated based on an AC voltage received from the outside, and a backup DC voltage that maintains a predetermined level for a predetermined period after the AC voltage is cut off, the main control unit, and / or the A power supply unit that supplies power to the sub-control unit,
The power supply unit includes a conversion circuit that converts the AC voltage into the steady DC voltage, an abnormality detection circuit that detects a voltage abnormality or current abnormality of the backup DC voltage, and an intermediate circuit that receives a detection signal of the abnormality detection circuit And provided,
The intermediate circuit includes a wherein a constant DC voltage serves as a power supply voltage, which is configured not to transmit the detection signal of the abnormality detection circuit and turned ON so long as to maintain a normal level for other circuits To play. The gaming machine according to claim 1 , wherein the intermediate circuit is provided with a storage unit that stores a detection signal received from the intermediate circuit when the steady DC voltage is cut off . The gaming machine according to claim 1 or 2 , wherein the conversion circuit is controlled to be in a non-operating state based on data stored in the storage unit. The gaming machine according to any one of claims 1 to 3, wherein an alarm operation is executed based on data stored in the storage unit. The gaming machine according to any one of claims 1 to 4, wherein the abnormality detection circuit makes an abnormality determination based on an external feedback voltage of the backup DC voltage output from the power supply unit to the outside.   The gaming machine according to claim 5, wherein the abnormality detection circuit includes a photocoupler or a switching transistor that is turned on based on a normal feedback voltage. The gaming machine according to any one of claims 1 to 4, wherein the abnormality detection circuit detects the voltage abnormality or current abnormality without receiving a detection signal from outside the power supply unit. An abnormality notification circuit having a diode that receives the output voltage of the storage unit, a capacitor that receives the output voltage of the diode, and a driver circuit that receives the output voltage of the capacitor is provided, and the driver circuit receives the steady DC voltage. The gaming machine according to claim 2, wherein the power supply voltage is used.

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