JP4980959B2 - Method for manufacturing oxide thin film transistor element - Google Patents

Description

The present invention relates to a method for manufacturing an oxide thin film transistor device using a dry etching process, and more particularly, a semiconductor thin film or aluminum oxide (Al ₂ O ₃ ) formed using zinc oxide (ZnO). The present invention relates to a method of manufacturing an oxide thin film transistor device, in which a gate insulating film formed by using a pattern is patterned through a helicon plasma process using a specific etching gas.

  Recently, the flat panel display industry is positioned as the core technology of the information industry along with the development of cutting-edge digital home appliances and high-performance personal information terminal devices. In this field, two technologies represented by LCD and PDP are currently leading the market, and organic EL has spurred commercialization and the creation of a core market with the recent dramatic technological development. Is the situation. Unlike the LCD, the organic EL does not require a backlight unit, has a high response speed and excellent image quality, and can be easily formed on a flexible substrate that can be bent. Has attracted attention as a next-generation flat panel display technology.

  On the other hand, a thin film transistor for driving an organic EL has characteristics such as long-term reliability and durability as well as basic characteristics of a driving transistor such as mobility, current driving capability, and drain current ON / OFF margin. Not only is required, but also excellent performance should be ensured through low-temperature processes. The flat-plane driving backplane thin film transistor technology that has been developed so far can be broadly divided into four types.

  1. This is a thin film transistor technology that uses polysilicon as a semiconductor layer. The characteristics of polysilicon thin film transistors reported to date are very good in terms of mobility and operational safety, and are actually used in backplane thin film transistors for LCDs. Unlike the LCD, in the case of a current-driven organic EL, the operation uniformity of each element is very important. However, polysilicon thin film transistors have many variables in terms of silicon crystallization methods and process temperatures. In particular, when low-temperature crystallized polysilicon is used, uniformity of device characteristics cannot be guaranteed.

  2. This is a thin film transistor technology using amorphous silicon as a semiconductor layer. Since amorphous silicon does not require a crystallization process, the film formation process is simple and easy for large-area processes, and has the advantage of low production costs. However, the mobility is very low compared to polysilicon thin film transistors, so the current is low. There is a disadvantage that the driving ability is greatly reduced. Furthermore, safety of operation is very important for use as a thin film transistor for an organic EL backplane, but in the case of an amorphous silicon thin film transistor, the operational safety and electrical Therefore, it cannot be used as an organic EL driving thin film transistor with the current technical level. Of course, it is possible to solve the problem by adding an additional circuit for compensating for such electrical reliability, but the circuit configuration becomes complicated and an additional problem such as a decrease in aperture ratio occurs. It becomes like this.

  3. This is a thin film transistor technology that uses an organic thin film layer as a semiconductor layer. This thin film transistor uses a typical organic semiconductor such as pentacene, but it is used as a backplane thin film transistor in terms of electrical operation reliability and uniformity of device characteristics despite recent technological advances. To achieve this, the characteristics of the device are very insufficient.

  4). This is a thin film transistor technology that uses an oxide semiconductor as a semiconductor layer. An oxide semiconductor thin film transistor not only can ensure relatively good mobility characteristics and current driving capability, but also has an advantage that a low temperature process is possible and it is advantageous for large-area manufacturing. Further, there is an advantage that transparency can be maintained by selecting an oxide semiconductor material to be used. The recently reported performance of oxide transistors is at a level that can be fully utilized as a thin film transistor for a backplane for driving an organic EL. Oxide thin-film transistors are a field in which technological progress has been made in recent years. Ensuring long-term reliability and safety of device characteristics in the future is a solution to oxide transistor technology.

  A great advantage of an oxide thin film transistor is that a transparent backplane can be formed. The ZnO-based oxide thin film transistor, which has been studied the most so far, has not only a high mobility even when a film forming process is performed at a relatively low temperature, but also has a property transparent to visible light. Therefore, it is expected that it can be used together with a display panel such as organic EL to newly create various application fields such as smart windows. In particular, when used in organic EL backplane thin film transistors, the organic EL book can be driven with a large current while ensuring the aperture ratio by maximizing the channel width by taking advantage of its transparent advantages. Natural color reproducibility can be realized.

  However, in order to manufacture an oxide thin film transistor, when an oxide semiconductor thin film layer such as ZnO is formed, the oxide thin film layer is appropriately disposed together with a transparent oxide gate insulating film and a transparent electrode thin film layer. For this purpose, a predetermined manufacturing process that is optimized must be applied.

  In particular, for manufacturing an oxide thin film transistor, it is very important to establish etching characteristics of an oxide semiconductor thin film layer, an oxide gate insulating film thin film layer, and a transparent electrode thin film layer. This is because the thin film layer of each material must be accurately patterned at a predetermined position in order to ensure good operating characteristics of the thin film transistor. To date, three types of techniques have been mainly used for the etching process of each thin film layer in the fabrication of oxide thin film transistors. The first is a technique of performing patterning by performing deposition of each thin film layer only at a predetermined position using a metal shadow mask, and the second is a general photolithography process and a lift-off process. A patterning technique in which a predetermined position where a thin film layer is present is prepared in a photoresist pattern, and then an oxide thin film layer is deposited and a portion other than the pattern is removed together with the resist. In this technique, an etching solution is prepared and each thin film layer is patterned by a wet etching process. These patterning steps have the following technical problems, although there is an advantage that each thin film layer constituting the oxide thin film transistor can be patterned by a relatively easy method.

  First, when patterning each thin film layer using a metal shadow mask, it becomes very difficult to perform layer alignment between each process using a metal mask as the device becomes finer. In general, even when applying element design rules of about several tens of micrometers, it is very difficult to perform accurate layer alignment using a metal mask. In this case, a patterning process using a metal shadow mask is not applicable.

  On the other hand, when patterning each thin film layer constituting an oxide thin film transistor in parallel with a normal photolithography process and a lift-off process, a sputtering method, an atomic layer deposition method, or a chemical vapor phase for forming the oxide thin film layer is performed. It is very difficult to accurately form an oxide thin film layer only on a base portion patterned with a photoresist by vapor deposition, and it is difficult to form an accurate pattern in a lift-off process performed after vapor deposition. In general, when a pattern of several tens of micrometers or more is formed, an oxide thin film layer can be deposited by a sputtering method and patterning of the thin film layer can be performed by a lift-off process. Due to problems such as plasma degradation, process safety cannot be ensured. Further, when an oxide thin film layer is formed by an atomic layer deposition method or a chemical vapor deposition method in which the step coverage characteristic of the deposited thin film is very good, a patterning operation by a lift-off process becomes impossible in principle.

  In addition, when performing a patterning process of each thin film layer constituting the oxide thin film transistor by using a predetermined wet etching solution, the etching rate of each oxide thin film layer and the etching selectivity between each thin film layer are adjusted to form an oxide. It is very difficult to ensure the safety of thin film transistor manufacturing processes. The reason is that the commonly used wet etching solution is composed of strong acid such as aqueous nitric acid solution, aqueous hydrochloric acid solution or aqueous hydrofluoric acid solution, and is one kind of the same oxide using such wet etching solution. This is because it is very difficult to selectively pattern the oxide semiconductor layer, the oxide gate insulating film, and the oxide transparent electrode layer. Furthermore, the rate at which each oxide thin film layer constituting the oxide thin film transistor is etched inside the wet etching solution is very high, and it is difficult to derive accurate process conditions depending on the thickness of the thin film layer. Further, since the wet etching process has its own isotropic etching characteristics, the influence of undercut due to transient etching cannot be excluded as the design rule of the element is made finer.

  As described above, it can be seen that the existing patterning process is difficult to use in a general-purpose process in various application element fields using next-generation oxide thin film transistors, and the use of the patterning process becomes more difficult as the size of the element decreases in the future. Therefore, it is more desirable to use a dry etching process with excellent controllability in order to derive stable and reproducible process conditions for an oxide thin film transistor having good characteristics.

  Further, in the manufacturing process of the oxide thin film transistor, the oxide gate insulating film or the electrode material comes to be adjacent to the upper layer or the lower layer of the oxide semiconductor. Accordingly, in order to ensure the reliability of the manufacturing process of the oxide thin film transistor element, it is necessary to ensure a high etching selectivity with the adjacent material during the etching process of the oxide semiconductor thin film layer.

  On the other hand, in the dry etching process method of ZnO which is a representative oxide semiconductor reported up to now, an etching gas atmosphere to which hydrogen is added is often used in order to ensure a high etching rate of ZnO. However, these previous research results are not dry etching processes optimized for the fabrication of oxide thin film transistors using ZnO as an oxide semiconductor. Considering the fact that the film thickness is sufficiently thin and the fact that hydrogen seriously affects the electrical characteristics of ZnO, it can be seen that the process conditions are rather impossible to use.

  Therefore, when etching an oxide semiconductor thin film layer for manufacturing an oxide thin film transistor, the soundness of the entire device structure and the good electrical characteristics of the device are most appropriately designed in consideration of the device structure of the oxide thin film transistor. This is achieved through a specific etching process.

  Accordingly, the present inventor has improved the etching selectivity when the oxide semiconductor thin film layer is etched and the helicon plasma process is applied when the oxide semiconductor thin film layer is etched. The present invention was completed by finding that a thin film transistor can be easily invented.

Korean Patent Registration No. 10-0693080 Korean Patent Registration No. 10-0484502 JP 2003-68155 A Applied Surface Science, February 28, 2006, Wantae Lim et al. , “Dry etching of bulk single-crystal ZnO in CH4 / H2-based plasma chemistry” Journal of The Electrochemical Society, February 24, 2000, Ji-Myon Lee et al. , “Dry Etching of ZnO Using an Inductively Coupled Plasma”

  The present invention has been made in view of such problems, and the object of the present invention is to optimize etching process conditions through a helicon plasma dry etching process using a specific etching gas and improve etching selectivity. An object of the present invention is to provide a method for manufacturing an oxide thin film transistor element.

  In order to solve the above problems, the present invention provides a method of manufacturing an oxide thin film transistor element including a substrate, a gate electrode, a gate insulating film, a source and drain electrode, and a semiconductor thin film, wherein the gate insulating film or the semiconductor thin film is formed of argon. A method of manufacturing an oxide thin film transistor device including a step of patterning through a helicon plasma dry process using a mixed gas containing chlorine as an etching gas is provided.

  Preferably, in the method of manufacturing an oxide thin film transistor device according to the present invention, the etching gas further contains fluorinated methane or fluorinated methane and oxygen gas in addition to argon and chlorine.

Preferably, in the etching gas, in the case of an argon / chlorine mixed gas, the chlorine gas is included in the range of 20% to 80% with respect to the total mixed gas (Ar + Cl ₂ ), and the argon / chlorine / fluorinated methane In the case of a mixed gas, the argon gas is fixed at 30% with respect to the total mixed gas (Ar + Cl ₂ + CHF ₃ ), and the chlorine gas is contained at 10% or more and less than 70% with respect to the total mixed gas. In the case of a mixed gas of methane / oxygen, argon gas is fixed at 30% with respect to the mixed gas (Ar + Cl ₂ + CHF ₃ ), chlorine gas is contained at 10% or more and less than 70% with respect to the mixed gas, oxygen gas The gas is contained in a range of 8 to 10 sccm with respect to 100 sccm of a mixed gas of argon / chlorine / fluoromethane.

  Preferably, the helicon plasma dry process has an RF power of 600 watts (W) to 1200 watts (W), an RF bias power of 400 watts (W) to 1000 watts (W), and a process pressure of 3 mTorr. Run under conditions that are ~ 5 mTorr.

Preferably, in the method of manufacturing an oxide thin film transistor according to the present invention, the gate insulating film is formed of Al ₂ O ₃ and the semiconductor thin film is formed of ZnO.

  Preferably, the oxide thin film transistor device according to the present invention includes a substrate / gate electrode / gate insulating film / source and drain electrode / semiconductor thin film structure, and a substrate / gate electrode / gate insulating film / semiconductor thin film / source and drain electrode structure. , Selected from the group consisting of substrate / source and drain electrodes / semiconductor thin film / gate insulating film / gate electrode structure.

  Accordingly, an oxide thin film transistor device having a structure of substrate / gate electrode / gate insulating film / source and drain electrode / semiconductor thin film according to an embodiment of the present invention can be manufactured through the following steps.

(1) forming and patterning a first conductive thin film layer for a gate electrode layer on the substrate;
(2) forming an oxide insulator thin film layer for a gate insulating film layer on the gate electrode layer;
(3) forming and patterning a second conductive thin film layer for source and drain electrode layers on the gate insulating film layer;
(4) A step of forming and patterning an oxide semiconductor thin film layer for a semiconductor layer on the gate insulating film layer so as to cover the patterned source and drain electrode layers.

  In the oxide thin film transistor device according to an embodiment of the present invention, preferably, the oxide semiconductor thin film layer for the semiconductor layer is formed of zinc oxide (ZnO), patterned through a helicon plasma dry etching process, and argon as an etching gas. A mixed gas of / chlorine, a mixed gas of argon / chlorine / fluorinated methane, or a mixed gas of argon / chlorine / fluorinated methane / oxygen can be used, but preferably a mixed gas of argon / chlorine is used.

  Preferably, during dry etching of the ZnO oxide semiconductor thin film layer, in the case of a mixed gas of argon and chlorine, the mixture ratio of chlorine gas to the total mixed gas is 20% to 80%, except for argon and chlorine. In the case of a mixed gas containing fluorinated methane, the mixture ratio of argon gas to the total mixed gas is fixed at 30%, and the chlorine gas mixture ratio is 10% or more and less than 70%. Is further added, oxygen gas is added within a range of 8 to 10 sccm with respect to 100 sccm of a mixed gas of argon / chlorine / fluoromethane.

  In addition, an oxide thin film transistor device having a structure of a substrate / gate electrode / gate insulating film / semiconductor thin film / source and drain electrodes according to another embodiment of the present invention can be manufactured through the following steps.

(1) forming and patterning a first conductive thin film layer for a gate electrode layer on the substrate;
(2) forming an oxide insulator thin film layer for a gate insulating film layer on the gate electrode layer;
(3) forming and patterning an oxide semiconductor thin film layer for a semiconductor layer on the gate insulating film layer;
(4) forming and patterning a second conductive thin film layer for source and drain electrodes on the semiconductor layer;

  In an oxide thin film transistor device according to another embodiment of the present invention, preferably, the oxide semiconductor thin film layer for a semiconductor layer is formed of zinc oxide (ZnO) and patterned through a helicon plasma dry etching process. A mixed gas of argon / chlorine, a mixed gas of argon / chlorine / fluorinated methane or a mixed gas of argon / chlorine / fluorinated methane / oxygen can be used, but preferably argon / chlorine / fluorinated methane / oxygen. The mixed gas of is used.

  Preferably, when dry etching the ZnO oxide semiconductor thin film layer, in the case of a mixed gas of argon and chlorine, the mixture ratio of chlorine gas to the total mixed gas is 20% to 80%, and other than argon and chlorine In the case of a mixed gas containing fluorinated methane, the mixing ratio of argon gas to the entire mixed gas is fixed at 30%, and the mixing ratio of chlorine gas is 10% or more and less than 70%, preferably 45% to When the oxygen gas is further contained within the range of 60%, the oxygen gas is added within a range of 8 to 10 sccm with respect to 100 sccm of the argon / chlorine / fluorinated methane mixed gas.

  In an oxide thin film transistor device according to another embodiment of the present invention, when fluorinated methane is added in addition to argon and chlorine gas, etching between a ZnO oxide semiconductor thin film layer and a gate insulating film layer located therebelow is performed. The selectivity can be increased, and when oxygen is further added, the etching selectivity can be further increased.

  In addition, an oxide thin film transistor having a substrate / source and drain electrode / semiconductor thin film / gate insulating film / gate electrode structure according to another embodiment of the present invention may be manufactured through the following steps.

(1) forming and patterning a second conductive thin film layer for source and drain electrode layers on an upper portion of a substrate;
(2) forming an oxide semiconductor thin film layer used as a semiconductor layer on the source and drain electrode layers;
(3) forming an oxide insulator thin film layer for a gate insulating film on the semiconductor layer;
(4) patterning the oxide semiconductor thin film layer and the oxide insulator thin film layer collectively,
(5) A step of forming a first conductive thin film layer for the gate electrode layer on the gate insulating film layer.

In the oxide thin film transistor device according to another embodiment of the present invention, the oxide semiconductor thin film layer and the oxide insulator thin film layer can be patterned by batch etching. Preferably, the oxide semiconductor thin film layer for a semiconductor layer to be patterned is formed of zinc oxide (ZnO), and the oxide insulator thin film layer for a gate insulating film is formed of aluminum oxide (Al ₂ O ₃ ). . Therefore, a pattern of a stack structure of a gate insulating film thin film layer and an oxide semiconductor thin film layer having an Al ₂ O ₃ / ZnO structure is formed.

  In addition, when the oxide semiconductor thin film layer and the oxide insulator thin film layer are etched together, the etching gas is a mixed gas of argon / chlorine, a mixed gas of argon / chlorine / fluorinated methane, or argon / chlorine / fluorinated. A pattern is formed through a helicon plasma dry etching process using a mixed gas of methane / oxygen.

When dry etching the ZnO oxide semiconductor thin film layer / Al ₂ O ₃ oxide insulator thin film layer, preferably, in the case of a mixed gas of argon and chlorine, the mixing ratio of chlorine gas to the total mixed gas is 20% to 80%. In the case of a mixed gas containing fluorinated methane in addition to argon and chlorine, the mixing ratio of argon gas to the total mixed gas is fixed at 30%, and the mixing ratio of chlorine gas is 10% or more and 70% Under the condition of less than 10% to 60%, preferably 8% to 100 sccm of argon / chlorine / fluorinated methane mixed gas when oxygen gas is further included. Add within the range of -10 sccm.

On the other hand, it is desirable to appropriately select the type and mixing ratio of the etching gas in consideration of the thicknesses of the Al ₂ O ₃ gate insulating film thin film layer and the ZnO oxide semiconductor thin film layer.

According to the present invention, through an helicon plasma dry etching process using a mixed gas of argon and chlorine or a mixed gas of argon, chlorine and fluorinated methane or a mixed gas of argon, chlorine, fluorinated methane and oxygen as an etching gas. The oxide semiconductor thin film layer and the Al ₂ O ₃ oxide insulator thin film layer can be easily dry-etched.

Further, the present invention provides a condition for easily dry etching the ZnO oxide semiconductor thin film layer and the Al ₂ O ₃ oxide insulator thin film layer using a dry etching process that is not an existing wet etching process, In manufacturing oxide thin film transistors having various structures, it is possible to provide process conditions with process convenience and reproducibility.

In addition, the present invention provides a ZnO oxide semiconductor thin film layer serving as a semiconductor and an Al ₂ O ₃ oxide insulator thin film layer serving as a gate insulating film in the manufacture of an oxide thin film transistor including all oxides. The etching selectivity can be improved to increase the reliability for manufacturing the oxide thin film transistor.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the size or thickness of films or regions are exaggerated for clarity in the specification. On the other hand, “%” generally used in the present specification is a percentage based on volume as long as it is not displayed differently.

  FIG. 1 is a cross-sectional view of an oxide thin film transistor device manufactured according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of an oxide thin film transistor device manufactured according to another embodiment of the present invention. FIG. 5 is a cross-sectional view of an oxide thin film transistor device manufactured according to still another embodiment of the present invention.

  1 to 3, an oxide thin film transistor device according to the present invention includes a substrate 200 / a gate electrode 202 / a gate insulating film 204 / a source and drain electrode 206 / a semiconductor thin film 208, a substrate 200 / a gate electrode. 202 / gate insulating film 204 / semiconductor thin film 208 / source and drain electrode 206 or substrate 200 / source and drain electrode 206 / semiconductor thin film 208 / gate insulating film 204 / gate electrode 202.

  Meanwhile, the device structure of the oxide thin film transistor according to FIGS. 1 to 3 can be changed in order to improve the characteristics of the transistor, and an oxide thin film transistor that can be manufactured using the etching process according to the present invention is presented. It is not limited to the three types of element structures. The structure of the oxide thin film transistor referred to in FIGS. 1 to 3 should be understood as a representative drawing of the device structure presented to effectively explain the detailed contents of the etching process according to the present invention.

  In the following, the structure of the oxide thin film transistor according to FIG. The description added to each layer also applies to the oxide thin film transistor according to FIGS.

  In the oxide thin film transistor according to the present invention, the substrate 200 may be a substrate generally used in this field, and is preferably a silicon wafer, a glass substrate, or a plastic substrate.

  The first conductive thin film layer 202 serving as a gate electrode on the substrate 200 is formed with a thickness of 500 to 1500 mm using a metal thin film layer or an oxide conductive thin film layer having high conductivity. . In particular, it is desirable to use a transparent oxide conductive thin film layer such as indium tin oxide (ITO) to manufacture an oxide thin film transistor manufactured on a glass substrate and having a transparent property.

  The formed first conductive thin film layer 202 is applied to a gate electrode of the oxide thin film transistor according to the present invention by applying a suitable patterning method generally used in this field, for example, a method such as an etching process. Patterning is performed at a predetermined position corresponding to the position.

An oxide insulator thin film layer 204 serving as a gate insulating film is formed on the first conductive thin film layer 202 to a thickness of 1000 to 2000 mm. The oxide insulator thin film layer 204 is located between the conductive thin film layer pattern 202 serving as a gate electrode as an electrical insulating film and the oxide semiconductor thin film layer pattern 208 formed in a subsequent process. Acts as a gate insulating film. Typical materials constituting the oxide insulator thin film layer 204 include a silicon series insulating film such as a silicon oxide film (SiO ₂ ), a silicon nitride film (SiN), a silicon oxynitride film (SiON), and an aluminum oxide film. There are metal oxide insulating films such as (Al ₂ O ₃ ), hafnium oxide film (HfO ₂ ), zirconium oxide film (ZrO ₂ ), and various organic insulating film materials having good insulating film characteristics. Preferably, an aluminum oxide film (Al ₂ O ₃ ) is used.

  On the other hand, as a method for forming the oxide insulator thin film layer 204, various thin film forming process methods used in a normal semiconductor element manufacturing process can be used. Typical examples thereof include atomic layer deposition (ALD), chemical vapor deposition (CVD), and reactive sputtering (reactive sputtering), and various methods using or combining these methods. Can be used.

  A second conductive thin film layer 206 serving as source and drain electrodes is formed on the oxide insulator thin film layer 204 to a thickness of 1500 to 2500 mm. As the second conductive thin film layer 206, a metal thin film layer or an oxide conductive thin film layer having high conductivity can be used in the same manner as the first conductive thin film layer 202. In particular, in order to fabricate an oxide thin film transistor fabricated on a glass substrate and having a transparent property, the second conductive thin film layer 206 preferably also uses a transparent oxide conductive thin film layer.

  Further, unlike the first conductive thin film layer 202, the second conductive thin film layer 206 is in direct electrical contact with the semiconductor portion, so that an ohmic contact is formed at the contact portion with the semiconductor layer. It is desirable to select a material that facilitates minimizing contact resistance. For example, aluminum zinc oxide (ZnO: Al) in which Al is doped at an appropriate concentration in ZnO can be used. The formed second conductive thin film layer 206 is patterned at a predetermined position corresponding to the position of the source and drain of the oxide thin film transistor according to the present invention by applying an appropriate patterning method, for example, a method such as an etching process. Is done.

  An oxide semiconductor thin film layer 208 serving as a semiconductor is formed on the second conductive thin film layer pattern 206 to a thickness of 100 to 300 mm. The oxide semiconductor thin film layer 208 is formed between the second conductive thin film layer pattern 206 patterned in the previous step and on the oxide insulator thin film layer 202. The oxide semiconductor thin film layer 208 can be formed using various oxide materials that are oxides and electrically have semiconductor properties. In particular, in order to manufacture an oxide thin film transistor manufactured on a glass substrate and having a transparent property, it is preferable to use a transparent oxide semiconductor layer, for example, ZnO.

  In the method for forming the oxide semiconductor thin film layer 208, various thin film forming process methods used in a normal semiconductor element manufacturing process can be applied. Typical examples include atomic layer deposition (ALD), chemical vapor deposition (CVD), and reactive sputtering (Reactive Sputtering).

  After the oxide semiconductor thin film layer 208 is formed, the patterning of the oxide semiconductor thin film layer 208 is performed through a dry etching process, particularly, a helicon plasma dry etching process.

  In the manufacture of the oxide thin film transistor according to the present invention, the dry etching of the ZnO oxide semiconductor thin film layer 208 uses a helicon plasma dry etching apparatus. In particular, without using an RIE (Reactive-Ion Etching) or ICP (Inductively Coupled Plasma) etching apparatus, etching is performed using a special helicon plasma dry etching apparatus and an appropriate mixed gas.

  FIG. 4 is a conceptual diagram of a helicon plasma dry etching apparatus used when manufacturing the phase change memory device of the present invention. FIG. 5 is a schematic diagram of helicon plasma using the antenna of the helicon plasma dry etching apparatus shown in FIG. It is the figure which showed typically the structure for making it generate | occur | produce.

  4 and 5, the helicon plasma dry etching apparatus used in the present invention includes a chamber 104 including a bipolar chuck 102 on which a semiconductor substrate 100 is placed on a substrate 90. Since the chamber 104 uses a highly corrosive etching gas, aluminum (Al) is oxidized (anodized) to prevent corrosion inside the chamber. A heater 106 that can heat the chamber 104 is installed in the wall of the chamber 104. A bias power source 108 capable of applying 0 to 1.0 kW power having a frequency of 13.56 MHz is connected to the bipolar chuck 102. The chamber wall performs the role of a cathode. In FIG. 4, vacuum means (not shown) for reducing the pressure in the chamber 104, such as a vacuum pump and a valve, are omitted for convenience.

  A helicon plasma source unit 112 is installed in the upper part of the chamber 100. The helicon plasma source unit 112 raises the helicon wave 122 by using the source power source 116, the magnet (permanent magnet or electromagnet) 118 and the antenna 120 by using the etching gas injected into the discharge tube 113 through the etching gas inlet 114. A high density plasma is generated.

  In particular, in the plasma source unit 112, the energy of the wave increases the energy of specific electrons by adding a recon wave 122 that matches the velocity of electrons by the antenna 120, thereby increasing the energy of the whole electrons and increasing the number of collisions. A high density plasma is generated. As shown in FIG. 5, the source power source 116 is connected to the antenna 120 through the matching network 117, and the source power source 116 can apply 0 to 2.0 kW of power at a frequency of 60 MHz.

  Hereinafter, the present invention will be described in more detail through examples.

[Example 1]
This example was carried out in order to investigate the etching rate depending on the type of etching gas on the ZnO thin film layer that is a semiconductor material of an oxide thin film transistor and the Al ₂ O ₃ thin film layer that is a gate insulating film material.

After preparing the two glass substrates, using the ZnO and _Al 2 _{O 3} in each of the glass substrate atomic layer deposition ZnO thin layer to a thickness of each 3000Å through (Atomic Layer Deposition) and _Al 2 _{O 3} A thin film layer was formed. In this example, in order to investigate the etching rate of the ZnO and Al ₂ O ₃ thin film layers, a thin film having a thickness thicker than each thin film layer actually used in the oxide thin film transistor was deposited and used.

Next, using the helicon plasma dry etching apparatus shown in FIG. 4 and FIG. 5, using a mixed gas of argon and chlorine as an etching gas, a ZnO thin film layer and a gate insulating film which are semiconductor materials of an oxide thin film transistor The etching rate was investigated by etching the material Al ₂ O ₃ thin film layer, and the result is shown in FIG.

  On the other hand, the operating frequencies of the source power supply and the bias power supply during the etching process were 60 MHz and 13.56 MHz, respectively. Then, 800 W was applied as the power source power and 600 W was applied as the bias power source. The process chamber pressure was 5 mTorr.

6 shows the mixing ratio of the chlorine gas with respect to the X-axis and Y-axis are each mixed gas of argon and chlorine (Ar + Cl ₂₎ and _{(Cl 2 / Ar + Cl 2} ) the etch rate. According to FIG. 6, the ZnO thin film layer shows a tendency for the etching rate to increase with an increase in the chlorine gas mixture ratio (Cl ₂ / (Ar + Cl ₂ )), and then the gas mixture ratio (Cl ₂ / (Ar + Cl ₂ )). It can be seen that when the ratio is 60% or more, the etching rate does not increase and the tendency to saturate is increased. When the gas mixing ratio (Cl ₂ / (Ar + Cl ₂ )) is 20%, the etching rate of the ZnO thin film layer is about 82 nm / min, and the gas mixing ratio (Cl ₂ / (Ar + Cl ₂ )) is 60%. In this case, the etching rate of the ZnO thin film layer is about 113 nm / min. Moreover, the tendency for the etching rate of the Al ₂ O ₃ thin film layer to increase greatly with an increase in the gas mixture ratio (Cl ₂ / (Ar + Cl ₂ )) could not be confirmed. In particular, when the gas mixture ratio (Cl ₂ / (Ar + Cl ₂ )) was 40% or more, there was almost no increase in the etching rate. When the gas mixing ratio (Cl ₂ / (Ar + Cl ₂ )) is 20%, the etching rate of the Al ₂ O ₃ thin film layer is about 69 nm / min, and the gas mixing ratio (Cl ₂ / (Ar + Cl ₂ )) is 60. %, The etching rate of the ZnO thin film layer is about 79 nm / min.

Therefore, it can be seen that when a mixed gas of argon and chlorine is used as the etching gas, the ZnO thin film layer exhibits a slightly higher etching rate than the Al ₂ O ₃ thin film layer. However, even when the gas mixture ratio (Cl ₂ / (Ar + Cl ₂ )), which is the maximum condition of the etching rate difference between the two thin film layers, is 60%, the etching selection of the ZnO thin film layer with respect to the Al ₂ O ₃ thin film layer Therefore, it is difficult to stably use the etching conditions in the manufacturing process of a transistor device having a structure requiring high etching selectivity between two thin film layers in manufacturing an oxide thin film transistor according to the present invention. However, it is a condition that the ZnO thin film layer serving as a semiconductor layer and the Al ₂ O ₃ thin film layer serving as a gate insulating film can be easily etched under dry etching process conditions that do not use hydrogen gas. As a result, when the ZnO thin film layer or the Al ₂ O ₃ thin film layer is etched with a mixed gas of argon and chlorine used as an etching gas, the chlorine gas mixing ratio can be 20% to 80%.

[Example 2]
In this embodiment, the etching rate of each thin film layer and the etching selectivity between the two thin film layers with respect to the ZnO thin film layer, which is a semiconductor material of an oxide thin film transistor, and the Al ₂ O ₃ thin film layer, which is a gate insulating film material, are used as an etching gas. It was conducted to investigate the case of using / chlorine / fluoromethane.

After preparing the two glass substrates, using the ZnO and _Al 2 _{O 3} in each of the glass substrate atomic layer deposition ZnO thin layer to a thickness of each 3000Å through (Atomic Layer Deposition) and _Al 2 _{O 3} A thin film layer was formed.

Next, using the helicon plasma dry etching apparatus shown in FIG. 4 and FIG. 5, using a mixed gas of argon / chlorine / fluorinated methane as an etching gas, a ZnO thin film layer which is a semiconductor material of an oxide thin film transistor The Al ₂ O ₃ thin film layer, which is the gate insulating film material, was etched to investigate the etching rate and the etching selectivity, and the results are shown in FIG.

  On the other hand, the operating frequencies of the source power supply and the bias power supply during the etching process were 60 MHz and 13.56 MHz, respectively. Then, 800 W was applied as the power source power and 600 W was applied as the bias power source. The process chamber pressure was 5 mTorr.

In FIG. 7, the X-axis and the Y-axis represent the chlorine gas mixture ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) to the argon / chlorine / fluorinated methane mixed gas (Ar + Cl ₂ + CHF ₃ ) used as the etching gas, respectively. The etching rate and etching selectivity are shown. That is, in FIG. 7, the argon gas mixing ratio (Ar / (Ar + Cl ₂ + CHF ₃ )) is fixed at 30%, and the chlorine gas mixing ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 10% to 70%. Under certain conditions, the etching rate of the ZnO thin film layer and the Al ₂ O ₃ thin film layer and the etching selectivity of the ZnO thin film layer with respect to the Al ₂ O ₃ thin film layer were shown.

As shown in FIG. 7, the ZnO thin film layer has a tendency to increase the etching rate due to an increase in the chlorine gas mixture ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) with respect to the entire etching gas, and then the chlorine gas mixture ratio is increased. It can be seen that when (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 45% or more, the etching rate does not increase and the tendency tends to decrease on the contrary. When the chlorine gas mixture ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 10%, the etching rate of the ZnO thin film layer is about 52 nm / min, and the gas mixture ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) When the ratio is 45%, the etching rate of the ZnO thin film layer is about 144 nm / min.

On the other hand, the Al ₂ O ₃ thin film layer shows the highest etching rate when the chlorine gas mixing ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 45%, but the etching rate is changed by changing the chlorine gas mixing ratio. Is not a significant change. When the chlorine gas mixing ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 45%, the etching rate of the Al ₂ O ₃ thin film layer is about 101 nm / min. That is, the ZnO thin film layer shows a slightly lower etching rate than the Al ₂ O ₃ thin film layer when the chlorine gas mixing ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 25% or less, and then the chlorine gas mixing ratio (Cl ₂ / When (Ar + Cl ₂ + CHF ₃ )) is 25% or more, it can be seen that the etching rate is higher than that of the Al ₂ O ₃ thin film layer.

Under the etching conditions shown in FIG. 7, the etching selectivity of the two thin film layers is shown on the right Y-axis. By changing the mixing ratio of chlorine gas (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) from 10% to 70%, the etching selectivity of the two thin film layers is relatively wide from 0.67 to 1.43. You can adjust it. Although the etching selectivity between the two thin film layers achieved under the etching conditions is not sufficiently good in the manufacture of the oxide thin film transistor according to the present invention, the mixture ratio of chlorine gas to the total gas (Cl ₂ / (Ar + Cl ₂₎ Since the etching selectivity of the two thin film layers can be selected within a meaningful range through the method of adjusting + CHF ₃ )), it is possible to improve the ease of the manufacturing process in manufacturing the oxide thin film transistor according to the present invention.

As a result, when etching a ZnO thin film layer and an Al ₂ O ₃ thin film layer with a mixed gas of argon, chlorine and fluorinated methane used as an etching gas, the argon gas mixture ratio is fixed at 30%, and the total gas It is desirable to set the mixing ratio of chlorine gas to 10% or more and less than 70%.

[Example 3]
In this embodiment, the etching rate of each thin film layer and the etching selectivity between the two thin film layers with respect to the ZnO thin film layer, which is a semiconductor material of an oxide thin film transistor, and the Al ₂ O ₃ thin film layer, which is a gate insulating film material, are used as an etching gas. This was carried out to investigate the case where a mixed gas of / chlorine / chloromethane / oxygen was used.

After preparing the two glass substrates, using the ZnO and _Al 2 _{O 3} in each of the glass substrate atomic layer deposition ZnO thin layer to a thickness of each 3000Å through (Atomic Layer Deposition) and _Al 2 _{O 3} A thin film layer was formed.

Next, using the helicon plasma dry etching apparatus shown in FIGS. 4 and 5, using a mixed gas of argon / chlorine / fluorinated methane / oxygen as an etching gas, ZnO which is a semiconductor material of an oxide thin film transistor The thin film layer and the Al ₂ O ₃ thin film layer as the gate insulating film material were etched to investigate the etching rate and the etching selectivity, and the results are shown in FIG.

  On the other hand, the operating frequencies of the source power supply and the bias power supply during the etching process were 60 MHz and 13.56 MHz, respectively. Then, 800 W was applied as the power source power and 600 W was applied as the bias power source. The process chamber pressure was 5 mTorr.

In FIG. 8, the X-axis and Y-axis represent argon, chlorine, and fluorinated methane that are used as etching gases when the ZnO thin film layer and the Al ₂ O ₃ thin film layer are dry-etched using a helicon plasma dry etching apparatus. The mixing ratio (Cl ₂ / Ar + Cl ₂ + CHF ₃ ) of chlorine gas to the mixed gas (Ar + Cl ₂ + CHF ₃ ), the etching rate and the etching selectivity are shown. At this time, since a very small amount of oxygen was added, the amount of oxygen added was not calculated within the range of the total etching gas for calculating the mixing ratio of each gas in order to simplify the etching conditions.

8 is different from the etching condition shown in FIG. 7 in that a small amount of oxygen gas is added to a mixed gas (Ar + Cl ₂ + CHF ₃ ) of argon, chlorine and fluorinated methane used as an etching gas. It is. At this time, the amount of oxygen gas to be added is about 8 sccm to 10 sccm when the amount of mixed gas of argon / chlorine / fluorinated methane is 100 sccm. That is, FIG. 8 shows that the argon gas mixing ratio (Ar / Ar + Cl ₂ + CHF ₃ ) is fixed at 30%, the oxygen gas addition amount is fixed at 8 sccm, and the chlorine gas relative to the mixed gas (Ar + Cl ₂ + CHF ₃ ). mixing ratio condition is _{(Cl 2 / Ar + Cl 2} + CHF 3) 10% to 60%, the etching selectivity of the ZnO thin film layer to the etching rate and _Al 2 _{O 3} thin film layer of ZnO thin film layer and _Al 2 _{O 3} thin film layer showed that.

As shown in FIG. 8, the ZnO thin film layer has a tendency to increase the etching rate due to an increase in the chlorine gas mixture ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) with respect to the entire etching gas, and then the chlorine gas mixture ratio is increased. It can be seen that when (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 45% or more, the etching rate does not increase and the tendency tends to decrease on the contrary. When the chlorine gas mixture ratio (Cl ₂ / Ar + Cl ₂ + CHF ₃ )) is 10%, the etching rate of the ZnO thin film layer is about 69 nm / min, and the chlorine gas mixture ratio (Cl ₂ / Ar + Cl ₂ + CHF ₃ )) is In the case of 45%, the etching rate of the ZnO thin film layer is about 123 nm / min.

On the other hand, in the Al ₂ O ₃ thin film layer, when the chlorine gas mixture ratio (Cl ₂ / (Ar + Cl ₂ + CHF ₃ )) is 25% or less, the etching rate does not change and the chlorine gas mixture ratio (Cl ₂ / Cl It can be seen that when (Ar + Cl ₂ + CHF ₃ )) is 25% or more, the etching rate tends to be greatly reduced. When the chlorine gas mixing ratio (Cl ₂ / Ar + Cl ₂ + CHF ₃ ) is 60%, the etching rate of the Al ₂ O ₃ thin film layer is about 56 nm / min.

As shown in FIG. 8, oxygen is added to the mixed gas of argon, chlorine and fluorinated methane as compared with the case where the mixed gas of argon, chlorine and fluorinated methane is used as the etching gas shown in FIG. This shows that the etching rate of the ZnO thin film layer and the Al ₂ O ₃ thin film layer decreases. On the other hand, the etching rate of the ZnO thin film layer is significantly decreased when the chlorine gas mixture ratio (Cl ₂ / Ar + Cl ₂ + CHF ₃ ) is greatly increased by 25% or more, whereas the etching rate of the Al ₂ O ₃ thin film layer is decreased. Therefore, it can be seen that the etching selectivity between the two thin film layers is improved when the chlorine gas mixing ratio (Cl ₂ / Ar + Cl ₂ + CHF ₃ ) is 25% or more.

Under the etching conditions of FIG. 8, the etching selectivity of the two thin film layers is shown on the right Y-axis. It can be seen that the etching selectivity of the two thin film layers can be adjusted from 0.85 to 1.94 by changing the mixing ratio of chlorine gas (Cl ₂ / Ar + Cl ₂ + CHF ₃ ) from 10% to 60%. In particular, the etching selectivity of the ZnO thin film layer with respect to the Al ₂ O ₃ thin film layer can be greatly improved as compared with the etching conditions applied in FIGS. Such a current state is considered to be because a small amount of oxygen added while applying the mixed gas has a different influence on the etching process of the two thin film layers under a specific gas mixing ratio condition. Although the etching selectivity between the two thin film layers achieved under the etching conditions is not sufficiently good in the manufacture of the oxide thin film transistor according to the present invention, the process margin is increased by adding a small amount of oxygen to the etching gas mixture. It was confirmed that it can be greatly improved.

As a result, when etching a ZnO thin film layer and an Al ₂ O ₃ thin film layer with a mixed gas of argon / chlorine / fluorinated methane / oxygen used as an etching gas, the mixing ratio of argon gas is fixed at 30%, and the amount of oxygen gas was fixed at 8 sccm, under the condition chlorine gas mixing ratio mixed gas _{(Ar + Cl 2 + CHF 3} ) (Cl 2 / Ar + Cl 2 + CHF 3) is 10% to 60%, preferably be etched it can.

  FIG. 9 is a graph showing a comparison of the etching selectivity between the two thin film layers shown in FIGS.

Referring to FIG. 9, when a mixed gas of argon / chlorine / fluorinated methane is used as an etching gas, the etching selectivity of the ZnO thin film layer with respect to the Al ₂ O ₃ thin film layer is the same by adding a small amount of oxygen. It can be seen that it can be improved up to 1.4 times under the conditions.

Therefore, in the manufacture of an oxide thin film transistor according to the present invention, when a ZnO thin film layer serving as a semiconductor layer is etched, a predetermined element structure in which an Al ₂ O ₃ thin film layer serving as a gate insulating film is present in the lower layer is formed. It can be seen that the etching conditions of the ZnO thin film layer can be derived with a wider process margin as long as the Al ₂ O ₃ thin film layer is not damaged excessively in the case of manufacturing.

[Example 4]
In this example, the oxide thin film transistor device according to the present invention shown in FIG. 1 was manufactured.

A first conductive thin film layer 202 serving as a gate electrode using indium tin oxide (ITO) is formed on the glass substrate 200 to a thickness of 1000 mm by sputtering deposition, and then patterned. Next, an oxide insulator thin film layer 204 serving as a gate insulating film is formed using Al ₂ O ₃ on the first conductive thin film layer pattern 202 using an atomic layer deposition method to a thickness of 1700 mm. Formed with.

  A second conductive thin film layer 206 serving as a source and a drain is formed on the top of the oxide insulating thin film layer 204 by using aluminum zinc oxide doped with 2% by weight of Al in ZnO. The film was formed through an atomic layer deposition method at a thickness of 5 mm and then patterned.

  Over the second conductive thin film layer pattern 206, an oxide semiconductor thin film layer 208 serving as a semiconductor was formed to a thickness of 180 mm by atomic layer deposition using ZnO. The oxide semiconductor thin film layer 208 is formed between the second conductive thin film layer pattern 206 patterned in the preceding process and on the oxide insulator thin film layer 204.

  After the oxide semiconductor thin film layer 208 was formed, a process of patterning the oxide semiconductor thin film layer 208 was performed using the helicon plasma dry etching apparatus shown in FIGS. The operating frequencies of the source power supply and the bias power supply during the etching process were 60 MHz and 13.56 MHz, respectively. The source power source applied 800 W, and the bias power source applied 600 W. The process chamber pressure was 5 mTorr. At this time, the etching was performed using a mixed gas of argon and chlorine as an etching gas.

Was also performed under the condition the mixing ratio of chlorine gas to a mixed gas of argon and chlorine _{(Ar + Cl 2) (Cl} 2 / Ar + Cl 2) is 20%. The reason why the conditions are selected in this embodiment is that the thickness of the ZnO oxide semiconductor layer 208 constituting the oxide thin film transistor according to the present invention is as thin as about 180 mm. Using a process that exhibits a very fast etching rate, the process is not terminated, and the second conductive thin film layer 206 serving as a source and a drain located under the ZnO oxide semiconductor layer 208 is seriously processed. This is to prevent deterioration.

  On the other hand, the channel width and length of the oxide thin film transistor manufactured in this example are 40 μm and 10 μm, respectively.

  The drain voltage-drain current characteristic and the gate voltage-drain current characteristic of the oxide thin film transistor manufactured in Example 4 were investigated, and the results are shown in FIGS.

  Referring to FIGS. 10 and 11, the drain voltage-drain current characteristic and the gate voltage-drain current characteristic of the oxide thin film transistor according to the present invention are measured, and as a result, it is confirmed that the transistor has good output and transfer characteristics. it can. This can be said to be a result that the dry etching process conditions of the ZnO oxide semiconductor thin film layer according to the present invention are well reflected for the fabrication of the oxide thin film transistor and the securing of good characteristics.

  The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to such examples. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Understood.

1 is a cross-sectional view of an oxide thin film transistor device according to an embodiment of the present invention. 4 is a cross-sectional view of an oxide thin film transistor device according to another embodiment of the present invention. FIG. 4 is a cross-sectional view of an oxide thin film transistor device according to another embodiment of the present invention. FIG. It is a conceptual diagram of the helicon plasma dry etching apparatus utilized at the time of manufacture of the oxide thin-film transistor element of this invention. FIG. 5 is a diagram schematically illustrating a structure for generating helicon plasma using an antenna of the helicon plasma dry etching apparatus of FIG. 4. Through a helicon plasma dry etching process employed in the present invention, using a mixed gas of argon and chlorine, a zinc oxide thin film layer (ZnO) as a semiconductor material of an oxide thin film transistor and an aluminum oxide as a gate insulating film material It illustrates in a graph the etching rate of each thin film layer during the etching of the thin film layer (Al 2 _{O 3).} Through a helicon plasma dry etching process employed in the present invention, a mixed gas of argon / chlorine / fluorinated methane is used to form a zinc oxide thin film layer (ZnO) and a gate insulating film material which are semiconductor materials of an oxide thin film transistor etching of certain aluminum oxide thin film layer (Al 2 _{O 3),} a diagram showing the etching selectivity in the graph between the etching rate and two thin film layers of the thin film layers. Through a helicon plasma dry etching process employed in the present invention, a mixed gas of argon / chlorine / fluoromethane / oxygen is used to form a zinc oxide thin film layer (ZnO) and a gate insulating film, which are semiconductor materials of an oxide thin film transistor etching of the material aluminum oxide thin layer is (Al 2 _{O 3),} a diagram showing the etching selectivity in the graph between the etching rate and two thin film layers of the thin film layers. When a mixed gas of argon / chlorine / fluorinated methane and a mixed gas of argon / chlorine / fluorinated methane / oxygen are used through the helicon plasma dry etching process employed in the present invention, the semiconductor of the oxide thin film transistor When etching the zinc oxide thin film layer (ZnO) as the material and the aluminum oxide thin film layer (Al ₂ O ₃ ) as the gate insulating film material, the etching selectivity between the two thin film layers is compared and shown in the graph. It is a figure. FIG. 5 is a graph showing drain voltage-drain current characteristics of an oxide thin film transistor device fabricated according to the present invention. FIG. 4 is a graph showing gate voltage-drain current characteristics of an oxide thin film transistor device fabricated according to the present invention.

Explanation of symbols

200 substrate 202 first conductive thin film layer 204 for gate electrode oxide insulator thin film layer 206 for gate insulating film second conductive thin film layer 208 for source and drain electrodes oxide semiconductor thin film layer for semiconductor layer

Claims (2)

A method of manufacturing an oxide thin film transistor including a substrate, a gate electrode, a gate insulating film, a source and drain electrode, and a semiconductor thin film,
The gate insulating film or the semiconductor thin film may be further mixed depending on the order in which the mixed gas containing argon and chlorine , the substrate, the gate electrode, the gate insulating film, the source and drain electrodes, and the semiconductor thin film are formed. the reduction of methane and oxygen, viewed including the steps to be patterned through helicon plasma dry process used in etching gas,
The gate insulating film is formed of Al ₂ O ₃ , the semiconductor thin film is formed of ZnO,
The oxide thin film transistor includes a substrate / gate electrode / gate insulating film / source and drain electrode / semiconductor thin film structure,
Substrate / gate electrode / gate insulating film / semiconductor thin film / source and drain electrode structure;
A structure selected from the group consisting of substrate / source and drain electrodes / semiconductor thin film / gate insulating film / gate electrode structure;
Have
When the oxide thin film transistor has a structure of substrate / gate electrode / gate insulating film / source and drain electrode / semiconductor thin film,
When etching the semiconductor thin film, an argon / chlorine mixed gas selected within a range of 20% to 80% is used as a mixing ratio of chlorine gas to the entire mixed gas as an etching gas,
When the oxide thin film transistor has a structure of substrate / gate electrode / gate insulating film / semiconductor thin film / source and drain electrode,
In order to increase the etching selectivity between the semiconductor thin film and the gate insulating film located under the semiconductor thin film, a mixed gas of argon / chlorine / fluoromethane / oxygen is used as an etching gas when etching the semiconductor thin film. The mixing ratio of argon gas to chlorine / fluorinated methane gas mixture is fixed at 30%, the mixing ratio of chlorine to the mixed gas is selected in the range of 45% -60%, and the oxygen gas is argon / chlorine / Selected within the range of 8-10 sccm with respect to 100 sccm of the mixed gas of fluorinated methane,
When the oxide thin film transistor has a structure of substrate / source and drain electrode / semiconductor thin film / gate insulating film / gate electrode,
The method of manufacturing an oxide thin film transistor element, wherein the semiconductor thin film and the gate insulating film are collectively etched to form a stack structure of the semiconductor thin film and the gate insulating film .   The helicon plasma dry process has an RF power of 600 watts (W) to 1200 watts (W), an RF bias power of 400 watts (W) to 1000 watts (W), and a process pressure of 3 mTorr to 5 mTorr. The method according to claim 1, wherein the method is performed under conditions.

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