JP2013004849A - Thin film transistor manufacturing method and roll thin film transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film transistor which can be manufactured in a low temperature and a low cost manufacturing process and which is excellent in transistor characteristics, and provide a manufacturing method of the thin film transistor.SOLUTION: A manufacturing method of a thin film transistor having a substrate, a gate electrode, a gate insulation layer, an oxide semiconductor layer, a source electrode, and a drain electrode, comprises: an oxide semiconductor layer formation process of forming the oxide semiconductor layer in an atmosphere containing an oxidized gas; and a carrier concentration control process of applying, after the oxide semiconductor layer formation process, oxygen deficiency to at least a channel region of the oxide semiconductor layer to control a carrier concentration in the channel region.

Description

  The present invention relates to a thin film transistor using an oxide semiconductor layer and a manufacturing method thereof.

  Generally, as a thin film transistor, an amorphous silicon or polysilicon thin film is formed on a glass substrate and used as a semiconductor layer.

  In recent years, there has been a demand for improvements in flexibility, thinning, weight reduction, breakage resistance, etc. of flat panel displays, and attempts have been made to use light and flexible resin substrates instead of glass substrates. . However, when forming a thin film of amorphous silicon or polysilicon, film formation at a high temperature of 300 ° C. or higher is required, so it is difficult to use a resin substrate having lower heat resistance than a glass substrate.

Recently, development of a thin film transistor using an oxide semiconductor that can be formed at room temperature such as a sputtering method has been actively performed. On the other hand, although an oxide semiconductor can be formed at a low temperature, there are points to be improved in transistor characteristics, such as a small on / off ratio and a tendency of threshold voltage to change. Thus, it has been proposed to improve transistor characteristics by performing heat treatment after the oxide semiconductor film is formed.
However, when heat treatment is performed in order to improve transistor characteristics, the heat resistance of the resin substrate is approximately 200 ° C. at the highest, and thus heat treatment needs to be performed at 200 ° C. or less. On the other hand, when the heat treatment temperature is lowered, there is a problem in that the amount of change in threshold voltage during driving of the thin film transistor increases and reliability decreases.

  In order to solve such problems, various methods for manufacturing a thin film transistor using an oxide semiconductor at a relatively low temperature of 200 ° C. or lower have been proposed (see, for example, Patent Documents 1 to 3).

  On the other hand, the resin substrate also has a problem that a large dimensional change occurs due to heat. Therefore, there is a problem in terms of dimensional change even at 200 ° C. or lower, and further reduction in the temperature of the thin film transistor manufacturing process is desired.

Next, a thin film transistor using an oxide semiconductor has a problem that transistor characteristics become unstable due to a change in threshold voltage, and a method for obtaining stable transistor characteristics by controlling a threshold value has been proposed. For example, Patent Document 4 discloses a thin film transistor in which a protective layer made of a low-molecular organic substance is formed on an active layer by a vacuum evaporation method, thereby suppressing fluctuation of the threshold voltage to the negative side and having stable transistor characteristics. A method is disclosed. However, there is a problem that the production process is increased and complicated by providing a protective layer made of a low molecular weight organic substance on the active layer. In addition, since the protective layer is formed by a vacuum deposition method, there is a problem that throughput is lowered.
Further, in Patent Document 5, in forming a channel layer in a thin film transistor manufacturing method, a metal oxide containing indium is formed by adjusting an oxygen gas flow rate in an atmosphere containing oxygen gas, and a composition of the metal oxide film is disclosed. And a method for manufacturing a highly reliable thin film transistor by adjusting the oxygen content is disclosed. There is also a method for controlling channel resistivity and forming channel layers and electrodes having different electrical resistance values by adjusting oxygen vacancies in a metal oxide film formed by changing the oxygen gas flow rate. It is disclosed. Such a method of manufacturing a thin film transistor has an effect that a high temperature process is not required. However, in the method described in Patent Document 5, it is difficult to make the oxygen content uniform because the oxygen content of the metal oxide film is adjusted by adjusting the oxygen gas flow rate. There is room for improvement.

  At present, thin film transistors have been used in large flexible displays and the like. Thus, as the area of the thin film transistor is increased, development of a cheaper and higher throughput manufacturing method is required.

JP 2007-73559 A JP 2007-142195 A JP 2011-14761 A JP 2010-056421 A JP 2008-192721 A

  The present invention has been made in view of the above-mentioned problems, and is mainly intended to provide a thin film transistor having a stable transistor characteristic and a method for manufacturing the thin film transistor that can be manufactured by a low-temperature, simple, high-throughput, and inexpensive manufacturing process. It is the purpose.

  In order to achieve the above object, the present invention provides a method of manufacturing a thin film transistor having a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode. An oxide semiconductor layer forming step of forming an oxide semiconductor layer in an atmosphere containing a gas; and after the oxide semiconductor layer forming step, oxygen vacancies are imparted to at least a channel region of the oxide semiconductor layer to generate carriers in the channel region. There is provided a method for manufacturing a thin film transistor, comprising a carrier concentration control step for controlling the concentration.

According to the present invention, the oxide semiconductor layer having a low carrier concentration can be formed by forming the oxide semiconductor layer in an atmosphere containing an oxidizing gas, and oxygen can be formed at least in the channel region of the oxide semiconductor layer. By imparting defects, the oxide semiconductor layer having a channel region exhibiting an optimum carrier concentration as a semiconductor can be obtained. Further, in the present invention, by including the carrier concentration control step, oxygen vacancies can be uniformly imparted to the oxide semiconductor layer, whereby a thin film transistor having stable transistor characteristics can be manufactured.
In the present invention, unlike the conventional method for manufacturing a thin film transistor, a process involving high-temperature heat treatment to an oxide semiconductor layer for the purpose of improving transistor characteristics is not required, and thus a thin film transistor is manufactured by a simpler method. In addition, the thin film transistor can be manufactured under a relatively low temperature condition of, for example, 150 ° C. or lower. Accordingly, since a thin film transistor can be manufactured using a resin substrate having flexibility and low heat resistance, the thin film transistor of the present invention can be manufactured by a roll-to-roll method, and a thin film transistor can be obtained at a lower cost and higher throughput. be able to.

In the oxide semiconductor layer forming step in the invention, the oxide semiconductor layer is preferably formed so that a carrier concentration of the oxide semiconductor layer is less than 1 × 10 ¹⁶ cm ⁻³ . This is because when the carrier concentration at the time of forming the oxide semiconductor layer is within the above range, the carrier concentration can be increased to an optimum value when oxygen vacancies are imparted to the oxide semiconductor layer. Accordingly, an oxide semiconductor layer having an excellent channel region as a semiconductor can be formed, and a thin film transistor having excellent transistor characteristics can be manufactured.

  In this invention, it is preferable to manufacture by a roll-to-roll system. This is because manufacturing by the roll-to-roll method enables easy and continuous production, so that high throughput, high productivity, and low cost can be realized.

  In the present invention, after the carrier concentration control step, a gate insulating layer forming step of forming the gate insulating layer on the oxide semiconductor layer is included, and the gate insulating layer forming step includes the oxide semiconductor. It is preferable that the gate insulating layer be formed over the layer so that oxygen vacancies are not generated in the oxide semiconductor layer. In other words, in the present invention, the gate insulating layer is formed so that oxygen vacancies are not generated over the oxide semiconductor layer in which the carrier concentration in the channel region has reached an optimum value as a semiconductor by the carrier concentration control step. Is preferred. By forming the gate insulating layer so that oxygen vacancies are not generated in the oxide semiconductor layer, the carrier concentration of the oxide semiconductor layer controlled in the carrier concentration control step is adjusted in the carrier concentration control step. This is because it is possible to maintain the value. In addition, by forming the gate insulating layer by the above-described method, it is not necessary to perform a process involving high-temperature heat treatment on the oxide semiconductor layer, which has been conventionally required for controlling the carrier concentration, thereby improving throughput. It becomes possible to make it.

Furthermore, in the present invention, a gate insulating layer forming step is included before the oxide semiconductor layer forming step or after the carrier concentration control step, and the gate insulating layer forming step forms the gate insulating layer by a coating method. It is preferable that it is a process. By forming the gate insulating layer by a coating method, a thin film transistor can be manufactured under a low temperature condition. Conventionally, a process involving high-temperature heat treatment for an oxide semiconductor layer, which is required for controlling the carrier concentration, is not required. In addition, formation of the gate insulating layer using a coating method does not require high-temperature conditions; therefore, a flexible substrate with low heat resistance can be used. Thereby, it can be manufactured by a roll-to-roll method, and a thin film transistor can be obtained at a lower cost.
Furthermore, in the present invention, by forming the gate insulating layer by a coating method, it becomes possible to increase the throughput as compared with the conventional gate insulating layer formed by a vacuum evaporation method.

  The present invention is a roll characterized by winding a thin film transistor having a long resin substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode. A thin film transistor is provided.

  According to the present invention, since the thin film transistor formed on a long resin substrate is a rolled thin film transistor, it can be manufactured by a roll-to-roll method and can be manufactured by a low temperature process. Thin film transistors. In addition, the long resin substrate allows the thin film transistor of the present invention to be flexible and is suitable for a flat panel display.

  The present invention can be manufactured by a low-temperature, simple, high-throughput, and low-cost manufacturing process, and can produce a thin film transistor having stable transistor characteristics.

It is process drawing which shows an example of the manufacturing method of the thin-film transistor of this invention. It is process drawing which shows the other example of the manufacturing method of the thin-film transistor of this invention. It is process drawing which shows the other example of the manufacturing method of the thin-film transistor of this invention. It is process drawing which shows the other example of the manufacturing method of the thin-film transistor of this invention. It is the schematic which shows an example of the manufacturing method by the roll-to-roll system of the thin-film transistor of this invention. It is a schematic perspective view which shows an example of the roll-shaped thin-film transistor of this invention.

  Hereinafter, the method for producing a thin film transistor and the roll thin film transistor of the present invention will be described in detail.

A. First, a method for manufacturing a thin film transistor of the present invention will be described.
The method for manufacturing a thin film transistor of the present invention is a method for manufacturing a thin film transistor having a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode, and includes an oxidizing gas. An oxide semiconductor layer forming step for forming an oxide semiconductor layer in an atmosphere, and after the oxide semiconductor layer forming step, oxygen vacancies are imparted to at least the channel region of the oxide semiconductor layer to control the carrier concentration in the channel region. And a carrier concentration control step.

A method for manufacturing a thin film transistor of the present invention will be described with reference to the drawings.
1 to 4 are process schematic diagrams showing an example of a method for manufacturing a thin film transistor of the present invention.
FIG. 1 shows an example of a manufacturing method of a thin film transistor having a bottom gate top contact structure, and FIG. 2 shows an example of a manufacturing method of a thin film transistor having a bottom gate bottom contact structure. 3 shows an example of a method for manufacturing a thin film transistor having a top gate top contact structure, and FIG. 4 shows an example of a method for manufacturing a thin film transistor having a top gate bottom contact structure.

In the method of manufacturing the thin film transistor 1 having the bottom gate top contact structure shown in FIG. 1, first, as shown in FIG. 1A, a gate electrode forming step for forming the gate electrode 3 on the surface of the substrate 2 is performed. Thereafter, as shown in FIG. 1B, a gate insulating layer forming step is performed in which a gate insulating layer 4 is formed on the surface of the substrate 2 on which the gate electrode 3 is formed so as to cover the gate electrode 3. After forming the gate insulating layer 4, as shown in FIG. 1C, an oxide semiconductor layer forming step for forming the oxide semiconductor layer 5 in an atmosphere containing an oxidizing gas on the surface of the gate insulating layer 4 is performed. . At this time, the oxide semiconductor layer 5 is formed so as to overlap the gate electrode 3 with the gate insulating layer 4 interposed therebetween. Thereafter, as shown in FIG. 1D, a source electrode and drain electrode forming step is performed in which the source electrode 6 and the drain electrode 7 are formed on the surface of the oxide semiconductor layer 5 with a predetermined interval. The predetermined interval at this time is a region where at least the oxide semiconductor layer 5 faces the gate electrode 3 with the gate insulating layer 4 interposed therebetween, and this region becomes a channel region C. Therefore, in FIG. 1, the channel region C is defined in the process of forming the source electrode 6 and the drain electrode 7 shown in FIG. After the formation of the source electrode 6 and the drain electrode 7, as shown in FIG. 1E, oxygen vacancies are imparted to the exposed channel region C of the oxide semiconductor layer 5 to control the carrier concentration. A carrier concentration control step for improving the characteristics of the region C as a semiconductor is performed. Here, the region provided with oxygen vacancies in the oxide semiconductor layer 5 is referred to as an oxygen vacancy-providing region 15. As described above, the thin film transistor 1 having excellent transistor characteristics can be manufactured.
Although not shown, as a method for manufacturing a thin film transistor having a bottom gate top contact structure, an oxide semiconductor layer forming step for forming an oxide semiconductor layer and a source electrode and drain electrode forming step for forming a source electrode and a drain electrode are provided. A carrier concentration control step for controlling the carrier concentration may be performed between them.

  In the method of manufacturing the thin film transistor 1 having the bottom gate bottom contact structure shown in FIG. 2, first, as shown in FIG. 2A, a gate electrode forming step for forming the gate electrode 3 on the surface of the substrate 2 is performed. Next, as shown in FIG. 2B, a gate insulating layer forming step is performed in which a gate insulating layer 4 is formed on the surface of the substrate 2 on which the gate electrode 3 is formed so as to cover the gate electrode 3. Thereafter, as shown in FIG. 2C, a source electrode and drain electrode forming step is performed in which the source electrode 6 and the drain electrode 7 are formed on the surface of the gate insulating layer 4 with a predetermined interval. The predetermined interval at this time is a region overlapping at least the gate electrode 3 in a plan view on the surface of the gate insulating layer 4, and this region becomes a channel region forming region. Therefore, in FIG. 2, in the step of forming the source electrode 6 and the drain electrode 7 shown in FIG. 2C, the region where the channel region is formed is defined. After the formation of the source electrode 6 and the drain electrode 7, as shown in FIG. 2D, the channel region formed on the surface of the gate insulating layer 4 and between the source electrode 6 and the drain electrode 7 is formed. The oxide semiconductor layer 5 is formed in an atmosphere containing an oxidizing gas so as to cover the working region, and an oxide semiconductor layer forming step is performed in which the channel region C is defined. Thereafter, as shown in FIG. 2E, a carrier concentration control step for improving the characteristics of at least the channel region C as a semiconductor by imparting oxygen vacancies to the oxide semiconductor layer 5 to control the carrier concentration is performed. Do. Here, the region provided with oxygen vacancies in the oxide semiconductor layer 5 is referred to as an oxygen vacancy-providing region 15. As described above, the thin film transistor 1 having excellent transistor characteristics can be manufactured.

In the method of manufacturing the thin film transistor 1 having the top gate top contact structure shown in FIG. 3, first, as shown in FIG. 3A, the oxide semiconductor layer 5 is formed on the surface of the substrate 2 in an atmosphere containing an oxidizing gas. A physical semiconductor layer forming step is performed. Next, as shown in FIG. 3B, the source electrode and the drain electrode in which the source electrode 6 and the drain electrode 7 are formed at a predetermined interval on the surface of the oxide semiconductor layer 5 formed on the surface of the substrate 2. A formation process is performed. The predetermined interval at this time is at least the surface of the oxide semiconductor layer 5 and is a channel region forming region where a channel region is formed later. Next, as shown in FIG. 3C, oxygen vacancies are imparted to such a region, that is, the channel region forming region of the oxide semiconductor layer 5 exposed by forming the source electrode 6 and the drain electrode 7. By controlling the carrier concentration, a carrier concentration control step for improving characteristics as a semiconductor is performed. Here, the region provided with oxygen vacancies in the oxide semiconductor layer 5 is referred to as an oxygen vacancy-providing region 15. Thereafter, as shown in FIG. 3D, a gate insulating layer forming step in which the gate insulating layer 4 is formed so as to cover the oxide semiconductor layer 5, the source electrode 6 and the drain electrode 7 formed on the surface of the substrate 2. I do. After the formation of the gate insulating layer 4, as shown in FIG. 3E, the gate electrode is disposed on the surface of the gate insulating layer 4 so as to face the oxygen deficiency providing region 15 through the gate insulating layer 4. 3 is formed, and a gate electrode forming step is performed in which the oxygen deficiency imparting region 15 becomes the channel region C. As described above, the thin film transistor 1 having excellent transistor characteristics can be manufactured.
Although not shown, as a method for manufacturing a thin film transistor having a top gate top contact structure, an oxide semiconductor layer forming step for forming an oxide semiconductor layer and a source electrode and drain electrode forming step for forming a source electrode and a drain electrode are provided. A carrier concentration control step for controlling the carrier concentration may be performed between them.

In the method of manufacturing the thin film transistor 1 having the top gate / bottom contact structure shown in FIG. 4, first, as shown in FIG. 4A, the source electrode 6 and the drain electrode 7 are formed on the surface of the substrate 2 with a predetermined interval. A source electrode and drain electrode forming step is performed. The predetermined interval at this time is a channel region forming region where a channel region is formed later. Next, as shown in FIG. 4B, after forming the source electrode 6 and the drain electrode 7, the oxide semiconductor layer is exposed in an atmosphere containing an oxidizing gas on the exposed surface of the substrate 2, that is, the channel region forming region. 5 is performed. Thereafter, as shown in FIG. 4C, a carrier concentration control step is performed in which oxygen vacancies are imparted to the oxide semiconductor layer 5 to control the carrier concentration, thereby improving the characteristics as a semiconductor. Here, the region provided with oxygen vacancies in the oxide semiconductor layer 5 is referred to as an oxygen vacancy-providing region 15. Next, as shown in FIG. 4D, a gate insulating layer 4 is formed so as to cover the source electrode 6, the drain electrode 7 and the oxide semiconductor layer 5 formed on the surface of the substrate 2. Perform the process. After the formation of the gate insulating layer 4, as shown in FIG. 4E, a gate electrode forming step of forming the gate electrode 3 on the surface of the gate insulating layer 4 so as to overlap the channel region forming region in plan view. Do. At this time, in the channel region forming region formed between the source electrode 6 and the drain electrode 7, a region facing the gate electrode 3 through the gate insulating layer 4 becomes a channel region C.
As described above, the thin film transistor 1 having excellent transistor characteristics can be manufactured.

According to the present invention, in the oxide semiconductor layer forming step, the oxide semiconductor layer is formed in an atmosphere containing an oxidizing gas. The reason why the oxidizing gas is used is to suppress generation of oxygen vacancies when the oxide semiconductor layer is formed. Accordingly, for example, the above oxide semiconductor layer exhibiting a low value of a carrier concentration of less than 1 × 10 ¹⁶ cm ⁻³ can be obtained. After the oxide semiconductor layer formation step, in the carrier concentration control step, the oxide semiconductor layer having a channel region exhibiting an optimum carrier concentration as a semiconductor is provided by imparting oxygen vacancies to the channel region of the oxide semiconductor layer. Obtainable. In addition, the oxide semiconductor layer having a low carrier concentration is formed, and then oxygen vacancies are provided so that the oxide semiconductor layer exhibits an optimal carrier concentration as a semiconductor. Oxygen deficiency can be imparted. In this manner, the transistor characteristics obtained can be stabilized by imparting uniform oxygen vacancies to the oxide semiconductor layer. Further, unlike the conventional case, a process involving high-temperature heat treatment for the oxide semiconductor layer for the purpose of improving transistor characteristics is not required, so that a thin film transistor can be easily manufactured with high throughput.

In addition, the thin film transistor of the present invention can be manufactured by a low temperature manufacturing process of, for example, 150 ° C. or less for the reason described above, and a resin substrate can be used as a substrate. Can be suppressed.
In addition, by using a long resin substrate, it is possible to develop a roll-to-roll manufacturing technique, which enables easy and continuous production, and manufactures thin film transistors at low cost and high productivity. It becomes possible.

  Further, as illustrated in FIGS. 3 and 4, in the case where the gate insulating layer forming step is included after the carrier concentration control step, the oxide semiconductor layer is not damaged in the gate insulating layer forming step to cause oxygen vacancies. By forming the gate insulating layer, the carrier concentration of the oxide semiconductor layer controlled in the carrier concentration control step can be maintained at a value adjusted in the carrier concentration control step. In addition, by forming the gate insulating layer by the above-described method, it is possible to omit a process accompanied by high-temperature heat treatment on the oxide semiconductor layer, which has been conventionally required for controlling the carrier concentration. Therefore, in the present invention, a thin film transistor can be manufactured with high throughput.

  In addition, since the thin film transistor manufacturing method of the present invention does not include a step requiring high temperature conditions, the thin film transistor can be manufactured under relatively low temperature conditions, and accordingly, a flexible substrate with low heat resistance. Can be used. Thereby, the thin film transistor obtained by the production method of the present invention can be made flexible, and a thin film transistor suitable for a flat panel display can be produced.

Note that the method for manufacturing a thin film transistor of the present invention includes an oxide semiconductor layer forming step and a carrier concentration control step, and usually a gate electrode forming step, a gate insulating layer forming step, a source electrode and a drain electrode forming step. It has each process of these.
Hereinafter, each process in the manufacturing method of the thin-film transistor of this invention is demonstrated.

1. Oxide Semiconductor Layer Formation Step The oxide semiconductor layer formation step in the present invention is a step of forming an oxide semiconductor layer in an atmosphere containing an oxidizing gas.
In the method of manufacturing a thin film transistor having a bottom gate top contact structure, as shown in FIG. 1C, an oxidizing gas is formed on the gate insulating layer 4 so as to face the gate electrode 3 with the gate insulating layer 4 interposed therebetween. The oxide semiconductor layer 5 is formed in an atmosphere containing
In the method of manufacturing a thin film transistor having a bottom gate bottom contact structure, as shown in FIG. 2D, the above-described method is performed in an atmosphere containing an oxidizing gas on the gate insulating layer 4 on which the source electrode 6 and the drain electrode 7 are formed. In this step, the oxide semiconductor layer 5 is formed.
In the method of manufacturing a thin film transistor having a top gate top contact structure, as shown in FIG. 3A, the oxide semiconductor layer 5 is formed on the substrate 2 in an atmosphere containing an oxidizing gas.
In the method of manufacturing a thin film transistor having a top gate bottom contact structure, as shown in FIG. 4B, the oxide semiconductor is formed in an atmosphere containing an oxidizing gas on the substrate 2 on which the source electrode 6 and the drain electrode 7 are formed. This is a process in which the layer 5 is formed.

The semiconductor material used for the oxide semiconductor layer is not particularly limited as long as it is an oxide semiconductor. For example, zinc oxide (ZnO), titanium oxide (TiO), magnesium zinc oxide (Mg _x Zn _1-x O), cadmium zinc oxide (Cd _x Zn _1-x O), cadmium oxide (CdO), indium oxide (In ₂ O ₃ ), gallium oxide (Ga ₂ O ₃ ), tin oxide (SnO ₂ ), magnesium oxide ( MgO), tungsten oxide (WO), InGaZnO, InGaSnO, InGaZnMgO, InAlZnO, InFeZnO, InGaO, ZnGaO, and InZnO.

The oxide semiconductor layer is formed in an atmosphere containing an oxidizing gas. The oxidizing gas is used for suppressing generation of oxygen vacancies when the oxide semiconductor layer is formed. This is because by forming an oxide semiconductor layer in an atmosphere containing an oxidizing gas, oxygen vacancies can be suppressed and an oxide semiconductor layer with a low carrier concentration can be obtained.
Here, an atmosphere containing an oxidizing gas will be described.
First, examples of the oxidizing gas include O ₂ , O ₃ , and N ₂ O. In the present invention, O ₂ is particularly preferable.
The atmosphere containing an oxidizing gas in the present invention is not particularly limited as long as it contains these oxidizing gases. Fluorine containing C such as CF ₄ gas or CHF ₃ gas in addition to the oxidizing gas. System gas or Ar gas may be included. Note that a gas other than C-containing fluorine-based gas or Ar gas may be included as long as the desired effect can be obtained.
Further, the ratio of the oxidizing gas contained in the atmosphere containing the oxidizing gas is not particularly limited as long as a desired effect is obtained, and varies depending on the type of the oxidizing gas. However, the proportion of the oxidizing gas is preferably 80% or more, and particularly preferably 90% or more. This is because when the ratio of the oxidizing gas is within the above range, oxygen vacancies can be further suppressed when the oxide semiconductor layer is formed.

  A method for forming the oxide semiconductor layer is not particularly limited as long as it is a method capable of forming the semiconductor material in an atmosphere containing an oxidizing gas. More specifically, the method is preferably performed under conditions of 150 ° C. or lower. For example, a low temperature CVD method, a PVD method such as a vacuum deposition method, a sputtering method, or an ion plating method can be used.

  After the semiconductor material is formed, patterning is usually performed in a desired pattern shape. As the patterning method, for example, a photolithography method can be used. Further, when the oxide semiconductor layer is etched using the photoresist pattern as a mask, either wet etching or dry etching can be applied as an etching method.

As the carrier concentration of the oxide semiconductor layer formed by the above method, an oxygen vacancy is imparted in a carrier concentration control step, which will be described later, so that the carrier concentration in at least the channel region of the oxide semiconductor layer is an optimum value as a semiconductor. Although it is not particularly limited as long as it can be an oxide semiconductor layer having excellent characteristics as a semiconductor, it is preferably less than 1 × 10 ¹⁶ cm ⁻³ in the present invention. It is preferable to be within the range of × 10 ¹² cm ⁻³ to 1 × 10 ¹⁵ cm ⁻³ .
When the carrier concentration is outside the above range, it is difficult to control the carrier concentration of the oxide semiconductor layer to an optimum value as a semiconductor when adjusting the carrier concentration by providing oxygen vacancies in the carrier concentration control step. This is because there is a case.

  In addition, as a measuring method of the carrier concentration in this invention, the method using a Hall effect measuring apparatus is mentioned, for example.

  The thickness of the oxide semiconductor layer is appropriately selected according to the structure and use of the thin film transistor, and can be set to, for example, about 25 nm to 75 nm.

2. Carrier concentration control step The carrier concentration control step in the present invention is a step of controlling the carrier concentration by imparting oxygen vacancies to at least the channel region of the oxide semiconductor layer.
The manufacturing method of the thin film transistor having the bottom gate top contact structure is the step shown in FIG. 1E, and the manufacturing method of the thin film transistor having the bottom gate bottom contact structure is the step shown in FIG. Further, in the method of manufacturing a thin film transistor having a top gate top contact structure, the process shown in FIG. 3C is performed. In the method of manufacturing a thin film transistor having a top gate bottom contact structure, the process illustrated in FIG. is there.

  In the method of manufacturing a thin film transistor having a bottom gate bottom contact structure shown in FIG. 1, the carrier concentration control step is performed after the source electrode and drain electrode formation step. You may perform between a semiconductor layer formation process and a source electrode and drain electrode formation process. Also, in the method of manufacturing the thin film transistor having the top gate top contact structure shown in FIG. 3, the carrier concentration control step is performed after the source electrode and drain electrode formation step. It may be performed between the physical semiconductor layer forming step and the source and drain electrode forming step.

  By this step, the carrier concentration in at least the channel region of the oxide semiconductor layer can be increased to an optimum value as a semiconductor, whereby an oxide semiconductor layer having excellent characteristics as a semiconductor can be obtained.

  In the carrier concentration control step, a method for controlling the carrier concentration by imparting oxygen vacancies to the oxide semiconductor layer may be a method capable of imparting oxygen vacancies after forming the oxide semiconductor layer to obtain a desired carrier concentration. For example, a reverse sputtering method, a reactive ion etching method (RIE), etc. are mentioned.

  Further, the atmosphere in controlling the carrier concentration by the above method is not particularly limited as long as oxygen vacancies can be imparted to the oxide semiconductor layer by the above method.

Thus, in the carrier concentration control step, the carrier concentration in the region provided with oxygen vacancies is not particularly limited as long as the oxide semiconductor layer can exhibit excellent characteristics as a semiconductor. For example, preferably in the range of 1 × 10 ¹⁴ cm ⁻³ to 1 × 10 ¹⁷ cm ⁻³ , and in particular in the range of 1 × 10 ¹⁵ cm ⁻³ to 1 × 10 ¹⁷ cm ^−3. Is preferred.
When the carrier concentration value is extremely smaller than the above range, the semiconductor becomes an insulator, and when the carrier concentration value is extremely larger than the above range, the semiconductor becomes a conductor and the desired effect as a thin film transistor may not be obtained. Because there is.

In this step, when the oxygen deficiency imparting region is formed by imparting oxygen vacancies to the oxide semiconductor layer, the oxide semiconductor layer may be an oxygen vacancy imparting region as a whole or a part thereof. It may be an oxygen deficiency imparting region.
For example, in FIG. 1 or FIG. 3 showing a manufacturing method of a thin film transistor having a top contact structure, a carrier concentration control step (FIG. 1E) is performed after a source electrode and drain electrode formation step (FIGS. 1D and 3B). 3 (c)), the oxide semiconductor layer 5 is not provided with oxygen vacancies by using the oxygen vacancy-providing region 15, the source electrode 6 and the drain electrode 7 as a mask. And the region where the carrier concentration remains as it is when the oxide semiconductor layer 5 is formed. Although not shown, even in the case of a thin film transistor having a top contact structure, when the carrier concentration control step is provided between the oxide semiconductor layer formation step and the source electrode and drain electrode formation step, Since the oxide semiconductor layer is entirely given oxygen vacancies, the entire oxide semiconductor layer becomes an oxygen vacancy-donating region.
2 or 4 showing a method for manufacturing a thin film transistor having a bottom contact structure, a carrier concentration control step (FIG. 2 (e) after the oxide semiconductor layer formation step (FIG. 2 (d), FIG. 4 (b)). 4 (c)), the oxide semiconductor layer 5 is entirely given oxygen vacancies, and all of the oxide semiconductor layer 5 becomes an oxygen vacancy-giving region 15.

3. Gate electrode formation process The gate electrode formation process in this invention is a process of forming a gate electrode.
In the method of manufacturing a thin film transistor having a bottom gate top contact structure, the gate electrode 3 is formed on the substrate 2 as shown in FIG.
Also in the method of manufacturing a thin film transistor having a bottom gate bottom contact structure, the gate electrode 3 is formed on the substrate 2 as shown in FIG.
In the method of manufacturing a thin film transistor having a top gate top contact structure, as shown in FIG. 3E, the oxide semiconductor layer 5 is opposed to the gate insulating layer 4 with the gate insulating layer 4 interposed therebetween. In the step, the gate electrode 3 is formed.
Also in the method of manufacturing a thin film transistor having a top gate bottom contact structure, as shown in FIG. 4E, the oxide semiconductor layer 5 is opposed to the gate insulating layer 4 with the gate insulating layer 4 interposed therebetween. In this way, the gate electrode 3 is formed.

  As the conductive material used for the gate electrode, those generally used for the gate electrode of the thin film transistor can be used. For example, Al, Cr, Ni, Au, Ag, Ta, Cu, Pt, Ti, ITO And metal materials such as IZO, carbon materials such as graphene and carbon nanotubes, and conductive polymer materials such as PEDOT / PSS.

  A method for forming the gate electrode is not particularly limited as long as it is a method capable of forming a conductive material, but among them, a method under relatively low temperature conditions is preferable. The method under the following conditions is preferable. For example, a PVD method such as a low temperature CVD method, a vacuum deposition method, a sputtering method, or an ion plating method can be used.

  After forming the conductive material, patterning is usually performed in a desired pattern shape. As the patterning method, for example, a photolithography method can be used. Further, when the gate electrode is etched using the photoresist pattern as a mask, both wet etching and dry etching can be applied as the etching method.

  The thickness of the gate electrode is appropriately selected according to the structure and use of the thin film transistor, and can be set to about 50 nm to 200 nm, for example.

4). Gate Insulating Layer Forming Step The gate insulating layer forming step in the present invention is a step of forming a gate insulating layer.
In the method of manufacturing the thin film transistor having the bottom gate top contact structure, as shown in FIG. 1B, the gate insulating layer 4 is formed on the substrate 2 on which the gate electrode 3 is formed.
Also in the manufacturing method of the thin film transistor having the bottom gate bottom contact structure, as shown in FIG. 2B, the gate insulating layer 4 is formed on the substrate 2 on which the gate electrode 3 is formed.
In the method of manufacturing a thin film transistor having a top gate top contact structure, the gate insulating layer 4 is formed on the oxide semiconductor layer 5 on which the source electrode 6 and the drain electrode 7 are formed, as shown in FIG. Process.
In the method for manufacturing a thin film transistor having a top gate bottom contact structure, the gate insulating layer 4 is formed on the oxide semiconductor layer 5 as shown in FIG.

As an insulating material used for the gate insulating layer, a material generally used for a gate insulating layer of a thin film transistor can be used, and any of an insulating inorganic material and an insulating organic material can be used.
Examples of the insulating inorganic material include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, and tantalum oxide.
Examples of the insulating organic material include acrylic resins, phenol resins, fluorine resins, epoxy resins, cardo resins, vinyl resins, imide resins, and novolac resins. Among them, fluorine resins Is preferred. In the case where a fluorine-based resin is used, interface characteristics between the oxide semiconductor layer and the gate insulating layer can be improved.
As the insulating organic material, any of a photocurable resin, a thermosetting resin, a photosensitive resin, and the like can be used, and a photosensitive resin is preferable. This is because the gate insulating layer can be easily patterned.

  A method for forming the gate insulating layer is appropriately selected according to the type of the insulating material, and among these, a method at a relatively low temperature condition is preferable, and specifically, a condition at 150 ° C. or lower. A method is preferred. For example, a dry process such as a low temperature CVD method or a PVD method such as a sputtering method, and a wet process such as a coating method are used.

  Further, the gate insulating layer in the case where the gate insulating layer forming step is provided after the carrier concentration control step as in the method of manufacturing a thin film transistor having a top gate top contact structure (FIG. 3) or a top gate bottom contact structure (FIG. 4) The formation method is preferably a method that does not generate oxygen vacancies in the oxide semiconductor layer.

  By forming the gate insulating layer by a method that does not generate oxygen vacancies, the carrier concentration of the oxide semiconductor layer controlled in the carrier concentration control step is adjusted to a value adjusted in the carrier concentration control step. Can be maintained. In addition, a process involving high-temperature heat treatment on the oxide semiconductor layer, which has been conventionally required for controlling the carrier concentration, can be omitted. Therefore, in the present invention, a thin film transistor can be manufactured with high throughput.

  The method for forming the gate insulating layer is not particularly limited as long as it does not cause oxygen vacancies in the oxide semiconductor layer, and is appropriately selected depending on the type of the insulating material. For example, a coating method, a low temperature CVD method, a DC sputtering method, a counter target sputtering method, or the like can be used.

Note that a gate insulating layer is formed over an oxide semiconductor layer so that oxygen vacancies are not generated in the oxide semiconductor layer when the carrier concentration of the oxide semiconductor layer after the gate insulating layer formation step is 1 × 10 ¹⁷ cm ^{−. The} gate insulating layer is formed so as to be ³ or less.

  After the insulating material is formed using the above method, patterning may be performed in a desired pattern shape. As the patterning method, for example, a photolithography method can be used. When the insulating material does not have photosensitivity, the gate insulating layer is etched using the photoresist pattern as a mask. At this time, as an etching method, both wet etching and dry etching can be applied, and the etching method is appropriately selected according to the insulating material.

  The thickness of the gate insulating layer is appropriately selected according to the structure and application of the thin film transistor, and can be set to about 100 nm to 300 nm, for example.

5. Source electrode and drain electrode formation step The source electrode and drain electrode formation step in the present invention is a step in which the source electrode and the drain electrode are formed at a predetermined interval.
In the method of manufacturing a thin film transistor having a bottom gate top contact structure, as shown in FIG. 1D, the source electrode 6 and the drain electrode 7 are formed on the oxide semiconductor layer 5 at a predetermined interval. It is a process.
In the method of manufacturing a thin film transistor having a bottom gate bottom contact structure, as shown in FIG. 2C, the source electrode 6 and the drain electrode 7 are formed on the gate insulating layer 4 at a predetermined interval. It is.
In the method of manufacturing a thin film transistor having a top gate top contact structure, as shown in FIG. 3B, the source electrode 6 and the drain electrode 7 are formed on the oxide semiconductor layer 5 at a predetermined interval. This is a process.
In the method of manufacturing a thin film transistor having a top gate / bottom contact structure, as shown in FIG. 4A, the source electrode 6 and the drain electrode 7 are formed on the substrate 2 at a predetermined interval. .

  Note that the predetermined interval here is a region overlapping at least the gate electrode in plan view.

  Further, in the planar view of the thin film transistor of the present invention, in the oxide semiconductor layer in a region overlapping with a predetermined interval provided between the source electrode and the drain electrode, a region overlapping with the gate electrode in plan view is This is a channel region in the thin film transistor of the present invention.

As the conductive material used for the source electrode and the drain electrode, those generally used for the source electrode and the drain electrode of the thin film transistor can be used. For example, Al, Cr, Ni, Au, Ag, Ta, Cu , Pt, Ti, Nb, Mo, IZO, ITO, MoO _x , NiO _x , TiO _{x and} other metal materials, graphene, carbon materials such as carbon nanotubes, and conductive polymer materials such as PEDOT / PSS. Among these, Ti and Mo are preferably used because of good contact with the oxide semiconductor layer. Moreover, in order to reduce electrical resistance, Ti and Al may be laminated | stacked in order.
Further, when a coating method is used as a method for forming the source electrode and the drain electrode, a coating type conductive material such as Ag colloid or Au colloid can be used.

A method for forming such a source electrode and a drain electrode is appropriately selected depending on the structure of the thin film transistor of the present invention. Among them, a method under a low temperature condition is preferable, and specifically, a method of 150 ° C. or lower. The condition method is preferred.
When the source electrode and the drain electrode are formed over the oxide semiconductor layer as in the top contact structure (see FIGS. 1 and 3), the source electrode and the drain electrode are formed by oxygen vacancies in the oxide semiconductor layer. The method is not particularly limited as long as it is not generated. For example, a DC sputtering method, a counter target sputtering method, an ECR sputtering method, a coating method, or the like can be used.
On the other hand, when the source electrode and the drain electrode are formed before the oxide semiconductor layer is formed as in the bottom contact structure (see FIGS. 2 and 4), the method for forming the source electrode and the drain electrode depends on the type of the conductive material. For example, a low temperature CVD method, a PVD method such as a vacuum deposition method, a sputtering method, or an ion plating method can be used.

  After film formation of the conductive material by the above method, patterning is usually performed in a desired pattern shape. As the patterning method, for example, a photolithography method can be used. Further, when the source electrode and the drain electrode are etched using the photoresist pattern as a mask, both wet etching and dry etching can be applied as an etching method.

  The thicknesses of the source electrode and the drain electrode are appropriately selected according to the structure and use of the thin film transistor, and can be set to about 50 nm to 200 nm, for example.

  In addition, the size of the predetermined interval formed between the source electrode and the drain electrode, that is, the size of the channel region C is usually preferably in the range of 100 μm to 10 mm in the length direction of the channel region. The source electrode and the drain electrode are preferably formed so as to define the channel region C within the above range.

6). Substrate The substrate used in the present invention supports a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode.

  The substrate is appropriately selected according to the use of the thin film transistor. Examples of the material for the substrate include glass, metal, ceramic, resin, and the like. The substrate may be a rigid substrate having no flexibility such as a glass substrate, or may be a flexible substrate having flexibility such as a resin film.

  Among these, the substrate is preferably a resin substrate. Since the manufacturing method of the thin film transistor of the present invention is a manufacturing method at a low temperature, it is possible to suppress the dimensional change of the resin substrate due to heat. In addition, it is possible to develop a technique for manufacturing by a roll-to-roll method, a large-area circuit board can be manufactured at low cost, and further flexibility can be achieved.

Examples of the resin substrate include polyether sulfone, polyethylene naphthalate, polyamide, polybutylene terephthalate, polyethylene terephthalate, polyphenylene sulfide, polyether ether ketone, liquid crystal polymer, fluororesin, polycarbonate, polynorbornene resin, polysulfone, poly The organic base material which consists of an arylate, a polyamideimide, a polyetherimide, or a thermoplastic polyimide, and those composite base materials can be mentioned.
The heat resistance of the resin substrate is not particularly limited as long as a thin film transistor can be produced by the production method of the present invention, but in particular when it is produced by a roll-to-roll method, it is 200 ° C. or less. It is preferable that it is 180 degrees C or less especially.
In the conventional method for manufacturing a thin film transistor, it was difficult to apply a substrate having low heat resistance. However, in the present invention, a thin film transistor can be easily manufactured using a substrate having low heat resistance as described above. .
On the other hand, the heat resistance of the resin substrate is preferably 100 ° C. or higher, and more preferably 150 ° C. or higher.
This is because if the heat resistance is lower than the above range, a dimensional change due to heat of the resin substrate may occur in the manufacturing process of the thin film transistor.
As such a resin substrate, among the resin substrates described above, liquid crystal polymer, polycarbonate, and polyethylene naphthalate are preferable, and polyethylene naphthalate is particularly preferable.

  In the case of a resin substrate, the substrate may be a single wafer or may be long. When a long substrate is used, a thin film transistor can be manufactured by a roll-to-roll method as described above.

7). Other Steps Other steps in the method for manufacturing a thin film transistor of the present invention can be appropriately added as necessary, and examples thereof include a step of forming a protective film.

  The protective film forming step is a step of forming a protective film so as to cover the entire thin film transistor after forming the thin film transistor.

  Examples of the material used for the protective film include insulating inorganic materials such as silicon oxide and silicon nitride, and acrylic resins, phenolic resins, fluorine resins, epoxy resins, cardo resins, vinyl resins, and imide resins. Examples thereof include insulating organic materials such as resins and novolac resins.

A method for forming such a protective film is not particularly limited as long as the thin film transistor obtained by the production method of the present invention can achieve a desired effect, and among them, a method under low temperature conditions is preferable. Specifically, the method is preferably performed under conditions of 150 ° C. or lower. For example, a sputtering method, a low temperature CVD method, etc. can be mentioned.
As a method for forming a protective layer in the method of manufacturing a thin film transistor having a bottom gate structure as shown in FIGS. 1 and 2, the carrier in the oxygen deficiency imparting region 15 to which oxygen deficiency is imparted in the carrier concentration control step is used. The method is not particularly limited as long as the method can maintain the concentration. Specifically, a coating method, a DC sputtering method, an opposed target sputtering method, or the like can be used.

8). Roll-to-roll method The thin-film transistor manufacturing method of the present invention is preferably carried out in a roll-to-roll method.

  In the roll-to-roll manufacturing method, a long substrate wound in a roll is drawn out to form a thin film transistor on one surface of the long substrate, and the thin film transistor is formed on one surface. This is a manufacturing method in which a long substrate is wound up again in a roll shape.

A method of manufacturing a thin film transistor using the roll-to-roll method used in the present invention will be described with reference to the drawings.
FIG. 5 is a schematic view showing an example of a manufacturing method using a roll-to-roll method. In the thin film transistor manufacturing method using the roll-to-roll method 10, first, the long resin substrate 9 is sent out from a roll 8a composed of a long resin substrate 9 wound in a roll shape. Thereafter, Step. 1-Step. Through each of the steps 5, a thin film transistor is formed on one surface of the long resin substrate 9. Thus, the thin film transistor formed on the long resin substrate 9 is wound around the roll 8b again.

  The thin film transistor manufacturing method of the present invention includes the five steps (a) to (e) as shown in the flow charts of FIGS. 1 to 4, but at least “1. Oxide semiconductor layer formation”. The method is not particularly limited as long as it includes the respective steps described in the sections from “Steps” to “5. Source and drain electrode forming step”. 1-Step. 5 is appropriately selected according to the structure and application of the thin film transistor to be manufactured.

  By manufacturing a thin film transistor by such a roll-to-roll method, the substrate flows to each process continuously, so that easy and continuous production is possible, and a highly productive thin film transistor can be obtained. It becomes possible. In addition, the thin film transistor can be manufactured at a lower cost than the conventional method.

  In addition, in the manufacturing method of the thin film transistor, since it can be the same as each step described above except that it is manufactured by a roll-to-roll manufacturing method using a long resin substrate, Description is omitted.

B. Rolled Thin Film Transistor The rolled thin film transistor of the present invention is formed by winding a thin film transistor having a long resin substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode. It is characterized by this.

FIG. 6 is a schematic view showing an example of a roll-shaped thin film transistor of the present invention.
The rolled thin film transistor 20 of the present invention is a thin film transistor (see FIG. 5) manufactured by the roll-to-roll method described above, and is a rolled thin film transistor formed on a long resin substrate and wound. .

  Such thin film transistors can be roughly classified into a bottom gate top contact structure, a bottom gate bottom contact structure, a top gate top contact structure, and a top gate bottom contact structure.

  In the thin film transistor 1 having a bottom gate top contact structure, as shown in FIG. 1E, a gate electrode 3 is formed on a substrate 2, and a gate insulating layer 4 is formed on the substrate 2 so as to cover the gate electrode 3. Is formed. An oxide semiconductor layer 5 is formed on the gate insulating layer 4 so as to face the gate electrode 3 with the gate insulating layer 4 interposed therebetween, and a predetermined interval is formed on the oxide semiconductor layer 5. A source electrode 6 and a drain electrode 7 are formed in a space. Further, in the thin film transistor having the bottom gate top contact structure, as shown in FIG. 1E, oxygen vacancies are given to a part of the oxide semiconductor layer 5 so that one of the oxide semiconductor layers 5 is formed. The portion may be an oxygen deficiency imparting region 15 in which the carrier concentration is controlled. On the other hand, although not shown, oxygen deficiency is imparted to the entire oxide semiconductor layer, so that the oxide semiconductor layer The whole may be an oxygen deficiency imparting region in which the carrier concentration is controlled.

  In the thin film transistor 1 having a bottom gate bottom contact structure, as shown in FIG. 2 (e), a gate electrode 3 is formed on a substrate 2, and a gate insulating layer 4 is formed on the substrate 2 so as to cover the gate electrode 3. Is formed. A source electrode 6 and a drain electrode 7 are formed on the gate insulating layer 4 with a predetermined interval, and cover the predetermined interval between the source electrode 6 and the drain electrode 7. The oxide semiconductor layer 5 is formed. Further, in the thin film transistor having the bottom gate bottom contact structure, as shown in FIG. 2E, oxygen vacancies are given to the entire oxide semiconductor layer 5, so that the entire oxide semiconductor layer 5 is The oxygen deficiency imparting region 15 is controlled in carrier concentration.

  In the thin film transistor 1 having a top gate top contact structure, as shown in FIG. 3E, an oxide semiconductor layer 5 is formed on a substrate 2, and a source electrode is formed on the oxide semiconductor layer 5 with a predetermined interval. 6 and the drain electrode 7 are formed. A gate insulating layer 4 is formed so as to cover the oxide semiconductor layer 5 region exposed after the formation of the source electrode 6 and the drain electrode 7, and an oxide is formed on the gate insulating layer 4 via the gate insulating layer 4. A gate electrode is formed so as to face the semiconductor layer 5. Further, in the thin film transistor having a top gate top contact structure, as shown in FIG. 3E, oxygen vacancies are given to a part of the oxide semiconductor layer 5, so that one of the oxide semiconductor layers 5 is formed. The portion may be an oxygen deficiency imparting region 15 in which the carrier concentration is controlled. On the other hand, although not shown, oxygen deficiency is imparted to the entire oxide semiconductor layer, so that the oxide semiconductor layer The whole may be an oxygen deficiency imparting region in which the carrier concentration is controlled.

  In the thin film transistor 1 having a top gate bottom contact structure, as shown in FIG. 4E, a source electrode 6 and a drain electrode 7 are formed on a substrate 2 at a predetermined interval, and the source electrode 6 and the drain electrode 7 are formed. An oxide semiconductor layer 5 is formed so as to cover a predetermined interval between the two. A gate insulating layer 4 is formed so as to cover the oxide semiconductor layer 5, and a gate electrode 3 is formed on the gate insulating layer 4 so as to face the oxide semiconductor layer 5 with the gate insulating layer 4 interposed therebetween. It has been done. Further, in the thin film transistor having the top gate bottom contact structure, as shown in FIG. 4E, oxygen vacancies are imparted to the entire oxide semiconductor layer 5, so that the entire oxide semiconductor layer 5 is The oxygen deficiency imparting region 15 is controlled in carrier concentration.

  According to the present invention, a roll-shaped thin film transistor in which a thin film transistor formed on a long resin substrate is wound can be manufactured by a roll-to-roll method, and can be manufactured by a low-temperature process. It can be a thin film transistor. In addition, the long resin substrate allows the thin film transistor of the present invention to be flexible and is suitable for a flat panel display.

Examples of the long resin substrate used in the roll thin film transistor of the present invention include, for example, polyethersulfone, polyethylene naphthalate, polyamide, polybutylene terephthalate, polyethylene terephthalate, polyphenylene sulfide, polyether ether ketone, liquid crystal polymer, and fluororesin. And organic base materials made of polycarbonate, polynorbornene resin, polysulfone, polyarylate, polyamideimide, polyetherimide, thermoplastic polyimide, and the like, and composite base materials thereof.
The heat resistance of the resin substrate is not particularly limited as long as a thin film transistor can be produced by the production method of the present invention, but it is preferably 200 ° C. or less, particularly 180 ° C. or less. Is preferred.
In the conventional method for manufacturing a thin film transistor, it was difficult to apply a substrate having low heat resistance. However, in the present invention, a thin film transistor can be easily manufactured using a substrate having low heat resistance as described above. .
On the other hand, the heat resistance of the resin substrate is preferably 100 ° C. or higher, and particularly preferably 150 ° C. or higher.
This is because if the heat resistance is lower than the above range, a dimensional change due to heat of the resin substrate may occur in the manufacturing process of the thin film transistor.
As such a resin substrate, among the resin substrates described above, liquid crystal polymer, polycarbonate, and polyethylene naphthalate are preferable, and polyethylene naphthalate is particularly preferable.

  In addition, each member constituting the roll thin film transistor of the present invention and the manufacturing method thereof can be the same as those described in the section “A. Manufacturing method of thin film transistor”, and thus the description thereof is omitted here. .

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

  The following examples illustrate the present invention in more detail.

[Example 1]
In this example, a thin film transistor was manufactured by a roll-to-roll method.
(Formation of gate electrode)
First, an Al film having an arbitrary thickness (about 50 nm to 200 nm) was formed on one side of a long plastic substrate by a DC sputtering method. In forming the Al film, the pressure was 0.5 Pa, the DC output was 900 W, the atmosphere was Ar, and the substrate temperature was room temperature.
Next, a photoresist was applied onto the Al film by spin coating, exposed and developed to form a photoresist pattern. Subsequently, wet etching of the Al film was performed using an etchant (phosphorous nitrate acetic acid), the photoresist was peeled off, and then rinsed with pure water.

(Formation of gate insulating layer)
Next, an insulating polymer having photosensitivity was applied on the gate electrode made of an Al film by a spin coating method so as to have an arbitrary thickness (about 50 nm to 500 nm).
Next, pre-baking was performed, and exposure and development were performed. Thereafter, post-baking was performed at 150 ° C.

(Formation of oxide semiconductor layer)
Next, an amorphous IGZO (InGaZnO) film having an arbitrary thickness (about 25 nm to 75 nm) was formed on the gate insulating layer by a DC sputtering method. In forming the IGZO film, the pressure was 0.4 Pa, the RF output was 500 W, the atmosphere was O ₂ (100%), and the substrate temperature was room temperature. At this time, the carrier concentration of the oxide semiconductor layer was 1.9 × 10 ¹³ cm ⁻³ .
Next, a photoresist was applied onto the IGZO film by a spin coat method, and was exposed and developed to form a photoresist pattern.
Subsequently, the IGZO film was wet etched using an etchant (ITO etchant manufactured by Wako Pure Chemical Industries) to remove the photoresist, and then rinsed with pure water.

(Formation of source and drain electrodes)
Next, a Ti film having an arbitrary thickness (about 50 nm to 200 nm) was formed over the oxide semiconductor layer by a DC sputtering method. In forming the Ti film, the pressure was 0.5 Pa, the DC output was 900 W, the atmosphere was Ar, and the substrate temperature was room temperature.
Next, a photoresist was applied onto the Ti film by a spin coating method, exposed and developed to form a photoresist pattern. Subsequently, the Ti film was wet etched using an etchant (H ₂ O ₂ / ammonia) to remove the photoresist, and then rinsed with pure water.

(Carrier concentration control)
Oxygen vacancies were imparted to the oxide semiconductor layer exposed by the formation of the source electrode and the drain electrode by a reverse sputtering method, and the carrier concentration was controlled to 1.6 × 10 ¹⁶ cm ⁻³ .
The conditions in the reverse sputtering method were: pressure: 0.3 Pa, RF output: 300 W, atmosphere: Ar, substrate temperature: room temperature.

[Example 2]
A thin film transistor was manufactured in the same manner as in Example 1 except that oxygen vacancies were imparted to the oxide semiconductor layer using a reactive ion etching (RIE) method and the carrier concentration was controlled.
Note that the carrier concentration of the oxide semiconductor layer to which oxygen vacancies were imparted by the RIE method was 2.1 × 10 ¹⁶ cm ⁻³ . In the RIE method, pressure: 3.0 Pa, RF output: 300 W, atmosphere: Ar.

[Comparative example]
Thin film transistors were fabricated in the same manner as in Example 1 and Example 2 except that the carrier concentration control step was not performed.

[Evaluation results]
In the comparative example, the carrier concentration of the oxide semiconductor layer (IGZO) was low as the active layer, and sufficient on-current did not flow. The characteristics as a thin film transistor did not appear.
On the other hand, in Example 1 and Example 2, in the thin film transistor that had undergone the carrier concentration control step, an on-current flowed by applying a gate voltage. As a result, the on / off ratio was 1 × 10 ¹⁶ or more, and the characteristics as a thin film transistor could be confirmed.

DESCRIPTION OF SYMBOLS 1 ... Thin film transistor 2 ... Substrate 3 ... Gate electrode 4 ... Gate insulating layer 5 ... Oxide semiconductor layer 6 ... Source electrode 7 ... Drain electrode 8a, 8b ... Roll 9 ... Long resin substrate 10 ... Roll-to-roll system 15 ... Oxygen deficiency imparting region 20 ... Rolled thin film transistor C ... Channel region

Claims (6)

A method of manufacturing a thin film transistor having a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode,
An oxide semiconductor layer forming step of forming an oxide semiconductor layer in an atmosphere containing an oxidizing gas;
After the oxide semiconductor layer forming step, a carrier concentration control step of controlling oxygen concentration in at least a channel region of the oxide semiconductor layer to control a carrier concentration of the channel region;
A method for producing a thin film transistor, comprising: 2. The oxide semiconductor layer according to claim 1, wherein in the oxide semiconductor layer formation step, the oxide semiconductor layer is formed so that a carrier concentration of the oxide semiconductor layer is less than 1 × 10 ¹⁶ cm ⁻³ . A method for manufacturing a thin film transistor.   3. The method of manufacturing a thin film transistor according to claim 1, wherein the thin film transistor is manufactured by a roll-to-roll method. A gate insulating layer forming step of forming the gate insulating layer on the oxide semiconductor layer after the carrier concentration control step;
The gate insulating layer forming step is a step of forming the gate insulating layer on the oxide semiconductor layer so that oxygen vacancies are not generated in the oxide semiconductor layer. Item 4. The method for producing a thin film transistor according to any one of Items 3 to 3. A gate insulating layer forming step before the oxide semiconductor layer forming step or after the carrier concentration control step;
5. The method of manufacturing a thin film transistor according to claim 1, wherein the gate insulating layer forming step is a step of forming the gate insulating layer by a coating method.   A roll-shaped thin film transistor, comprising: a thin film transistor including a long resin substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, and a drain electrode.

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