JP4973322B2 - エポキシ樹脂組成物及び半導体装置 - Google Patents
エポキシ樹脂組成物及び半導体装置 Download PDFInfo
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- JP4973322B2 JP4973322B2 JP2007148681A JP2007148681A JP4973322B2 JP 4973322 B2 JP4973322 B2 JP 4973322B2 JP 2007148681 A JP2007148681 A JP 2007148681A JP 2007148681 A JP2007148681 A JP 2007148681A JP 4973322 B2 JP4973322 B2 JP 4973322B2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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Description
しかしながら、これら従来の方法では、半導体素子等を封止成形し、後硬化した後、半導体装置に半田ボールを搭載する工程、及び半田ボールを搭載した後、プリント配線基板に実装する前の半導体装置の乾燥工程における反りの変動という点では、充分に満足できるものではなかった。
[1] 半導体素子の封止に用いられ、エポキシ樹脂(A)、フェノール樹脂系硬化剤(B)、無機充填材(C)及び離型剤(D)を含むエポキシ樹脂組成物であって、前記フェノール樹脂系硬化剤(B)が下記一般式(1)で示されるフェノール樹脂を含み、前記無機充填材(C)が球状アルミナを含み、前記離型剤(D)がグリセリントリ脂肪酸エステルを含むことを特徴とするエポキシ樹脂組成物。
[3] 前記無機充填材(C)が、粒度分布の極大点を2μm以上、55μm以下に少なくとも2つ以上有し、かつ粒度分布の極大点を2μm未満に有しない球状アルミナ、及び、粒度分布の極大点を少なくとも2μm以下に有する球状シリカを含むことを特徴とする第[1]項又は第[2]項に記載のエポキシ樹脂組成物。
[4] 前記球状アルミナが、粒度分布の極大点が25μm以上、55μm以下である単分散の球状アルミナを前記球状アルミナ全体に対し50重量%以上、70重量%以下の割合で含むことを特徴とする第[1]項ないし第[3]項のいずれかに記載のエポキシ樹脂組成物。
[5] 前記球状アルミナが、エポキシ樹脂組成物全体に対し65重量%以上、85重量%以下の割合で含まれることを特徴とする第[1]項ないし第[4]項のいずれかに記載のエポキシ樹脂組成物。
[6] 前記グリセリントリ脂肪酸エステルがグリセリンと炭素原子数24〜36の飽和脂肪酸とのグリセリントリ脂肪酸エステルであることを特徴とする第[1]項ないし第[5]項のいずれかに記載のエポキシ樹脂組成物。
[7] 前記エポキシ樹脂(A)が結晶性エポキシ樹脂を含むことを特徴とする第[1]項ないし第[6]項のいずれかに記載のエポキシ樹脂組成物。
[8] 前記エポキシ樹脂(A)がビフェニル型エポキシ樹脂、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂から選ばれる少なくとも1種以上を含むことを特徴とする第[1]項ないし第[7]項のいずれかに記載のエポキシ樹脂組成物。
[9] 第[1]項ないし第[8]項のいずれかに記載のエポキシ樹脂組成物を用いて半導体素子を封止してなることを特徴とする半導体装置。
以下、本発明について詳細に説明する。
本発明の半導体装置の形態としては、片面封止型であれば特に限定されないが、例えば、クワッド・フラット・パッケージ(QFN)、テープ・キャリア・パッケージ(TCP)、ボール・グリッド・アレイ(BGA)、チップ・サイズ・パッケージ(CSP)等が挙げられる。
上記トランスファーモールドなどの成形方法で封止された半導体装置は、そのまま、或いは80℃から200℃程度の温度で、10分から10時間程度の時間をかけて完全硬化させた後、電子機器等に搭載される。
先ず、実施例及び比較例で用いた球状アルミナ及び球状シリカについて、下記にまとめて示した。
球状アルミナA:電気化学工業(株)製、DAW−45(粒度分布の極大点粒径45μmの単分散の球状アルミナ)
球状アルミナB:(株)マイクロン製、AW40−74(粒度分布の極大点粒径38μmの単分散の球状アルミナ)
球状アルミナC:(株)アドマテックス製、AO−520(粒度分布の極大点粒径20μmの単分散の球状アルミナ)
球状アルミナD:電気化学工業(株)製、DAW−05(粒度分布の極大点粒径5μmの単分散の球状アルミナ)
球状アルミナE:(株)アドマテックス製、AO−509(粒度分布の極大点粒径10μmの単分散の球状アルミナ)
溶融球状シリカA:(株)アドマテックス社製、SO−25R(粒度分布の極大点粒径0.5μmの単分散の溶融球状シリカ)
溶融球状シリカB:電気化学工業(株)社製、FB−105(粒径0.1μm、粒径10μm及び粒径50μmに粒度分布の極大点を有する溶融球状シリカ)
球状アルミナA42.92重量部、球状アルミナD31.08重量部、溶融球状シリカB7.00重量部を2分間ミキサーで常温混合した後、表面処理剤:γ−メルカプトプロピルトリメトキシシラン0.20重量部をミキサーに投入して更に2分間ミキサーで常温混合した。その直後にエポキシ樹脂1:ビフェニル型エポキシ樹脂(ジャパンエポキシレジン(株)製、YX4000K、融点105℃、エポキシ当量185)5.22重量部、フェノール樹脂系硬化剤1:式(1)で示されるフェノール樹脂(明和化成(株)製、MEH−7500、軟化点110℃、水酸基当量97)2.73重量部、トリフェニルホスフィン0.15重量部、イオン交換体:BiO(OH)0.74(NO3)0.15(HSiO3)0.11(東亜合成(株)社製、IXE−530S、平均粒径1.5μm)0.20重量部、グリセリントリ脂肪酸エステル1:グリセリントリモンタン酸エステル(クラリアントジャパン(株)製LICOLUB WE4、滴点85℃、酸価25mgKOH/g、平均粒径45μm、粒径106μm以上の粒子0.0重量%)0.20重量部、カーボンブラック0.30重量部、溶融球状シリカA10.00重量部をミキサーに投入して、更に2分間ミキサーで常温混合した。その後、表面温度が90℃と45℃の2本ロールを用いて約5分間加熱混練して、冷却後粉砕してエポキシ樹脂組成物とした。得られたエポキシ樹脂組成物を以下の方法で評価した。結果を表1に示す。
熱伝導率:低圧トランスファー成形機(住友重機械工業(株)製、STM−150A)を用い、金型温度175℃、注入圧力6.9MPa、硬化時間120秒の条件でエポキシ樹脂組成物を注入成形し、試験片(φ50mm、厚さ25mm)を作製し、175℃、2時間で後硬化した。得られた試験片を京都電子工業(株)製の迅速熱伝導率計QTM−500を用いて測定した。単位はW/m.K。
表1、表2、表3の配合に従い、実施例1と同様にしてエポキシ樹脂組成物を得、同様に評価した。これらの評価結果を表1、表2、表3に示す。
実施例1以外で用いた各原料を以下に示す。
エポキシ樹脂2:ビスフェノールA型エポキシ樹脂(ジャパンエポキシレジン(株)製、YL−6810、融点45℃、エポキシ当量172)
エポキシ樹脂3:ビフェニレン骨格を有するフェノールアラルキル型エポキシ樹脂(日本化薬(株)製、NC−3000P、軟化点59℃、エポキシ当量276)
フェノール樹脂系硬化剤2:フェノールノボラック樹脂(住友ベークライト(株)社製、PR−HF−3、軟化点80℃、水酸基当量105)
フェノール樹脂系硬化剤3:ビフェニレン骨格を有するフェノールアラルキル樹脂(明和化成(株)製、MEH−7851SS、軟化点64℃、水酸基当量203)
フェノール樹脂系硬化剤4:フェニレン骨格を有するフェノールアラルキル樹脂(三井化学(株)製、XLC−4L、軟化点62℃、水酸基当量168)
グリセリントリ脂肪酸エステル2:グリセリントリセロチン酸エステル(グリセリンとセロチン酸を混合し、減圧下、180℃の条件で脱水縮合させ、得られた生成物を粉砕することによって得た。滴点80℃、酸価20mgKOH/g、平均粒径45μm、粒径106μm以上の粒子0.0重量%。)
カルナバワックス
一方、フェノール樹脂系硬化剤(B)として一般式(1)で示されるフェノール樹脂を用いず、かつ離型剤(D)としてグリセリントリ脂肪酸エステルを用いていない比較例1においては、片面封止型の半導体装置における後硬化後、IRリフロー後、乾燥後の各工程後における反りの変動が大きい結果となった。また、離型剤(D)としてグリセリントリ脂肪酸エステルは用いてはいるものの、フェノール樹脂系硬化剤(B)として一般式(1)で示されるフェノール樹脂を用いていない比較例2〜比較例7においても、片面封止型の半導体装置における後硬化後、IRリフロー後、乾燥後の各工程後における反りの変動が大きい結果となった。この点は、無機充填材を93重量%と高充填化した比較例7においてさえ、反りの大きさ自体を小さくすることはできても、反りの変動は抑えることができない結果となった。逆に、フェノール樹脂系硬化剤(B)として一般式(1)で示されるフェノール樹脂は用いてはいるものの、離型剤(D)としてグリセリントリ脂肪酸エステルを用いていない比較例8及び比較例9においても、片面封止型の半導体装置における後硬化後、IRリフロー後、乾燥後の各工程後における反りの変動が大きい結果となった。これらの結果から、一般式(1)で示されるフェノール樹脂とグリセリントリ脂肪酸エステルとを併用することにより、片面封止型の半導体装置がプリント配線基板に実装されるまでに晒される各工程における反りの変動を顕著に抑制するという相乗効果が得られることが判った。
2 ダイボンド材硬化体
3 金線
4 半導体封止用エポキシ樹脂組成物の硬化体
5 レジスト
6 基板
7 半田ボール
Claims (7)
- 半導体素子の封止に用いられ、エポキシ樹脂(A)、フェノール樹脂系硬化剤(B)、無機充填材(C)及び離型剤(D)を含むエポキシ樹脂組成物であって、
前記フェノール樹脂系硬化剤(B)が下記一般式(1)で示されるフェノール樹脂を含み
、前記無機充填材(C)が、前記エポキシ樹脂組成物全体に対し89重量%以上、93重量%以下の割合で含まれ、かつ球状アルミナを前記エポキシ樹脂組成物全体に対し65重量%以上、77重量%以下の割合で含み、
前記離型剤(D)がグリセリントリ脂肪酸エステルを含む
ことを特徴とするエポキシ樹脂組成物。
(ただし、上記一般式(1)において、nは0〜10の整数である。) - 前記無機充填材(C)が、粒度分布の極大点を2μm以上、55μm以下に少なくとも2つ以上有し、かつ粒度分布の極大点を2μm未満に有しない球状アルミナ、及び、粒度分布の極大点を少なくとも2μm以下に有する球状シリカを含むことを特徴とする請求項1に記載のエポキシ樹脂組成物。
- 前記球状アルミナが、粒度分布の極大点が25μm以上、55μm以下である単分散の球状アルミナを前記球状アルミナ全体に対し50重量%以上、70重量%以下の割合で含むことを特徴とする請求項1または請求項2のいずれかに記載のエポキシ樹脂組成物。
- 前記グリセリントリ脂肪酸エステルがグリセリンと炭素原子数24〜36の飽和脂肪酸とのグリセリントリ脂肪酸エステルであることを特徴とする請求項1ないし請求項3のいずれかに記載のエポキシ樹脂組成物。
- 前記エポキシ樹脂(A)が結晶性エポキシ樹脂を含むことを特徴とする請求項1ないし請求項4のいずれかに記載のエポキシ樹脂組成物。
- 前記エポキシ樹脂(A)がビフェニル型エポキシ樹脂、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂から選ばれる少なくとも1種以上を含むことを特徴とする請求項1ないし請求項5のいずれかに記載のエポキシ樹脂組成物。
- 請求項1ないし請求項6のいずれかに記載のエポキシ樹脂組成物を用いて半導体素子を封止してなることを特徴とする半導体装置。
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