JP4955997B2 - Circuit module and method of manufacturing circuit module - Google Patents

Circuit module and method of manufacturing circuit module Download PDF

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JP4955997B2
JP4955997B2 JP2005374218A JP2005374218A JP4955997B2 JP 4955997 B2 JP4955997 B2 JP 4955997B2 JP 2005374218 A JP2005374218 A JP 2005374218A JP 2005374218 A JP2005374218 A JP 2005374218A JP 4955997 B2 JP4955997 B2 JP 4955997B2
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circuit
solder
wiring board
circuit element
passive component
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JP2007180124A (en
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誠 村井
良輔 臼井
恭典 井上
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Sanyo Electric Co Ltd
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Description

本発明は、複数の回路素子が組み込まれたマルチチップモジュールとその製造方法に関する。   The present invention relates to a multichip module in which a plurality of circuit elements are incorporated and a method for manufacturing the same.

携帯電話、ＰＤＡ、ＤＶＣ、ＤＳＣといったポータブルエレクトロニクス機器の高機能化が加速するなか、こうした製品が市場で受け入れられるためには小型・軽量化が必須となっており、その実現のために高集積のシステムＬＳＩが求められている。一方、これらのエレクトロニクス機器に対しては、より使い易く便利なものが求められており、機器に使用されるＬＳＩに対し、高機能化、高性能化が要求されている。このため、ＬＳＩチップの高集積化にともないそのＩ／Ｏ数が増大する一方でパッケージ自体の小型化要求も強く、これらを両立させるために、半導体部品の高密度な基板実装に適合した半導体パッケージの開発が強く求められている。   As portable electronic devices such as mobile phones, PDAs, DVCs, and DSCs are accelerating their functions, miniaturization and weight reduction are essential for their acceptance in the market. There is a need for a system LSI. On the other hand, these electronic devices are required to be easier to use and convenient, and higher functionality and higher performance are required for LSIs used in the devices. For this reason, as the number of I / Os increases with higher integration of LSI chips, there is a strong demand for miniaturization of the package itself. Development is strongly demanded.

こうした高密度化の要請に対応するパッケージ技術として、複数の回路素子が積層された多段スタック構造を採用したマルチチップモジュール（ＭＣＭ）が知られている（特許文献１、特許文献２参照）。
特開２００４−２００６６５号公報 特開２００４−９５８１５号公報 As a package technology that meets such a demand for higher density, a multi-chip module (MCM) employing a multi-stage stack structure in which a plurality of circuit elements are stacked is known (see Patent Documents 1 and 2).
JP 2004-200355 A JP 2004-95815 A

従来のＭＣＭでは、モジュール内部に受動部品をはんだ接合によって搭載すると、ＭＣＭを実装対象にはんだ付けする際に、受動部品と配線基板とを接合するはんだが溶融し、確実な電気的接続が保証されなくなるという問題があった。   In the conventional MCM, when passive components are mounted inside the module by soldering, when soldering the MCM to the mounting target, the solder that joins the passive components and the wiring board melts, ensuring a reliable electrical connection. There was a problem of disappearing.

このため、受動部品をＭＣＭに内蔵させる場合には、特許文献１のように、受動部品と配線基板との接続にワイヤボンディングを用いたり、特許文献２のように受動部品の接合用のはんだの表面に、ショート防止用の保護膜を設けていた。しかし、ワイヤボンディングは、はんだ接続と比較して処理に必要な時間が長く、また受動部品へ金めっき等の前処理が必要である。また、ショート防止用の保護膜を設ける場合には、工程が増えてしまい、コストが増加していた。   For this reason, when the passive component is built in the MCM, wire bonding is used to connect the passive component and the wiring board as in Patent Document 1, or solder for bonding the passive component is used as in Patent Document 2. A protective film for preventing short circuit was provided on the surface. However, wire bonding requires a longer time for processing than solder connection and requires pretreatment such as gold plating on passive components. Further, when a protective film for preventing a short circuit is provided, the number of processes is increased and the cost is increased.

本発明はこうした課題に鑑みてなされたものであり、その目的は、受動部品を内蔵した回路モジュールを低コストで実現する技術の提供にある。   The present invention has been made in view of these problems, and an object thereof is to provide a technique for realizing a circuit module incorporating a passive component at a low cost.

本発明のある態様は、回路モジュールである。当該回路モジュールは、第１の配線基板と、第１の配線基板の下面に設けられ、外部の実装対象との電気的接続に用いられる第１のはんだと、第１の配線基板に実装された第１の回路素子と、第１の回路素子の上方に設けられ、第１の配線基板と電気的に接続された第２の配線基板と、第２の配線基板に実装された第２の回路素子および受動部品と、第１の回路素子、第２の回路素子および受動部品を封止する封止樹脂層と、を備え、受動部品が第２の配線基板に第２のはんだによって接合され、第２のはんだの融点が第１のはんだの融点より高いことを特徴とする。この態様によれば、従来のように受動部品をボンディングワイヤで接続したり、受動部品を接合するためのはんだの表面に保護膜を設けるなどの処置を施す必要がなくなるため、回路モジュールの低コスト化が可能になる。   One embodiment of the present invention is a circuit module. The circuit module is mounted on the first wiring board, the first solder provided on the lower surface of the first wiring board, and used for electrical connection with an external mounting target, and the first wiring board. A first circuit element; a second wiring board provided above the first circuit element and electrically connected to the first wiring board; and a second circuit mounted on the second wiring board An element and a passive component, and a first circuit element, a sealing resin layer that seals the second circuit element and the passive component, and the passive component is bonded to the second wiring board by the second solder, The melting point of the second solder is higher than the melting point of the first solder. According to this aspect, it is not necessary to perform a treatment such as connecting a passive component with a bonding wire or providing a protective film on the surface of the solder for joining the passive component as in the prior art. Can be realized.

上記態様において、第２の配線基板が第２のはんだを溶融させたときに変形しない程度の耐熱性を有してもよい。この態様によれば、第２のはんだをリフローにより接続する際に、第２の配線基板が熱によって変形、変質することが抑制される。このような配線基板は、より具体的には銅で形成されていることが好適である。   In the above aspect, the second wiring board may have heat resistance enough to prevent deformation when the second solder is melted. According to this aspect, when the second solder is connected by reflow, the second wiring board is suppressed from being deformed or altered by heat. More specifically, such a wiring board is preferably formed of copper.

本発明の他の態様は、回路モジュールの製造方法である。当該回路モジュールの製造方法は、第１の配線基板に第１の回路素子を実装する工程と、第２の配線基板に第２の回路素子および受動部品が実装され、第２の回路素子および受動部品が封止樹脂によって封止された回路装置であって、受動部品が第２の配線基板にはんだによって接合された回路装置を第１の回路素子の上方に実装する工程と、第１の回路素子および回路装置を封止樹脂で一体的に封止する工程と、受動部品の接合に用いられるはんだよりも融点が低いはんだで構成されたはんだボールを第１の配線基板の下面に接合する工程と、を備えることを特徴とする。この態様によれば、従来のように受動部品をボンディングワイヤで接続したり、受動部品を接合するためのはんだの表面に保護膜を設けるなどの処置を施す必要がなくなるため、回路モジュールの低コスト化が可能になる。   Another aspect of the present invention is a method for manufacturing a circuit module. The circuit module manufacturing method includes a step of mounting a first circuit element on a first wiring board, a second circuit element and a passive component mounted on the second wiring board, and the second circuit element and the passive component. Mounting a circuit device in which a component is sealed with a sealing resin, wherein a passive component is joined to a second wiring board by solder, over the first circuit element; A step of integrally sealing an element and a circuit device with a sealing resin, and a step of bonding a solder ball made of solder having a melting point lower than that of solder used for bonding passive components to the lower surface of the first wiring board And. According to this aspect, it is not necessary to perform a treatment such as connecting a passive component with a bonding wire or providing a protective film on the surface of the solder for joining the passive component as in the prior art. Can be realized.

上記態様において、第２の配線基板として、受動部品の接合に用いられるはんだを溶融させたときに変形しない程度の耐熱性を有する材料を用いてもよい。この態様によれば、受動部品をリフローによりはんだ付けする際に、第２の回路基板が変形、変質することが抑制される。   In the above aspect, the second wiring board may be made of a material having a heat resistance that does not deform when the solder used for joining the passive components is melted. According to this aspect, when the passive component is soldered by reflow, the second circuit board is suppressed from being deformed or altered.

本発明の装置によれば、受動部品を内蔵した回路モジュールを低コストで実現することができる。   According to the apparatus of the present invention, a circuit module incorporating a passive component can be realized at low cost.

本発明の実施の形態を図面を参照して説明する。   Embodiments of the present invention will be described with reference to the drawings.

図１は、実施形態に係る回路モジュール２００の構造を示す断面図である。回路モジュール２００は複数の回路素子が組み込まれたＭＣＭである。回路モジュール２００は、多層基板２１０、回路素子２２０、封止樹脂層２３０、および回路素子３０を内包する回路装置１０、封止樹脂層２４０を含む。   FIG. 1 is a cross-sectional view illustrating a structure of a circuit module 200 according to the embodiment. The circuit module 200 is an MCM in which a plurality of circuit elements are incorporated. The circuit module 200 includes a multilayer substrate 210, a circuit element 220, a sealing resin layer 230, a circuit device 10 including the circuit element 30, and a sealing resin layer 240.

多層基板２１０は、層間絶縁膜２１２を介して、上面および下面にそれぞれ配線層２１４および配線層２１６を有する。配線層２１４と配線層２１６とは、層間絶縁膜２１２を貫通するビアプラグ２１８によって電気的に接続されている。層間絶縁膜２１２は、たとえばエポキシ樹脂によって形成され、配線層２１４、配線層２１６およびビアプラグ２１８は、たとえば銅によって形成される。多層基板２１０の下面には、はんだボール２１１がアレイ状に複数接合されている。はんだボール２１１のはんだとして、Ｓｎ−３Ａｇ−０．５Ｃｕ（融点：２１７℃）、Ｓｎ−１．５Ａｇ−０．５Ｃｕ（融点：２１７℃）などを用いることができる。   The multilayer substrate 210 has a wiring layer 214 and a wiring layer 216 on the upper surface and the lower surface through the interlayer insulating film 212, respectively. The wiring layer 214 and the wiring layer 216 are electrically connected by a via plug 218 that penetrates the interlayer insulating film 212. Interlayer insulating film 212 is formed of, for example, epoxy resin, and wiring layer 214, wiring layer 216, and via plug 218 are formed of, for example, copper. A plurality of solder balls 211 are joined to the lower surface of the multilayer substrate 210 in an array. As the solder of the solder balls 211, Sn-3Ag-0.5Cu (melting point: 217 ° C), Sn-1.5Ag-0.5Cu (melting point: 217 ° C), or the like can be used.

回路素子２２０は、たとえば、IC(集積回路）、LSI(大規模集積回路)などの半導体チップである。回路素子２２０は、接着剤などにより多層基板２１０の上に搭載され、回路素子２２０の上面に設けられた電極端子と、配線層２１４とが金線などのワイヤ２１９によりワイヤボンディングされている。   The circuit element 220 is, for example, a semiconductor chip such as an IC (integrated circuit) or an LSI (large scale integrated circuit). The circuit element 220 is mounted on the multilayer substrate 210 with an adhesive or the like, and the electrode terminal provided on the upper surface of the circuit element 220 and the wiring layer 214 are wire-bonded with a wire 219 such as a gold wire.

封止樹脂層２３０は、回路素子２２０を封止する絶縁樹脂である。封止樹脂層２３０によって回路素子２２０が外界からの影響から保護される。封止樹脂層２３０は、多層基板２１０を部分的に被覆している。配線層２１４のうち、封止樹脂層２３０によって被覆されていない領域に、回路装置１０を電気的に接続するための電極端子が形成されている。   The sealing resin layer 230 is an insulating resin that seals the circuit element 220. The circuit element 220 is protected from the influence from the outside by the sealing resin layer 230. The sealing resin layer 230 partially covers the multilayer substrate 210. An electrode terminal for electrically connecting the circuit device 10 is formed in a region of the wiring layer 214 that is not covered with the sealing resin layer 230.

封止樹脂層２３０の上にアンダーフィル材２３２を介して回路装置１０が搭載されている。ここで、回路装置１０の構造について説明する。図２および図３は、それぞれ回路装置１０の構造を示す上面図および下面図である。図４は、回路装置１０の図２のＡ−Ａ’線上の断面図である。回路装置１０は、配線層２０、回路素子３０、受動部品４０および封止樹脂層５０を備える。   The circuit device 10 is mounted on the sealing resin layer 230 via an underfill material 232. Here, the structure of the circuit device 10 will be described. 2 and 3 are a top view and a bottom view showing the structure of the circuit device 10, respectively. 4 is a cross-sectional view of the circuit device 10 taken along the line A-A ′ of FIG. 2. The circuit device 10 includes a wiring layer 20, a circuit element 30, a passive component 40, and a sealing resin layer 50.

配線層２０は、導電部材で形成された所定の配線パターンを有する。配線層２０は、銅などの単一の金属によって形成されていてもよいが、複数の金属層によって形成されていてもよい。たとえば、銅からなる金属層の上にＮｉ膜を介してＡｕ膜を形成することにより、ワイヤボンディング時の接続信頼性を向上させることができる。配線層２０は、後述するはんだ３４およびはんだ３６をリフロー工程において溶融させたときに変形しない程度の耐熱性を備えることにより、配線層２０がリフロー工程の熱によって変形や変質することが抑制される。   The wiring layer 20 has a predetermined wiring pattern formed of a conductive member. The wiring layer 20 may be formed of a single metal such as copper, but may be formed of a plurality of metal layers. For example, by forming an Au film on a metal layer made of copper via a Ni film, connection reliability at the time of wire bonding can be improved. The wiring layer 20 is provided with a heat resistance that does not deform when the solder 34 and the solder 36 described later are melted in the reflow process, so that the wiring layer 20 is prevented from being deformed or altered by the heat of the reflow process. .

回路素子３０は、たとえば、IC(集積回路）、LSI(大規模集積回路)などの半導体チップである。回路素子３０は、電極面を上にした状態で、配線層２０と略同一な平面内に設けられた金属基板３２の上にはんだ３４によって接続されている。金属基板３２は、配線層２０と同様に、銅などの単一の金属によって形成されていてもよいが、複数の金属層によって形成されていてもよい。金属基板３２の層構造と配線層２０の層構造とを等しくすることにより、回路装置１０の製造プロセスを簡便にすることができる。回路素子３０の電極端子と配線層２０とは、金線などのワイヤ１５０によってワイヤボンディングされている。配線層２０および金属基板３２を銅などの金属とすることにより、回路素子３０および受動部品４０を、それぞれはんだ３４およびはんだ３６を用いてリフローにより接続する際に、配線層２０および金属基板３２が変形、変質することが抑制される。   The circuit element 30 is, for example, a semiconductor chip such as an IC (integrated circuit) or an LSI (large scale integrated circuit). The circuit element 30 is connected by a solder 34 on a metal substrate 32 provided in a plane substantially the same as the wiring layer 20 with the electrode surface facing upward. Similarly to the wiring layer 20, the metal substrate 32 may be formed of a single metal such as copper, but may be formed of a plurality of metal layers. By making the layer structure of the metal substrate 32 and the layer structure of the wiring layer 20 equal, the manufacturing process of the circuit device 10 can be simplified. The electrode terminal of the circuit element 30 and the wiring layer 20 are wire-bonded with a wire 150 such as a gold wire. By using a metal such as copper for the wiring layer 20 and the metal substrate 32, when the circuit element 30 and the passive component 40 are connected by reflow using the solder 34 and the solder 36, respectively, the wiring layer 20 and the metal substrate 32 are Deformation and alteration are suppressed.

受動部品４０は、コンデンサ、抵抗、コイル、インダクタなどの電子部品である。受動部品４０は、配線層２０の上にはんだ３６によって、配線層２０と電気的に接続されている。なお、回路モジュール２００を実装する場合に、はんだボール２１１を溶融する必要がある。このとき、回路モジュール２００内のはんだ３４およびはんだ３６がともに溶融すると、電気的な接続信頼性が低下する可能性がある。このため、はんだ３４およびはんだ３６の融点は、はんだボール２１１の融点より高いことが好ましい。このような観点から、はんだ３４およびはんだ３６の材料は、たとえば、Ｓｎ−０．７Ｃｕ（融点：２２７℃）、Ｓｎ（融点：２３２℃）、Ｓｎ−Ａｇ（融点：２２１℃）、Ｐｂ９５％−Ｓｎ５％（融点：３００℃）である。   The passive component 40 is an electronic component such as a capacitor, a resistor, a coil, or an inductor. The passive component 40 is electrically connected to the wiring layer 20 by solder 36 on the wiring layer 20. When mounting the circuit module 200, it is necessary to melt the solder balls 211. At this time, if both the solder 34 and the solder 36 in the circuit module 200 are melted, the electrical connection reliability may be lowered. For this reason, the melting points of the solder 34 and the solder 36 are preferably higher than the melting point of the solder balls 211. From such a viewpoint, the material of the solder 34 and the solder 36 is, for example, Sn-0.7Cu (melting point: 227 ° C.), Sn (melting point: 232 ° C.), Sn—Ag (melting point: 221 ° C.), Pb 95% − Sn is 5% (melting point: 300 ° C.).

封止樹脂層５０は、回路装置１０の周縁部の配線層２０が露出するように形成されている。これにより、配線層２０の一部が封止樹脂層５０の周囲に突出した状態となり、配線層２０のうち、封止樹脂層５０の周囲に突出した部分が電極２２となっている。電極２２の上面は、外部の電極端子と電気的に接続するための接続用端子２４として用いられる。また、電極２２の下面は、電極２２の上面と等電位であるため、回路素子３０および／または受動部品４０の動作を試験するためのプローブ等を接続するための試験用端子２６として用いることができる。このように、試験用端子２６を接続用端子２４の裏面に設けることにより、試験用端子２６を設けることによる回路装置１０の実装面積の増大が解消されるため、回路装置１０を組み込む回路モジュールをより小型化することができる。また、試験用端子２６を用いて回路装置１０の動作確認を行うことにより、ＫＧＤが保証された回路装置１０を市場に供給することができる。   The sealing resin layer 50 is formed so that the wiring layer 20 at the peripheral edge of the circuit device 10 is exposed. As a result, a part of the wiring layer 20 protrudes around the sealing resin layer 50, and a portion of the wiring layer 20 that protrudes around the sealing resin layer 50 is the electrode 22. The upper surface of the electrode 22 is used as a connection terminal 24 for electrical connection with an external electrode terminal. Further, since the lower surface of the electrode 22 is equipotential with the upper surface of the electrode 22, it is used as a test terminal 26 for connecting a probe or the like for testing the operation of the circuit element 30 and / or the passive component 40. it can. Thus, by providing the test terminal 26 on the back surface of the connection terminal 24, an increase in the mounting area of the circuit device 10 due to the provision of the test terminal 26 is eliminated. It can be made smaller. Further, by confirming the operation of the circuit device 10 using the test terminal 26, the circuit device 10 with a guaranteed KGD can be supplied to the market.

また、動作試験済みの回路装置１０を回路モジュール２００に組み込むことにより、一部の回路素子の不良によって回路モジュール全体が不良品となることが抑制されるため、回路モジュールの歩留まりが向上する。   Further, by incorporating the circuit device 10 that has been subjected to the operation test into the circuit module 200, it is possible to suppress the entire circuit module from being defective due to a defect in a part of the circuit elements, thereby improving the yield of the circuit module.

また、電極２２は封止樹脂層５０の下方において封止樹脂層５０の周囲に突出している。このため、ワイヤボンディングによって接続用端子２４に接続されるワイヤのループの高さを封止樹脂層５０の厚みＨ以下にすることにより、ワイヤのループが回路装置１０の厚みに影響することがなくなるので、回路装置１０の低背化を実現することができる。   Further, the electrode 22 protrudes around the sealing resin layer 50 below the sealing resin layer 50. For this reason, by making the height of the loop of the wire connected to the connection terminal 24 by wire bonding equal to or less than the thickness H of the sealing resin layer 50, the loop of the wire does not affect the thickness of the circuit device 10. As a result, a reduction in the height of the circuit device 10 can be realized.

また、封止樹脂層５０は、配線層２０および金属基板３２の隙間から配線層２０および金属基板３２の下面側へ突出した突起部５２を有する。   Further, the sealing resin layer 50 has a protrusion 52 that protrudes from the gap between the wiring layer 20 and the metal substrate 32 to the lower surface side of the wiring layer 20 and the metal substrate 32.

突起部５２によって得られる効果としては下記のような事項が挙げられる。   The effects obtained by the protrusion 52 include the following items.

(1)回路装置１０を台の上に置いたときに、回路装置１０が突起部５２によって支持される。このため、製造過程で回路装置１０を搬送等する際に、台との接触により試験用端子２６が損傷することが抑制される。これにより、試験用端子２６の状態が良好に保たれるため、試験用端子２６を用いた回路装置１０の動作試験を正確に行うことができる。   (1) When the circuit device 10 is placed on a table, the circuit device 10 is supported by the protrusions 52. For this reason, when the circuit device 10 is transported in the manufacturing process, the test terminal 26 is prevented from being damaged due to contact with the table. Thereby, since the state of the test terminal 26 is maintained in a good state, the operation test of the circuit device 10 using the test terminal 26 can be accurately performed.

(2)回路装置１０を回路モジュールに実装する場合に、絶縁物である突起部５２によって配線層２０および電極２２と実装対象との間に適度な隙間が生じるため、回路装置１０の配線層２０および電極２２が回路モジュール内の他の回路と接触することが抑制される。   (2) When the circuit device 10 is mounted on a circuit module, an appropriate gap is generated between the wiring layer 20 and the electrode 22 and the mounting target by the protrusion 52 that is an insulator. In addition, the electrode 22 is prevented from coming into contact with other circuits in the circuit module.

(3)回路装置１０を他の回路装置や樹脂基板等に実装する場合に、突起部５２によって表面摩擦が増大し、滑りにくくなるため、回路装置１０の位置決めを容易に行うことができる。   (3) When the circuit device 10 is mounted on another circuit device, a resin substrate, or the like, the surface friction is increased by the protrusions 52 and it is difficult to slip, so that the circuit device 10 can be easily positioned.

(4)回路装置１０の実装時に突起部５２がスペーサーとして機能することによって、回路装置１０と実装対象との間に適度な隙間が生じる。これにより、接着剤を用いて回路装置１０を実装する際に回路装置１０に加わる力が均一化されるため、接着剤が局所的に押し出されて回路装置１０が傾くことが抑制される。   (4) Since the protrusion 52 functions as a spacer when the circuit device 10 is mounted, an appropriate gap is generated between the circuit device 10 and the mounting target. Thereby, since the force applied to the circuit device 10 when the circuit device 10 is mounted using the adhesive is made uniform, the adhesive is locally pushed out and the circuit device 10 is prevented from being inclined.

(5)絶縁物である突起部５２が障害となって配線層２０間でマイグレーションが発生することが抑制される。   (5) The occurrence of migration between the wiring layers 20 due to the protrusion 52 being an insulator being inhibited is suppressed.

図１の説明に戻り、回路装置１０の接続用端子２４は、封止樹脂層２３０によって被覆されていない領域に設けられた電極端子と金線などのワイヤ２３４によってワイヤボンディングされている。多層基板２１０において、回路装置１０に必要な配線を再配線することにより、回路素子２２０との接続をエリアアレイ型で行うことができるため、従来のようにリードフレームに実装した場合と比較して、実装面積を小さくすることができる。   Returning to the description of FIG. 1, the connection terminal 24 of the circuit device 10 is wire-bonded with an electrode terminal provided in a region not covered with the sealing resin layer 230 and a wire 234 such as a gold wire. In the multilayer substrate 210, by rewiring the wiring necessary for the circuit device 10, the connection with the circuit element 220 can be performed in an area array type, so that compared with the case where it is mounted on a lead frame as in the past. The mounting area can be reduced.

封止樹脂層２３０および回路装置１０は、封止樹脂層２４０によって全体が被覆されている。封止樹脂層２４０によって、回路装置１０および回路素子２２０がより確実に外界の影響から保護される。   The sealing resin layer 230 and the circuit device 10 are entirely covered with the sealing resin layer 240. By the sealing resin layer 240, the circuit device 10 and the circuit element 220 are more reliably protected from the influence of the outside world.

回路装置１０の接続用端子２４は、上述したように、封止樹脂層２３０によって被覆されていない領域に設けられた電極端子と金線などのワイヤ２３４によってワイヤボンディングされている。多層基板２１０において、回路装置１０に必要な配線を再配線することにより、回路素子２２０との接続をエリアアレイ型で行うことができるため、従来のようにリードフレームに実装した場合と比較して、実装面積を小さくすることができる。   As described above, the connection terminal 24 of the circuit device 10 is wire-bonded with the electrode terminal provided in the region not covered with the sealing resin layer 230 and the wire 234 such as a gold wire. In the multilayer substrate 210, by rewiring the wiring necessary for the circuit device 10, the connection with the circuit element 220 can be performed in an area array type, so that compared with the case where it is mounted on a lead frame as in the past. The mounting area can be reduced.

封止樹脂層２３０および回路装置１０は、封止樹脂層２４０によって全体が被覆されている。封止樹脂層２４０によって、回路装置１０および回路素子２２０がより確実に外界の影響から保護される。   The sealing resin layer 230 and the circuit device 10 are entirely covered with the sealing resin layer 240. By the sealing resin layer 240, the circuit device 10 and the circuit element 220 are more reliably protected from the influence of the outside world.

なお、回路モジュール２００の用途は、特に限定されないが、回路素子２２０をフラッシュメモリとし、回路素子３０をマイクロプロセッサなどのLSIとし、回路素子２２０と回路素子３０とを積層することによって、回路素子３０の実装面積を大幅に低減し、フラッシュメモリ内蔵マイコンを小型化することができる。   The application of the circuit module 200 is not particularly limited, but the circuit element 30 is formed by stacking the circuit element 220 and the circuit element 30 by using the circuit element 220 as a flash memory, the circuit element 30 as an LSI such as a microprocessor, and the like. The mounting area of the flash memory can be greatly reduced, and the microcomputer with built-in flash memory can be downsized.

（回路モジュールの製造方法）
まず、図５および図６を用いて、回路装置１０の製造工程について説明する。まず、図５（Ａ）に示すように、銅板１００の上に、リソグラフィ法により配線層のパターンに合わせてレジスト１１０を選択的に形成する。銅板１００の膜厚はたとえば１２５μｍである。具体的には、ラミネーター装置を用いて銅板１００に膜厚２０μｍのレジスト膜を貼り付け、配線層のパターンを有するフォトマスクを用いてＵＶ露光した後、Ｎａ２ＣＯ３溶液を用いて現像し、未露光領域のレジストを除去することによって、銅板１００の上にレジスト１１０が選択的に形成される。なお、レジスト１１０との密着性向上のために、レジスト膜のラミネート前に、銅板１００の表面に研磨、洗浄等の前処理を必要に応じて施すことが望ましい。 (Circuit module manufacturing method)
First, the manufacturing process of the circuit device 10 will be described with reference to FIGS. First, as shown in FIG. 5A, a resist 110 is selectively formed on a copper plate 100 in accordance with a wiring layer pattern by a lithography method. The film thickness of the copper plate 100 is, for example, 125 μm. Specifically, a 20 μm-thick resist film is attached to the copper plate 100 using a laminator apparatus, UV exposure is performed using a photomask having a wiring layer pattern, and development is performed using a Na 2 CO 3 solution. The resist 110 is selectively formed on the copper plate 100 by removing the resist in the unexposed areas. In order to improve the adhesion with the resist 110, it is desirable to perform pretreatment such as polishing and washing on the surface of the copper plate 100 as needed before laminating the resist film.

次に、図５（Ｂ）に示すように、塩化第二鉄溶液を用いて、銅板１００の露出部分をハーフエッチングし、所定の配線パターン１０２に該当しない領域に溝１２０を形成した後、レジストをＮａＯＨ溶液などの剥離剤を用いて剥離する。溝１２０の深さは、たとえば５０μｍである。   Next, as shown in FIG. 5B, the exposed portion of the copper plate 100 is half-etched using a ferric chloride solution to form a groove 120 in a region not corresponding to the predetermined wiring pattern 102, and then a resist Is removed using a release agent such as NaOH solution. The depth of the groove 120 is, for example, 50 μm.

次に、図５（Ｃ）に示すように、リソグラフィ法により、溝１２０の上にレジスト１１２を選択的に形成する。レジスト１１２の形成方法は、レジスト１１０と同様である。   Next, as shown in FIG. 5C, a resist 112 is selectively formed on the groove 120 by a lithography method. The formation method of the resist 112 is the same as that of the resist 110.

次に、図５（Ｄ）に示すように、電解めっき法または無電解めっき法により、銅板１００の表面全体に膜厚１０μｍのＮｉ膜を形成した後、Ｎｉ膜の上に膜厚０．０５μｍのＡｕ膜を形成した後、レジスト１１２を除去する。これにより、配線パターン１０２の表面にＡｕ／Ｎｉ膜からなるめっき膜１３０が形成される。   Next, as shown in FIG. 5D, an Ni film having a thickness of 10 μm is formed on the entire surface of the copper plate 100 by an electrolytic plating method or an electroless plating method, and then a thickness of 0.05 μm is formed on the Ni film. After the Au film is formed, the resist 112 is removed. As a result, a plating film 130 made of an Au / Ni film is formed on the surface of the wiring pattern 102.

次に、図６（Ａ）に示すように、回路素子３０および受動部品４０を搭載する領域にはんだ３４およびはんだ３６をそれぞれを印刷した後、回路素子３０および受動部品４０を所定位置に搭載した状態でリフロー処理を行う。これにより、回路素子３０および受動部品４０が銅板１００の上に固定される。このとき、銅板１００およびめっき膜１３０は耐熱性を有するため、リフロー処理を施しても変形、変質等が生じにくくなっている。   Next, as shown in FIG. 6A, after the solder 34 and the solder 36 are printed on the area where the circuit element 30 and the passive component 40 are mounted, the circuit element 30 and the passive component 40 are mounted at predetermined positions. Reflow processing is performed in the state. Thereby, the circuit element 30 and the passive component 40 are fixed on the copper plate 100. At this time, since the copper plate 100 and the plating film 130 have heat resistance, deformation, alteration, and the like are less likely to occur even when the reflow process is performed.

次に、図６（Ｂ）に示すように、回路素子３０の電極端子とめっき膜１３０の所定位置とをワイヤボンディングによって電気的に接続する。ワイヤボンディングに用いるワイヤ１５０として金線を用いることにより、最表面がＡｕで構成されためっき膜１３０との接続信頼性を向上させることができる。   Next, as shown in FIG. 6B, the electrode terminal of the circuit element 30 and a predetermined position of the plating film 130 are electrically connected by wire bonding. By using a gold wire as the wire 150 used for wire bonding, the connection reliability with the plating film 130 whose outermost surface is made of Au can be improved.

次に、図６（Ｃ）に示すように、トランスファーモールド法により、エポキシ樹脂を用いて回路素子３０および受動部品４０を封止する封止樹脂層５０を形成する。このとき、封止樹脂層５０は、銅板１００を部分的に被覆し、銅板１００の周縁部のめっき膜１３０は露出した状態とする。これにより、露出しためっき膜１３０を外部の電極端子と接続するための接続用端子２４として用いることができる。また、銅板１００に形成された溝１２０に封止樹脂層５０が埋め込まれる。   Next, as shown in FIG. 6C, a sealing resin layer 50 for sealing the circuit element 30 and the passive component 40 is formed using an epoxy resin by a transfer molding method. At this time, the sealing resin layer 50 partially covers the copper plate 100 and the plating film 130 at the peripheral portion of the copper plate 100 is exposed. Thereby, the exposed plating film 130 can be used as the connection terminal 24 for connecting to an external electrode terminal. Further, the sealing resin layer 50 is embedded in the groove 120 formed in the copper plate 100.

次に、図６（Ｄ）に示すように、銅板１００の下面を塩化第二鉄溶液を用いてハーフエッチングし、銅板１００の厚さを２０μｍにまで薄膜化するとともに、溝１２０に埋め込まれた封止樹脂層５０を露出させることによって、突起部５２を形成する。薄膜化された銅板１００およびめっき膜１３０は、図４に示された配線層２０に相当する。封止樹脂層５０により被覆されず露出した部分は、図４に示したとおり、上面が接続用端子２４として使用され、下面が試験用端子２６として使用される電極２２となる。   Next, as shown in FIG. 6D, the lower surface of the copper plate 100 was half-etched using a ferric chloride solution to reduce the thickness of the copper plate 100 to 20 μm and embedded in the groove 120. The protruding portion 52 is formed by exposing the sealing resin layer 50. The thinned copper plate 100 and plated film 130 correspond to the wiring layer 20 shown in FIG. As shown in FIG. 4, the exposed portion that is not covered with the sealing resin layer 50 becomes the electrode 22 whose upper surface is used as the connection terminal 24 and whose lower surface is used as the test terminal 26.

突起部５２の高さは、たとえば３０μｍである。このように、封止樹脂層５０の一部を突起部５２として機能させることにより、回路装置１０の構造および製造プロセスが簡便化するため、回路装置１０の製造コストが低減される。以上の工程により、図２から図４に示した回路装置１０を得ることができる。   The height of the protrusion 52 is, for example, 30 μm. As described above, by causing a part of the sealing resin layer 50 to function as the protruding portion 52, the structure and the manufacturing process of the circuit device 10 are simplified, so that the manufacturing cost of the circuit device 10 is reduced. Through the above steps, the circuit device 10 shown in FIGS. 2 to 4 can be obtained.

この回路装置１０は以下の工程により回路モジュール２００に組み込まれる。まず、図７（Ａ）に示すような多層基板２１０を用意する。多層基板２１０は、層間絶縁膜２１２を介して配線層２１４および配線層２１６が積層され、ビアプラグ２１８によって配線層２１４と配線層２１６とが電気的に接続された多層配線構造を有する。   The circuit device 10 is incorporated into the circuit module 200 through the following steps. First, a multilayer substrate 210 as shown in FIG. The multilayer substrate 210 has a multilayer wiring structure in which a wiring layer 214 and a wiring layer 216 are stacked via an interlayer insulating film 212, and the wiring layer 214 and the wiring layer 216 are electrically connected by a via plug 218.

次に、図７（Ｂ）に示すように、多層基板２１０の上に接着剤（図示せず）などを介して、回路素子２２０を実装した後、回路素子２２０の電極端子と、配線層２１４に設けられた電極端子とを、金線などのワイヤ２１９を用いてワイヤボンディングする。   Next, as shown in FIG. 7B, after the circuit element 220 is mounted on the multilayer substrate 210 via an adhesive (not shown), the electrode terminals of the circuit element 220 and the wiring layer 214 are mounted. The electrode terminal provided on the wire is wire-bonded using a wire 219 such as a gold wire.

次に、図７（Ｃ）に示すように、トランスファーモールド法を用いてエポキシ樹脂などの熱硬化性絶縁樹脂からなる封止樹脂層２３０で回路素子２２０を封止する。このとき、配線層２１４に設けられた回路装置１０用の電極端子は、封止樹脂層２３０で被覆されないようにする。封止樹脂層２３０を形成した後、バーンインを行う。具体的には、回路素子２２０を加熱することにより、回路素子２２０に初期不良が発生するか否かを検査する。   Next, as shown in FIG. 7C, the circuit element 220 is sealed with a sealing resin layer 230 made of a thermosetting insulating resin such as an epoxy resin by using a transfer molding method. At this time, the electrode terminal for the circuit device 10 provided in the wiring layer 214 is not covered with the sealing resin layer 230. After forming the sealing resin layer 230, burn-in is performed. Specifically, it is inspected whether an initial failure occurs in the circuit element 220 by heating the circuit element 220.

次に、図７（Ｄ）に示すように、封止樹脂層２３０の上にアンダーフィル材２３２を塗布した後、ＫＧＤが保証された回路装置１０を搭載する。このときに、回路装置１０の下部に設けられた突起部５２のうち、少なくとも外周側の突起部５２を封止樹脂層２３０に接触させることにより、回路装置１０を傾けることなく、封止樹脂層２３０の上に適切に搭載することができる。   Next, as illustrated in FIG. 7D, after applying an underfill material 232 on the sealing resin layer 230, the circuit device 10 with a guaranteed KGD is mounted. At this time, at least the protrusion 52 on the outer peripheral side of the protrusions 52 provided in the lower part of the circuit device 10 is brought into contact with the sealing resin layer 230, so that the sealing resin layer is not tilted. 230 can be mounted appropriately.

次に、図７（Ｅ）に示すように、回路装置１０の電極端子と、配線層２１４に設けられた回路装置１０用の電極端子とを、金線などのワイヤ２３４を用いてワイヤボンディングする。   Next, as shown in FIG. 7E, the electrode terminal of the circuit device 10 and the electrode terminal for the circuit device 10 provided in the wiring layer 214 are wire-bonded using a wire 234 such as a gold wire. .

次に、図７（Ｆ）に示すように、トランスファーモールド法により、回路装置１０、封止樹脂層２３０などをエポキシ樹脂などの熱硬化性絶縁樹脂を用いて一括して封止する。続いて、回路モジュール２００を実装対象と電気的に接続するためのはんだボール２１１を多層基板２１０の下面に接合する。はんだボール２１１の融点より、はんだ３４およびはんだ３６の融点の方が高いため、回路モジュール２００を実装対象に実装する際に、加熱温度をはんだボール２１１の融点以上かつはんだ３４およびはんだ３６の融点以下に保つことにより、はんだボール２１１のみを溶融させることができるため、回路モジュール２００の電気的な接続信頼性を損なうことなく回路モジュールを実装対象に実装させることができる。   Next, as illustrated in FIG. 7F, the circuit device 10, the sealing resin layer 230, and the like are collectively sealed using a thermosetting insulating resin such as an epoxy resin by a transfer molding method. Subsequently, a solder ball 211 for electrically connecting the circuit module 200 to the mounting target is bonded to the lower surface of the multilayer substrate 210. Since the melting point of the solder 34 and the solder 36 is higher than the melting point of the solder ball 211, when the circuit module 200 is mounted on the mounting target, the heating temperature is higher than the melting point of the solder ball 211 and lower than the melting point of the solder 34 and solder 36. Therefore, only the solder ball 211 can be melted, so that the circuit module can be mounted on the mounting target without impairing the electrical connection reliability of the circuit module 200.

本発明は、上述の実施の形態に限定されるものではなく、当業者の知識に基づいて各種の設計変更等の変形を加えることも可能であり、そのような変形が加えられた実施の形態も本発明の範囲に含まれうるものである。   The present invention is not limited to the above-described embodiments, and various modifications such as design changes can be added based on the knowledge of those skilled in the art. Embodiments to which such modifications are added Can also be included in the scope of the present invention.

たとえば、実施形態に係る回路モジュール２００では、回路素子２２０が封止樹脂層２３０によって封止され、封止樹脂層２３０の上に回路装置１０が実装されているが、回路素子２２０をベアチップとし、回路素子２２０の上に直接に回路装置１０を搭載してもよい。   For example, in the circuit module 200 according to the embodiment, the circuit element 220 is sealed by the sealing resin layer 230, and the circuit device 10 is mounted on the sealing resin layer 230. However, the circuit element 220 is a bare chip, The circuit device 10 may be mounted directly on the circuit element 220.

また、実施形態に係る回路モジュール２００では、回路素子２２０と回路装置１０の２段スタック構造となっているが、回路装置１０を２個以上用意し、回路装置１０の上に別の回路装置１０を積み上げることにより、３段スタック構造とすることも可能である。   In the circuit module 200 according to the embodiment, the circuit element 220 and the circuit device 10 have a two-stage stack structure. However, two or more circuit devices 10 are prepared, and another circuit device 10 is provided on the circuit device 10. It is also possible to make a three-stage stack structure by stacking.

本発明は、上述の各実施の形態に限定されるものではなく、当業者の知識に基づいて各種の設計変更等の変形を加えることも可能であり、そのような変形が加えられた実施の形態も本発明の範囲に含まれうるものである。   The present invention is not limited to the above-described embodiments, and various modifications such as design changes can be added based on the knowledge of those skilled in the art. The form can also be included in the scope of the present invention.

例えば、実施形態に係る回路モジュール２００では、回路素子２２０が封止樹脂層２３０によって封止され、封止樹脂層２３０の上に回路装置１０が実装されているが、回路素子２２０をベアチップとし、回路素子２２０の上に直接に回路装置１０を搭載してもよい。   For example, in the circuit module 200 according to the embodiment, the circuit element 220 is sealed by the sealing resin layer 230, and the circuit device 10 is mounted on the sealing resin layer 230. However, the circuit element 220 is a bare chip, The circuit device 10 may be mounted directly on the circuit element 220.

また、実施形態に係る回路モジュール２００では、回路素子２２０と回路装置１０の２段スタック構造となっているが、回路装置１０を２個以上用意し、回路装置１０の上に別の回路装置１０を積み上げることにより、３段スタック構造とすることも可能である。   In the circuit module 200 according to the embodiment, the circuit element 220 and the circuit device 10 have a two-stage stack structure. However, two or more circuit devices 10 are prepared, and another circuit device 10 is provided on the circuit device 10. It is also possible to make a three-stage stack structure by stacking.

実施形態に係る回路モジュールの構造を示す断面図である。It is sectional drawing which shows the structure of the circuit module which concerns on embodiment. 回路モジュールに組み込まれる回路装置の構造を示す上面図である。It is a top view which shows the structure of the circuit device integrated in a circuit module. 回路モジュールに組み込まれる回路装置の構造を示す下面図である。It is a bottom view which shows the structure of the circuit device integrated in a circuit module. 回路装置の図２のＡ−Ａ’線上の断面図である。It is sectional drawing on the A-A 'line of FIG. 2 of a circuit apparatus. 実施形態に係る回路モジュールに組み込まれる回路装置の製造方法を示す工程断面図である。It is process sectional drawing which shows the manufacturing method of the circuit apparatus integrated in the circuit module which concerns on embodiment. 実施形態に係る回路モジュールに組み込まれる回路装置の製造方法を示す工程断面図である。It is process sectional drawing which shows the manufacturing method of the circuit apparatus integrated in the circuit module which concerns on embodiment. 実施形態に係る回路モジュールの製造方法を示す工程断面図である。It is process sectional drawing which shows the manufacturing method of the circuit module which concerns on embodiment.

符号の説明Explanation of symbols

１０ 回路装置、２０ 配線層、２２ 電極、２４ 接続用端子、２６ 試験用端子、３０ 回路素子、４０ 受動部品、５０ 封止樹脂層、１００ 銅板、２００ 回路モジュール。   DESCRIPTION OF SYMBOLS 10 Circuit apparatus, 20 Wiring layer, 22 Electrode, 24 Connection terminal, 26 Test terminal, 30 Circuit element, 40 Passive component, 50 Sealing resin layer, 100 Copper plate, 200 Circuit module.

Claims (4)

第１の配線基板と、
前記第１の配線基板の下面に設けられ、外部の実装対象との電気的接続に用いられる第１のはんだと、
前記第１の配線基板に実装された第１の回路素子と、
前記第１の回路素子の上方に設けられ、前記第１の配線基板と電気的に接続された第２の配線基板と、
前記第２の配線基板に実装された第２の回路素子および受動部品と、
前記第１の回路素子、前記第２の回路素子および前記受動部品を封止する封止樹脂層と、
を備え、
前記受動部品が前記第２の配線基板に第２のはんだによって接合され、
前記第２のはんだの融点が前記第１のはんだの融点より高いとともに、
前記第２の回路素子または前記受動部品の周囲の前記第２の配線基板に溝部が設けられており、
前記溝部に前記封止樹脂層による突起部が設けられていることを特徴とする回路モジュール。 A first wiring board;
A first solder provided on the lower surface of the first wiring board and used for electrical connection with an external mounting target;
A first circuit element mounted on the first wiring board;
A second wiring board provided above the first circuit element and electrically connected to the first wiring board;
A second circuit element and a passive component mounted on the second wiring board;
A sealing resin layer for sealing the first circuit element, the second circuit element, and the passive component;
With
The passive component is bonded to the second wiring board by a second solder;
The melting point of the second solder is higher than the melting point of the first solder ;
A groove is provided in the second wiring board around the second circuit element or the passive component;
A circuit module, wherein the groove is provided with a protrusion by the sealing resin layer . 前記第２の配線基板が前記第２のはんだを溶融させたときに変形しない程度の耐熱性を有することを特徴とする請求項１に記載の回路モジュール。   2. The circuit module according to claim 1, wherein the second wiring board has heat resistance enough to prevent deformation when the second solder is melted. 3. 第１の配線基板に第１の回路素子を実装する工程と、
第２の配線基板に第２の回路素子および受動部品が実装され、前記第２の回路素子および受動部品の周囲の前記第２の配線基板に溝部を備え、前記第２の回路素子および受動部品が封止樹脂によって封止され、その封止樹脂により前記溝部に突起部を備えた回路装置であって、前記受動部品が前記第２の配線基板にはんだによって接合された回路装置を前記第１の回路素子の上方に実装する工程と、
前記第１の回路素子および前記回路装置を封止樹脂で一体的に封止する工程と、
前記受動部品の接合に用いられるはんだよりも融点が低いはんだで構成されたはんだボールを前記第１の配線基板の下面に接合する工程と、
を備えることを特徴とする回路モジュールの製造方法。 Mounting a first circuit element on a first wiring board;
A second circuit element and a passive component are mounted on a second wiring board, and a groove is provided in the second wiring board around the second circuit element and the passive component, and the second circuit element and the passive component are provided. Is a circuit device in which the groove is provided with a projection by the sealing resin , and the passive component is joined to the second wiring board by solder. Mounting above the circuit elements of
Sealing the first circuit element and the circuit device integrally with a sealing resin;
Bonding a solder ball made of solder having a melting point lower than that of the solder used for bonding the passive component to the lower surface of the first wiring board;
A method for manufacturing a circuit module, comprising: 前記第２の配線基板として、前記受動部品の接合に用いられるはんだを溶融させたときに変形しない程度の耐熱性を有する材料を用いることを特徴とする請求項３に記載の回路モジュールの製造方法。   4. The method of manufacturing a circuit module according to claim 3, wherein the second wiring board is made of a material having a heat resistance that does not deform when solder used for joining the passive components is melted. .
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