JP4939737B2 - Light emitting device - Google Patents

Description

  The present invention relates to a driving method of a light emitting device and a light emitting device in which a unit for supplying current to the light emitting element and the light emitting element are provided in each of a plurality of pixels.

  Since the light emitting element emits light by itself, the visibility is high, a backlight necessary for a liquid crystal display (LCD) is not necessary, and it is optimal for thinning, and the viewing angle is not limited. Therefore, a light-emitting device using a light-emitting element has attracted attention as a display device that replaces a CRT or an LCD, and is being put into practical use. Light emitting devices can be classified into a passive matrix type and an active matrix type. The active matrix type can maintain the current supply to the light emitting element to some extent even after the video signal is input, and can flexibly cope with the increase in size and definition of the panel, and is becoming the mainstream in the future. The configuration of the pixels in the active matrix light-emitting device that has been specifically proposed differs depending on the manufacturer, and each has its own technical contrivance, but usually at least the light-emitting elements and the video to the pixels A transistor for controlling signal input and a transistor for supplying current to the light-emitting element are provided in each pixel.

  As a transistor provided in a pixel of a light emitting device, a thin film transistor (TFT) using a thin semiconductor film as an active layer is mainly used. Among TFTs, TFTs using amorphous semiconductors and semi-amorphous semiconductors (microcrystalline semiconductors) have the advantage of being able to increase costs and yields because they require fewer manufacturing steps than TFTs using polycrystalline semiconductors. ing. Further, since it is not necessary to provide a crystallization step after the formation of the semiconductor film, it is relatively easy to enlarge the panel.

By the way, a problem in the practical application of the light emitting device is a decrease in luminance of the light emitting element due to deterioration of the electroluminescent material. The degree of deterioration of the electroluminescent material depends on the time during which light is emitted and the amount of flowing current. Variation will occur. Therefore, in Patent Document 1 below, by operating a transistor for controlling a current supplied to a light emitting element in a saturation region, the drain current when the transistor is on is kept constant regardless of deterioration of the electroluminescent layer. It is described that the reduction in luminance is suppressed by maintaining the luminance.
JP 2002-108285 A

Hereinafter, problems that arise when a TFT formed of an amorphous semiconductor or a semi-amorphous semiconductor is used for a pixel and a transistor for supplying current to a light emitting element is operated in a saturation region will be described.

  A semi-amorphous semiconductor is a film containing a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal). This semi-amorphous semiconductor is a semiconductor having a third state which is stable in terms of free energy, and is a crystalline one having a short-range order and having a lattice strain, and having a grain size of 0.5 to 20 nm. It can be dispersed in a single crystal semiconductor. Further, hydrogen or halogen is contained at least 1 atomic% or more as a neutralizing agent for dangling bonds. Here, for convenience, such a semiconductor is referred to as a semi-amorphous semiconductor (SAS). Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. Such a SAS semiconductor description is disclosed, for example, in US Pat. No. 4,409,134.

  When a TFT actually formed of an amorphous semiconductor or a semi-amorphous semiconductor is used as a transistor (driving TFT) for supplying current to a light emitting element, an n-type TFT capable of securing a certain degree of mobility is used. It is done. The light-emitting element includes an anode, a cathode, and an electroluminescent layer provided between the anode and the cathode. Generally, the anode is a source or drain of a transistor for supplying current to the light-emitting element. Connected with.

  FIG. 19A shows a connection structure between a p-type driving TFT and a light-emitting element. Note that the potential Vdd> the potential Vss. As shown in FIG. 19A, the p-type driving TFT 10 is connected in series with the light emitting element 11. In the p-type TFT, the higher potential is the source (S) and the lower potential is the drain (D). Therefore, the source of the p-type driving TFT 10 is supplied with the potential Vdd, and the drain is the anode of the light emitting element 11. Are connected, and the potential Vss is supplied to the cathode of the light emitting element 11.

  When a potential is supplied to the gate (G) of the driving TFT 10 in accordance with the video signal input to the pixel, a potential difference (gate voltage) Vgs between the gate and the source of the driving TFT 10 is generated, and the driving corresponding to the Vgs is generated. The drain current of the TFT 10 is supplied to the light emitting element 11. In the case of FIG. 19A, since the fixed potential Vdd is supplied to the source of the driving TFT 10, the gate voltage Vgs is determined only by the potential supplied to the gate.

  Next, FIG. 19B shows a connection structure between the n-type driving TFT and the light-emitting element. As shown in FIG. 19B, the n-type driving TFT 20 is connected in series with the light emitting element 21. Since the n-type TFT has a source (S) having a lower potential and a drain (D) having a higher potential, the potential Vdd is supplied to the drain of the n-type driving TFT 20, and the source is an anode of the light emitting element 21. Are connected, and the potential Vss is supplied to the cathode of the light emitting element 21.

  When a potential is supplied to the gate (G) of the driving TFT 20 in accordance with the video signal input to the pixel, a potential difference (gate voltage) Vgs is generated between the gate and the source of the driving TFT 20, and the driving corresponding to the Vgs is generated. The drain current of the TFT 20 is supplied to the light emitting element 21. However, in the case of FIG. 19B, the potential supplied to the source of the driving TFT 20 is not fixed unlike the case of FIG. 19A, and the voltage between the source and drain of the driving TFT 20 (drain voltage) Vds The voltage Vel between the anode and the cathode of the light emitting element 21 is determined. Therefore, the gate voltage Vgs is not determined only by the potential supplied to the gate, and even if a video signal having the same image information is input to the pixel, the drain current of the driving TFT 20 cannot be maintained at the same magnitude, and the light emitting element There may be a situation in which the brightness of 21 is different.

  In particular, when the driving TFT 20 is operated in the saturation region, the drain voltage Vds is larger than when the driving TFT 20 is operated in the linear region. For this reason, when applying a potential to the gate of the driving TFT 20 in accordance with the video signal, it becomes difficult to fix the source potential, and the pixel cannot display a desired gradation.

  The problem described above does not occur only when the driving TFT is n-type. Even when the driving TFT is p-type, in the case of a pixel in which the cathode of the light-emitting element is connected to the drain of the driving TFT, when applying a potential to the gate of the p-type driving TFT according to the video signal, It becomes difficult to keep the source potential fixed, which causes a problem that the pixel cannot display a desired gradation.

  In view of the above-described problems, the present invention is driven when the n-type driving TFT and the anode of the light-emitting element are connected, or when the p-type driving TFT and the cathode of the light-emitting element are connected. It is an object to provide a driving method of a light-emitting device that can operate a TFT for use in a saturation region and display a desired gradation in accordance with a video signal, and a light-emitting device using the driving method.

  The inventor has considered that the gate voltage of the driving TFT can be reliably written in accordance with a video signal having image information by utilizing the nonlinearity of the light emitting element. In the present invention, when a potential having image information is applied to the gate of the driving TFT in accordance with the video signal, a reverse bias voltage is applied to the driving TFT and the light emitting element connected in series, and the pixel is applied in accordance with the video signal. When display is performed, a forward bias voltage is applied to the driving TFT and the light emitting element.

  The drive method of the present invention will be described more specifically with reference to FIG. FIG. 1A illustrates a relationship between a connection structure between an n-type driving TFT and a light-emitting element and a potential supplied to each element in a period (writing period) in which a video signal is input to a pixel. In the writing period, a reverse bias voltage is applied to the driving TFT 100 and the light emitting element 101 connected in series. Specifically, in the driving TFT, the potential Vss is supplied to the source, and the drain is connected to the anode of the light emitting element 101. A potential Vdd higher than the potential Vss is supplied to the cathode of the light emitting element.

  Note that a TFT has three electrodes, a gate, a source, and a drain, and two electrodes (a first electrode and a second electrode) other than the gate correspond to the source depending on the applied potential. Sometimes it corresponds to the drain. In the case of an n-type TFT, the low potential electrode corresponds to the source, and the high electrode corresponds to the drain. In this specification, an electrode closer to the anode of the light-emitting element is referred to as a first electrode.

  At this time, since the light emitting element 101 is a non-linear element, the voltage Vel between the anode and the cathode is very large with respect to the drain voltage Vds of the driving TFT. Therefore, the potential at the connection node (nodeA) between the driving TFT 100 and the light emitting element 101 is as close as possible to Vss. That is, the potential of nodeA can be regarded as being almost fixed. Note that node A corresponds to a connection point between the anode of the light-emitting element 101 and the drain of the driving TFT in the writing period.

  In this state, a potential difference between the potential Vss and the potential Vg is held in the capacitor 102 by supplying the potential Vg to the gate of the driving TFT 100 in accordance with the video signal.

  Next, FIG. 1B shows the relationship between the connection configuration between the n-type driving TFT and the light-emitting element and the potential supplied to each element in the display period of the pixel (display period). In the display period, a forward bias voltage is applied to the driving TFT 100 and the light emitting element 101 connected in series. Specifically, in the driving TFT, the potential Vdd is supplied to the drain, and the source is connected to the anode of the light emitting element 101. A potential Vss is supplied to the cathode of the light emitting element.

  At this time, node A corresponds to a connection point between the source of the driving TFT 100 and the anode of the light emitting element 101. Therefore, the potential difference between the potential Vss and the potential Vg held in the capacitor 102 becomes the gate voltage Vgs of the driving TFT 100, and a drain current having a magnitude corresponding to the gate voltage Vgs is supplied to the light emitting element 101. Therefore, in the present invention, since the potential Vss is fixed, the gate voltage Vgs of the driving TFT 100 is determined only by the potential Vg supplied to the gate.

  In the present invention, the driving TFT is not limited to n-type, and may be p-type. However, when the driving TFT is a p-type, it is assumed that the driving TFT and the cathode of the light emitting element are connected.

  In the present invention, a semi-amorphous semiconductor film may be used at least in the channel formation region. In addition, the channel formation region does not necessarily have to be a semi-amorphous semiconductor in the film thickness direction, and it is sufficient that at least a part of the channel formation region includes a semi-amorphous semiconductor.

  In this specification, a light-emitting element includes, in its category, an element whose luminance is controlled by current or voltage. Specifically, the light-emitting element is used in an OLED (Organic Light Emitting Diode) or an FED (Field Emission Display). MIM type electron source elements (electron emitting elements) and the like are included.

  The light-emitting device includes a panel in which the light-emitting element is sealed, and a module in which an IC including a controller or the like is mounted on the panel. Furthermore, the present invention relates to an element substrate corresponding to one mode before the light emitting element is completed in the process of manufacturing the light emitting device, and the element substrate includes a unit for supplying current to the light emitting element. Prepare for. Specifically, the element substrate may be in a state where only the pixel electrode of the light emitting element is formed, or after the conductive film to be the pixel electrode is formed, the pixel electrode is formed by patterning. The previous state may be used, and all forms are applicable.

  An OLED (Organic Light Emitting Diode), which is one of the light emitting elements, includes a layer containing an electroluminescent material (hereinafter referred to as an electroluminescent layer) capable of obtaining luminescence generated by applying an electric field, an anode layer, And a cathode layer. The electroluminescent layer is provided between the anode and the cathode, and is composed of a single layer or a plurality of layers. Specifically, a hole injection layer, a hole transport layer, a light emitting layer, an electron injection layer, an electron transport layer, and the like are included in the electroluminescent layer. In some cases, the layer constituting the electroluminescent layer contains an inorganic compound. Luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state.

  According to the present invention, the n-type driving TFT can be operated in the saturation region and a desired gradation can be displayed according to the video signal. In addition, by operating the driving TFT in the saturation region, the drain current is not changed by the drain voltage Vds but is determined only by the gate voltage Vgs. Therefore, Vds is reduced instead of increasing Vel as the light emitting element is deteriorated. Even so, the value of the drain current is kept relatively constant. Therefore, it is possible to suppress a decrease in luminance or luminance unevenness due to deterioration of the electroluminescent material.

  FIG. 2 shows a structure of a pixel portion of a light emitting device that performs display using the driving method of the present invention. As shown in FIG. 2, a plurality of pixels 200 are provided in a matrix in the pixel portion, and various signals and potentials are supplied to each pixel 200 by signal lines S1 to Sx, scanning lines G1 to Gy, power supply This is done via lines V1 to Vx.

  Each pixel 200 is provided with a light emitting element 201, a TFT (switching TFT) 202 that controls input of a video signal to the pixel 200, and a driving TFT 203 that controls supply of current to the light emitting element 201. Yes. In FIG. 2, the capacitor 204 is formed in the pixel 200 separately from the driving TFT 203, but the present invention is not limited to this structure. A capacitor (gate capacitance) formed between the gate electrode of the driving TFT 203 and the active layer may be used as the capacitive element 204 without forming the capacitor 204 separately from the driving TFT 203. The switching TFT 202 and the driving TFT 203 are both n-type TFTs.

  The switching TFT 202 has a gate connected to the scanning line Gj (j = 1 to y). One of the source and drain of the switching TFT 202 is connected to the signal line Si (i = 1 to x), and the other is connected to the gate of the driving TFT 203. One of the source and drain of the driving TFT 203 is connected to the power supply line Vi (i = 1 to x), and the other is connected to the anode of the light emitting element 201. One of the two electrodes of the capacitor 204 is connected to the gate of the driving TFT 203 and the other is connected to the anode of the light emitting element 201.

  Note that the structure of the pixel shown in FIG. 2 is only one mode of a light-emitting device that can use the driving method of the present invention, and the light-emitting device that can use the driving method of the present invention is limited to the structure shown in FIG. Not.

  Next, a method for driving the pixel portion illustrated in FIG. 2 will be described. The driving method of the present invention can be described by being divided into a writing period, a reverse bias period, and a display period. FIG. 3A shows an example of the timing of the writing period Ta, the reverse bias period Tr, and the display period Td.

  First, when the reverse bias period Tr is started, a reverse bias voltage is applied to the driving TFT 203 and the light emitting element 201 connected in series. Specifically, the potential Vss is supplied to the power supply lines V1 to Vx, and the potential Vdd higher than the potential Vss is supplied to the cathode of the light emitting element 201.

  Then, the writing period Ta is started. In the driving method of the present invention, the writing period Ta exists in the reverse bias period Tr. When the writing period Ta is started, the scanning lines G1 to Gy are sequentially selected, and the switching TFT 202 of each pixel is turned on. When a video signal is supplied to the signal lines S1 to Sx, the potential Vg of the video signal is supplied to the gate of the driving TFT 203 via the switching TFT 202.

  At this time, since the light-emitting element 201 is a nonlinear element, when a reverse bias voltage is applied, the voltage Vel between the anode and the cathode of the light-emitting element 201 becomes significantly larger than the drain voltage Vds of the driving TFT 203. Therefore, the potential of the anode of the light emitting element 201 is as close as possible to the potential Vss of the power supply lines V1 to Vx, and the potential difference between the potential Vss and the potential Vg of the video signal is accumulated and held in the capacitor element 204.

  When the writing period Ta ends and the switching TFT 202 is turned off, the reverse bias period Tr ends, and then the display period Td starts.

  In the display period, a forward bias voltage is applied to the driving TFT 203 and the light emitting element 201 connected in series. Specifically, the potential Vdd ′ higher than the potential Vdd is supplied to the power supply lines V <b> 1 to Vx, and the potential Vdd is supplied to the cathode of the light emitting element 201.

  Note that in this embodiment mode, the potential supplied to the cathode is kept constant in both the reverse bias period Tr and the display period Td, but the present invention is not limited to this structure. In the reverse bias period Tr, a reverse bias voltage is applied to the light emitting element 201 when the driving TFT 203 is on. In the display period Td, the forward bias is applied to the light emitting element 201 when the driving TFT 203 is on. The voltage may be applied.

  When a forward bias voltage is applied, since the driving TFT 203 is n-type, the source of the driving TFT 203 is connected to the anode of the light emitting element 201. Therefore, the potential difference between the potential Vss and the video signal potential Vg held in the capacitor 204 becomes the gate voltage Vgs of the driving TFT 203 as it is. Therefore, the driving TFT 203 supplies a drain current having a magnitude corresponding to the gate voltage Vgs to the light emitting element 201.

  FIG. 3B shows a timing chart of the scanning lines G1 to Gy and the power supply lines V1 to Vx in each period. When pixels sharing the same scanning line are regarded as one row, the writing period Ta appears in order in each row. Each writing period Ta exists in the reverse bias period Tr. It is possible to completely overlap the writing period Ta and the reverse bias period Tr. However, by taking the reverse bias period Tr longer than the writing period Ta, noise due to fluctuations in the potential of the power supply lines V1 to Vx, The impact can be avoided.

  In the present invention, the driving TFT is not limited to n-type, and may be p-type. However, when the driving TFT is a p-type, it is assumed that the driving TFT and the cathode of the light emitting element are connected.

  Note that FIG. 3A illustrates an example of the timing of the writing period, the reverse bias period, and the display period when the video signal is analog; however, in the present invention, the video signal may be digital. For example, when a gray scale is displayed using a digital video signal, a writing period Ta, a reverse bias period Tr, and a display period Td are digital signals as shown in FIG. It may be provided for each bit.

  Note that although an example in which an amorphous semiconductor or a semi-amorphous semiconductor is used for the TFT in the pixel portion is described in this embodiment mode, the present invention is not limited to this structure. The driving method of the present invention can also be applied to a light emitting device in which a TFT in a pixel portion uses a polycrystalline semiconductor.

  In this embodiment, one mode of a light-emitting device in which power supply lines are arranged in parallel with scanning lines and the potentials of the scanning lines and the power supply lines are controlled by one scanning line driver circuit in the pixel portion shown in FIG. To do.

  FIG. 4 shows a configuration of the pixel portion 400 in the light emitting device of this embodiment. In FIG. 4, a pixel 401 includes a light emitting element 405, a switching TFT 402, a driving TFT 403, and a capacitor element 404, similarly to the pixel portion illustrated in FIG. 2. The connection relationship of each element is the same as that of the pixel 200 shown in FIG. However, in this embodiment, the power supply lines V1 to Vy are arranged in parallel with the scanning lines G1 to Gy.

  Next, a method for driving the pixel portion illustrated in FIG. 4 is described. The driving method of the present invention can be described by being divided into a writing period Ta, a reverse bias period Tr, and a display period Td. FIG. 20A shows an example of the timing of the writing period Ta, the reverse bias period Tr, and the display period Td. In addition, the total period from the start to the end of the reverse bias period Tr in all pixels is denoted as Tw.

  First, when the reverse bias period Tr is started, a potential Vdd higher than the potential Vss is supplied to the cathode of the light emitting element 405, and the potential Vss is sequentially supplied to the power supply lines V1 to Vy. Therefore, a reverse bias voltage is sequentially applied to the pixels in each row to the driving TFT 403 and the light emitting element 405 connected in series.

  Then, the writing period Ta is started. In the driving method of the present invention, the write period Ta exists in the reverse bias period Tr for each row. When the writing period Ta is started, the scanning lines G1 to Gy are sequentially selected, and the switching TFT 402 of each pixel is turned on. When a video signal is supplied to the signal lines S <b> 1 to Sx, the potential Vg of the video signal is supplied to the gate of the driving TFT 403 through the switching TFT 402.

  At this time, since the light-emitting element 405 is a non-linear element, when a reverse bias voltage is applied, the voltage Vel between the anode and the cathode of the light-emitting element 405 becomes significantly larger than the drain voltage Vds of the driving TFT 403. Accordingly, the potential of the anode of the light emitting element 405 is as close as possible to the potential Vss of the power supply lines V1 to Vy, and the potential difference between the potential Vss and the potential Vg of the video signal is accumulated and held in the capacitor 404.

  When the writing period Ta ends and the switching TFT 402 is turned off, the reverse bias period Tr ends, and then the display period Td starts.

  In the display period, a forward bias voltage is sequentially applied to the driving TFT 403 and the light emitting element 405 connected in series. Specifically, the potential Vdd is supplied to the cathode of the light emitting element 405, and the potential Vdd 'higher than the potential Vdd is sequentially supplied to the power supply lines V1 to Vy.

  In the light emitting device shown in FIG. 4, the potential supplied to the cathode is kept constant in both the reverse bias period Tr and the display period Td.

  When a forward bias voltage is applied, since the driving TFT 403 is n-type, the source of the driving TFT 403 is connected to the anode of the light emitting element 405. Therefore, the potential difference between the potential Vss held in the capacitor 404 and the video signal potential Vg becomes the gate voltage Vgs of the driving TFT 403 as it is. Therefore, the driving TFT 403 supplies a drain current having a magnitude corresponding to the gate voltage Vgs to the light emitting element 405.

  FIG. 20B shows a timing chart of the scanning lines G1 to Gy and the power supply lines V1 to Vy in each period. When pixels sharing the same scanning line are regarded as one row, the writing period Ta appears in order in each row. Each writing period Ta exists in the corresponding reverse bias period Tr. Note that it is possible to completely overlap the writing period Ta and the reverse bias period Tr, but by taking the reverse bias period Tr longer than the writing period Ta, noise due to fluctuations in the potentials of the power supply lines V1 to Vy can be obtained. The impact can be avoided.

  In FIG. 4, unlike the case of FIG. 2, the timing at which the reverse bias period Tr appears can be set for each row, so that the ratio of the display period Td to the frame period can be increased. Therefore, the operating frequency of the drive circuit can be suppressed.

  Note that FIG. 20A illustrates an example of the timing of the writing period, the reverse bias period, and the display period when the video signal is analog; however, in the present invention, the video signal may be digital. For example, in the case where gradation is displayed using a time gradation using a digital video signal, as shown in FIG. 7B, each of a writing period Ta, a reverse bias period Tr, and a display period Td is represented by a digital signal. It may be provided for each bit.

  FIG. 5A illustrates a structure of a light-emitting device including the pixel portion 400 and the driver circuit illustrated in FIG. In FIG. 5A, reference numeral 1405 denotes a signal line driver circuit for supplying video signals to the signal lines S1 to Sx, and reference numeral 1406 denotes a scanning line driver for controlling the potentials of the scanning lines G1 to Gy and the power supply lines V1 to Vy. Corresponds to a circuit.

  FIG. 5B illustrates part of the signal line driver circuit 1405. The signal line driver circuit 1405 is synchronized with the shift register 410, the inverter 411 that inverts the signal output from the shift register 410, and the signal output from the shift register 410 and the inverted signal output from the inverter 411. , And a transmission gate 412 for sampling a video signal and supplying it to the signal lines S1 to Sx.

  FIG. 5C illustrates part of the scan line driver circuit 1406. The scan line driver circuit 1406 controls the pulse width of the inverted signal output from the inverter 416 by the shift register 415, inverters 416 and 417 for inverting the signal output from the shift register 415, and the pulse width control signal. , And NOR 418 that supplies the scanning lines G1 to Gy. The signal output from the inverter 417 is supplied to the power supply lines V1 to Vy.

  With the above structure, one scanning line driving circuit 406 can control the potentials of the scanning lines G1 to Gy and the power supply lines V1 to Vy.

  In this embodiment, a structure of a pixel of a light-emitting device that can use the driving method of the present invention will be described.

  A pixel illustrated in FIG. 6A includes a light-emitting element 601, a switching TFT 602, a driving TFT 603, an erasing TFT 604 for forcibly terminating light emission of the light-emitting element 601, and a capacitor 605. ing. The switching TFT 602 has its gate connected to the first scanning line Gaj (j = 1 to y), one of its source and drain connected to the signal line Si (i = 1 to x), and the other connected to the gate of the driving TFT 603. Yes. One of the source and the drain of the driving TFT 603 is connected to the power supply line Vj (j = 1 to y), and the other is connected to the anode of the light emitting element 601. The gate of the erasing TFT 604 is connected to the second scanning line Gbj (j = 1 to y). One of the source and the drain is connected to the gate of the driving TFT 603 and the other is connected to the anode of the light emitting element 601. Yes. One of the two electrodes of the capacitor 605 is connected to the anode of the light emitting element 601 and the other is connected to the gate of the driving TFT 603.

  In the writing period Ta, the erasing TFT 604 is turned off. Then, the gate voltage Vgs of the driving TFT 603 is set to 0 by turning on the erasing TFT 604 while a forward bias voltage is applied to the driving TFT 603 and the light emitting element 601 connected in series. Can do. Therefore, the driving TFT 603 can be turned off to forcibly end the light emission of the light emitting element 601 and the display period can be ended.

  A pixel illustrated in FIG. 6B includes a light-emitting element 611, a switching TFT 612, a driving TFT 613, an erasing TFT 614 for forcibly terminating light emission of the light-emitting element 611, and a capacitor 615. ing. The switching TFT 612 has its gate connected to the first scanning line Gaj (j = 1 to y), one of its source and drain connected to the signal line Si (i = 1 to x), and the other connected to the gate of the driving TFT 613. Yes. The driving TFT 613 and the erasing TFT are connected in series between the power supply line Vj (j = 1 to y) and the light emitting element 611. Specifically, either the source or the drain of the driving TFT 613 is connected to the anode of the light emitting element 611, and either the source or the drain of the erasing TFT 614 is connected to the power supply line Vj. The gate of the erasing TFT 614 is connected to the second scanning line Gbj (j = 1 to y). One of the two electrodes of the capacitor 615 is connected to the anode of the light emitting element 611 and the other is connected to the gate of the driving TFT 613.

  Note that FIG. 6B shows a structure in which the erasing TFT 614 is provided between the driving TFT 613 and the power supply line Vj; however, the position where the erasing TFT 614 is provided is not limited to this. For example, the erasing TFT 614 may be provided between the light emitting element 611 and the driving TFT 613. Specifically, in this case, either the source or the drain of the driving TFT 613 is connected to the power supply line Vj, and either the source or the drain of the erasing TFT 614 is connected to the anode of the light emitting element 611. One of the two electrodes of the capacitor 615 is connected to one of the source and drain of the driving TFT 613 that is different from the one connected to the power supply line Vj, and the other is connected to the gate of the driving TFT 613. .

  In the reverse bias period Tr and the display period Td, the erasing TFT 614 is kept on. The light emitting element 611 emits light by turning off the erasing TFT 614 while a forward bias voltage is applied to the driving TFT 613, the erasing TFT 614, and the light emitting element 611 connected in series. Can be forcibly terminated to end the display period.

  A writing period Ta, a reverse bias period Tr, and a display period Td in the case where a gray scale is displayed by a time gray scale with the pixels shown in FIGS. 6A and 6B using a digital video signal. FIG. 7C shows the timing of the erasing period Te that appears by forcibly terminating the light emission of the light emitting element. As shown in FIG. 7C, by providing the erasing period Te, the display period Tr is forcibly ended in order from the row in which the writing period is first ended before the writing period Ta is ended in all the rows. be able to. Therefore, the number of gradations can be increased without reducing the writing period, and the operating frequency of the driver circuit can be suppressed.

  In the case of the pixel shown in FIG. 6A, the erasing TFT 604 may be turned on continuously in the erasing period Te, or after the erasing period Te is turned on first, the remaining period is turned off. You can leave it. On the other hand, in the case of the pixel shown in FIG. 6B, the erasing TFT 604 is continuously turned on during the erasing period Te.

  FIG. 6C shows a structure of the pixel shown in FIG. 2 in which a diode-connected TFT is provided between the anode of the light emitting element and the power supply line. A pixel illustrated in FIG. 6C includes a light-emitting element 621, a switching TFT 622, a driving TFT 623, a capacitor element 624, and a rectifying TFT 625. The gate of the switching TFT 622 is connected to the scanning line Gj (j = 1 to y), one of the source and the drain is connected to the signal line Si (i = 1 to x), and the other is connected to the gate of the driving TFT 623. One of the source and the drain of the driving TFT 623 is connected to the power supply line Vi (i = 1 to x), and the other is connected to the anode of the light emitting element 621. The rectifying TFT 625 has a gate connected to the anode of the light emitting element 621, a source and a drain, one connected to the power supply line Vi, and the other connected to the anode of the light emitting element 621.

  In the reverse bias period, the source of the rectifying TFT 625 is connected to the power supply line Vi, and the gate and the drain are connected to each other. Accordingly, the rectifying TFT 625 is turned on and a forward bias current flows, so that the potential of the anode of the light emitting element 621 becomes closer to the potential of the power supply line Vi. In the display period, the drain of the rectifying TFT 625 is connected to the power supply line Vi, and the gate and the source are connected to each other. Accordingly, since a reverse bias voltage is applied to the rectifying TFT 625 in the display period, the rectifying TFT 625 is turned off. With the above structure, in the pixel illustrated in FIG. 6C, when a low gradation is displayed using an analog video signal, the potential of the anode of the light-emitting element 621 is set even if the drain current of the driving TFT 623 is low. It can be brought closer to the potential of the power supply line Vi sooner.

  FIG. 6D illustrates a structure of a pixel in which a diode-connected TFT is provided between the anode of the light-emitting element and the power supply line in the pixel illustrated in FIG. The pixel illustrated in FIG. 6D includes a light-emitting element 631, a switching TFT 632, a driving TFT 633, a capacitor 634, an erasing TFT 635, and a rectifying TFT 636. The switching TFT 632 has its gate connected to the first scanning line Gaj (j = 1 to y), one of its source and drain connected to the signal line Si (i = 1 to x), and the other connected to the gate of the driving TFT 633. Yes. One of the source and the drain of the driving TFT 633 is connected to the power supply line Vj (j = 1 to y), and the other is connected to the anode of the light emitting element 631. The gate of the erasing TFT 635 is connected to the second scanning line Gbj (j = 1 to y), and one of the source and the drain is connected to the gate of the driving TFT 633 and the other is connected to the anode of the light emitting element 631. ing. The rectifying TFT 636 has a gate connected to the anode of the light emitting element 631, a source and a drain, one connected to the power supply line Vj and the other connected to the anode of the light emitting element 631.

  FIG. 6E illustrates a structure of a pixel in which a diode-connected TFT is provided between an anode of a light-emitting element and a power supply line in the pixel illustrated in FIG. 6B. A pixel illustrated in FIG. 6E includes a light-emitting element 641, a switching TFT 642, a driving TFT 643, a capacitor 644, an erasing TFT 645, and a rectifying TFT 646. The gate of the switching TFT 642 is connected to the scanning line Gaj (j = 1 to y), one of the source and the drain is connected to the signal line Si (i = 1 to x), and the other is connected to the gate of the driving TFT 643. The driving TFT 643 and the erasing TFT 645 are connected in series, and either the source or drain of the erasing TFT 645 is connected to the power supply line Vj, and either the source or drain of the driving TFT 643 is connected to the anode of the light emitting element 641. It is connected. The rectifying TFT 646 has a gate connected to the anode of the light emitting element 641, a source and a drain, one connected to the power supply line Vj and the other connected to the anode of the light emitting element 641.

  Note that FIG. 6E illustrates a structure in which the erasing TFT 645 is provided between the driving TFT 643 and the power supply line Vj; however, the position where the erasing TFT 645 is provided is not limited to this. For example, the erasing TFT 645 may be provided between the light emitting element 641 and the driving TFT 643. Specifically, in this case, either the source or the drain of the driving TFT 643 is connected to the power supply line Vj, and either the source or the drain of the erasing TFT 645 is connected to the anode of the light emitting element 641. One of the two electrodes of the capacitor 644 is connected to one of the source and drain of the driving TFT 643 that is different from the one connected to the power supply line Vj, and the other is connected to the gate of the driving TFT 643. .

  The structure of the pixel included in the light-emitting device of the present invention is not limited to the structure shown in this embodiment.

  In the light-emitting device of the present invention, in the case where a TFT (semi-amorphous TFT) formed using a semi-amorphous semiconductor is used, the driver circuit can be formed over the same substrate as the pixel portion. In the case of using a TFT formed with an amorphous semiconductor (amorphous TFT), a driver circuit formed over another substrate may be mounted on the same substrate as the pixel portion.

  FIG. 8A illustrates a mode of an element substrate in which only the signal line driver circuit 6013 is separately formed and connected to the pixel portion 6012 formed over the substrate 6011. The pixel portion 6012 and the scan line driver circuit 6014 are formed using semi-amorphous TFTs. By forming the signal line driver circuit using a transistor that can obtain higher mobility than a semi-amorphous TFT, the operation of the signal line driver circuit that requires a higher driving frequency than the scanning line driver circuit can be stabilized. Note that the signal line driver circuit 6013 may be a transistor using a single crystal semiconductor, a TFT using a polycrystalline semiconductor, or a transistor using SOI. The pixel portion 6012, the signal line driver circuit 6013, and the scan line driver circuit 6014 are supplied with a potential of a power source, various signals, and the like through the FPC 6015, respectively.

  Note that both the signal line driver circuit and the scan line driver circuit may be formed over the same substrate as the pixel portion.

  In the case where a driver circuit is separately formed, the substrate on which the driver circuit is formed is not necessarily attached to the substrate on which the pixel portion is formed, and may be attached to, for example, an FPC. FIG. 8B illustrates a mode of an element substrate in which only the signal line driver circuit 6023 is separately formed and connected to the pixel portion 6022 and the scan line driver circuit 6024 which are formed over the substrate 6021. The pixel portion 6022 and the scan line driver circuit 6024 are formed using semi-amorphous TFTs. The signal line driver circuit 6023 is connected to the pixel portion 6022 through the FPC 6025. The pixel portion 6022, the signal line driver circuit 6023, and the scan line driver circuit 6024 are supplied with power supply potential, various signals, and the like through the FPC 6025.

  Further, only a part of the signal line driver circuit or a part of the scanning line driver circuit is formed on the same substrate as the pixel portion using a semi-amorphous TFT, and the rest is separately formed and electrically connected to the pixel portion. You may do it. 8C, an analog switch 6033a included in the signal line driver circuit is formed over the same substrate 6031 as the pixel portion 6032 and the scan line driver circuit 6034, and a shift register 6033b included in the signal line driver circuit is provided over a different substrate. A mode of the element substrate which is formed and bonded is shown in FIG. The pixel portion 6032 and the scan line driver circuit 6034 are formed using semi-amorphous TFTs. A potential of a power source, various signals, and the like are supplied to the pixel portion 6032, the signal line driver circuit, and the scan line driver circuit 6034 through the FPC 6035, respectively.

  As shown in FIGS. 8A to 8C, in the light-emitting device of the present invention, part or all of the driver circuit can be formed over the same substrate as the pixel portion using a semi-amorphous TFT. it can.

  Alternatively, the signal line driver circuit and the scan line driver circuit may be separately formed and mounted on the substrate over which the pixel portion is formed. FIG. 8D illustrates an element substrate in which a chip 6043 in which a signal line driver circuit is formed and a chip 6044 in which a scan line driver circuit is formed are attached to a substrate 6041 in which a pixel portion 6042 is formed. Is shown in FIG. The pixel portion 6042 is formed using a semi-amorphous TFT or an amorphous TFT. The potential of the power supply, various signals, and the like are supplied to the pixel portion 6042, the chip 6043 formed with the signal line driver circuit, and the chip 6044 formed with the scan line driver circuit through the FPC 6045, respectively.

  Note that a method for connecting a separately formed substrate is not particularly limited, and a known COG method, wire bonding method, TAB method, or the like can be used. Further, the connection position is not limited to the position illustrated in FIG. 8 as long as electrical connection is possible. In addition, a controller, a CPU, a memory, and the like may be separately formed and connected.

  Note that the signal line driver circuit used in the present invention is not limited to a mode having only a shift register and an analog switch. In addition to the shift register and the analog switch, other circuits such as a buffer, a level shifter, and a source follower may be included. The shift register and the analog switch are not necessarily provided. For example, another circuit that can select a signal line such as a decoder circuit may be used instead of the shift register, or a latch or the like may be used instead of the analog switch. May be.

  The chip mounting method is not particularly limited, and a known COG method, wire bonding method, TAB method, or the like can be used. Further, the position where the chip is mounted is not limited to the position shown in FIG. 8 as long as electrical connection is possible. Further, although FIG. 8 illustrates an example in which the signal line driver circuit and the scan line driver circuit are formed using a chip, a controller, a CPU, a memory, and the like may be formed using a chip and mounted. In addition, instead of forming the entire scanning line driving circuit with a chip, only a part of the circuit constituting the scanning line driving circuit may be formed with a chip.

  By forming and mounting an integrated circuit such as a driver circuit separately on a chip, the yield can be increased compared to the case where all the circuits are formed on the same substrate as the pixel portion, and the characteristics of each circuit are adjusted. The process can be easily optimized.

  Next, the structure of a TFT using a semi-amorphous semiconductor used in the light emitting device of the present invention will be described. FIG. 9A shows a cross-sectional view of a TFT used for a driver circuit and a cross-sectional view of a TFT used for a pixel portion. Reference numeral 501 corresponds to a cross-sectional view of a TFT used in a driver circuit, 502 corresponds to a cross-sectional view of a TFT used in a pixel portion, and 503 corresponds to a cross-sectional view of a light emitting element to which current is supplied by the TFT 502. The TFTs 501 and 502 are an inverted stagger type (bottom gate type).

  The TFT 501 of the driver circuit includes a gate electrode 510 formed over the substrate 500, a gate insulating film 511 that covers the gate electrode 510, and a semi-amorphous layer that overlaps the gate electrode 510 with the gate insulating film 511 interposed therebetween. A first semiconductor film 512 formed of a semiconductor film. Further, the TFT 501 includes a pair of second semiconductor films 513 functioning as a source region or a drain region, and a third semiconductor film 514 provided between the first semiconductor film 512 and the second semiconductor film 513. is doing.

  In FIG. 9A, the gate insulating film 511 is formed with two insulating films; however, the present invention is not limited to this structure. The gate insulating film 511 may be formed of a single layer or three or more layers of insulating films.

  The second semiconductor film 513 is formed using an amorphous semiconductor film or a semi-amorphous semiconductor film, and an impurity imparting one conductivity type is added to the semiconductor film. The pair of second semiconductor films 513 face each other with a region where the channel of the first semiconductor film 512 is formed therebetween.

  The third semiconductor film 514 is formed using an amorphous semiconductor film or a semi-amorphous semiconductor film, has the same conductivity type as the second semiconductor film 513, and has lower conductivity than the second semiconductor film 513. It has the characteristic which becomes. Since the third semiconductor film 514 functions as an LDD region, an electric field concentrated on the end portion of the second semiconductor film 513 functioning as a drain region can be relaxed and the hot carrier effect can be prevented. Although the third semiconductor film 514 is not necessarily provided, the provision of the third semiconductor film 514 can increase the withstand voltage of the TFT and improve the reliability. Note that in the case where the TFT 501 is n-type, n-type conductivity can be obtained without adding an impurity imparting n-type in particular when the third semiconductor film 514 is formed. Therefore, when the TFT 501 is n-type, it is not always necessary to add n-type impurities to the third semiconductor film 514. However, an impurity imparting p-type conductivity is added to the first semiconductor film in which the channel is formed, and the conductivity type is controlled so as to be as close to the I-type as possible.

  A wiring 515 is formed so as to be in contact with the pair of third semiconductor films 514.

  The TFT 502 in the pixel portion includes a gate electrode 520 formed over the substrate 500, a gate insulating film 511 covering the gate electrode 520, and a semi-amorphous layer overlapping the gate electrode 520 with the gate insulating film 511 interposed therebetween. A first semiconductor film 522 formed of a semiconductor film. Further, the TFT 502 includes a pair of second semiconductor films 523 functioning as a source region or a drain region, and a third semiconductor film 524 provided between the first semiconductor film 522 and the second semiconductor film 523. is doing.

  The second semiconductor film 523 is formed using an amorphous semiconductor film or a semi-amorphous semiconductor film, and an impurity imparting one conductivity type is added to the semiconductor film. The pair of second semiconductor films 523 face each other with the region where the channel of the first semiconductor film 522 is formed therebetween.

  The third semiconductor film 524 is formed using an amorphous semiconductor film or a semi-amorphous semiconductor film, has the same conductivity type as the second semiconductor film 523, and has lower conductivity than the second semiconductor film 523. It has the characteristic which becomes. Since the third semiconductor film 524 functions as an LDD region, an electric field concentrated on an end portion of the second semiconductor film 523 functioning as a drain region can be relaxed and a hot carrier effect can be prevented. The third semiconductor film 524 is not necessarily provided; however, by providing the third semiconductor film 524, the withstand voltage of the TFT can be increased and the reliability can be improved. Note that in the case where the TFT 502 is n-type, an n-type conductivity type can be obtained without adding an impurity imparting n-type in particular when the third semiconductor film 524 is formed. Therefore, when the TFT 502 is n-type, it is not always necessary to add an n-type impurity to the third semiconductor film 524. However, an impurity imparting p-type conductivity is added to the first semiconductor film in which the channel is formed, and the conductivity type is controlled so as to be as close to the I-type as possible.

  A wiring 525 is formed so as to be in contact with the pair of third semiconductor films 524.

  A first passivation film 540 and a second passivation film 541 made of an insulating film are formed so as to cover the TFTs 501 and 502 and the wirings 515 and 525. The passivation film that covers the TFTs 501 and 502 is not limited to two layers, and may be a single layer or three or more layers. For example, the first passivation film 540 can be formed using silicon nitride, and the second passivation film 541 can be formed using silicon oxide. By forming the passivation film using silicon nitride or silicon nitride oxide, it is possible to prevent the TFTs 501 and 502 from being deteriorated by the influence of moisture, oxygen, or the like.

  One end of the wiring 525 is connected to the anode 530 of the light emitting element 503. Further, an electroluminescent layer 531 is formed so as to be in contact with the anode 530, and a cathode 532 is formed so as to be in contact with the electroluminescent layer 531.

  By forming the first semiconductor films 512 and 522 including the channel formation region using a semi-amorphous semiconductor, a TFT having higher mobility than a TFT using an amorphous semiconductor film can be obtained. And the pixel portion can be formed over the same substrate.

  Next, a mode different from that in FIG. 9A of the TFT included in the light-emitting device of the present invention will be described. FIG. 9B shows a cross-sectional view of a TFT used for a driver circuit and a cross-sectional view of a TFT used for a pixel portion. 301 corresponds to a cross-sectional view of a TFT used in a driver circuit, and 302 corresponds to a cross-sectional view of a TFT used in a pixel portion and a light-emitting element 303 to which current is supplied by the TFT 302.

  The TFT 301 of the driver circuit and the TFT 302 of the pixel portion are gate electrodes 310 and 320 formed on the substrate 300, a gate insulating film 311 covering the gate electrodes 310 and 320, and a gate insulating film 311 interposed therebetween. First semiconductor films 312, 322 formed of semi-amorphous semiconductor films, which overlap with the electrodes 310, 320, are provided. Then, channel protective films 330 and 331 made of an insulating film are formed so as to cover the channel formation regions of the first semiconductor films 312 and 322. The channel protective films 330 and 331 are provided in order to prevent the channel formation regions of the first semiconductor films 312 and 322 from being etched in the manufacturing process of the TFTs 301 and 302. Further, the TFTs 301 and 302 include a pair of second semiconductor films 313 and 323 that function as a source region or a drain region, and a first semiconductor film 312 or 322 and a second semiconductor film 313 or 323 provided between the second semiconductor films 313 and 323. 3 semiconductor films 314 and 324, respectively.

  In FIG. 9B, the gate insulating film 311 is formed with two insulating films; however, the present invention is not limited to this structure. The gate insulating film 311 may be formed of a single layer or three or more layers of insulating films.

  The second semiconductor films 313 and 323 are formed using an amorphous semiconductor film or a semi-amorphous semiconductor film, and an impurity imparting one conductivity type is added to the semiconductor film. The pair of second semiconductor films 313 and 323 face each other with a region where the channel of the first semiconductor film 312 is formed therebetween.

  The third semiconductor films 314 and 324 are formed of an amorphous semiconductor film or a semi-amorphous semiconductor film, have the same conductivity type as the second semiconductor films 313 and 323, and have the second semiconductor films 313 and 323. It has the characteristic that conductivity becomes lower than that. Since the third semiconductor films 314 and 324 function as LDD regions, an electric field concentrated on the end portions of the second semiconductor films 313 and 323 functioning as drain regions can be relaxed and the hot carrier effect can be prevented. The third semiconductor films 314 and 324 are not necessarily provided, but the provision of the third semiconductor films 314 and 324 can increase the pressure resistance of the TFT and improve the reliability. Note that in the case where the TFTs 301 and 302 are n-type, an n-type conductivity type can be obtained without adding an impurity imparting n-type in particular when the third semiconductor films 314 and 324 are formed. Therefore, when the TFTs 301 and 302 are n-type, it is not always necessary to add n-type impurities to the third semiconductor films 314 and 324. However, an impurity imparting p-type conductivity is added to the first semiconductor film in which the channel is formed, and the conductivity type is controlled so as to be as close to the I-type as possible.

  In addition, wirings 315 and 325 are formed so as to be in contact with the pair of third semiconductor films 314 and 324.

  A first passivation film 340 and a second passivation film 341 made of an insulating film are formed so as to cover the TFTs 301 and 302 and the wirings 315 and 325. The passivation film that covers the TFTs 301 and 302 is not limited to two layers, and may be a single layer or three or more layers. For example, the first passivation film 340 can be formed using silicon nitride, and the second passivation film 341 can be formed using silicon oxide. By forming the passivation film using silicon nitride or silicon nitride oxide, it is possible to prevent the TFTs 301 and 302 from being deteriorated by the influence of moisture, oxygen, or the like.

  One end of the wiring 325 is connected to the anode 350 of the light emitting element 303. Further, an electroluminescent layer 351 is formed in contact with the anode 350, and a cathode 332 is formed in contact with the electroluminescent layer 351.

  By forming the first semiconductor films 312 and 322 including the channel formation region using a semi-amorphous semiconductor, a TFT having higher mobility than a TFT using an amorphous semiconductor film can be obtained. And the pixel portion can be formed over the same substrate.

  Note that in this embodiment, the example in which the driving circuit of the light-emitting device and the pixel portion are formed over the same substrate using a TFT using a semi-amorphous semiconductor is described; however, the present invention is not limited to this structure. A pixel portion may be formed using a TFT using a semi-amorphous semiconductor, and a driver circuit formed separately may be attached to a substrate on which the pixel portion is formed. In addition, the first semiconductor film in which the channel is formed can be formed using an amorphous semiconductor. However, in this case, a pixel portion is formed using a TFT using an amorphous semiconductor, and a separately formed drive circuit is attached to a substrate on which the pixel portion is formed.

  Next, a structure of a pixel included in the light emitting device of the present invention will be described. FIG. 10A illustrates one mode of a circuit diagram of a pixel, and FIG. 10B illustrates one mode of a cross-sectional structure of a pixel corresponding to FIG.

  10A and 10B, reference numeral 221 corresponds to a switching TFT for controlling input of a video signal to the pixel, and reference numeral 222 denotes driving for controlling supply of current to the light emitting element 223. This corresponds to a TFT for use. Specifically, the drain current of the driving TFT 222 is controlled in accordance with the potential of the video signal input to the pixel through the switching TFT 221, and the drain current is supplied to the light emitting element 223. Note that 224 corresponds to a capacitor for holding the gate voltage of the driving TFT when the switching TFT 221 is off, and is not necessarily provided.

  Specifically, the switching TFT 221 has a gate electrode connected to the scanning line Gj (j = 1 to y), and one of the source region and the drain region is connected to the signal line Si (i = 1 to x). Is connected to the gate of the driving TFT 222. One of the source region and the drain region of the driving TFT 222 is connected to the power supply line Vi (i = 1 to x), and the other is connected to the anode 225 of the light emitting element 223. One of the two electrodes of the capacitor 224 is connected to the gate electrode of the driving TFT 222 and the other is connected to the anode 225 of the light-emitting element 223.

  10A and 10B, the switching TFT 221 is connected in series, and a plurality of TFTs to which the gate electrode is connected share the first semiconductor film. It has a multi-gate structure. With the multi-gate structure, the off-state current of the switching TFT 221 can be reduced. Specifically, in FIGS. 10A and 10B, the switching TFT 221 has a configuration in which two TFTs are connected in series, but three or more TFTs are connected in series, and A multi-gate structure in which gate electrodes are connected may be used. The switching TFT does not necessarily have a multi-gate structure, and may be a normal single-gate TFT having a single gate electrode and channel formation region.

  Next, a specific manufacturing method of the light-emitting device of the present invention will be described.

  The substrate 710 can be made of a plastic material in addition to glass, quartz, or the like. Further, an insulating film formed on a metal material such as stainless steel or aluminum may be used. A conductive film for forming a gate electrode and a gate wiring (scanning line) is formed on the substrate 710. For the conductive film, a metal material such as chromium, molybdenum, titanium, tantalum, tungsten, aluminum, or an alloy material thereof is used. This conductive film can be formed by a sputtering method or a vacuum evaporation method.

  Gate electrodes 712 and 713 are formed by etching the conductive film. Since the first semiconductor film and the wiring layer are formed over the gate electrodes 712 and 713, it is desirable to process the end portions thereof in a tapered shape. In the case where the conductive film is formed using a material containing aluminum as a main component, the surface may be insulated by anodizing after etching. Although not shown, a wiring connected to the gate electrode can be formed at the same time in this step.

  The first insulating film 714 and the second insulating film 715 can function as gate insulating films by being formed over the gate electrodes 712 and 713. In this case, it is preferable to form a silicon oxide film as the first insulating film 714 and a silicon nitride film as the second insulating film 715. These insulating films can be formed by a glow discharge decomposition method or a sputtering method. In particular, in order to form a dense insulating film with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably included in the reaction gas and mixed into the formed insulating film.

  Then, a first semiconductor film 716 is formed on the first and second insulating films 714 and 715. The first semiconductor film 716 is formed using a semi-amorphous semiconductor (SAS).

This SAS can be obtained by glow discharge decomposition of a silicide gas. A typical silicide gas is SiH ₄ , and in addition, Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4 and the} like can be used. The formation of the SAS can be facilitated by diluting the silicide gas with one or plural kinds of rare gas elements selected from hydrogen, hydrogen and helium, argon, krypton, and neon. It is preferable to dilute the silicide gas at a dilution ratio in the range of 10 times to 1000 times. Of course, the reaction of the coating by glow discharge decomposition is performed under reduced pressure, but the pressure may be in the range of about 0.1 Pa to 133 Pa. The power for forming the glow discharge may be high frequency power of 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or less, and a substrate heating temperature of 100 to 200 ° C. is recommended.

Further, a carbide gas such as CH ₄ and C ₂ H ₆ and a germanium gas such as GeH ₄ and GeF ₄ are mixed in the silicide gas, and the energy band width is 1.5 to 2.4 eV, or 0.8. You may adjust to 9-1.1 eV.

SAS exhibits weak n-type conductivity when an impurity element for the purpose of valence electron control is not intentionally added. This is because oxygen is easily mixed into the semiconductor film because glow discharge with higher power is performed than when an amorphous semiconductor is formed. Therefore, for the first semiconductor film provided with the channel formation region of the TFT, the threshold value is controlled by adding an impurity element imparting p-type at the same time as or after the film formation. Is possible. The impurity element imparting p-type is typically boron, and an impurity gas such as B ₂ H ₆ or BF ₃ may be mixed into the silicide gas at a rate of 1 ppm to 1000 ppm. For example, when boron is used as the impurity element imparting p-type conductivity, the concentration of boron is preferably 1 × 10 ^{14 to} 6 × 10 ¹⁶ atoms / cm ³ .

  Next, a second semiconductor film 717 and a third semiconductor film 718 are formed (FIG. 11A). The second semiconductor film 717 is formed without intentionally adding an impurity element for the purpose of valence electron control, and is preferably formed using SAS similarly to the first semiconductor film 716. The second semiconductor film 717 is formed between the first semiconductor film 716 and the third semiconductor film 718 having one conductivity type that forms a source and a drain, so that it functions as a buffer layer (buffer layer). Have work. Therefore, it is not always necessary when the third semiconductor film 718 having the same conductivity type and one conductivity type is formed on the first semiconductor film 716 having weak n-type conductivity. For the purpose of threshold control, when an impurity element imparting p-type conductivity is added, the second semiconductor film 717 has an effect of changing the impurity concentration stepwise, and in order to improve the junction formation. This is a preferred form. That is, the formed TFT can have a function as a low concentration impurity region (LDD region) formed between the channel formation region and the source or drain region.

The third semiconductor film 718 having one conductivity type may be formed by adding phosphorus as a typical impurity element when an n-channel TFT is formed, and by adding an impurity gas such as PH ₃ to a silicide gas. good. The third semiconductor film 718 having one conductivity type is formed of a semiconductor such as SAS or an amorphous semiconductor except that valence electron control is performed.

  As described above, the first insulating film 714 to the third semiconductor film 718 having one conductivity type can be continuously formed without being exposed to the air. In other words, each stacked interface can be formed without being contaminated by atmospheric components or contaminating impurity elements floating in the atmosphere, so that variations in TFT characteristics can be reduced.

  Next, a mask 719 is formed using a photoresist, and the first semiconductor film 716, the second semiconductor film 717, and the third semiconductor film 718 having one conductivity type are etched and formed in an island shape ( FIG. 11B).

  After that, a second conductive film 720 for forming wirings connected to the source and drain is formed. The second conductive film 720 is formed using aluminum or a conductive material containing aluminum as a main component. The layer in contact with the semiconductor film is formed using titanium, tantalum, molybdenum, tungsten, copper, or a nitride of these elements. A laminated structure may be used. For example, the first layer is Ta, the second layer is W, the first layer is TaN, the second layer is Al, the first layer is TaN, the second layer is Cu, the first layer is Ti, and the second layer is Al. A combination in which the layer is Ti is also conceivable. Further, an AgPdCu alloy may be used for either the first layer or the second layer. A three-layer structure in which W, an alloy of Al and Si (Al-Si), and TiN are sequentially stacked may be employed. Tungsten nitride may be used instead of W, an alloy film of Al and Ti (Al—Ti) may be used instead of an alloy of Al and Si (Al—Si), and Ti may be used instead of TiN. It may be used. In order to improve heat resistance, aluminum such as titanium, silicon, scandium, neodymium, or copper may be added to aluminum in an amount of 0.5 to 5 atomic% (FIG. 11C).

Next, a mask 721 is formed. The mask 721 is a patterned mask for forming wirings connected to the source and drain, and is used in combination as an etching mask for removing the third semiconductor film 718 having one conductivity type and forming a channel formation region at the same time. Is. Etching of aluminum or a conductive film mainly containing aluminum may be performed using a chloride gas such as BCl ₃ or Cl ₂ . Wirings 723 to 726 are formed by this etching process. In addition, etching for forming a channel formation region is performed using a fluoride gas such as SF ₆ , NF ₃ , CF ₄ , and in this case, etching with the first semiconductor film 716 serving as a base is performed. Since the selection ratio cannot be taken, the processing time is appropriately adjusted. As described above, a channel-etch TFT structure can be formed (FIG. 12A).

Next, a third insulating film 727 for protecting the channel formation region is formed using a silicon nitride film. This silicon nitride film can be formed by sputtering or glow discharge decomposition, but it is intended to prevent the entry of contaminants such as organic substances, metal substances, and water vapor floating in the atmosphere, and it must be a dense film. Is required. By using a silicon nitride film for the third insulating film 727, the oxygen concentration in the first semiconductor film 716 can be suppressed to 5 × 10 ¹⁹ atoms / cm ³ or less, preferably 1 × 10 ¹⁹ atoms / cm ³ or less. it can. For this purpose, silicon nitride is a high-frequency sputtered silicon nitride film using silicon as a target and mixed with a rare gas element such as nitrogen and argon, and densification is promoted by including the rare gas element in the film. It will be. Also in the glow discharge decomposition method, a silicon nitride film formed by diluting a silicide gas with a rare gas element such as argon 100 to 500 times can form a dense film even at a low temperature of 100 degrees or less. It is preferable. Further, if necessary, the fourth insulating film 728 may be stacked with a silicon oxide film. The third insulating film 727 and the fourth insulating film 728 correspond to a passivation film.

  On the third insulating film 727 and / or the fourth insulating film 728, a planarization film 729 is formed as a preferable form. The planarization film is preferably formed using an insulating film including an Si—O bond and an Si—CHx crystal hand formed using an organic resin such as acrylic, polyimide, or polyamide, or a siloxane-based material as a starting material. Since these materials have water content, it is preferable to provide a sixth insulating film 730 as a barrier film that prevents intrusion and release of moisture. As the sixth insulating film 730, a silicon nitride film as described above may be applied (FIG. 12B).

  The wiring 732 is formed after contact holes are formed in the sixth insulating film 730, the planarization film 729, the third insulating film 727, and the fourth insulating film 728 (FIG. 12C).

The channel-etched TFT formed as described above can obtain a field effect mobility of ² to 10 cm ² / V · sec by forming a channel formation region with SAS.

  Next, as illustrated in FIG. 13A, an anode 731 is formed over the sixth insulating film 730 so as to be in contact with the wiring 732. As the anode 731, in addition to ITO, IZO, ITSO, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide can be used. In addition to the transparent conductive film, a titanium nitride film or a titanium film may be used as the anode 731. In this case, after forming the transparent conductive film, the titanium nitride film or the titanium film is formed with a thickness enough to transmit light (preferably, about 5 nm to 30 nm). In FIG. 13A, ITO is used for the anode 731. The anode 731 may be cleaned by polishing with a CMP method or a polyvinyl alcohol-based porous material so that the surface thereof is planarized. Further, after polishing using the CMP method, the surface of the anode 731 may be irradiated with ultraviolet rays, oxygen plasma treatment, or the like.

  Next, a partition wall 733 formed using an organic resin film, an inorganic insulating film, or siloxane is formed over the sixth insulating film 730. Note that siloxane is a material in which a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and a substituent includes at least hydrogen. In addition to the above structure, the substituent may have at least one of fluorine, an alkyl group, and aromatic hydrocarbon. The partition wall 733 has an opening, and the anode 731 is exposed in the opening. Next, as illustrated in FIG. 13B, an electroluminescent layer 734 is formed so as to be in contact with the anode 731 at the opening of the partition 733. The electroluminescent layer 734 may be composed of a single layer or a plurality of layers stacked. In the case of a plurality of layers, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are stacked in this order on the anode 731.

  Then, a cathode 735 is formed so as to cover the electroluminescent layer 734. For the cathode 735, a known material having a small work function, for example, Ca, Al, CaF, MgAg, AlLi, or the like can be used. In the opening of the partition wall 733, the anode 731, the electroluminescent layer 734, and the cathode 735 overlap with each other, so that a light-emitting element 736 is formed (FIG. 13B).

  In actuality, when completed up to FIG. 13, packaging (encapsulation) with a protective film (laminate film, UV curable resin film, etc.) or cover material with high air tightness and low outgassing so as not to be exposed to the outside air. Is preferred.

  There are a total of five element substrates using the same TFT in the pixel portion and the drive circuit, including a gate electrode formation mask, a semiconductor region formation mask, a wiring formation mask, a contact hole formation mask, and an anode formation mask. The mask can be formed.

  Note that in this embodiment, the example in which the driving circuit of the light-emitting device and the pixel portion are formed over the same substrate using a TFT using a semi-amorphous semiconductor is described; however, the present invention is not limited to this structure. A pixel portion may be formed using a TFT using an amorphous semiconductor, and a driver circuit which is separately formed may be attached to a substrate on which the pixel portion is formed.

  Note that FIGS. 11 to 13 illustrate a method for manufacturing a TFT having the structure illustrated in FIG. 9A; however, a TFT having the structure illustrated in FIG. 9B can be similarly manufactured. However, in the case of the TFT shown in FIG. 9B, channel protection films 330 and 331 are formed over the first semiconductor films 312 and 322 made of SAS so as to overlap with the gate electrodes 310 and 320. Therefore, it is different from FIGS.

  In FIGS. 12A and 12B, contact holes are formed in the third insulating film (first passivation film) and the fourth insulating film (second passivation film), and then an anode is formed. A partition wall is formed. The partition wall may be formed of an insulating film including an Si-O bond and an Si-CHx crystal hand formed using an organic resin such as acrylic, polyimide, or polyamide, or a siloxane-based material as a starting material. It is preferable to form an opening on the anode so that the side wall of the opening is an inclined surface formed with a continuous curvature.

  In this example, an example of a top view of the pixel shown in FIG. 10 will be described.

  FIG. 14 shows a top view of the pixel of this embodiment. Si corresponds to a signal line, Vi corresponds to a power supply line, and Gj corresponds to a scanning line. In this embodiment, the signal line Si and the power supply line Vi are formed of the same conductive film. Further, the scanning line Gj and the wiring 250 are formed using the same conductive film. A part of the scanning line Gj functions as a gate electrode of the switching TFT 221. A part of the wiring 250 functions as a gate electrode of the driving TFT 222, and another part functions as a first electrode of the capacitor 224. A part 251 on the anode 225 side of the active layer included in the driving TFT 222 functions as a second electrode of the capacitor 224. A capacitive element 224 is formed by a part 251 of the active layer on the anode 225 side, a part of the wiring 250, and a gate insulating film (not shown). 225 corresponds to an anode and emits light in a region (light emitting area) overlapping with an electroluminescent layer and a cathode (both not shown).

  The top view of the present invention is an example of the present invention, and the present invention is not limited to this.

  The semi-amorphous TFT or amorphous TFT used in the light emitting device of the present invention is n-type. In this embodiment, a cross-sectional structure of a pixel will be described with an example in which a driving TFT is an n-type.

  FIG. 15A is a cross-sectional view of a pixel in the case where the driving TFT 7001 is an n-type and light emitted from the light-emitting element 7002 is emitted to the cathode 7003 side. In FIG. 15A, an electroluminescent layer 7004 and a cathode 7003 are sequentially stacked over an anode 7005 which is electrically connected to the driving TFT 7001. It is desirable to use a material that does not easily transmit light for the anode 7005. For example, titanium nitride or titanium can be used. The electroluminescent layer 7004 may be composed of a single layer or a plurality of layers stacked. A known material can be used for the cathode 7003 as long as it is a conductive film having a low work function. For example, Ca, Al, CaF, MgAg, AlLi, etc. are desirable. However, the film thickness is set so as to transmit light (preferably, about 5 nm to 30 nm). For example, Al having a thickness of 20 nm can be used as the cathode 7003. A transparent conductive film 7007 is formed so as to cover the cathode 7003. As the transparent conductive film 7007, for example, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide in addition to ITO, IZO, and ITSO can be used.

  A portion where the cathode 7003, the electroluminescent layer 7004, and the anode 7005 overlap corresponds to the light emitting element 7002. In the case of the pixel shown in FIG. 15A, light emitted from the light-emitting element 7002 passes to the cathode 7003 side as indicated by a hollow arrow.

  FIG. 15B is a cross-sectional view of a pixel in the case where the driving TFT 7011 is an n-type and light emitted from the light-emitting element 7012 passes to the cathode 7013 side. In FIG. 15B, an anode 7015 of the light-emitting element 7012 and a driving TFT 7011 are electrically connected, and an electroluminescent layer 7014 and a cathode 7013 are sequentially stacked over the anode 7015. The anode 7015 is formed using a transparent conductive film that transmits light. For example, in addition to ITO, IZO, and ITSO, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide may be used. As in FIG. 15A, the electroluminescent layer 7014 may be formed of a single layer or a stack of a plurality of layers. The cathode 7013 has a low work function, and a known material can be used as long as it is a conductive film having a low work function and reflecting light, as in the case of FIG.

  A portion where the anode 7015, the electroluminescent layer 7014, and the cathode 7013 overlap corresponds to the light emitting element 7012. In the case of the pixel shown in FIG. 15B, light emitted from the light-emitting element 7012 passes to the anode 7015 side as indicated by a hollow arrow.

  Next, FIG. 15C is a cross-sectional view of a pixel in the case where the driving TFT 7021 is an n-type and light emitted from the light-emitting element 7022 is emitted from both the anode 7025 side and the cathode 7023 side. In FIG. 15C, an electroluminescent layer 7024 and a cathode 7023 are sequentially stacked over an anode 7025 electrically connected to the driving TFT 7021. The anode 7025 can be formed using a transparent conductive film that transmits light, as in FIG. As in FIG. 15A, the electroluminescent layer 7024 may be formed of a single layer or a stack of a plurality of layers. As in the case of FIG. 15A, a known material can be used for the cathode 7023 as long as it is a conductive film having a low work function. However, the film thickness is set so as to transmit light. For example, Al having a thickness of 20 nm can be used as the cathode 7023.

  A portion where the cathode 7023, the electroluminescent layer 7024, and the anode 7025 overlap corresponds to the light-emitting element 7022. In the case of the pixel shown in FIG. 15C, light emitted from the light-emitting element 7022 passes through both the anode 7025 side and the cathode 7023 side as indicated by white arrows.

  Note that in this embodiment, an example in which the driving TFT and the light emitting element are electrically connected is shown, but another TFT may be connected in series between the driving TFT and the light emitting element.

  Note that a protective film may be formed so as to cover the light-emitting element in all the pixels illustrated in FIGS. 15A to 15C. As the protective film, a film that hardly transmits a substance that causes deterioration of the light-emitting element, such as moisture or oxygen, as compared with other insulating films is used. Typically, it is desirable to use, for example, a DLC film, a carbon nitride film, a silicon nitride film formed by an RF sputtering method, or the like. In addition, the above-described film that hardly transmits a substance such as moisture or oxygen and a film that easily allows a substance such as moisture or oxygen to pass through can be stacked to be used as a protective film.

  In FIGS. 15B and 15C, in order to obtain light from the cathode side, in addition to the method of reducing the film thickness of the cathode, ITO whose work function is reduced by adding Li. There is also a method using.

  Note that the light emitting device of the present invention is not limited to the configuration shown in FIG. 15, and various modifications based on the technical idea of the present invention are possible.

  In this embodiment, an example of a shift register using TFTs having the same polarity will be described. FIG. 16A shows the structure of the shift register of this embodiment. The shift register illustrated in FIG. 16A operates using the first clock signal CLK, the second clock signal CLKb, and the start pulse signal SP. Reference numeral 1401 denotes a pulse output circuit, and its specific structure is shown in FIG.

  The pulse output circuit 1401 includes TFTs 801 to 806 and a capacitor 807. The TFT 801 has a gate connected to the node 2, a source connected to the gate of the TFT 805, and a potential Vdd applied to the drain. The TFT 802 has a gate connected to the gate of the TFT 806, a drain connected to the gate of the TFT 805, and a potential Vss applied to the source. The TFT 803 has a gate connected to the node 3, a source connected to the gate of the TFT 806, and a potential Vdd applied to the drain. The TFT 804 has a gate connected to the node 2, a drain connected to the gate of the TFT 805, and a potential Vss applied to the source. The TFT 805 has a gate connected to one electrode of the capacitor 807, a drain connected to the node 1, and a source connected to the other electrode of the capacitor 807 and the node 4. The TFT 806 has a gate connected to one electrode of the capacitor 807, a drain connected to the node 4, and a potential Vss applied to the source.

  Next, operation of the pulse output circuit 1401 illustrated in FIG. However, it is assumed that CLK, CLKb, and SP are Vdd when the signal is at the H level and Vss when the signal is at the L level, and Vss = 0 for simplifying the description.

  When SP becomes H level, the TFT 801 is turned on, so that the gate potential of the TFT 805 rises. Finally, when the gate potential of the TFT 805 becomes Vdd-Vth (Vth is a threshold value of the TFTs 801 to 806), the TFT 801 is turned off and enters a floating state. On the other hand, when SP becomes H level, the TFT 804 is turned on, so that the gate potentials of the TFTs 802 and 806 are lowered to finally Vss, and the TFTs 802 and 806 are turned off. At this time, the gate of the TFT 803 is at the L level and is turned off.

  Next, SP becomes L level, the TFTs 801 and 804 are turned off, and the gate potential of the TFT 805 is held at Vdd−Vth. Here, if the gate-source voltage of the TFT 805 exceeds the threshold value Vth, the TFT 805 is turned on.

  Next, when the CLK applied to the node 1 changes from the L level to the H level, the TFT 805 is turned on, so that the potential of the node 4, that is, the source of the TFT 805 starts to rise. Since capacitive coupling due to the capacitive element 807 exists between the gate and the source of the TFT 805, the potential of the gate of the TFT 805 in a floating state rises again as the potential of the node 4 rises. Eventually, the potential of the gate of the TFT 805 becomes higher than Vdd + Vth, and the potential of the node 4 becomes equal to Vdd. Then, the above-described operation is similarly performed in the pulse output circuit 1401 in the second and subsequent stages, and pulses are output in order.

  In this example, the appearance of a panel corresponding to one embodiment of the light-emitting device of the present invention will be described with reference to FIG. FIG. 17A is a top view of a panel in which a TFT and a light-emitting element formed over a first substrate are sealed with a sealant between the second substrate and FIG. 17B. FIG. 17A corresponds to a cross-sectional view taken along the line AA ′ of FIG.

  A sealant 4005 is provided so as to surround the pixel portion 4002 provided over the first substrate 4001 and the scan line driver circuit 4004. A second substrate 4006 is provided over the pixel portion 4002 and the scan line driver circuit 4004. Therefore, the pixel portion 4002 and the scan line driver circuit 4004 are sealed together with the filler 4007 by the first substrate 4001, the sealant 4005, and the second substrate 4006. In addition, a signal line driver circuit 4003 formed using a polycrystalline semiconductor film is mounted over a separately prepared substrate in a region different from the region surrounded by the sealant 4005 over the first substrate 4001. Note that in this embodiment, an example in which a signal line driver circuit including a TFT using a polycrystalline semiconductor film is attached to the first substrate 4001 is described; however, the signal line driver circuit is formed using a transistor using a single crystal semiconductor. However, they may be bonded together. FIG. 17 illustrates a TFT 4009 formed of a polycrystalline semiconductor film that is included in the signal line driver circuit 4003.

  In addition, the pixel portion 4002 provided over the first substrate 4001 and the scan line driver circuit 4004 each include a plurality of TFTs. FIG. 17B illustrates the TFT 4010 included in the pixel portion 4002 as an example. Yes. In this embodiment, it is assumed that the TFT 4010 is a driving TFT. The TFT 4010 corresponds to a TFT using a semi-amorphous semiconductor.

  Reference numeral 4011 corresponds to a light-emitting element, and a pixel electrode included in the light-emitting element 4011 is electrically connected to the drain of the TFT 4010 through a wiring 4017. In this embodiment, the counter electrode of the light emitting element 4011 and the transparent conductive film 4012 are electrically connected. Note that the structure of the light-emitting element 4011 is not limited to the structure described in this embodiment. The structure of the light-emitting element 4011 can be changed as appropriate depending on the direction of light extracted from the light-emitting element 4011, the polarity of the TFT 4010, or the like.

  In addition, a variety of signals and potentials are supplied to the signal line driver circuit 4003 which is formed separately, the scan line driver circuit 4004, or the pixel portion 4002, although they are not shown in the cross-sectional view in FIG. And 4015 through a connection terminal 4016.

  In this embodiment, the connection terminal 4016 is formed of the same conductive film as the pixel electrode included in the light emitting element 4011. Further, the lead wiring 4014 is formed of the same conductive film as the wiring 4017. The lead wiring 4015 is formed of the same conductive film as the gate electrode of the TFT 4010.

  The connection terminal 4016 is electrically connected to a terminal included in the FPC 4018 through an anisotropic conductive film 4019.

  Note that as the first substrate 4001 and the second substrate 4006, glass, metal (typically stainless steel), ceramics, or plastic can be used. As the plastic, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film, or an acrylic resin film can be used. A sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can also be used.

  However, the second substrate must be transparent to the substrate positioned in the light extraction direction from the light emitting element 4011. In that case, a light-transmitting material such as a glass plate, a plastic plate, a polyester film, or an acrylic film is used.

  As the filler 4007, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used. PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicon resin, PVB (Polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. In this example, nitrogen was used as the filler.

  Note that although FIG. 17 illustrates an example in which the signal line driver circuit 4003 is separately formed and mounted on the first substrate 4001, this embodiment is not limited to this structure. The scan line driver circuit may be separately formed and mounted, or only part of the signal line driver circuit or only part of the scan line driver circuit may be separately formed and mounted.

  Note that in this embodiment, the example in which the driving circuit of the light-emitting device and the pixel portion are formed over the same substrate using a TFT using a semi-amorphous semiconductor is described; however, the present invention is not limited to this structure. A pixel portion may be formed using a TFT using an amorphous semiconductor, and a driver circuit which is separately formed may be attached to a substrate on which the pixel portion is formed.

  This embodiment can be implemented in combination with the structure described in other embodiments.

  Since a light-emitting device using a light-emitting element is a self-luminous type, it has excellent visibility in a bright place and a wide viewing angle compared to a liquid crystal display. Therefore, it can be used for display portions of various electronic devices.

  As an electronic device using the light emitting device of the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook type personal computer, a game device, Play back a recording medium such as a portable information terminal (mobile computer, mobile phone, portable game machine or electronic book), an image playback device (specifically a DVD: Digital Versatile Disc) equipped with a recording medium, and display the image. A device having a display capable of displaying). In particular, in the case of a portable electronic device, it is desirable to use a light-emitting device because there are many opportunities to see the screen from an oblique direction and the wide viewing angle is important. In the present invention, since it is not necessary to provide a crystallization step after the formation of the semiconductor film, it is relatively easy to increase the size of the panel. Therefore, the present invention is very suitable for an electronic device using a large panel of 10-50 inches. Useful. Specific examples of these electronic devices are shown in FIGS.

  FIG. 18A illustrates a display device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. By using the light emitting device of the present invention for the display portion 2003, the display device of the present invention is completed. Since the light-emitting device is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display can be obtained. The light emitting element display device includes all information display devices such as a personal computer, a TV broadcast receiver, and an advertisement display.

  FIG. 18B shows a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. By using the light emitting device of the present invention for the display portion 2203, the notebook personal computer of the present invention is completed.

  FIG. 18C illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. A display portion A2403 mainly displays image information, and a display portion B2404 mainly displays character information. Note that an image reproducing device provided with a recording medium includes a home game machine and the like. By using the light emitting device of the present invention for the display portions A 2403 and B 2404, the image reproducing device of the present invention is completed.

  In addition, since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background. It is desirable to do.

  As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. In addition, the electronic device of this embodiment may use the light-emitting device having any configuration shown in Embodiments 1 to 10.

The figure which shows the connection structure of driving TFT and a light emitting element, and the relationship of the electric potential supplied to each element. FIG. 6 is a circuit diagram of a pixel portion. 4A and 4B illustrate a driving method of a light emitting device of the present invention. FIG. 6 is a circuit diagram of a pixel portion. FIG. 6 illustrates a structure of a light-emitting device of the present invention. The circuit diagram of a pixel. 4A and 4B illustrate a driving method of a light emitting device of the present invention. 1 is a schematic view of an element substrate used in a light emitting device of the present invention. Sectional drawing of a drive circuit and a pixel part. The circuit diagram of a pixel and sectional drawing. 4A and 4B illustrate a method for manufacturing a light-emitting device. 4A and 4B illustrate a method for manufacturing a light-emitting device. 4A and 4B illustrate a method for manufacturing a light-emitting device. The top view of a pixel. A cross-sectional view of a pixel. FIG. 6 illustrates one embodiment of a shift register. 2A and 2B are a top view and a cross-sectional view of a light-emitting device of the present invention. FIG. 14 is a diagram of an electronic device using the light-emitting device of the present invention. The figure which shows the connection structure of TFT for a drive, and a light emitting element. 4A and 4B illustrate a driving method of a light emitting device of the present invention.

Claims (6)

Has a light emitting element, a n-type first TFT of an n-type second TFT of a pixel portion in which pixels constituted are arranged in matrix in a capacitor,
One of the source and the drain of the first TFT is electrically connected to the signal line,
The other of the source and drain of the first TFT is electrically connected to the gate of the second TFT,
A gate of the first TFT is electrically connected to a scanning line;
One of the source and the drain of the second TFT is electrically connected to a power supply line,
The other of the source and drain of the second TFT is electrically connected to the anode of the light emitting element,
One electrode of the capacitive element is electrically connected to the gate of the second TFT,
The other electrode of the capacitive element is electrically connected to the other of the source and drain of the second TFT,
In the first period, the first TFT is turned on, and a first potential having image information is supplied from the signal line to the gate of the second TFT via the first TFT, and the power source A second potential is supplied from a line to one of a source and a drain of the second TFT, and a third potential is supplied to the cathode of the light emitting element, whereby the first potential and the second potential are supplied. Is held by the capacitive element,
In the second period, the first TFT is turned off, the fourth potential is supplied to one of the source and the drain of the second TFT, and the fifth potential is supplied to the cathode of the light emitting element. Thus, a current corresponding to the potential difference between the first potential and the second potential is supplied to the light emitting element,
The second potential is lower than the third potential;
The light-emitting device, wherein the fourth potential is higher than the fifth potential. Has a light emitting element, a n-type first TFT of a p-type second TFT of a pixel portion in which pixels constituted are arranged in matrix in a capacitor,
One of the source and the drain of the first TFT is electrically connected to the signal line,
The other of the source and drain of the first TFT is electrically connected to the gate of the second TFT,
A gate of the first TFT is electrically connected to a scanning line;
One of the source and the drain of the second TFT is electrically connected to a power supply line,
The other of the source and drain of the second TFT is electrically connected to the cathode of the light emitting element,
One electrode of the capacitive element is electrically connected to the gate of the second TFT,
The other electrode of the capacitive element is electrically connected to the other of the source and drain of the second TFT,
In the first period, the first TFT is turned on, and a first potential having image information is supplied from the signal line to the gate of the second TFT via the first TFT, and the power source The second potential is supplied from the line to one of the source and the drain of the second TFT, and the third potential is supplied to the anode of the light emitting element, whereby the first potential and the second potential are supplied. Is held by the capacitive element,
In the second period, the first TFT is turned off, the fourth potential is supplied to one of the source and the drain of the second TFT, and the fifth potential is supplied to the anode of the light emitting element. Thus, a current corresponding to the potential difference between the first potential and the second potential is supplied to the light emitting element,
The second potential is higher than the third potential;
The light emitting device is characterized in that the fourth potential is lower than the fifth potential. In claim 1 or claim 2,
In the second period, the second TFT operates in a saturation region. In any one of Claims 1 thru | or 3,
The light emitting device, wherein the third potential and the fifth potential are the same height. In any one of Claims 1 thru | or 4,
The light-emitting device, wherein the image information is an analog signal .   An electronic device in which the light-emitting device according to claim 1 is used for a display unit.

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