JP4937681B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine provided with an image display device that allows a player to play a predetermined game using a game medium and whose display state can be changed.

  As a gaming machine such as a pachinko machine, a variable display is performed by updating and displaying predetermined identification information (for example, a symbol) on an image display device such as a liquid crystal display (LCD), and a stop symbol (display) There is a game that enhances the game interest by executing a so-called variable display game that informs whether or not to give a predetermined game value depending on the result. Displaying updated identification information is referred to as variable or variable display.

  The variable display game is a game in which when the “big hit” occurs, the stop symbol form when the symbol update display is completely stopped is changed to a specific display form. When it is a “hit”, it is very easy to win a game ball in the big prize opening by opening a special electric accessory called a big prize opening. Then, the player is provided with a state in which the winning of the game ball is extremely easy for a certain period of time.

  Hereinafter, a state in which the prize winning opening is in an open state and the winning of a game ball is extremely easy is referred to as a specific game state. When entering the specific gaming state, for example, the display symbols displayed on the image display device are in a specific display mode in which the display symbols are set in advance (generally, the stop symbols are aligned in the same pattern).

  In the variable display game, the player pays attention to whether or not the mode of the stop symbol becomes the specific display mode and becomes a “hit”. For this reason, various effects are displayed to enhance the game entertainment, such as changing the variation of the symbols, until the symbol is finalized (final stop) so that it can be determined whether or not it will be a “big hit”. Is called.

  As such an effect, for example, in the image display device, a symbol other than the symbol that becomes the final stop symbol (for example, the middle symbol of the left and right middle symbols) continues for a predetermined time and matches a specific display result. Before the final result is displayed, such as when it is stopped, swinging, enlarged or reduced or deformed, or when multiple symbols change synchronously with the same symbol, or the position of the displayed symbol is switched. There is a reach effect performed in a state where the possibility of occurrence of big hits is continuing (hereinafter, these states are referred to as reach states). Further, the reach state and its state are referred to as a reach mode. Furthermore, variable display including reach production is called reach variable display.

  Usually, a drawing processor for drawing (for image processing) is mounted on a control board for controlling the image display device. The control board is provided with a ROM for storing various image data and a frame buffer that is a RAM for developing an image displayed on the image display device. The drawing processor reads predetermined image data stored in the ROM based on an instruction from the host CPU that performs display control, and expands the read image data in a predetermined area of the frame buffer. Then, an image is displayed on the image display device based on the image data read from the frame buffer. Note that when the image data stored in the ROM is compressed, the drawing processor performs a process of expanding the image data read from the ROM. Such a drawing processor is generally provided with a function to draw (synthesize) a still image or a moving image (hereinafter also referred to as a movie image).

There is also a drawing processor having a function of clipping (cutting out) an image based on image data read from the ROM to create an image of identification information that fits in the image display area (see, for example, Patent Document 1). In a gaming machine using such a drawing processor, normal fluctuations and fluctuations with reach effects can be obtained by changing the clipping range of the identification information image between normal fluctuations without reach effects and fluctuations with reach effects. The display mode of the identification information image can be changed. That is, the presentation of the identification information in the image display device can be diversified.
Japanese Patent Laying-Open No. 2005-143915 (paragraphs 0124 and 0144)

  However, when the display mode of the image of the identification information is changed by changing the clipping range of the image, the ROM for storing the image data needs to store data for specifying the clipping range. If the number of types of identification information is increased, the amount of data specifying the clipping range also increases, so that it is necessary to allocate a large amount of data to the data specifying the clipping range in the ROM. In other words, when the presentation of identification information is diversified, the capacity of the ROM for storing image data increases.

  Therefore, the present invention enables diversification of effects in an image display device without increasing the capacity of a ROM for storing image data in a gaming machine having an image display device whose display state can be changed. For the purpose.

A gaming machine according to the present invention is a gaming machine including an image display device (for example, the image display device 9) that allows a player to play a predetermined game using a game medium and whose display state can be changed. And an effect control microcomputer (for example, effect control microcomputer 100) for giving a command for controlling the display state of the image display device, and an image data storage means (for example, CGROM 83) for storing a plurality of image data. A drawing processor (for example, a drawing processor 109) that performs processing for displaying an image on the image display device based on the image data stored in the image data storage means in response to an instruction from the effect control microcomputer; The production control microcomputer is a polygon position specifying hand for specifying the polygon position in the virtual three-dimensional space. (For example, the drawing processor 109 executes the processing of steps S643, S653, and S663), and the drawing processor executes the processing for arranging the polygon at the position specified by the polygon position specifying means. Means (for example, a portion for executing drawing processing (processing for developing image data in the VRAM) in accordance with the processing of steps S643, S653, and S663 in the drawing processor 109) and a polygon arranged by the polygon arrangement means are predetermined. create a two-dimensional image by performing a rendering process using a viewpoint, mask pattern generation means for generating a mask pattern by writing the two-dimensional image created in a predetermined memory (for example, the drawing processor 109, the step S645 , S646, S655, S6 6, S665, and a part) for executing drawing processing according to the processing of S666, the mask pattern generation means, optionally changing the shape of the processing, or polygon arbitrarily change the position of the polygon in the virtual three-dimensional space processing Or a movement of the polygon or a change in shape of the polygon, or a movement of the polygon and a change in the shape based on both processes, and the drawing processor uses the image data stored in the image data storage means as a mask pattern in the memory. Is a clipping unit that performs clipping of image data using a mask pattern by writing in a region where the mask is written (for example, a part that executes drawing processing according to the processing of steps S647, S657, and S667 in the drawing processor 109) ) And clipping means clipped Image signal generation means for generating an image signal based on the image data and outputting the generated image signal to the image display device (for example, the display circuit 97 for outputting the image signal based on the image data of the drawing area in the drawing processor 109) ).

  The drawing processor executes texture pasting processing for pasting the texture onto the polygon (for example, in the rendering processor 109, the stationary statics previously determined for the polygon between the processing in step S643 and the processing in step S644). And a mask pattern generation unit that generates a mask pattern based on an image obtained by rendering a polygon to which a texture is pasted by a texture pasting unit. It may be configured to generate (for example, the drawing processor 109 executes the processes of steps S645, S655, and S665).

  The clipping means converts the image data of the second image (for example, “8” decorative pattern) displayed on the first image (for example, “7” decorative pattern) displayed on the image display device to the mask pattern. (For example, the drawing processor 109 executes the process of the image data of “8” on the image data of “7”), and the image signal generation means An image signal in which an image based on the image data clipped by the clipping means is arranged in the image display area may be generated (see FIG. 24).

  The polygon position specifying means may be configured to specify a position corresponding to the type of the first image as the position of the polygon (see FIG. 57).

  The mask pattern generation unit changes the size of the image to be rendered (for example, the drawing processor 109 does not change the size of the polygon and does not change the size of the polygon in the rendering process (steps S645, S655, S665). The size may be controlled so as to change the size of the area from which the size is read.

  The mask pattern generation means generates a mask pattern in which the edge portion of the image is made translucent (for example, when the drawing processor 109 executes the processing of steps S647, S657, and S667, A command for setting the α value of the edge portion to a value lower than 1.0 may be given to the drawing processor 109, and the edge portion may be α-blended to execute the synthesis process.

According to the first aspect of the present invention, the drawing processor uses the polygon placement means for executing the process of placing the polygon at the position designated by the polygon position designation means, and the polygon placed by the polygon placement means using a predetermined viewpoint. create a two-dimensional image by performing a rendering process, and a mask pattern generation means for generating a mask pattern by writing the two-dimensional image created in a predetermined memory, the mask pattern generation means, in the virtual three-dimensional space Based on the process of changing the position of the polygon arbitrarily, the process of changing the polygon shape arbitrarily, or both processes, the polygon movement or shape change, or the polygon movement and shape change is realized. , the image data stored in the image data storage means, in the memory By writing to the area where disk pattern is written, because it includes a clipping means for performing clipping of the image data using the mask pattern, different masks by changing the designation of the shape and position of the polygon the polygon arrangement unit is arranged Patterns can be generated, and the effects in the image display apparatus can be diversified without increasing the capacity of the ROM for storing image data.

  In the invention according to claim 2, the drawing processor includes a texture pasting unit that performs a process of pasting the texture onto the polygon, and the mask pattern generation unit creates an image obtained by rendering the polygon onto which the texture is pasted by the texture pasting unit. Since the mask pattern is generated on the basis, the effects in the image display device can be further diversified by changing the texture to be applied in various ways.

  According to a third aspect of the present invention, the clipping means uses, as a mask pattern, the image data of the second image displayed so as to overlap the first image displayed on the image display device (for example, the decorative pattern “7”). The image signal generation means is configured to generate an image signal in which an image based on the image data clipped by the clipping means is generated in the display area of the first image. Can improve the interest of the game.

  In the invention according to claim 4, since the polygon position specifying means is configured to specify a position corresponding to the type of the first image as the position of the polygon, it is possible to further diversify the effects by the image. become.

  According to the fifth aspect of the present invention, since the mask pattern generation means is configured to change the size of the image to be rendered, the effects on the image display device are further diversified without increasing the burden on the drawing processor. Will be able to.

  In the invention described in claim 6, since the mask pattern generating means is configured to generate a mask pattern in which the edge portion of the image is made translucent, the boundary portion of the image with another image can be displayed smoothly. The display quality in the image display device can be improved.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. In the following embodiment, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and a predetermined number of gaming media are paid out as prizes according to the game. It can also be applied to other gaming machines such as slot machines.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding game boards described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, an image display device (variable display device) 9 including a plurality of variable display portions each variably displaying a decorative pattern for performance is provided. The image display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. The image display device 9 performs variable display of the decorative symbol as a decorative symbol (for production) during the variable symbol special symbol display period of the special symbol indicator 8. The image display device 9 that performs variable display of decorative designs is controlled by an effect control microcomputer mounted on the effect control board and a drawing processor. At the bottom of the image display device 9, four special symbol hold memory indicators 18 for displaying the number of valid winning balls that have entered the start winning opening 14, that is, the number of hold memories (also referred to as start memory or start prize memory), are provided. ing. The special symbol reservation storage display 18 displays up to four reservation storage numbers in the order of winning. The special symbol hold storage display 18 increases the number of LEDs in the lit state by 1 each time there is a start winning in the start winning opening 14. Then, each time the special symbol display 8 starts variable display, the special symbol hold storage indicator 18 reduces the number of LEDs in the lit state by 1 (that is, turns off one LED). Specifically, the special symbol hold storage display 18 shifts the lighting state each time variable display is started on the special symbol display 8. In this example, the upper limit number (up to 4) is provided for the number of starting memories by winning to the start winning opening 14, but the upper limit number may be four or more.

  A special symbol display (special symbol display device) 8 that variably displays a special symbol as identification information is provided on the upper part of the image display device 9. In this embodiment, the special symbol display 8 is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying numbers 0 to 9, for example. The special symbol display 8 may be configured to variably display a larger number of numbers such as 0 to 99 in order to make it difficult for the player to grasp a specific stop symbol. Further, the image display device 9 performs variable display of the decorative symbol as a symbol for decoration (for production) during the variable symbol display period of the special symbol by the special symbol indicator 8.

  Below the image display device 9 is provided a variable winning ball device 15 that forms a start winning opening 14. The variable winning ball device 15 is opened by a solenoid 16, and when the variable winning ball device 15 is opened, a game ball can be easily won in the start winning port 14. The game ball won in the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a.

  Below the variable winning ball apparatus 15, a special variable winning ball apparatus 20 that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided. The special variable winning ball apparatus 20 has an opening / closing plate, and the large winning opening (variable winning ball apparatus) is opened by controlling the opening / closing plate to be opened. The winning ball that has won the special variable winning ball device 20 is detected by the count switch 23.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting left and right lamps (designs can be visually recognized when lit). For example, if the right lamp is lit at the end of variable display, it is a win. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls entered into the gate 32 is provided. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time the variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning ports (ordinary winning ports) 29, 30, 33, and 39. The winning holes 29, 30, 33, and 39 for the game balls are awarded to the winning port switches 29a and 30a, respectively. , 33a, 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. Around the left and right of the game area 7, there are provided decorative lamps 25 blinking and displayed during the game, and at the lower part there is an outlet 26 for absorbing a game ball that has not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration LED are examples of a decorative light emitter provided in the gaming machine.

  In this example, a prize ball LED 51 that is lit while paying out a prize ball is provided in the vicinity of the left frame lamp 28b, and a ball break LED 52 that is lit when the refill ball is cut is provided in the vicinity of the top frame lamp 28a. It has been. As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter also simply referred to as a “card unit”) that enables ball lending by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  The card unit includes, for example, a use indicator lamp that indicates whether or not the card unit is in a usable state, a connection table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, When checking the card insertion indicator lamp indicating that the card is inserted, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock is provided to release the unit.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When the game ball enters the start winning opening 14 and is detected by the start opening switch 14a, the special symbol on the special symbol display 8 starts variable display (variation) as long as the variable display of the symbol can be started. The decorative design on the display device 9 starts variable display (variation). If it is not in a state where the variable display of symbols can be started, the start winning memory number is increased by one.

  The variable display of the special symbol on the special symbol display 8 and the variable display of the decorative symbol on the image display device 9 are stopped when a certain time has passed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special variable winning ball apparatus 20 is released until a predetermined time elapses or a predetermined number (for example, 10) of gaming balls wins.

  When the game ball wins the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol on the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased.

  FIG. 2 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. 2 also shows the payout control board 37, the effect control board 80, and the like. A game control microcomputer (corresponding to a game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. including. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. The I / O port unit 57 may be externally attached.

  The game control microcomputer 560 further includes a random number circuit 503 that generates hardware random numbers.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Further, an input driver circuit 58 for supplying detection signals from the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a to the game control microcomputer 560 is also mounted on the main board 31. Yes. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a big winning opening in accordance with a command from the game control microcomputer 560. 31. Further, a system reset circuit (not shown) for resetting the game control microcomputer 560 when the power is turned on, and an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state are sent to an external device such as a hall computer. An information output circuit (not shown) for outputting is also mounted on the main board 31.

  In addition, the game control microcomputer 560 includes a special symbol display 8 that variably displays special symbols, a normal symbol display 10 that variably displays normal symbols, a special symbol hold memory display 18, and a normal symbol hold memory display 41. Perform display control.

  In this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 receives the effect control command from the game control microcomputer 560 via the relay board 77. The display control of the image display device 9 that receives and displays the decorative design variably is performed.

  FIG. 3 is a block diagram illustrating a circuit configuration example of the relay board 77, the effect control board 80, the lamp driver board 35, and the audio output board 70. In the example shown in FIG. 3, the lamp driver board 35 and the audio output board 70 are not equipped with a microcomputer, but may be equipped with a microcomputer. Further, without providing the lamp driver board 35 and the audio output board 70, only the effect control board 80 may be provided for effect control.

  The effect control board 80 has an effect control microcomputer 100 including an effect control CPU 101 and a RAM. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives a capture signal from the main board 31 input via the relay board 77 ( In response to the (effect control INT signal), an effect control command is received via the input driver 102 and the input port 103. Further, the effect control CPU 101 causes the drawing processor (VDP: video display processor) 109 to perform display control of the image display device 9 based on the effect control command.

  In this embodiment, a rendering processor 109 that controls the display of the image display device 9 in cooperation with the rendering control microcomputer 100 is mounted on the rendering control board 80. The drawing processor 109 has an address space independent of the effect control microcomputer 100, and maps the VRAM therein. The VRAM includes a drawing area for developing image data. Then, the drawing processor 109 outputs the image data in the drawing area to the image display device 9.

  The effect control CPU 101 outputs a command for reading necessary data from the CGROM (not shown) to the drawing processor 109 in accordance with the received effect control command. The CGROM stores character image data and moving image data displayed on the image display device 9, specifically, a person, characters, figures, symbols (including decorative designs), and background image data in advance. ROM. The drawing processor 109 reads image data from the CGROM in response to the instruction from the effect control CPU 101. Then, the drawing processor 109 executes display control based on the read image data.

  The effect control command and the effect control INT signal are first input to the input driver 102 on the effect control board 80. The input driver 102 passes the signal input from the relay board 77 only in the direction toward the inside of the effect control board 80 (does not pass the signal in the direction from the inside of the effect control board 80 to the relay board 77). It is also a unidirectional circuit as a regulating means.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 3 illustrates a diode. A unidirectional circuit is provided for each signal. Furthermore, since the effect control command and the effect control INT signal are output from the main board 31 via the output port 571 that is a unidirectional circuit, the signal from the relay board 77 toward the inside of the main board 31 is restricted. That is, the signal from the relay board 77 does not enter the inside of the main board 31 (the game control microcomputer 560 side). The output port 571 is a part of the I / O port unit 57 shown in FIG. Further, a signal driver circuit that is a unidirectional circuit may be further provided outside the output port 571 (on the relay board 77 side).

  Further, the effect control CPU 101 outputs a signal for driving the lamp to the lamp driver board 35 via the output port 105. Further, the production control CPU 101 outputs sound number data to the audio output board 70 via the output port 104.

  In the lamp driver board 35, a signal for driving the lamp is input to the lamp driver 352 via the input driver 351. The lamp driver 352 amplifies a signal for driving the lamp and supplies the amplified signal to each lamp provided on the frame side such as the top frame lamp 28a, the left frame lamp 28b, and the right frame lamp 28c. Further, it is supplied to a decorative lamp 25 provided on the frame side.

  In the voice output board 70, the sound number data is input to the voice synthesis IC 703 via the input driver 702. The voice synthesizing IC 703 generates voice or sound effect according to the sound number data and outputs it to the amplifier circuit 705. The amplification circuit 705 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 703 to a level corresponding to the volume set by the volume 706 to the speaker 27. The voice data ROM 704 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  FIG. 4 is a block diagram showing a circuit configuration of the drawing processor 109. FIG. 4 also shows an effect control CPU 101 and a CGROM 83.

  When executing the display control of the image display device 6, the effect control CPU 101 gives a command corresponding to the effect control command to the drawing processor 109 via the CPU interface (CPU I / F) 92. If the command is a command to read image data from the CGROM 83, the drawing circuit 91 of the drawing processor 109 gives an instruction to read necessary data from the CGROM 83 to the CG bus interface (CG bus I / F) 93. The decoder 95 decompresses the compressed frame image data and writes the decompressed frame image data into the drawing material data memory 96A. The drawing circuit 91 in the drawing processor 109 generates image data to be displayed on the image display device 9 according to the input data, and writes the image data in the drawing area of the frame buffer 96B. Then, the display circuit 97 outputs R (red), G (green), and B (blue) image signals and synchronization signals based on the image data in the drawing area to the image display device 9. The image display device 9 performs, for example, screen display by a dot matrix system that drives a large number of pixels (pixels).

  In the drawing processor 109, drawing material data read from the CGROM 83 is stored in a drawing material data memory (hereinafter referred to as VRAMRS) 96 </ b> A. As drawing material data, still image data or sprites constituting moving image data obtained by decoding (decompressing) moving image data encoded (data compressed) by the MPEG2 (Moving Picture Experts Group phase 2) method or the like Image data is stored. In a frame buffer (hereinafter referred to as VRAMFB) 96B, a drawing area that is a data storage area corresponding to the display screen can be secured. The drawing processor 109 has a built-in VRAM (video RAM), and the VRAMRS 96A and the VRAMFB 96B are formed in the VRAM. Hereinafter, when either the VRAMRS 96A or the VRAMFB 96B may be used when the drawing processor 109 executes the process, the expression “VRAM” may be used.

  A CG bus and a VRAM bus are provided inside the drawing processor 109. A CG bus interface (CG bus I / F) 93 is installed between the CGROM 83 and the CG bus. The CPU I / F 92 is also connected to the CG bus, and the effect control CPU 101 can access the portion connected to the CG bus via the CPU I / F 92. Specifically, the effect control CPU 101 can access the drawing control register 95 connected to the CG bus.

  Next, the operation of the gaming machine will be described. FIG. 5 is a flowchart showing main processing executed by the game control microcomputer 560 on the main board 31. When the gaming machine is turned on and the input level of the reset terminal to which the reset signal is input becomes high level, the game control microcomputer 560 (specifically, the CPU 56) determines whether the contents of the program are valid. After executing the security check process, which is a process for confirming whether or not, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). After initialization of the built-in device (CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM is accessible (Step S5). In interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is interrupted. It is a mode that indicates a cover address.

  Next, the CPU 56 checks the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port (step S6). When the on-state is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process. In this example, if “55H” is set in the backup flag area, it means that there is a backup (ON state), and if a value other than “55H” is set, it means that there is no backup (OFF state).

  After confirming that there is a backup, the CPU 56 performs a data check of the backup RAM area (parity check in this example) (step S8). In step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 recovers the game state restoration process (steps S41 to S43) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain as they are. The part that should not be initialized is, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, probability variation flag, time reduction flag, etc.), and the area where the output state of the output port is saved (output port buffer) ), A portion in which data indicating the number of unpaid prize balls is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). Then, the process proceeds to step S14.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, and a payout stop An initial value is set to a flag such as a flag for selectively performing processing according to the control state.

  Further, the CPU 56 initializes a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed an initialization process). Is also transmitted to the sub-board (step S13). For example, when the initialization control microcomputer 100 receives the initialization designation command, the image display device 9 performs screen display for notifying that the control of the gaming machine has been performed, that is, initialization notification.

  Further, the CPU 56 executes a random number circuit setting process for initial setting of the random number circuit 503 (step S14). For example, the CPU 56 performs setting according to the random number circuit setting program to cause the random number circuit 503 to update the value of the random R.

  In step S15, the CPU 56 sets a register of the CTC built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When the display random number update process and the initial value random number update process are executed, the interrupt disabled state is set (step S16). Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. In this embodiment, the initial value random number is an initial count value such as a counter for generating a random number for determining whether or not to win a normal symbol (ordinary random number generation counter for normal symbol determination). It is a random number for determining the value. A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 itself controls game devices such as an image display device, a variable winning ball device, a ball payout device, etc. provided in the gaming machine. In the process of transmitting a command signal to be controlled by another microcomputer, or a game machine control process), the count value of the random number for determination per normal symbol is one round (the random number for determination per normal symbol is taken). When the value is incremented by the number of values between the minimum value and the maximum value of the possible values), an initial value is set in the counter.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process in steps S20 to S34 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output when, for example, a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals of the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the input driver circuit 58, and the state determination is performed (switch processing). : Step S21).

  Next, the CPU 56 executes a display control process for performing display control of the special symbol display 8, the normal symbol display 10, the special symbol hold storage display 18, and the normal symbol hold storage display 41 (step S22). For the special symbol display 8 and the normal symbol display 10, control for outputting a drive signal to each display is executed according to the contents of the output buffer set in steps S32 and S33.

  Next, a process of updating the count value of each counter for generating each determination random number such as a random number for determining a big hit symbol used for game control is performed (determination random number update process: step S23). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S24 and S25).

FIG. 7 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Decide a special symbol's off symbol (stop symbol) (for determining off symbol)
(2) Random 2: Determines the special symbol stop symbol when generating a big hit (for big hit symbol determination)
(3) Random 3: Determine the variation pattern (variation time) of special symbols (for variation pattern determination)
(4) Random 4: Determines whether or not to generate a hit based on the normal symbol (for normal symbol hit determination)
(5) Random 5: Random 4 initial value is determined (for determining random 4 initial value)

  In step S23 in the game control process shown in FIG. 6, the counter for generating the big hit symbol determining random number (2) and the normal symbol determining random number (4) is incremented (added by 1). . That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may make it use random numbers other than the random number of said (1)-(5). In this embodiment, the big hit determination random number is a random number generated by the hardware (random number circuit 503) built in the game control microcomputer 560. The big hit determination random number is used as the big hit determination random number. Software random numbers generated based on the program may be used.

  Further, the CPU 56 performs special symbol process processing (step S26). In the special symbol process, the corresponding symbol is executed in accordance with a special symbol process flag for controlling the special symbol display 8 and the special winning award in a predetermined order. The CPU 56 updates the value of the special symbol process flag according to the gaming state.

  Next, normal symbol process processing is performed (step S27). In the normal symbol process, the CPU 56 executes a corresponding process according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S28).

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S29).

  Further, the CPU 56 executes prize ball processing for setting the number of prize balls based on the detection signals of the start port switch 14a, the count switch 23, and the prize opening switches 29a, 30a, 33a, 39a (step S30). Specifically, the payout control mounted on the payout control board 37 in response to winning detection based on any of the start opening switch 14a, the count switch 23 and the winning opening switches 29a, 30a, 33a, 39a being turned on. A payout control command indicating the number of prize balls is output to the microcomputer. The payout control microcomputer drives the ball payout device 97 in accordance with a payout control command indicating the number of winning balls.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S31: output process).

  Further, the CPU 56 performs special symbol display control processing for setting special symbol display control data for effect display of the special symbol in the output buffer for setting the special symbol display control data according to the value of the special symbol process flag ( Step S32). For example, if the variation speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 performs variable display of the special symbol on the special symbol display 8 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in the output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S33). For example, when the start flag related to the variation of the normal symbol is set, the CPU 56 switches the display state (“◯” and “×”) for the variation rate of the normal symbol every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer. Thereafter, the interrupt permission state is set (step S34), and the process is terminated.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes of steps S21 to S33 (excluding step S29) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 8 is a table in which the jackpot determination value to be compared with the random R is set. The big hit determination determination table includes a normal big hit determination table (see FIG. 8 (A)) used in a normal state (a gaming state that is not a probable change state) and a probable change big hit determination table (FIG. 8 (B)) used in a positive change state. See). The numerical values described in the left column of FIGS. 8A and 8B are jackpot determination values. When the value of the random R matches any one of the jackpot determination values, the CPU 56 determines that the jackpot is to be made. The CPU 56 extracts the count value of the random number circuit 503 at a predetermined time and uses the extracted value as the jackpot determination random number value. If the jackpot determination random number value matches the jackpot determination value shown in FIG. It is decided to make a big hit (probability big hit or normal big hit) for the symbol.

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. Usually, the big hit is a big hit that shifts the gaming state after the big hit game to a state that is not a probable change state. In the case of the probable big hit and the normal big hit, the number of rounds is larger than that in the case of 2R (2 rounds) big hit and the sudden probable big hit, for example, 15 rounds.

  The 2R big hit (small hit) is a big hit in which the number of times of opening of the big winning opening is allowed up to two in the big hit gaming state. Note that when the small hit game ends, the gaming state does not shift to the probable change state. Suddenly probable jackpot is a jackpot where the number of times the big prize opening is allowed is 2 in the big hit gaming state, but the opening time of the big prize opening is extremely short, and the gaming state after the big hit game is shifted to the probable state It ’s a big hit. That is, in this embodiment, the number of rounds is the same between the sudden probability big hit and the small hit.

  In addition, in the big hit game of sudden probability change big hit, the number of rounds is smaller than that in the case of normal big hit and probability variable big hit, and the allowance opening allowance time of each round (for example, 29 seconds in the case of normal big hit and probability variable big hit) On the other hand, 0.5 seconds) is shorter than that of the normal big hit and the probable big hit, but only the number of lands may be reduced, or only the allowance opening allowance time may be shortened.

  Further, in the probability change state, the probability that the stop symbol of the normal symbol is determined as a winning symbol is increased, the opening time of the variable winning ball device 15 is increased, or the number of times of opening is increased.

  FIG. 8 is an explanatory diagram showing an example of a variation pattern used in this embodiment. In FIG. 8, “EXT” indicates EXT data of the second byte in the effect control command having a two-byte structure. “Variation time” indicates the variation time of the special symbol (variable display period of identification information).

  “Normal fluctuation” is a fluctuation pattern without a reach mode. “Normal fluctuation / shortening” is a fluctuation pattern without a reach mode and a fluctuation time shorter than “normal fluctuation”. “Normal reach” is a variation pattern that is accompanied by a reach mode but whose display result (stop symbol) does not become a big hit symbol. “Reach A” is a variation pattern having a reach form different from “normal reach”. When the reach mode is different, a change mode (speed, rotation direction, etc.), a character image, or the like in a different mode appears in the image display device 9 during the reach variation time (a period during which the reach effect is performed). The background design is different. For example, in “normal reach”, a reach mode is realized by only one type of change mode, whereas in “reach A”, a reach mode including a plurality of change modes having different speeds and directions of change is realized. Further, “reach A / shortening” is a variation pattern having a reach manner similar to “reach A”, but reach variation time is shorter than “reach A”. “Reach A / Extension” is a variation pattern having a reach manner similar to “Reach A”, but the reach variation time is longer than “Reach A”.

  “Reach B” is a fluctuation pattern having a reach mode different from “Normal reach” and “Reach A”. Further, “reach B / shortening” is a variation pattern having a reach manner similar to “reach B”, but the reach variation time is shorter than “reach B”. “Reach B / extension” is a variation pattern having a reach manner similar to “reach B”, but reach variation time is longer than “reach B”. “Reach C” is a variation pattern having a reach form different from “normal reach”, “reach A”, and “reach B”. “Reach C / shortening” is a variation pattern having a reach manner similar to “reach C”, but reach variation time is shorter than “reach C”.

  “Super reach A” is a variation pattern having a reach mode different from “normal reach”, “reach A”, “reach B”, and “reach C”. is there. “Super reach B” is a variation pattern having a reach form different from “normal reach”, “reach A”, “reach B”, “reach C” and “super reach A”. This is a variation pattern. “Reach A / Accuracy” is a variation pattern having a reach form different from “Normal reach”, “Reach A”, “Reach B”, “Reach C”, “Super reach A” and “Super reach B”. It should be noted that the reach form of “reach A / accuracy” is a reach form similar to “reach A”.

  In this embodiment, in the case of a big hit, the game control microcomputer 560 is “reach A / shortening”, “reach A”, “reach B / shortening”, “reach B”, “reach C / shortening”. ", Reach C", "Super Reach A" or "Super Reach B". Further, in the case of a probable big hit, the game control microcomputer 560 is “reach A / extension”, “reach B / extension”, “reach C / shortening”, “reach C”, “super reach A” or “ Select "Super Reach B". In case of sudden big odds, select “Reach A / Random”.

  In the short-time state, the fluctuation patterns of “normal fluctuation / shortening”, “reach A / shortening”, “reach B / shortening”, and “reach C / shortening” are selected. In the non-time-short state, other variation patterns are selected. However, the variation pattern of “reach A / accuracy” is used in both the short-time state and the non-short-time state.

  In this embodiment, when a big hit occurs and the big hit game ends, the gaming state becomes a short-time state thereafter until the execution of 100 special symbol changes (variable display) is completed. In addition, when variable display of a special symbol is started when variable display is finished, when it is decided to change to a probable change state when the special symbol variable display is started, the game state is changed into a probable change state when the big hit game is ended. To be migrated. If the gaming state at that time is a probability variation state, the probability variation state is continued.

  After the transition to the probability changing state, the state of the probability changing state is short and the state is short until the execution of the variation (variable display) of 100 special symbols is completed. In addition, in the non-probability change state after the big hit game is over, the game state is changed to the normal state (the game state that is not the probability change state and not the short-time state) when the execution of 100 special symbol changes (variable display) is completed. Transition.

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. FIG. 10 is an explanatory diagram showing a signal line of an effect control command transmitted from the main board 31 to the effect control board 80. As shown in FIG. 10, in this embodiment, the effect control command is transmitted from the main board 31 to the effect control board 80 via the relay board 77 using eight signal lines of the effect control signals CD0 to CD7. Further, between the main board 31 and the effect control board 80, a signal line of the effect control INT signal for transmitting the capture signal (effect control INT signal) is also wired.

  In this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  As shown in FIG. 11, the 8-bit effect control command data of the effect control command is output in synchronization with the effect control INT signal. The effect control microcomputer 100 mounted on the effect control board 80 detects that the effect control INT signal has risen, and starts a 1-byte data capturing process through an interrupt process. Therefore, when viewed from the effect control microcomputer 100, the effect control INT signal corresponds to a signal that triggers the capture of effect control command data.

  The effect control command is sent only once so that the effect control microcomputer 100 can recognize it. In this example, “recognizable” means that the level of the effect control INT signal changes, and that it is sent only once so as to be recognizable means that, for example, each of the first and second bytes of the effect control command data Accordingly, the production control INT signal is output in a pulse shape (rectangular wave shape) only once. The effect control INT signal may have a polarity opposite to that shown in FIG.

  FIG. 12 is an explanatory diagram showing an example of the contents of the effect control command transmitted by the game control microcomputer 560. In the example shown in FIG. 12, commands 8001 (H) to 800E (H) are effect control commands (variation) for designating a variation pattern of decorative symbols variably displayed on the image display device 9 in response to variable display of special symbols. Pattern command). The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 800E (H), it controls the image display device 9 to start variable display of decorative symbols. In this embodiment, the variable display of the special symbol and the variable display of the decorative symbol are synchronized (the variable display start time and the variable display end time are the same), so the decorative pattern variation pattern (variation time) Determining also means determining the variation pattern (variation time) of the special symbol.

  The commands 8C01 (H) to 8C05 (H) are effect control commands indicating whether or not to make a big hit and the type of the big hit game. The effect control microcomputer 100 determines the display result of the decorative symbols in response to the reception of the commands 8C01 (H) to 8C05 (H). Therefore, the commands 8C01 (H) to 8C05 (H) are referred to as display result specifying commands.

  Command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of the decorative symbols is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the decorative symbols and derives and displays the display result. The derived display is to finally stop and display the symbol.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the gaming control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command.

  Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration.

  The commands A001 to A004 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 4 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of a big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game and an effect control command (special jackpot end 1 designation command: ending) that specifies that the jackpot game is a non-probable big hit (usually a big hit) 1 designation command). Command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a probable big hit (big hit end 2 designation command: ending 2 designation command). is there.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the image display device 9 is changed according to the contents shown in FIG. 12, the display state of the lamp is changed, or the sound number data is output to the audio output board 70.

  FIG. 13 is an explanatory diagram illustrating an example of the transmission timing of the effect control command. As shown in FIG. 13, the game control microcomputer 560 transmits a change pattern command and a display result specifying command at the start of change. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  Note that before transmitting the variation pattern command, a background designation command for designating a background image in the image display device 9 according to the gaming state (eg, normal state / short time state / probability variation state) may be transmitted. Further, an effect control command indicating the number of reserved memories may be transmitted following the display result specifying command.

  FIG. 14 is a flowchart showing an example of a special symbol process (step S26) program executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. As described above, in the special symbol process, a process for controlling the special symbol display 8 and the special winning opening is executed. In the special symbol process, the CPU 56 performs start port switch passing processing if the start port switch 14a for detecting that a game ball has won the start winning port 14 is turned on, that is, if a start winning has occurred. Execute (Steps S311 and S312). Then, any one of steps S300 to S307 is performed.

  The processes in steps S300 to S307 are as follows.

  Special symbol normal processing (step S300): Executed when the value of the special symbol process flag is zero. When the game control microcomputer 560 is in a state where variable display of special symbols can be started, the game control microcomputer 560 confirms the number of reserved memories (the number of start winning memories). The reserved memory number can be confirmed by the count value of the reserved memory number counter. If the number of reserved memories is not 0, it is determined whether or not to win. If it is determined to be a big hit, a big hit flag is set. Then, the internal state (special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  Fluctuation pattern setting process (step S301): This process is executed when the value of the special symbol process flag is 1. The stop symbol after the variable display of the special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from the start of variable display until the display result is derived and displayed (stop display)) Decide to do. Also, a variable time timer for measuring the special symbol variable time is started. Then, the internal state (special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  Display result specifying command transmission process (step S302): executed when the value of the special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  Special symbol changing process (step S303): This process is executed when the value of the special symbol process flag is 3. When the variation time of the variation pattern selected in the variation pattern setting process elapses (the variation time timer set in step S301 times out, that is, the variation time timer value becomes 0), the internal state (special symbol process flag) is stepped. Update to a value corresponding to S304 (4 in this example).

  Special symbol stop process (step S304): executed when the value of the special symbol process flag is 4. The variable display on the special symbol display 8 is stopped and the stop symbol is derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. If the big hit flag is set, the internal state (special symbol process flag) is updated to a value (5 in this example) corresponding to step S305. If the big hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S300 (0 in this example). The effect control microcomputer 100 controls the image display device 9 to stop the decorative symbols when it receives the symbol confirmation designation command transmitted by the game control microcomputer 560.

  Preliminary winning opening opening process (step S305): This is executed when the value of the special symbol process flag is 5. In the pre-opening process for the big prize opening, control for opening the big prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value (6 in this example) corresponding to step S306. The pre-opening process for the big winning opening is executed for each round, but when the first round is started, the pre-opening process for the big winning opening is also a process for starting the big hit game.

  Large winning opening opening process (step S306): This process is executed when the value of the special symbol process flag is 6. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the special prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S305 (5 in this example). When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S307 (7 in this example).

  Big hit end process (step S307): executed when the value of the special symbol process flag is 7. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended. Further, a process for setting a flag (for example, a probability variation flag) indicating a gaming state is performed. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 15 is an explanatory diagram illustrating an example of a plurality of types of decorative symbols that are variably displayed on each of the “left”, “middle”, and “right” variable display portions on the display screen of the image display device 9. In this embodiment, in each of the “left”, “middle”, and “right” variable display portions provided on the display screen of the image display device 9, the symbols indicating the numbers “1” to “9” are, for example, It is variably displayed in combination with a predetermined figure such as a roughly diamond shape. A corresponding symbol number is assigned to each of the decorative symbols. Note that the decorative symbols shown in FIG. 15 are basic shapes, and they may be deformed and displayed on the image display device 9.

Hereinafter, display effects in the image display device 9 will be described.
In this embodiment, a still image can be displayed and a moving image can be displayed on the image display device 9.

  16 and 17 are explanatory diagrams illustrating an example in which two moving images are combined and displayed on the image display device 9. In the example shown in FIG. 16, the moving image A data for displaying moving image A which is the first moving image is composed of 30 frames (30 frames) of image data (frame image data) of frame images a1 to a30. Has been. Therefore, when playback is performed at 33 ms / second, a 1-second moving image display can be realized. The moving image B data for displaying the moving image B which is the second moving image is composed of 33 frames (33 frames) of image data (frame image data) of the frame images b1 to b33. Therefore, when playback is performed at 33 ms / second, a moving image display of 1.1 seconds can be realized.

  In this embodiment, what is displayed on the image display device 9 is called “moving image”, and digital data for obtaining “moving image” is called moving image data. Each frame constituting a moving image is referred to as a “frame image”, and digital data for obtaining a “frame image” is referred to as frame image data.

  FIG. 17 is an explanatory diagram for explaining a display example when the moving image A and the moving image B shown in FIG. 16 are combined and displayed on the image display device 9. Each rectangle shown in FIG. 17 represents a display screen of the image display device 9. FIG. 17A shows a display example when the moving image A is displayed alone on the image display device 9. In FIG. 17A, it is assumed that the display of the frame images a1 to a30 changes from left to right every 33 ms. FIG. 17B shows a display example when the moving image B is displayed alone on the video display device 9. In FIG. 17B, it is assumed that the display of the frame images b1 to b33 changes from left to right every 33 ms.

  As an example, FIG. 17C shows an image displayed on the image display device 9 at the timing when the frame image a1 and the frame image b1 are combined when the moving image A and the moving image B are combined. FIG. 17D shows an image displayed on the image display device 9 at the timing at which the frame image a30 and the frame image b2 are combined.

  When the frame images a1 to a30 constituting the moving image A and the frame images b1 to b33 constituting the moving image B are sequentially synthesized one by one, 30 × 33 = 990 different images (reproduced at 33 ms / second) 11 seconds) is obtained. That is, an 11-second moving image can be reproduced using the moving image A data and the moving image B data.

  In the example shown in FIG. 17, the moving images are synthesized so as to overlap. That is, in the drawing area of VRAMFB 96B, moving image A data and moving image B data are written in the same area. Hereinafter, writing image data in the drawing area is referred to as “drawing”. An image corresponding to the image data in the drawing area is displayed on the image display device 9.

  As shown in FIG. 18, the area for drawing the frame image constituting the moving image A and the area for drawing the frame image constituting the moving image B may be shifted. FIG. 18 shows an example in which the frame image b2 is drawn in an area shifted from the area where the frame image a1 is drawn. By such control, a synthesized moving image obtained by synthesizing the moving image A and the moving image B is displayed on the image display device 9.

  FIG. 19 is an explanatory diagram showing the structure of image data in this embodiment. Each pixel of the image data is composed of data of α value, R (red) value, G (green) value, and B (blue) value. The α value is a value indicating transparency, and for example, a value corresponding to any of 0 to 1.0 is set. 0 indicates complete transparency and 1.0 indicates complete opacity. Complete transparency means that R, G, and B values of one image data are not used for the calculation when the combination calculation of one image data (α value is 0) and other image data is performed (for example, 0 And completely opaque means that R, G, and B of one image data when a composite operation of one image data (α value is 1.0) and other image data is performed. Indicates that the value is used as is. Also, the value between 0 and 1.0 is the same as the image data when the composition operation of one image data (α value is between 0 and 1.0) and other image data is performed. Indicates that the R, G, and B values are multiplied by a predetermined coefficient.

FIG. 20 is an explanatory diagram illustrating an example in which a synthesized moving image is repeatedly reproduced after a 1-second moving image A and a 1.1-second moving image B are synthesized to create an 11-second synthesized moving image. is there. In the example illustrated in FIG. 20, every time 11 seconds have elapsed from the playback start time, in other words, every time the composite moving image ends, the α value of each pixel constituting the moving image B is changed. It is shown. That is, the rendering processor 109 changes the transparency when superimposing display data based on the first image data in each of a plurality of moving image data (each including image data of a plurality of frames). Therefore, if the α value is not changed, the same synthesized moving image is reproduced every 11 seconds. However, by changing the α value, a synthesized moving image that is viewed differently is reproduced after 11 seconds have elapsed. be able to.

  The moving image data is stored in the CGROM 83 after being compressed. When reproducing a moving image, the drawing processor 109 reads frame image data (data compressed) constituting moving image data from the CGROM 83. Then, the decoder 95 expands the compressed frame image data and writes the expanded frame image data to the VRAMRS 96A. Hereinafter, writing the image data in the VRAMRS 96A or VRAMFB 96B may be referred to as developing the image data.

  The drawing processor 109 in this embodiment has a capability of reproducing an image in 1/60 seconds (displaying an image based on image data). That is, the decoder 95 can decompress the frame image data that has been subjected to data compression every 1/60 seconds. Considering the case of actually reproducing an image in 1/30 seconds, two frame image data can be expanded in a period of reproducing one frame. Therefore, when two moving images are combined and played back, as shown in FIG. 21A, frame image data about the frame images constituting the moving image A in a period of (1/60) × 2 seconds. And the frame image data of the frame image constituting the moving image B are alternately expanded, and as shown in FIG. 21B, the two expanded frame image data are synthesized once every 1/30 seconds. By executing the calculation for this, as shown in FIG. 21C, the synthesized moving image can be reproduced every 1/30 seconds. In other words, the rendering processor 109 sequentially selects one moving image data from a plurality of moving image data for each predetermined cycle, and creates display data from the moving image data selected in the cycle, thereby reducing the processing burden. ing.

  FIGS. 22A and 22B are explanatory diagrams for explaining a process of creating a clipping image by clipping (cutting out) image data of an image constituting a synthesized moving image developed on the VRAMRS 96A, for example. is there. For example, the drawing processor 109 may display the clipping image on the image display device 9 by drawing the image data within the clipping range in the VRAMRS 96A in the drawing area. Image data of a target image) may be written in an area where a clipping range is formed (clipping area). At this time, for example, if the α value of each pixel in the clipping region is set to 0, the target image is formed in the clipping region. Thereafter, the image data in the clipping area is written in the drawing area.

  When the display control shown in FIG. 22 is realized, the size of each frame image constituting the moving images A and B is made larger than the size of the drawing area (corresponding to the size of the display area), Created.

  FIGS. 23A and 23B are explanatory diagrams for explaining processing for displaying a synthesized moving image as a three-dimensional image. The rendering processor 109 performs processing (mapping) for pasting image data of an image constituting the synthesized moving image as a texture onto a polygon image (hereinafter referred to as a polygon) created in the VRAMRS 96A or VRAMFB 96B (see FIG. 23A). Thereafter, rendering processing is performed to obtain image data of an image for reproduction. The rendering process is a process of creating image data of an image that can be displayed on a two-dimensional display screen, and is visually recognized when a three-dimensional image is viewed from a viewpoint (also referred to as a camera position) set at a predetermined position. This is a process for creating image data of an image to be processed. Note that the polygon shown in FIG. 23 has a shape like a plate-like object curved (a tile-like shape).

  FIG. 24 is an explanatory view showing an application example (variation from the basic form) of variable display of decorative symbols. FIG. 24 shows an example in which the decorative pattern “7” changes to the decorative pattern “8”. In that example, the contents of the display area of the decorative symbols on the display screen of the image display device 9 change as shown in (A) → (D).

  In the example shown in FIG. 24, the display unit “8” is formed in the display unit “7”, and the display unit “8” is displayed so as to gradually increase.

  25 and 26 are explanatory diagrams for realizing processing for realizing variable display of the decorative symbols shown in FIG. The drawing processor 109 first creates a plate-shaped polygon 200 as shown in FIG. A region including a region where a polygon is created in the VRAM corresponds to a virtual three-dimensional space. Then, as shown in FIG. 25B, a process of rotating the plate-shaped polygon 200 is performed. Note that FIG. 25B shows a state of being rotated in one direction (a state of being tilted), but it is possible to perform a three-dimensional rotation process. Then, the drawing processor 109 performs a rendering process on the plate-like polygon 200 using a predetermined viewpoint as shown in FIG. 25C to create a two-dimensional image. In this example, a trapezoidal image is generated.

  Note that the rendering processor 109 of this embodiment always uses a viewpoint that is set at the same position, that is, a viewpoint at a fixed position, when performing rendering processing. In FIG. 25B and the following drawings, the position of the viewpoint is expressed as if it can be arbitrarily set, but this is convenient for drawing in order to make the drawing easy to see. Referring to the example shown in FIG. 25B, for example, when the position of the viewpoint is actually set to the left side in the drawing, the surface side of the plate-shaped polygon 200 is actually set to the left side. A plate-shaped polygon 200 is created so as to face. That is, the polygon that is inclined 90 degrees to the left from the state shown in FIG.

  Polygons are formed as a set of triangles in a virtual three-dimensional space. Depending on how many triangles are combined, polygons of almost arbitrary shape can be created. In this embodiment, the drawing processor 109 changes the position (coordinates) and shape (specifically, how to combine triangles, etc.) to be created in the virtual three-dimensional space, thereby creating a polygon again. Realize movement (rotation, etc.) and shape change. However, the drawing processor 109 may be configured to move or change the shape of a created polygon in the virtual three-dimensional space in response to a movement or shape change command from the effect control CPU 101. At that time, the CPU 101 for effect control may give the drawing processor 109 a destination or changed shape as a parameter in the command, or a parameter that can be calculated by calculation of the destination or changed shape to the drawing processor 109. May be given.

  The drawing processor 109 uses the created two-dimensional image (see FIG. 25C) as a mask pattern, clips (cuts out) the image data area of the decorative pattern “8” developed in the VRAMRS 96A, and performs clipping. The image data of the selected area (clipping range) is combined with the image data of the decorative pattern “7” developed in the VRAMRS 96A. The rendering processor 109 can also expand the rendering range when performing rendering processing. An example when the rendering range is not enlarged is shown in FIG. 26A, and an example when the rendering range is enlarged is shown in FIG.

  By performing the processing as shown in FIGS. 25 and 26, the decoration pattern variation (variable display) as shown in FIG. 24 is realized.

  In FIG. 25, one type of polygon after movement is shown (FIG. 25B), but actually, processing for moving the polygon further is performed.

  FIG. 27 is an explanatory diagram showing another application example of variable display of decorative symbols. FIG. 27 shows an example in which the decorative pattern “6” is changed to the decorative pattern “7”. In that example, the display screen of the image display device 9 changes as shown in (A) → (D).

  In the example shown in FIG. 27, the display unit “7” is formed in the display unit “6”, and the display unit “7” is displayed so as to gradually increase. Compared to the example shown in FIG. 24, the shape of the display portion (“8” in the example shown in FIG. 24, “7” in this example) formed inside a certain decorative pattern is different. In other words, the shapes of the mask patterns are different.

  28 and 29 are explanatory diagrams for realizing the processing for realizing the variable display of the decorative symbols shown in FIG. The drawing processor 109 first creates a plate-like polygon 200 as shown in FIG. Then, as shown in FIG. 28B, a process of rotating the plate-shaped polygon 200 is performed. Then, as shown in FIG. 28C, the rendering processor 109 performs a rendering process on the plate-like polygon 200 using a predetermined viewpoint to create a two-dimensional image. In this example, an image like a trapezoid facing sideways is generated.

  The drawing processor 109 uses the created two-dimensional image (see FIG. 28C) as a mask pattern, clips the image data area of the decorative pattern “7” developed in the VRAMRS 96A, and images in the clipping range The data is combined with the image data of the decorative pattern “6” developed in the VRAMRS 96A. The rendering processor 109 can also expand the rendering range when performing rendering processing. An example when the rendering range is not enlarged is shown in FIG. 29A, and an example when the rendering range is enlarged is shown in FIG. 29B.

  By performing the processing as shown in FIGS. 28 and 29, the decoration pattern variation (variable display) as shown in FIG. 27 is realized.

  In FIG. 28, one type of polygon after movement is shown (FIG. 28B), but in reality, processing for further moving the polygon is performed.

  Also, as shown in FIG. 30, the drawing processor 109 performs an α blend process on the edge in the clipping range when combining the image data of the clipped area with the image data of the decorative pattern developed in the VRAMRS 96A. Can do. The α blending process is to perform the synthesizing process by setting the α value of the edge portion in the image data to be synthesized (in this example, the image data within the clipping range) to a value lower than 1.0. By subjecting the edge portion to α blend processing, the edge portion becomes translucent, and the boundary portion with the background (“7” image in the example shown in FIG. 30) can be smoothly displayed.

  FIG. 31 is an explanatory diagram showing still another application example of variable display of decorative symbols. In the example shown in FIG. 31, a part of a frame image constituting a decorative design (“7” in this example) and a moving image (moving image in which a spaceship moves in this example) is pasted as a texture on the plate-like polygon 200. After being attached, a two-dimensional image obtained by enlarging and rendering the plate-like polygon 200 is used as a decorative design.

  As shown in FIG. 31, the decorative symbols are displayed on the image display device 9 so that the decorative symbol display portion is enlarged as the variable display progresses, and the image of the “spacecraft” is moved.

  In the case of the example shown in the upper and middle stages in FIG. 31, a spacecraft based on a still image may be used as a texture. That is, when the viewpoint is located within a predetermined distance from the polygon, an image based on the frame image data in the moving image data is used as a texture. When the viewpoint is located beyond the predetermined distance from the polygon, an image based on the still image data is used. A texture may be used.

  FIG. 32 is an explanatory diagram showing a modification of the application example of the variable display of the decorative symbols shown in FIG. In the example shown in FIG. 32, a part of a frame image constituting a decorative design (in this example, “7”) and a moving image (moving image in which a spacecraft moves) is pasted as a texture on the plate-like polygon 200. After being attached, the two-dimensional image obtained by rotating and enlarging the plate-shaped polygon 200 and using the rendering process is used as a decorative design.

  As shown in FIG. 32, as the display of the decorative symbol is enlarged as the variable display progresses, and the image of the “spacecraft” is moved, the image inside the decorative symbol display unit is further tilted. As shown, the decorative symbols are displayed on the image display device 9. FIG. 32 shows a state in which the plate-shaped polygon 200 is rotated in one direction (a state in which the plate-shaped polygon 200 is rotated in the left direction), but it is possible to perform a three-dimensional rotation process.

  In the case of the example shown in the upper stage and the middle stage in FIG. 32, a spacecraft based on a still image may be used as a texture. That is, when the viewpoint is located within a predetermined distance from the polygon, an image based on the frame image data in the moving image data is used as a texture. When the viewpoint is located beyond the predetermined distance from the polygon, an image based on the still image data is used. A texture may be used.

  FIG. 33 and FIG. 34 are explanatory diagrams for explaining processing for pasting frame images constituting a composite moving image of two moving images A and B as textures on a plate-shaped polygon. FIG. 33A illustrates a moving image in which a spacecraft moves. FIG. 33B illustrates a moving image in which a satellite moves.

  FIG. 33C shows a state in which the synthesized moving image of moving images A and B is pasted as a texture on a plate-shaped polygon. Further, the state where the plate-shaped polygon is rotated every time a frame image of one frame in the synthesized moving image is pasted is shown. A rendering process is performed on the rotated plate-shaped polygon using a predetermined viewpoint, and a two-dimensional image used for display is created.

  FIG. 34 shows a notice effect executed in the image display device 9 (display effect for notifying the player before the display result of the decorative symbol is derived that a big win will be obtained. It is explanatory drawing which shows the example of. FIG. 34 shows an example executed when a big hit is not made. In the example shown in FIG. 34, a part of the display screen of the image display device 9 is used as the notice effect area 9a. As shown in FIGS. 34A to 34C, the rendering processor 109 obtains a two-dimensional image obtained by rendering the plate-like polygon shown in FIG. 33C using a predetermined viewpoint. Are sequentially displayed in the notice effect area 9a.

  FIG. 34D shows an example in which texture pasting or rendering processing is not performed on the moving image data of the combined moving image, that is, the combined moving image is displayed as it is in the notice effect area 9a. . In the example shown in FIG. 34, for example, when image data for display is created using a polygon over a plurality of frames, moving image data is reproduced from frame image data following the last frame image data of the plurality of frames. .

  FIG. 35 is an explanatory diagram illustrating an example in which the plate-shaped polygon is rotated in a direction different from the rotation direction of the plate-shaped polygon illustrated in FIG. FIG. 35 shows a state where the plate-shaped polygon is rotated every time one frame image in the synthesized moving image is pasted. Then, rendering processing is performed on the rotated plate-shaped polygon using a predetermined viewpoint, and a two-dimensional image used for display is created.

  FIG. 36 is an explanatory diagram showing another example of the notice effect performed in the image display device 9. FIG. 34 shows an example that is executed in the case of a big hit. As shown in FIGS. 36A to 36D, the drawing processor 109 notifies the two-dimensional image obtained by rendering the plate-like polygon shown in FIG. 35 using a predetermined viewpoint. Control to sequentially display in the effect area 9a is performed.

  Next, a data transfer method in the rendering processor 109 and a command (command) output from the rendering control CPU 101 to the rendering processor 109 will be described.

  FIG. 37 is an explanatory diagram for explaining transfer of image data. The image data stored in the CGROM 83 can be transferred to the VRAMRS 96A. The image data stored in the CGROM 83 can be transferred to the VRAF 96B via the VRAM RS 96A. Further, the image data stored in VRAMRS 96A can be transferred to VRAFB 96B. Furthermore, the image data stored in VRAFB 96B can be transferred to VRAMRS 96A.

  FIG. 38 is an explanatory diagram showing commands related to data transfer among commands output from the rendering control CPU 101 to the drawing processor 109. The CGROM transfer command is a command that is output when image data is transferred from the CGROM 83 to the VRAMRS 96A. The VRAMFB transfer command is a command that is output when image data is transferred from the VRAMRS 96A to the VRAMFB 96B. The inter-VRAMRS transfer command is a command that is output when the image data stored in the VRAMRS 96A is transferred to another region in the VRAMRS 96A.

  The drawing effect command is a command for designating a drawing effect when image data is transferred from the VRAMRS 96A to the VRAMFB 96B. The VRAMFB copy command is a command that is output when image data is transferred from the VRAMFB 96B to the VRAMRS 96A. The automatic transfer command is a command that is output when the image data stored in the CGROM 83 is transferred to the VRAF 96B via the VRAMRS 96A.

  In this embodiment, except for the address designation of CGROM 83, the transfer source address (read address) and the transfer destination address (write address) at the time of data transfer are commanded by the X coordinate and Y coordinate of the area. It can also be specified by the address itself where the image data is stored in the memory (ROM or RAM). Further, it is possible to designate a read address and a write address using an index created in advance (area address or the like is set).

  When the drawing circuit 91 of the drawing processor 109 receives the CGROM transfer command, the drawing circuit 91 causes the CG bus interface 93 to read the image data from the reading start address of the CGROM 83 and transfer the image data to the writing address of the VRAMRS 96A. When a VRAMFB transfer command is input, image data is read from the read address of VRAMRS 96A and written to the write address of VRAMFB 96B. When an inter-VRAM transfer command is input, image data is read from the read address of VRAMRS 96A and written to the write address of VRAMRS 96A. When a drawing effect command is input, when a VRAMFB transfer command is input, image synthesis is performed in accordance with parameters included in the drawing effect command.

  When the VRAMFB copy command is input, the drawing circuit 91 reads the image data from the read address of the VRAMFB 96B and writes it to the write address of the VRAMRS 96A. When an automatic transfer command is input, the CG bus interface 93 reads the image data from the read start address of the CGROM 83, transfers the image data to a predetermined area of the VRAMRS 96A, and further reads the image data from the predetermined area and writes it to the write address of the VRAMFB 96B. .

  FIG. 39 is an explanatory diagram showing commands related to a drawing command and the like among commands output from the rendering control CPU 101 to the drawing processor 109. The texture attribute setting command is a command for designating the size of the texture. The polygon drawing command is a command for designating a polygon size and the like. The sprite drawing command is a command for designating the size of the sprite image. Note that the addresses (coordinates) relating to the FRAMFB 96B in the parameters shown in FIG. 39 are addresses in an area other than the drawing area of the VRAMFB 96B.

  When the texture attribute setting command is input, the drawing circuit 91 reads the image data from the read address determined by the texture attribute setting command and writes it to the write address of the VRAMFB 96B when the VRAMFB transfer command is input. When a polygon drawing command is input, a polygon image is created in the designated VRAMFB 96B area. Note that the Z value included in the polygon drawing command can be set for each pixel. Therefore, by setting the Z value of each pixel so that the polygon image has a desired shape, the polygon image can be generated in any desired shape. When a sprite drawing command is input, sprite image data is read from the read address of VRAMRS 96A and written to the write address of VRAMFB 96B.

  FIG. 40 is an explanatory diagram showing a command related to decompressing data-compressed moving image data among commands output from the effect control CPU 101 to the drawing processor 109. The single stream start address is a command for designating a storage address of the image in the CGROM 83 when the moving image data of one moving image is expanded. The single stream area development command is a command for designating a storage address in the VRAMRS 96A of the image data after decompressing the moving image data of one moving image. The multi-stream start address is a command for designating storage addresses of the images in the CGROM 83 when decompressing moving image data of a plurality of (for example, two) moving images. The multi-stream area development command is a command for designating a storage address in the VRAMRS 96A of image data after decompressing moving image data of a plurality of moving images.

  The decode execution command is a command that specifies expansion of moving image data of a moving image. When the decoder 95 receives the decode execution command, the moving image data stored in the CGROM 83 in accordance with the single stream start address and the single stream region development command, and using the parameters of the multistream start address and the multistream region development command. Is decoded and stored in the VRAMRS 96A.

  The moving image data has a configuration in which a file header is set at the first address, and then a frame header and compressed data of each frame are sequentially set. In the stream, frame headers and compressed data of frames 1 to N (frame images 1 to n) are set in order from image 1. The moving image data is encoded by, for example, the MPEG2 encoding method.

  Next, a method of decoding moving image data (compressed data) compressed by the decoder 95 will be described with reference to the explanatory diagram of FIG. The frame number shown in FIG. 41A is a serial number of frame image data in moving image data (frames 1 to N). In the moving image data, the compressed data of frames 1 to N are configured by I pictures, B pictures, or P pictures defined by the MPEG2 encoding method in the order shown in FIG. For example, frame 1 is an I picture, frames 2, 3, 5, and 6 are B pictures, and frames 4 and 7 are P pictures. The subscripts attached to I, B, and P are serial numbers for each picture type.

  As described above, frames 1 to N (frame images 1 to n) are stored as moving image data in order from frame 1 (image 1). For example, frame 1 (image 1) in the stream is an I picture, frames 2, 3, 5, and 6 (images 2, 3, 5, and 6) are B pictures, and frames 4 and 7 (images 4 and 7). Is a P picture.

  Next, the operation of the effect control means will be described. FIG. 42 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 33 ms) (step S701). . Next, initial data transfer processing is performed (step S702). In the initial data transfer process, a fixed area (area for storing fixed image data) is set in the VRAMRS 96A, and the decorative design image data (see FIG. 15) stored in the CGROM 83 is transferred to the VRAMRS 96A fixed area. It is a process to do.

  Thereafter, the effect control CPU 101 proceeds to a loop process for monitoring a timer interrupt flag (step S704). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S705) and executes the effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and executes a process of setting a flag according to the received effect control command (command analysis process: step S706). Next, the effect control CPU 101 executes effect control process processing (step S707). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the image display device 9 is executed. Further, a random number update process for updating a counter value of a counter for generating a predetermined random number is executed (step S708). Further, a background control process for displaying a background image displayed on the display screen of the image display device 9 is performed (step S709). Thereafter, the process proceeds to step S704.

  It is assumed that the timer interrupt generation period is 1/33 seconds. Further, it is assumed that the screen change frequency (frame frequency) of the image display device 9 is 30 Hz, and the drawing processor 109 updates the display screen of the image display device 9 at a cycle of 1/33 seconds. The timer interrupt generation period may be a value other than 1/33 seconds (for example, 2 ms). In that case, in the production control process, for example, a V blank interrupt (from the image display device 9 to the image display device 9). Processing related to drawing is executed in synchronization with the generation of an interrupt generated by the drawing processor 109 in the same cycle as the supplied vertical synchronization signal.

  Further, in the following description, a case will be described in which processing for realizing the image change described with reference to FIGS. 17 to 36 (for example, three types of images in FIG. 31) is executed every 1/33 seconds. I do. However, in practice, the image change described with reference to FIGS. 17 to 36 is realized with a period longer than 1/33 seconds. Referring to the example shown in FIG. 31, for example, every 200 ms (0, 2 seconds), the change from the image shown in the upper part in FIG. 31 to the image shown in the middle part, and from the image shown in the middle part Considering that control is performed so that changes to the image shown in the lower row occur, an intermediate image exists between the image shown in the upper row and the image shown in the middle row, and is shown in the middle row. An intermediate image exists between the image and the image shown in the lower row. Then, a series of images including intermediate images are sequentially displayed on the image display device 9 every 1/33 seconds. However, in order to simplify the description, for example, the change from the image shown in the upper part to the image shown in the middle part in FIG. 31 and the change from the image shown in the middle part to the image shown in the lower part are performed. A case where control is performed to occur every 1/33 seconds will be described.

  FIG. 43 is a flowchart showing the background control process in step S709. Here, the case where the synthesized moving image illustrated in FIG. 17 is displayed as a background image will be described as an example. Note that the drawing processor 109 is described as VDP in the flowcharts of FIG.

  The effect control CPU 101 confirms whether or not the background control in-process flag is set in the background control process (step S611). If it is set, the process proceeds to step S621. If not set, a background control in-progress flag is set (step S612). Then, the value of the background effect cycle counter is initialized to 0 (step S613). The background effect cycle number counter is a counter that is incremented by 1 every time 11 seconds elapse (when display of a frame image of 330 frames in a cycle of 1/33 seconds is completed). Further, an α buffer (buffer area secured in the VRAMRS 96A) corresponding to an area where the frame image data of the frame image constituting the moving image A is expanded and an area where the frame image data of the frame image constituting the moving image B is expanded. Then, 1.0 is set as the α value in the buffer area in which the α value is set (step S614).

  Further, the production control CPU 101 outputs a multi-stream start address command to the drawing processor 109 (step S615). The address of the CGROM 83 specified by the multi-stream start address command is an address in which the moving image data of the moving images A and B illustrated in FIG. 16 is stored. Further, the multi-stream development area address command is output to the drawing processor 109 (step S616). Then, a decode execution command for instructing multi-stream expansion is output to the drawing processor 109 (step S617). Also, the value of the background frame number counter is initialized to 0 (step S618).

  In step S621, the effect control CPU 101 increments the value of the background frame number counter by one. Then, the frame image data of one frame in the expanded area corresponding to the moving image A (the area where the frame image data of the frame image constituting the moving image A is expanded in the VRAMRS 96A) is output to the VRAMFB 96B (step S622). . Specifically, a VRAMFB transfer command (see FIG. 38) is output to the drawing processor 109. Note that the read address in the VRAMFB transfer command changes according to the value of the background frame number counter. That is, the storage address in the VRAMRS 96A of the frame image data to be output at that time is set as the read address in the VRAMFB transfer command. The write address in the VRAMFB transfer command is the address of the drawing area.

  Further, a drawing effect command for designating the α value of the frame image data of the frame image constituting the moving image B is output to the drawing processor 109 (step S623). Then, the frame image data of one frame in the expanded area corresponding to the moving image B (the area where the frame image data of the frame image constituting the moving image B is expanded in the VRAMRS 96A) is output to the VRAMFB 96B (step S624). . Specifically, a VRAMFB transfer command (see FIG. 38) is output to the drawing processor 109.

  Note that when the moving image A and the moving image B are drawn in the same drawing area (combined so as to completely overlap), the write address in the VRAMFB transfer command output in step S624 is output in step S622. Same as the write address in the VRAMFB transfer command.

  In the drawing processor 109, the decoder 95 expands the moving image A data and the moving image B data stored in the CGROM 83 in accordance with the decode command output in the process of step S617, and stores them in the VRAMRS 96A. Further, one frame image data in the moving image A data is drawn in the drawing area in accordance with the VRAMFB transfer command output in the process of step S622. Then, in response to the VRAMFB transfer command output in step S624, one frame of frame image data in the moving image B data is drawn in the drawing area. At that time, the frame image data output in step S623 is output. The calculation is performed in consideration of the α value by the drawing effect command, and the image is synthesized. Note that the decoder 95 decompresses the frame image data that has been subjected to data compression every 1/60 seconds. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  Thereafter, the effect control CPU 101 checks whether or not the value of the background frame number counter is 330 corresponding to the reproduction of 11 seconds (step S625). If not 330, the process ends. If it is 330, the value of the background effect period counter is incremented by 1 (step S626). When the value of the background effect period counter is 1 (step S627), 0.5 is set as the α value in the α buffer (step S628), and the process proceeds to step S615. If the value of the background effect period counter is 2 (step S629), 0.2 is set as the α value in the α buffer (step S630), and the process proceeds to step S615. If the value of the background effect period counter is neither 1 nor 2, the process proceeds to step S613.

  The display as shown in FIG. 20 is realized by the processing of steps S628 and S630.

  FIG. 44 is an explanatory diagram for describing a modification of the background control process shown in FIG. When the moving image A data and the moving image B data are drawn at the same position in the drawing area, as described above, the write address in the VRAMFB transfer command output in step S624 is output in step S622. The address is the same as the write address in the VRAMFB transfer command (see (a) of FIG. 44A). Also, by shifting the write address in the VRAMFB transfer command output in step S624 from the write address in the VRAMFB transfer command output in step S622 (see (b) of FIG. 44A), FIG. It is possible to display a combined moving image in which the moving image A and the moving image B are combined as illustrated.

  Further, when moving images A and B including a frame image larger than the size of the drawing area are stored in the CGROM 83, the expanded frame image data larger than the size of the drawing area is stored in the VRAMRS 96A. In this case, the read address in the VRAMFB transfer command output in step S622 and the read address in the VRAMFB transfer command output in step S624 are set to the address of the area corresponding to the size of the drawing area. The display of the background image as shown in FIG. Note that the processing in this case is not shown in FIG.

  Furthermore, when frame image data after expansion larger than the size of the drawing area is stored in VRAMRS 96A, the read address in the VRAMFB transfer command output in step S622 is the address of the area corresponding to the size of the drawing area. Then, by setting the address of the area smaller than the size of the read address drawing area in the VRAMFB transfer command output in step S624 (see FIG. 44B), a part of the moving image A is drawn in the drawing area, An image obtained by combining a part of the moving image B with the image is displayed on the image display device 9. That is, the clipping range for the moving image A data among the plurality of moving image data is made different from the clipping range for the moving image B data among the other moving image data. The display circuit 97 of the drawing processor 109 outputs an image signal based on the image data developed in the drawing area of the VRAMFB 96B to the image display device 9 every 1/33 seconds.

  FIG. 45 is a flowchart illustrating another example of the background control process. Here, a case will be described as an example in which a synthesized moving image is mapped as a texture on the polygon illustrated in FIG. 23, and then image data obtained by performing rendering processing is displayed as a background image. In FIG. 45, some steps common to the steps in FIG. 43 are omitted.

  In the background control process shown in FIG. 45, when the background control in-progress flag is not set, the effect control CPU 101 performs a process for generating a polygon having a tile shape in the non-drawing area of the VRAMFB 96B ( Step S612B). Specifically, a polygon drawing command that specifies the shape and size of the polygon is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 39), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B.

  In step S622B, a texture attribute setting command is output to set a region to be used as a texture of the frame image included in the moving image A. In step S622C, a VRAMFB transfer command is output to the drawing processor 109 in order to output the frame image data of one frame of the development area corresponding to the moving image A as a texture to the VRAMFB 96B. , And specify the polygon area (area where the polygon is developed).

  In step S624B, a texture attribute setting command is output to set an area to be used as the texture of the frame image included in the moving image B. In step S624C, a VRAMFB transfer command is output to the drawing processor 109 to output one frame of frame image data corresponding to the moving image B to the VRAMFB 96B as a texture. , And specify the polygon area (area where the polygon is developed).

  Next, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as a polygon area) of VRAMRS 96A (step S624D). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the drawing area of VRAMFB 96B (step S624E).

  Note that when the drawing processor 109 outputs the image data of the drawing area of the VRAMRS 96A to the drawing area of the VRAMFB 96B, the image data already developed in the drawing area of the VRAMFB 96B (in this example, the frame image constituting the moving image A) Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  The other processes are the same as the processes shown in FIG. 45, the synthesized moving image is mapped as a texture on the polygon illustrated in FIG. 23 by the processing of steps S622B, S622C, S624B to S624E, and then the image data obtained by performing the rendering processing is displayed as a background image. be able to. The display circuit 97 of the drawing processor 109 outputs an image signal based on the image data developed in the drawing area of the VRAMFB 96B to the image display device 9 every 1/33 seconds.

  FIG. 46 is a flowchart showing the effect control process (step S707) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S807 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command has been received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the variation pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the notice selection process (step S801).

  Preliminary selection process (step S801): In the image display device 9, it is determined whether or not to execute the preliminary presentation process for notifying the player of the occurrence of the big hit, and when it is determined to execute the preliminary presentation process. Determines the notice type. Then, the value of the effect control process flag is changed to a value corresponding to the decorative symbol variation start process (step S802).

  Decoration symbol variation start processing (step S802): Control is performed so that the variation of the ornament symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol changing process (step S803).

  Decoration symbol variation processing (step S803): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S804).

  Decoration symbol variation stop processing (step S804): Based on the reception of the effect control command (design determination designation command) for instructing all symbols to stop, the variation of the ornament symbol is stopped and the display result (stop symbol) is derived and displayed. Take control. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S805) or the variation pattern command reception waiting process (step S800).

  Big hit display processing (step S805): After the end of the variation time, control is performed to display a screen for notifying the image display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S806).

  Big hit game processing (step S806): Control during the big hit game is performed. For example, when an effect control command for display before opening the big winning opening or display when opening the big winning opening is received, display control of the number of rounds in the image display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot end process (step S807).

  Big hit end processing (step S807): In the image display device 9, display control is performed to notify the player that the big hit gaming state has ended. Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800).

  FIG. 47 is a flowchart showing the variation pattern command reception waiting process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S812). The variation pattern command reception flag is set in the command analysis process when a variation pattern command is received. In the command analysis process, the received fluctuation pattern command or data indicating the received fluctuation pattern command is stored in the fluctuation pattern command storage area of the RAM. Then, the value of the effect control process flag is updated to a value corresponding to the notice selection process (step S801) (step S813).

  FIG. 48 is a flowchart showing a notice selection process in the effect control process shown in FIG. In the advance notice selection process, the effect control CPU 101 changes the variation pattern indicated by the received variation pattern command (stored in the variation pattern command storage area in the RAM in the command analysis process) into the variation patterns A to C (FIG. 9). The reach A, the reach B, and the reach C shown in FIG. 6 are also included (including the types of variation patterns including “shortening” and “extension”) (step S821). If none of the variation patterns A to C, the process is terminated. If any of the variation patterns A to C, a random number for determining the notice is extracted, and based on the extracted random number value, whether or not the notice effect is to be performed and the type of the notice effect when it is determined to perform the notice effect Is determined (step S822). The received display result specifying command is also referred to when determining whether or not to give a notice effect. In this embodiment, the notice effect can be executed when the effect by the variation pattern of reach A, reach B, and reach C is performed, but the effect by another type of variation pattern is performed. Sometimes a notice effect may be executed.

  In addition, when it is decided to make a notice effect, when it is decided to make a big hit notice effect, a big hit notice flag is set, and when it is decided to make a break notice effect, a break notice flag is set. (Step S824). Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation start process (step S802) (step S825).

  FIG. 49 is an explanatory diagram illustrating an example of a process for determining whether or not to perform the notice effect and the type of the notice effect when it is determined to perform the notice effect. FIG. 49A shows a command (display result 2 to 5 designation) indicating that the received display result specifying command (stored in the display result specifying command storage area of the RAM in the command analysis process) is hit. An example of a command (see FIG. 12) is shown. FIG. 49 (B) shows an example in which the received display result specifying command is a command indicating a deviation (display result 1 designation command; see FIG. 12).

  When the extracted random number value matches the notice determination value shown in FIG. 49 in the process of step S822, the effect control CPU 101 determines whether or not to give the notice effect according to the matched notice determination value. Then, when a display result specifying command indicating a win is received and it is determined to give a notice effect, it is decided to execute a big hit notice effect (see FIG. 36). In addition, when the display result specifying command indicating the detachment is received and it is determined that the notice effect is to be given, it is decided to execute the notice effect at the time of detachment (see FIG. 34).

  FIG. 50 is a flowchart showing a decorative symbol variation start process (step S802) in the effect control process shown in FIG. In the decorative symbol variation start process, the effect control CPU 101 reads the variation pattern command or data indicating the received variation pattern command from the variation pattern command storage area (step S830).

  Next, the display result of the decorative symbol (stop symbol) is determined in accordance with the data stored in the display result specifying command storage area of the RAM (that is, the received display result specifying command) (step S831). The effect control CPU 101 stores data indicating the display result of the determined decorative symbol in the decorative symbol display result storage area.

  In step S831, the effect control CPU 101 extracts a predetermined random number and determines a stop symbol based on the extracted random number. At this time, if a display result specifying command indicating display error (display result 1 designation command) is received, a combination of stop symbols that reminds of the error (for example, left middle right symbol does not match, or left and right symbols The middle symbol does not match). Further, when a display result specifying command (display result 2 to 5 designation command) indicating a hit is received, a combination of stop symbols (for example, the left, middle and right symbols match) reminiscent of a big hit is determined. . When a display result specifying command (display result 4 designation command) indicating a probable big hit is received, a combination of stop symbols that recalls a probable big hit (for example, “7” “7” “7”) May be determined. Note that a combination of decorative symbols that evokes a big hit is sometimes referred to as a big hit symbol, and a combination of decorative symbols that evokes a loss is sometimes referred to as a missed symbol.

  Then, the production control CPU 101 selects a process table corresponding to the variation pattern (step S832). Then, the process timer corresponding to the effect execution data 1 in the selected process data is started (step S833). Next, the production control CPU 101 performs the production device (the image display device 9 as the production component, the production component as the production component according to the contents of the process data 1 (display control execution data 1, lamp control execution data 1, sound number data 1). Control of various lamps, LED light emitters, and speaker 27 as a production component is executed (step S834). For example, in order to display an image according to the variation pattern on the image display device 9, a command is output to the drawing processor 109. In addition, a control signal (lamp control execution data) is output to the lamp driver board 35 in order to perform on / off control of various lamps. In addition, a control signal (sound number data) is output to the sound output board 70 in order to output sound from the speaker 27.

  In this embodiment, the effect control CPU 101 performs control so that the decorative pattern is variably displayed by the change pattern corresponding to the change pattern command on a one-to-one basis, but the effect control CPU 101 controls the change pattern command. The variation pattern to be used may be selected from a plurality of types of variation patterns corresponding to.

  Then, the value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S835), the process data valid flag is set (step S836), and the value of the effect control process flag is changed to the decorative pattern variation. A value corresponding to the intermediate process (step S803) is set (step S837).

  FIG. 51 is an explanatory diagram of a configuration example of the process table. The process table is a table in which process data referred to when the effect control CPU 101 executes control of the effect device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the image display device 9 in accordance with the data set in the process table. The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. The display control execution data includes data indicating each variation mode constituting the variation mode during the variable display time (variation time) of the variable display of the decorative symbols. Specifically, data relating to the change of the display screen of the image display device 9 is described. The process timer set value is set with a change time in the form of the change.

  The process table shown in FIG. 51 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern. Furthermore, different process tables are prepared according to the difference in the notice effect mode (notice type) when the notice effect is executed.

  FIG. 52 is a flowchart showing the decorative symbol variation process (step S803) in the effect control process shown in FIG. In the decorative symbol variation process, the effect control CPU 101 subtracts 1 from the value of the process timer (step S841) and subtracts 1 from the value of the variation time timer (step S842). When the process timer times out (step S843), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S844). Further, the control state for the image display device 9 is changed based on the display control execution data set next (step S845A). Further, based on the lamp control execution data and sound number data set next, the control state for the light emitters such as lamps and LEDs and the speaker 27 is changed (step S845B). Also, a notice effect process is performed (step S845C).

  If the variation time timer has timed out (step S846), the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S804) (step S848). Even if the variable time timer has not timed out, if the confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847), the process proceeds to step S848. Even if the variation time timer has not timed out, if the symbol confirmation designation command is received, the process shifts to control to stop variation.For example, a variation pattern command indicating a long variation time due to noise between substrates is received. Even in such a case, the variation of the decorative symbol can be terminated when the regular variation time has elapsed (when the variation of the special symbol has ended).

  FIG. 52 is a flowchart showing a decoration symbol variation stop process (step S804) in the effect control process shown in FIG. In the decorative symbol variation stopping process, the effect control CPU 101 checks whether or not the confirmation command reception flag is set (step S851). The confirmation command reception flag is set when a symbol confirmation designation command is received in the command analysis process. If the confirmation command reception flag is set, the confirmation command reception flag is reset (step S852), and control for deriving and displaying the determined stop symbol is performed (step S853). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S854). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol.

  If it is determined to be a big hit, the value of the effect control process flag is updated to a value corresponding to the big hit display process (step S805) (step S855). If it is determined not to win, the effect control CPU 101 updates the value of the effect control process flag to a value corresponding to the variation pattern command reception waiting process (step S800) (step S856).

  In this embodiment, the effect control microcomputer 100 ends the variation (variable display) of the decorative symbols on the condition that the symbol confirmation designation command has been received (see steps S851 and S853). However, if the variation time timer based on the received variation pattern command times out, the variation of the decorative symbol may be controlled to end without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  Hereinafter, the process of changing the control state for the image display device 9 in step S845A will be described.

  FIGS. 54 to 56 are flowcharts showing processing when the decorative symbol “7” illustrated in FIG. 24 is changed to the decorative symbol “8”. In this example, the display control execution data i to i + 2 in the process table are used as an example.

  When the display control execution data to be used next in the process table is the display control execution data i, the effect control CPU 101 executes the processes of steps S642 to S648 (step S641). When the display control execution data to be used next in the process table is the display control execution data i + 1, the effect control CPU 101 executes the processes of steps S652 to S658 (step S651). If the next display control execution data to be used in the process table is the display control execution data i + 2, the effect control CPU 101 executes the processes of steps S662 to S668 (step S661).

  In step S642, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. Next, a process for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B is performed (step S643). Specifically, a polygon drawing command for designating the arrangement position, shape, and size of the polygon in the virtual three-dimensional space is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 39), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B. Note that the α value of each pixel in the plate-shaped polygon image data is set to zero.

  Next, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as polygon area) of VRAMRS 96A (step S644). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the non-drawing area of VRAMFB 96B (step S645).

  Then, the image data of the non-drawing area of VRAMFB 96B is transferred to VRAMRS 96A (step S646). This image becomes a mask pattern.

  Next, the effect control CPU 101 outputs a CGROM transfer command to the drawing processor 109 (step S647). The read address is an address where the image data of the decorative pattern “8” is stored, and the write address is an address where a mask pattern is formed. Then, the image data stored at the address where the mask pattern is formed is output to the drawing area of the VRAMFB 96B (step S648). In step S648, presentation control CPU 101 outputs a VRAMFB transfer command to drawing processor 109.

  The image as shown in FIG. 24A is displayed on the image display device 9 by the processing as described above. In this embodiment, the clipping process using the mask pattern is realized by developing the image data of the decorative pattern “8” in the area where the mask pattern is developed (step S647).

  In step S652, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. Next, a process for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B is performed (step S653). Note that the α value of each pixel in the plate-shaped polygon image data is set to zero. Further, the size of the plate-shaped polygon created by the process of step S653 is larger than the size of the plate-shaped polygon created by the process of step S643. Further, the position of the plate-shaped polygon created by the process of step S653 is different from the position of the plate-shaped polygon created by the process of step S643. Therefore, the process of moving the polygon is realized.

  Next, the image data of the polygon area of VRAMFB 96B is output to the polygon area of VRAMRS 96A (step S654). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the non-drawing area of VRAMFB 96B (step S655).

  Then, the image data of the non-drawing area of VRAMFB 96B is transferred to VRAMRS 96A (step S656). This image becomes a mask pattern.

  Next, the production control CPU 101 outputs a CGROM transfer command to the drawing processor 109 (step S657). The read address is an address where the image data of the decorative pattern “8” is stored, and the write address is an address where a mask pattern is formed. Then, the image data stored at the address where the mask pattern is formed is output to the drawing area of the VRAMFB 96B (step S658). In step S658, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109.

  The image as shown in FIG. 24B is displayed on the image display device 9 by the processing as described above.

  In step S662, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. Next, a process for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B is performed (step S663). Note that the α value of each pixel in the plate-shaped polygon image data is set to zero. Further, the size of the plate-shaped polygon created by the process of step S663 is larger than the size of the plate-shaped polygon created by the process of step S653. Further, the position of the plate-shaped polygon created by the process of step S663 is different from the position of the plate-shaped polygon created by the process of step S653. Therefore, the process of moving the polygon is realized.

  Next, the image data of the polygon area of VRAMFB 96B is output to the polygon area of VRAMRS 96A (step S664). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data of the drawing area of VRAMRS 96A is output to the non-drawing area of VRAMFB 96B (step S665).

  Then, the image data of the non-drawing area of VRAMFB 96B is transferred to VRAMRS 96A (step S666). This image becomes a mask pattern.

  Next, the effect control CPU 101 outputs a CGROM transfer command to the drawing processor 109 (step S667). The read address is an address where the image data of the decorative pattern “8” is stored, and the write address is an address where a mask pattern is formed. Then, the image data stored at the address where the mask pattern is formed is output to the drawing area of the VRAMFB 96B (step S668). In step S <b> 668, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109.

  The image as shown in FIG. 24C is displayed on the image display device 9 by the processing as described above.

  Thereafter, the CPU 101 for effect control controls the drawing processor 109 to display the decorative pattern “8” on the image display device 9.

  In this embodiment, the mask pattern size is changed by creating polygons having different sizes (steps S643, S653, and S663), but the rendering process (steps S645 and S655) is performed without changing the polygon size. At the time of S665), the size of the mask pattern may be changed by changing the size of the area for reading the size of the area for writing the image data. For example, when the size of the area in which image data is written is larger than the size of the area to be read, the drawing processor 109 generates pixels by interpolation processing and performs image enlargement processing.

  Further, it may be possible to display the boundary portion of the image with another image smoothly by performing a process of translucent the edge portion of the image to be rendered. Specifically, when executing the processing of steps S647, S657, and S667, the rendering processor 109 is given a command to set the α value of the edge portion in the image data “8” to a value lower than 1.0. The blending process is performed by α blending the edges.

  In this embodiment, the mask pattern is created and the image data “8” is pasted in the mask pattern. However, after the image data of a predetermined still image is pasted on the polygon, Rendering processing may be performed. In that case, for example, between the processing of step S643 and the processing of step S644, the effect control CPU 101 sends image data of a predetermined still image in the CGROM 83 to the VRAMRS 96A by the drawing processor 109 by a CGROM transfer command. In response to the VRAMFB transfer command, the image data of the still image developed in the VRAMRS 96A is pasted on the polygon as a texture. By performing such control, the displayed decorative symbols can be varied.

  FIG. 57 is an explanatory diagram showing the processing of steps S643, S653, and S663 and the processing of steps S643, S653, and S663 in the modified example. The modified example is a process in the case of changing from a decorative pattern “6” to a decorative pattern “7”. That is, this is processing for realizing the example shown in FIG.

  In the process in the case where the decoration pattern of “7” is changed to the decoration pattern of “8”, the size of the plate-shaped polygon to be created is small in the process of step S643 and it is as if it has fallen 90 degrees to the back side. (See FIG. 25). In the process of step S653, the size of the plate-shaped polygon to be created is medium and is created at a position as if it has been tilted 90 degrees to the back side. In the process of step S663, the size of the plate-shaped polygon to be created is large and is created at a position as if it is tilted 90 degrees to the back side.

  In the case where the decorative pattern “6” changes to the decorative pattern “7”, the variable display on the image display unit 9 can be basically realized by the processing shown in FIGS. 54 to 55, but the processing in step S 643. In FIG. 28, the size of the plate-shaped polygon to be created is small and is created at a position as if it has been tilted 90 degrees to the right (see FIG. 28). Further, in the process of step S653, the size of the plate-shaped polygon to be created is medium and is created at a position as if it has been tilted 90 degrees to the right. In the process of step S663, the size of the plate-shaped polygon to be created is large and is created at a position as if it has been tilted 90 degrees to the right.

  As described above, the drawing processor 109 performs control to move to a position corresponding to a plurality of types of identification information variably displayed in a shape corresponding to a plurality of types of identification information variably displayed. In this example, the case of changing from the decorative pattern “7” to the decorative pattern “8” is exemplified as the case of changing from the decorative pattern “6” to the decorative pattern “7”. In addition, it may be controlled to move to a position corresponding to a plurality of types of identification information variably displayed in a shape corresponding to the type of identification information.

  Even when the decorative pattern “6” changes to the decorative pattern “7”, the size of the mask pattern can be changed by changing the size of the area in which the image data is written in the rendering process. Can be changed.

  FIG. 58 is a flowchart showing the notice effect processing (see FIG. 52) in step S645C. In the notice effect process, the effect control CPU 101 checks whether or not the big hit notice flag or the off notice notice flag is set (step S671). If any flag is set, it is checked whether or not the flag for the notice effect is set (step S672). If the notice effect flag is not set, it is confirmed whether or not the notice effect start timing has come (step S673). The notice effect start timing is the time when a predetermined time has elapsed from the start of the predetermined variable display. By setting data indicating the time in the process data, the effect control CPU 101 notifies the notice. It can be determined whether or not the production start timing has come.

  When it is time to start the notice effect, a flag for notice effect is set (step S674). Then, the effect control CPU 101 outputs a multi-stream start address command to the drawing processor 109 (step S675). The address of the CGROM 83 specified by the multi-stream start address command is an address in which the moving image data of the moving images A and B illustrated in FIG. 33 is stored. Further, the multi-stream development area address command is output to the drawing processor 109 (step S676). Then, a decode execution command for instructing multi-stream expansion is output to the drawing processor 109 (step S677). Further, the value of the notice effect cycle number counter is initialized to 0 (step S678).

  Note that the decoder 95 expands the frame image data subjected to data compression every 1/60 seconds in accordance with a decode execution command. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  When it is confirmed in step S672 that the flag for the notice effect is being set, the effect control CPU 101 checks whether or not the value of the notice effect period counter is 3 (step S680). If it is not 3, the value of the notice effect period counter is incremented by 1 (step S681). Further, a process for generating a plate-like polygon in the non-drawing area of the VRAMFB 96B is performed (step S682). Specifically, a polygon drawing command that specifies the shape and size of the polygon is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 39), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B.

  Note that the size and creation position of the plate-shaped polygon differ depending on the value of the notice effect period counter (see FIG. 33C and FIG. 35).

  In addition, a texture attribute setting command is output in order to set a region to be used as the texture of the frame image included in the moving image A (see FIG. 33A) (step S683). In addition, in order to output the frame image data of one frame in the development area corresponding to the moving image A to the VRAMFB 96B as a texture, a VRAMFB transfer command is output to the drawing processor 109, but a polygon area ( A region where polygons are developed is designated (step S684).

  Further, a rendering effect command for designating the α value of the frame image data of the frame image constituting the moving image B (see FIG. 33B) is output to the rendering processor 109 (step S685). Further, a texture attribute setting command is output to set an area to be used as the texture of the frame image included in the moving image B (step S686). Then, one frame of frame image data corresponding to the moving image B (the region where the frame image data of the frame image constituting the moving image B is expanded in the VRAMRS 96A) is output to the polygon region of the VRAMFB 96B ( Step S687). Specifically, a VRAMFB transfer command (see FIG. 38) is output to the drawing processor 109.

  Note that when the drawing processor 109 outputs the image data of the drawing area of the VRAMRS 96A to the drawing area of the VRAMFB 96B, the image data already developed in the drawing area of the VRAMFB 96B (in this example, the frame image constituting the moving image A) Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  Next, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as polygon area) of VRAMRS 96A (step S688). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to an area (notice effect window) corresponding to the notice effect area 9a in the drawing area of VRAMFB 96B (step S689). The drawing processor 109 pastes the image data of the composite moving image (superimposed image) on the plate-shaped polygon by executing the process according to the VRAMFB transfer command in the process of step S687.

  When the value of the notice effect cycle number counter is 3, the effect control CPU 101 checks whether or not the moving image playback flag is set (step S691).

  When the moving image playback flag is not set, the effect control CPU 101 outputs a multi-stream start address command to the drawing processor 109 (step S692). The addresses of the CGROM 83 designated by the multi-stream start address command are two moving images starting from a frame image based on the frame image data used in steps S682 and S683 when the value of the notice effect period number counter is 2. Hereinafter, these are also referred to as moving images A and B). Further, the multi-stream development area address command is output to the drawing processor 109 (step S693). Then, a decode execution command for instructing multi-stream decompression is output to the drawing processor 109 (step S694). Then, a moving image playback flag is set (step S695).

  Note that the decoder 95 expands the frame image data subjected to data compression every 1/60 seconds in accordance with a decode execution command. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  In addition, the drawing processor 109 does not perform texture pasting or rendering processing on the moving image data whose expansion processing is started by the processing in step S694. That is, the moving image based on the moving image data whose expansion process is started by the process of step S694 is displayed on the image display device 9 as it is.

  In the CGROM 83, moving image A data and moving image B data whose expansion processing is started by the processing of step S678 and moving image A data and moving image B data whose expansion processing is started by the processing of step S694 are separately provided. Stored. The resolution of the moving image based on the moving image A data and the moving image B data whose expansion processing is started by the processing of step S694 is the moving image based on the moving image A data and the moving image B data whose expansion processing is started by the processing of step S678. Higher than the resolution. When reproducing high-resolution moving image data (moving image A data and moving image B data whose expansion processing is started by the processing in step S694), texture pasting or rendering processing is not performed, and high-resolution moving image is performed. The burden on the drawing processor 109 when data is being reproduced can be reduced. Further, when the moving image data is reproduced as it is, the display quality can be improved.

  When the moving image playback flag is set, the frame image data of one frame in the development area corresponding to the moving image A is output to another area in the VRAMRS 96A (step S696). Specifically, an inter-VRAMRS transfer command (see FIG. 38) is output to the drawing processor 109. Further, the frame image data of one frame in the development area corresponding to the moving image B is output to the VRAMRS 96A (step S697). Specifically, an inter-VRAMRS transfer command (see FIG. 38) is output to the drawing processor 109. Note that the write address in the inter-VRAMRS transfer command is an address of an area to which one frame of frame image data in the development area corresponding to the moving image A has been transferred. Therefore, the frame image data of the moving image A and the frame image data of the moving image B are combined in another area in the VRAMRS 96A.

  Note that when the drawing processor 109 outputs the image data in the drawing area to the VRAMRS 96A based on the inter-VRAMRS transfer command, the image data already developed in the VRAMRS 96A (in this example, the frame image constituting the moving image A is displayed). Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  Then, the effect control CPU 101 outputs the image data in the other area of the VRAMRS 96A to an area (notice effect window) corresponding to the notice effect area 9a in the drawing area of the VRAMFB 96B (step S698). Specifically, a VRAMFB transfer command (see FIG. 38) is output to the drawing processor 109.

  As described above, the notice effect as illustrated in FIGS. 34 and 36 is executed. As described above, when the drawing processor 109 creates display image data over a plurality of frames using polygons in response to a command from the effect control CPU 101, the last frame image data of the plurality of frames is used. Next, the moving image data is reproduced from the frame image data.

  60 and 61 are flowcharts showing processing when a moving image is pasted on the polygon illustrated in FIG. 31 to display a decorative symbol “7”. In this example, the display control execution data i to i + 3 in the process table are used as an example.

  When the display control execution data to be used next in the process table is the display control execution data i, the effect control CPU 101 executes the processes of steps S902 to S905 (step S901). If the next display control execution data to be used in the process table is the display control execution data i + 1, the effect control CPU 101 executes the processes of steps S907 to S912 (step S906). When the next display control execution data to be used in the process table is the display control execution data i + 2, the effect control CPU 101 executes the processes of steps S922 to S927 (step S921). When the next display control execution data to be used in the process table is the display control execution data i + 3, the effect control CPU 101 executes the processes of steps S932 to S937 (step S931).

  In step S <b> 902, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. The write address in the VRAMFB transfer command is a drawing area in the VRAMFB 96B.

  Next, a single stream start address command is output to the drawing processor 109 (step S903). The address of the CGROM 83 designated by the single stream start address command is an address in which moving image data of a moving image in which an airplane existing in the decorative symbol display area illustrated in FIG. 31 moves is stored. Further, a single stream development area address command is output to the drawing processor 109 (step S904). Then, a decode execution command for instructing expansion of the single stream is output to the drawing processor 109 (step S905).

  In step S <b> 907, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. The write address in the VRAMFB transfer command is a drawing area in the VRAMFB 96B.

  Next, the effect control CPU 101 performs processing for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B (step S908). Specifically, a polygon drawing command that specifies the shape and size of the polygon is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 39), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B. In addition, a texture attribute setting command is output to set an area to be used as a texture of the frame image included in the moving image (step S909). In addition, in order to output the frame image data of one frame of the development area corresponding to the moving image as a texture to the VRAMFB 96B, a VRAMFB transfer command is output to the drawing processor 109. As a write address, a polygon area (polygon Is designated) (step S910).

  Further, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as polygon area) of VRAMRS 96A (step S911). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the drawing area of VRAMFB 96B (step S912).

  In step S922, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. The write address in the VRAMFB transfer command is a drawing area in the VRAMFB 96B.

  Next, the effect control CPU 101 performs processing for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B (step S923). The size of the plate-shaped polygon created by the process of step S923 is larger than the size of the plate-shaped polygon created by the process of step S908. Further, the depth of the plate-shaped polygon created by the process of step S923 is shallower (the Z value is smaller) than the depth of the plate-shaped polygon created by the process of step S908. In addition, a texture attribute setting command is output in order to set an area to be used as the texture of the frame image included in the moving image (step S924). In addition, a VRAMFB transfer command is output to the rendering processor 109 in order to output the frame image data of one frame of the development area corresponding to the moving image as a texture to the VRAMFB 96B, but the polygon area is designated as the write address. (Step S925).

  Further, the image data of the polygon area of VRAMFB 96B is output to the polygon area of VRAMRS 96A (step S926). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, the image data in the drawing area of VRAMRS 96A is output to the drawing area of VRAMFB 96B for rendering (step S927).

  In step S932, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. The write address in the VRAMFB transfer command is a drawing area in the VRAMFB 96B.

  Next, the effect control CPU 101 performs processing for generating a plate-like polygon in the non-drawing area of the VRAMFB 96B (step S933). The size of the plate-shaped polygon created by the process of step S933 is larger than the size of the plate-shaped polygon created by the process of step S923. Further, the depth of the plate-shaped polygon created by the process of step S933 is shallower (the Z value is smaller) than the depth of the plate-shaped polygon created by the process of step S923. In addition, a texture attribute setting command is output to set an area to be used as a texture of the frame image included in the moving image (step S934). In addition, a VRAMFB transfer command is output to the rendering processor 109 in order to output the frame image data of one frame of the development area corresponding to the moving image as a texture to the VRAMFB 96B, but the polygon area is designated as the write address. (Step S935).

  Further, the image data of the polygon area of VRAMFB 96B is output to the polygon area of VRAMRS 96A (step S936). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the drawing area of VRAMFB 96B (step S937).

  The image as shown in FIG. 31 is displayed on the image display device 9 by the processing as described above.

  In this embodiment, the mask pattern size is changed by creating polygons having different sizes (steps S908, S923, S933), but the rendering process (steps S912, S927, In S938), the size of the decorative symbol display area may be changed by changing the size of the area from which the image data is written.

  FIG. 62 is an explanatory diagram showing the processing of steps S908, S923, and S933, and the processing of steps S908, S923, and S933 in the modified example. The modification is a process for realizing the example shown in FIG.

  In the process for realizing the image display as shown in FIG. 31, in the process of step S908, the size of the plate-shaped polygon to be created is small and created at a position as if it has been tilted 90 degrees to the back side. (See FIG. 31). Further, in the process of step S923, the size of the plate-shaped polygon to be created is medium, and is created at a position as if it has fallen 90 degrees to the back side. In the process of step S933, the size of the plate-shaped polygon to be created is large and is created at a position as if it has been tilted 90 degrees to the back side.

  Further, in the process for realizing the image display as shown in FIG. 32, the variable display in the image display unit 9 can be basically realized by the process shown in FIGS. 60 and 61. However, in the process of step S908, The size of the plate-shaped polygon to be created is small and is created at a position as if it has fallen 10 degrees to the left (see FIG. 32). Further, in the process of step S923, the size of the plate-shaped polygon to be created is medium and is created at a position as if it has fallen 20 degrees to the left. In the process of step S933, the size of the plate-shaped polygon to be created is large and is created at a position as if it has been tilted 30 degrees to the left.

  FIG. 63 is a flowchart showing a process when a combined moving image obtained by combining two moving images with a polygon is pasted to display a decorative symbol “7”. In this example, the display control execution data i to i + 3 in the process table are used as an example. Hereinafter, the two moving images are referred to as moving images A and B.

  When the display control execution data to be used next in the process table is the display control execution data i, the effect control CPU 101 draws a VRAMFB transfer command to write the image data of the decorative pattern “7” in the drawing area. Then, the multi-stream start address command is output to the rendering processor 109 (step S903B). The address of the CGROM 83 designated by the multi-stream start address command is an address in which moving image data of moving images A and B is stored. Further, the multi-stream development area address command is output to the drawing processor 109 (step S904B). Then, a decode execution command for instructing expansion of the moving image A data and the moving image B data is output to the drawing processor 109 (step S905B).

  Note that the decoder 95 expands the frame image data subjected to data compression every 1/60 seconds in accordance with a decode execution command. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  When the display control execution data to be used next in the process table is the display control execution data i + 1, the effect control CPU 101 draws a VRAMFB transfer command to write the image data of the decorative pattern “7” in the drawing area. The image is output to the processor 109 (step S907), and processing for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B is performed (step S908), and then used as the texture of the frame image included in the moving image A. A texture attribute setting command is output to set an area (step S909B). In addition, in order to output the frame image data of one frame in the development area corresponding to the moving image A to the VRAMFB 96B as a texture, a VRAMFB transfer command is output to the drawing processor 109, but a polygon area ( A region where polygons are developed is designated (step S910B).

  In addition, a drawing effect command for designating the α value of the frame image data of the frame image constituting the moving image B is output to the drawing processor 109 (step S915). Further, a texture attribute setting command is output in order to set an area to be used as the texture of the frame image included in the moving image B (step S916). Then, one frame of frame image data corresponding to the moving image B (the region where the frame image data of the frame image constituting the moving image B is expanded in the VRAMRS 96A) is output to the polygon region of the VRAMFB 96B ( Step S917). Specifically, a VRAMFB transfer command (see FIG. 38) is output to the drawing processor 109.

  Note that when the drawing processor 109 outputs the image data of the drawing area of the VRAMRS 96A to the drawing area of the VRAMFB 96B, the image data already developed in the drawing area of the VRAMFB 96B (in this example, the frame image constituting the moving image A) Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  Next, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as polygon area) of VRAMRS 96A (step S918). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the drawing area of VRAMFB 96B (step S912).

  When the display control execution data to be used next in the process table is the display control execution data i + 2, i + 3, the same processing as that in the case where the display control execution data to be used next in the process table is the display control execution data i + 1 is performed. Do. However, the size of the created polygon is different from the case where the display control execution data is the display control execution data i + 1.

  In this embodiment, the size of the mask pattern is changed by creating polygons having different sizes. However, the size of the area in which image data is written is read during rendering processing without changing the size of the polygon. The size of the display area of the decorative design may be changed by changing the size of.

  In the processing shown in FIGS. 60 and 61, a moving image is pasted on the polygon illustrated in FIG. 31 or FIG. 32 to display the decorative pattern “7”. However, when the polygon is far from the viewpoint, a still image is displayed. May be pasted to the polygon as a texture, and if the polygon is close to the viewpoint, the moving image may be pasted to the polygon as a texture. 64 and 65 are flowcharts showing such processing. Here, in the upper and middle stages of FIG. 31 or FIG. 32, a still image is pasted as a texture on a polygon, and in the lower stage of FIG. 31 or FIG. 32, a moving image is pasted as a texture on a polygon. explain. In this example, the display control execution data i to i + 3 in the process table are used as an example. Also, the same processes as those in the flowcharts shown in FIGS. 60 and 61 are denoted by the same reference numerals in FIGS. 64 and 65, and the description thereof is omitted.

  When the display control execution data to be used next in the process table is the display control execution data i, the effect control CPU 101 draws a VRAMFB transfer command to write the image data of the decorative pattern “7” in the drawing area. The image is output to the processor 109 (step S907), and processing for generating a plate-like polygon in the non-drawing area of the VRAMFB 96B is performed (step S908). Next, the image (shown in the upper part of FIG. 31 or FIG. 32) In order to transfer the image data of the image including the airplane) from the CGROM 83 to the VRAMRS 96A, a CGROM transfer command is output to the drawing processor 109 (step S909B).

  Then, the process of step S909 is executed, and a VRAMFB transfer command is output to the drawing processor 109 in order to output the image data expanded in the VRAMRS 96A as a texture to the VRAMFB 96B (step S910B). In the VRAMFB transfer command, a polygon area (area where polygons are developed) is designated as a write address. Then, the process of step S911, S912 is performed. Note that the drawing processor 109 executes processing for pasting an image based on frame image data in moving image data as a texture onto a plate-shaped polygon by transferring image data in accordance with the processing in step S910B by the effect control CPU 101. It will be.

  When the display control execution data to be used next in the process table is the display control execution data i + 2, the effect control CPU 101 draws a VRAMFB transfer command to write the image data of the decorative pattern “7” in the drawing area. The image is output to the processor 109 (step S922), and processing for generating a plate-shaped polygon in the non-drawing area of the VRAMFB 96B is performed (step S923). Next, the image (shown in the middle of FIG. 31 or FIG. 32) In order to transfer the image data of the image including the airplane) from the CGROM 83 to the VRAMRS 96A, a CGROM transfer command is output to the drawing processor 109 (step S923B).

  Then, the process of step S924 is executed, and a VRAMFB transfer command is output to the drawing processor 109 in order to output the image data developed in the VRAMRS 96A as a texture to the VRAMFB 96B (step S925B). In the VRAMFB transfer command, a polygon area (area where polygons are developed) is designated as a write address. Thereafter, the processes of steps S926 and S927 are performed.

  With the above processing, when the polygon is far from the viewpoint, the still image is pasted on the polygon as a texture. This is because the depth of the plate-shaped polygon created by the process of step S923 is shallower (the Z value is smaller) than the depth of the plate-shaped polygon created by the process of step S908, and the plate shape created by the process of step S933. The depth of the polygon is shallower (the Z value is smaller) than the depth of the plate-shaped polygon created by the process of step S923. Therefore, when the viewpoint used for rendering is within a predetermined distance from the polygon (corresponding to the depth of the plate-shaped polygon created in step S933), the rendering processor 109 converts the frame image data in the moving image data into frame image data. When the original image is used as a texture and the viewpoint used for rendering is at a position beyond a predetermined distance from the polygon, the processing based on the image based on the still image data is executed.

  Note that the data size of the still image data transferred in step S923B is larger than the data size of the still image data transferred in step S909B. Further, the process when the next display control execution data to be used in the process table is the display control execution data i + 3 is the same as the process shown in FIG. Therefore, when the polygon is close to the viewpoint, the moving image is pasted on the polygon as a texture. The rendering processor 109 transfers the image data in accordance with the process of step S935 by the effect control CPU 101, thereby executing a process of pasting an image based on the frame image data in the still image data as a texture on the plate-shaped polygon. It will be.

  The CGROM 83 separately stores moving image data whose expansion processing is started by the processing of step S905 and still image data developed on the VRAMRS 96A based on the processing of steps S909B and S923B. The resolution of the moving image based on the moving image data whose expansion process is started by the process of step S905 is higher than the resolution of the still image data developed on the VRAMRS 96A based on the processes of steps S909B and S923B. Therefore, display quality can be improved when moving image data is reproduced.

  In this embodiment, the size of the mask pattern is changed by creating polygons having different sizes. However, the size of the area in which the image data is written is not changed during rendering processing without changing the size of the polygon. You may make it change the size of the display area of a decorative design by changing a size.

  In this embodiment, one moving image is pasted on a plate-shaped polygon. However, as in the process shown in FIG. 63, the production control CPU 101 outputs a command related to multi-stream (steps). S903B, S904B, and S905B), a moving image obtained by combining a plurality of moving images (superimposed image) may be pasted on the plate-shaped polygon. At this time, the decoder 95 expands the frame image data that has been subjected to data compression every 1/60 seconds in response to a multi-stream decoding execution command. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  As described above, the drawing processor 109 executes a process of moving the polygon from the first position in the three-dimensional space to the designated second position in the designated shape, and the second position. A mask pattern is generated on the basis of an image obtained by rendering a polygon placed on the image, and the image data stored in the image data storage means is clipped using the mask pattern (see FIGS. 24 to 29). Different mask patterns can be generated simply by changing the designation of the shape and position of the polygon, and the effects in the image display apparatus can be diversified without increasing the capacity of the ROM for storing image data.

  In addition, when moving images based on a plurality of moving image data are superimposed and repeatedly reproduced, the drawing processor 109 sequentially selects the plurality of moving image data, and display data for frame image data in the selected moving image data. And display data creation processing of frame image data in other moving image data is not started until display data creation is completed (see FIG. 21). Display data is not created from image data at the same time, and the processing load of image display control can be reduced.

  Further, a frame positioned later in the moving image data than the frame image data used when the drawing polygon 109 executes the process when the second polygon arranging unit executes the process. Once the display data is created from the polygons arranged by the second polygon arrangement unit using the image data, the moving image is obtained from the frame image data following the frame image data used by the texture pasting unit when the second polygon arrangement unit executes the process. Since the processing for reproducing the image data is executed (see FIGS. 34 and 36), the display contents on the image display device 9 can be varied without increasing the processing load of the image display control. it can.

  Further, the rendering processor 109 includes rendering means for executing processing for rendering polygons to generate display data, and when the viewpoint used when rendering is rendered is at a position within a predetermined distance from the polygons, The image based on the frame image data in the moving image data is used as a texture, and when the viewpoint used for rendering by the rendering means is at a position beyond a predetermined distance from the polygon, the image based on the still image data is configured as a texture. Therefore, the display content on the image display device 9 can be varied without increasing the processing load of the image display control.

  In the above embodiment, two moving images A and B are handled when handling a plurality of moving images, but three or more moving images may be handled.

  In the above embodiment, the production control board 80, the audio output board 70, and the lamp driver board 35 are provided as the boards on which the circuit for controlling the production apparatus is mounted. You may mount on one board | substrate. Further, a first effect control board (display control board) on which a circuit for controlling the variable display device 9 and the like is mounted and a circuit for controlling other effect devices (lamps, LEDs, speakers 27, etc.) are mounted. You may make it provide two board | substrates with two production | presentation control boards.

  In the above-described embodiment, the game control microcomputer 560 directly transmits a command to the effect control microcomputer 100. However, the game control microcomputer 560 transmits another command (for example, FIG. 3). The sound output board 70 and the lamp driver board 35 shown in FIG. 5 or the sound / lamp board having the function of the circuit mounted on the sound output board 70 and the function of the circuit mounted on the lamp driver board 35). A control command may be transmitted and transmitted to the effect control microcomputer 100 on the effect control board 80 via another board. In that case, the command may simply pass through another board, or the sound output board 70, the lamp driver board 35, and the sound / lamp board are equipped with control means such as a microcomputer, and the control means receives the command. In response to this, control related to sound control and lamp control is executed, and the received command is changed as it is or, for example, to a simplified command to control the variable display device 9. You may make it transmit to. Even in that case, the effect control microcomputer 100 performs the display control in accordance with the effect control command directly received from the game control microcomputer 560 in the above-described embodiment. Display control can be performed in accordance with commands received from the board 35 or the sound / lamp board.

  In the above embodiment, the pachinko gaming machine 1 is taken as an example of the gaming machine, but the present invention can be applied to other gaming machines, for example, a slot machine (slot machine) including an image display device. it can. When applied to a slot machine, for example, it can be used for bonus notices.

  The present invention is suitably applied to a gaming machine that includes an image display device and can display still images and moving images for presentation on the image display device.

It is the front view which looked at the pachinko game machine from the front. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram showing an example of circuit configuration of an effect control board, a lamp driver board and an audio output board. It is a block diagram which shows the circuit structural example of a drawing processor. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows an example of a big hit determination value. It is explanatory drawing which shows an example of a fluctuation pattern. FIG. 38E illustrates an effect control command signal line. It is a timing diagram showing the relationship between an 8-bit control signal and an INT signal constituting a control command. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows an example of the transmission timing of an effect control command. It is a flowchart which shows a special symbol process process. It is explanatory drawing which shows an example of the multiple types of decoration symbol variably displayed in an image display apparatus. It is explanatory drawing which shows the example which synthesize | combines two moving images and displays on an image display apparatus. It is explanatory drawing which shows the example which synthesize | combines two moving images and displays on an image display apparatus. It is explanatory drawing for demonstrating the example which shifts the moving image A and the moving image B. FIG. It is explanatory drawing which shows the structure of image data. It is explanatory drawing which shows the example by which a synthetic | combination moving image is reproduced | regenerated repeatedly. It is explanatory drawing which shows the other example by which a synthetic | combination moving image is reproduced | regenerated repeatedly. It is explanatory drawing for demonstrating the process which produces a clipping image. It is explanatory drawing for demonstrating the process which displays a synthetic | combination moving image as a three-dimensional image. It is explanatory drawing which shows the application example (modified example from basic form) of the variable display of a decoration design. It is explanatory drawing for implement | achieving the process for implement | achieving the variable display of the decoration symbol shown by FIG. It is explanatory drawing for implement | achieving the process for implement | achieving the variable display of the decoration symbol shown by FIG. It is explanatory drawing which shows the other application example of the variable display of a decoration design. It is explanatory drawing for implement | achieving the process for implement | achieving the variable display of the decoration symbol shown by FIG. It is explanatory drawing for implement | achieving the process for implement | achieving the variable display of the decoration symbol shown by FIG. It is explanatory drawing for demonstrating the alpha blend process of the edge part in a clipping range. It is explanatory drawing which shows the other application example of the variable display of a decoration design. It is explanatory drawing which shows the modification of the further another application example of the variable display of a decoration design. It is explanatory drawing for demonstrating the process which pastes the frame image which comprises the synthetic | combination moving image of two moving images A and B as a texture to a plate-shaped polygon. It is explanatory drawing which shows an example of a notice effect. It is explanatory drawing which shows the example in which a plate-shaped polygon is rotated in the direction different from the rotation direction of the plate-shaped polygon shown by FIG.33 (C). It is explanatory drawing which shows the other example of a notice effect. It is explanatory drawing for demonstrating transfer of image data. It is explanatory drawing which shows the command regarding data transfer. It is explanatory drawing which shows the command regarding a drawing command etc. It is explanatory drawing which shows the instruction | command regarding extending | stretching moving image data. It is explanatory drawing for demonstrating the method of decoding of moving image data (compressed data). It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is a flowchart which shows a background control process. It is explanatory drawing for demonstrating the modification in a background control process. It is a flowchart which shows the other example of a background control process. It is a flowchart which shows production control process processing. It is a flowchart which shows a fluctuation pattern command reception waiting process. It is a flowchart which shows a notice selection process. It is explanatory drawing which shows an example of the process which determines the kind of notification effect at the time of determining whether to perform a notification effect, and performing a notification effect. It is a flowchart which shows a decoration design change start process. It is explanatory drawing which shows the structural example of process data. It is a flowchart which shows a process during decoration design change. It is a flowchart which shows a decoration design change stop process. It is a flowchart which shows the process of step S845A. It is a flowchart which shows the process of step S845A. It is a flowchart which shows the process of step S845A. It is explanatory drawing for demonstrating the process in the case of changing from the decoration symbol of "7" to the decoration symbol of "8", and the case of changing from the decoration symbol of "6" to the decoration symbol of "7". It is a flowchart which shows a notification effect process. It is a flowchart which shows a notification effect process. It is a flowchart which shows the other example of a process of step S845A. It is a flowchart which shows the other example of a process of step S845A. It is explanatory drawing which shows the process of step S908, S923, and S933 and the process of step S908, S923, and S933 in a modification. It is a flowchart which shows the process in the case of sticking the synthetic | combination moving image which synthesize | combined two moving images to the polygon, and displaying the decoration symbol of "7". It is a flowchart which shows the further another example of a process of step S845A. It is a flowchart which shows the further another example of a process of step S845A.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8 Special symbol display 9 Image display 14 Start prize opening 31 Game control board (main board)
56 CPU
83 CGROM
80 Production control board 91 Drawing circuit 95 Decoder 96A VRAMRS
96B VRAMFB
100 effect control microcomputer 101 effect control CPU
109 Drawing processor 560 Microcomputer for game control

Claims (6)

A gaming machine equipped with an image display device that allows a player to play a predetermined game using a game medium and whose display state can be changed,
An effect control microcomputer for giving a command for controlling the display state of the image display device;
Image data storage means for storing a plurality of image data;
A drawing processor that performs a process of displaying an image on the image display device based on image data stored in the image data storage unit in response to a command from the effect control microcomputer;
The production control microcomputer includes polygon position specifying means for specifying the position of a polygon in a virtual three-dimensional space,
The drawing processor is:
Polygon placement means for executing processing for placing a polygon at a position designated by the polygon position designation means;
Wherein the polygon the polygon arrangement unit has arranged to create a two-dimensional image by performing a rendering process using a predetermined viewpoint, mask pattern generation for generating a mask pattern by writing the two-dimensional image created in a predetermined memory and means,
The mask pattern generation means is configured to move or change a polygon, or change a polygon based on a process for arbitrarily changing a polygon position in the virtual three-dimensional space, a process for arbitrarily changing a polygon shape, or both processes. Movement and shape change,
The drawing processor is:
The image data stored in said image data storage means, by writing to the area where the mask pattern is written in said memory, a clipping means for performing clipping of the image data using the mask pattern,
An image signal generating means for generating an image signal based on the image data clipped by the clipping means and outputting the generated image signal to the image display device. The drawing processor includes texture pasting means for executing processing for pasting the texture onto the polygon,
The gaming machine according to claim 1, wherein the mask pattern generation unit generates a mask pattern based on an image obtained by rendering a polygon on which a texture is pasted by the texture pasting unit. The clipping means performs clipping by using the image data of the second image displayed on the first image displayed on the image display device as a mask pattern,
The gaming machine according to claim 1, wherein the image signal generation unit generates an image signal in which an image based on the image data clipped by the clipping unit is arranged in a display area of the first image. The gaming machine according to claim 3, wherein the polygon position specifying means specifies a position corresponding to the type of the first image as the position of the polygon. The gaming machine according to any one of claims 1 to 4, wherein the mask pattern generation unit changes a size of an image to be rendered. The gaming machine according to any one of claims 1 to 5, wherein the mask pattern generation unit generates a mask pattern in which an edge portion of the image is made translucent.

Images