JP2014018491A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine that can reduce a burden of processing.SOLUTION: When a predetermined specific display result is derived as a display result in variable display means that can variably display plural kinds of identification information each of which is identifiable, a game machine makes a control so that a greater advantage is given to a player than a case of derivation of a display result other than the specific display result. Then, a control is made at a first frame rate for variable display of identification information in a predetermined display area, and a control is made at a second frame rate that is less than the first frame rate for variable display of identification information in a smaller display area than the predetermined display area.

Description

  The present invention relates to a gaming machine such as a pachinko machine or a slot machine, and more specifically, a specific display result predetermined as a display result on a variable display means capable of variably displaying a plurality of types of identification information that can identify each. The present invention relates to a gaming machine that is more advantageous for the player than when a display result other than the specific display result is derived.

  As a gaming machine, when a game medium such as a game ball is launched into a game area by a launching device, and the game medium wins in a prize area such as a prize opening provided in the game area, an execution condition (start condition) is satisfied. Pachinko that enhances the game interest by so-called variable display game, in which multiple types of identification information (hereinafter referred to as display symbols) are variably displayed on a variable display device, and whether or not to give a predetermined game value is determined according to the display result There is a gaming machine. As another example of the gaming machine, after setting a predetermined number of bets for one game using a game medium such as a medal, a coin, or a game ball similar to a pachinko gaming machine, the player operates the start lever. Thus, there is a slot machine that starts variable display of display symbols by a variable display device, and can give a predetermined game value based on a derived display result. Here, the predetermined game value is given by paying out premium game media such as prize balls and medals, adding the player's score, executing a re-game without using (digesting) the game media, and a specific game state (for example, a big hit game state) This is a concept that includes a part or all of the control to the gaming state that is more advantageous to the player than the normal gaming state.

  As such a gaming machine, a variable display of identification information is depicted at a first frame rate, and a background image or the like is depicted at a second frame rate lower than the first frame rate (for example, Patent Document 1).

JP 2003-236171 A

  However, in the gaming machine described in Patent Document 1, the variable display of the identification information is always depicted at the first frame rate, which may increase the processing load.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a gaming machine capable of reducing the processing load.

(1) In order to achieve the above object, a gaming machine according to the present invention provides:
A specific display result (for example, a predetermined display result) displayed on a variable display means (for example, the image display device 9 or the liquid crystal display 1051) that can variably display a plurality of types of identification information (for example, decorative symbols) that can identify each of them. For example, a gaming machine (for example, a pachinko gaming machine 1) that is more advantageous to the player than when a display result other than the specific display result is derived when a definite special symbol that is a jackpot symbol or the like is derived. Or slot machine 1000)
Display control means for controlling variable display of the identification information at a first frame rate (for example, “60”) and a second frame rate (for example, “30”) lower than the first frame rate (for example, step) Including an effect control CPU 101 that executes the process of S803,
The display control means controls at the first frame rate when performing variable display of the identification information in a predetermined display area, and variably displays the identification information in a display area smaller than the predetermined display area. Is controlled at the second frame rate (for example, when it is determined to execute the notice effect, the frame rate change flag is set in the process of step S824, and the frame rate is set to "30" in step S844A). Set or set the frame rate change flag and set the frame rate to “30” when winning the AT lottery process),
It is characterized by that.

  According to such a configuration, when variable display is performed in a small display area, that is, when the player's attention to variable display is low, control is performed at the second frame rate. Therefore, when the player's attention to the variable display is low and the smoothness of the variable display is not required, the frame rate is lowered and the processing load can be reduced.

(2) In the gaming machine of (1) above,
The display control means changes the display area of the variable display to the small display area in order to execute a possibility effect that asks the player whether or not the specific display result is derived in the predetermined display area. When the transition is made, control is performed at the second frame rate (for example, the frame rate change flag is set to the on state and the frame rate is set to “30” at the timing when the reach effect of super reach is started). ,
You may do it.

  According to such a configuration, the possibility presentation can be executed effectively, and the processing burden for executing the possibility presentation can be covered by reducing the processing burden by controlling at a low frame rate. Can do.

(3) In the above gaming machine (1) or (2),
The display control means performs control at the second frame rate when the predetermined display area is divided and each of the divided display areas is used as the small display area and the variable display is performed in each display area ( In response to receiving a variation pattern command indicating a division variation pattern, the frame rate change flag is set to an ON state)
You may do it.

  According to such a configuration, the production can be executed effectively, and the processing burden of executing a plurality of variable displays at the same time can be covered by reducing the processing burden by controlling at a low frame rate. Can do.

(4) In any of the above gaming machines (1) to (3),
The display control means is configured to display the second mode in a special mode gaming state in which the possibility of telling the player whether or not the specific display result is derived by a variable display mode is less likely to be executed than in the normal mode. (For example, the frame rate change flag is set to the on state during the time reduction state, and the frame rate change flag is cleared when the time reduction state ends.)
You may do it.

  According to such a configuration, since the control is performed at a low frame rate in a gaming state where the player's attention to the variable display is small, the processing burden is reduced and the processing burden due to execution of other effects is covered. be able to.

It is a front view of the pachinko gaming machine in this embodiment. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram showing an example of circuit configuration of an effect control board, a lamp driver board and an audio output board. It is a block diagram which shows the circuit structural example of a drawing processor. It is a flowchart which shows an example of the main process which CPU in a main board | substrate performs. It is a flowchart which shows an example of a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows an example of a big hit determination value. It is explanatory drawing which shows an example of a fluctuation pattern. FIG. 38E illustrates an effect control command signal line. It is a timing diagram showing the relationship between an 8-bit control signal and an INT signal constituting a control command. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows an example of the transmission timing of an effect control command. It is a flowchart which shows a special symbol process process. It is explanatory drawing which shows an example of the multiple types of decoration symbol variably displayed in an image display apparatus. It is explanatory drawing which shows the example which synthesize | combines two moving images and displays on an image display apparatus. It is explanatory drawing which shows the example which synthesize | combines two moving images and displays on an image display apparatus. It is explanatory drawing for demonstrating the example which shifts the moving image A and the moving image B. FIG. It is explanatory drawing which shows the structure of image data. It is explanatory drawing which shows the example by which a synthetic | combination moving image is reproduced | regenerated repeatedly. It is explanatory drawing which shows the other example by which a synthetic | combination moving image is reproduced | regenerated repeatedly. It is explanatory drawing for demonstrating the process which produces a clipping image. It is explanatory drawing for demonstrating the process which displays a synthetic | combination moving image as a three-dimensional image. It is explanatory drawing which shows the application example (modified example from basic form) of the variable display of a decoration design. It is explanatory drawing for implement | achieving the process for implement | achieving the variable display of the decoration symbol shown by FIG. It is explanatory drawing for implement | achieving the process for implement | achieving the variable display of the decoration symbol shown by FIG. It is explanatory drawing for demonstrating the alpha blend process of the edge part in a clipping range. It is explanatory drawing which shows the other application example of the variable display of a decoration design. It is explanatory drawing which shows the modification of the further another application example of the variable display of a decoration design. It is explanatory drawing for demonstrating the process which pastes the frame image which comprises the synthetic | combination moving image of two moving images A and B as a texture to a plate-shaped polygon. It is explanatory drawing for demonstrating transfer of image data. It is explanatory drawing which shows the command regarding data transfer. It is explanatory drawing which shows the command regarding a drawing command etc. It is explanatory drawing which shows the instruction | command regarding extending | stretching moving image data. It is explanatory drawing for demonstrating the method of decoding of moving image data (compressed data). It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is a flowchart which shows a background control process. It is explanatory drawing for demonstrating the modification in a background control process. It is a flowchart which shows the other example of a background control process. It is a flowchart which shows an example of production control process processing. It is a flowchart which shows an example of a variation pattern command reception waiting process. It is a flowchart which shows an example of a notice selection process. It is explanatory drawing which shows an example of the process which determines whether to perform a notice effect. It is a flowchart which shows an example of a decoration design change start process. It is explanatory drawing which shows the structural example of process data. It is a flowchart which shows an example of a process during decoration design change. It is a flowchart which shows an example of a decoration design change stop process. It is a flowchart which shows an example of a process of step S845A. It is a flowchart which shows an example of a process of step S845A. It is a flowchart which shows the process of step S845A. It is explanatory drawing for demonstrating the process in the case of changing from the decoration pattern of "7" to the decoration pattern of "8". It is a flowchart which shows a notification effect process. It is a flowchart which shows a notification effect process. It is a figure which shows the example of a display operation in an image display apparatus in case an announcement effect is performed. It is a figure which shows the example of a display operation of the image display apparatus in a time-short state. It is a figure which shows the relationship between a drawing cycle and a display cycle in case the reach production of a super reach is performed. It is a figure which shows the example of a display operation in an image display apparatus in case the reach effect of a super reach is performed. It is a figure which shows the example of a display operation in an image display apparatus in case the effect in which the area where the variable display of the decoration symbol in the image display apparatus 9 is performed is performed. It is a front view of the slot machine to which this invention is applied. It is a block diagram which shows the structure of a slot machine.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. In the following embodiment, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and a predetermined number of gaming media are paid out as prizes according to the game. It can also be applied to other gaming machines such as slot machines.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding a game board described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, an image display device (variable display device) 9 including a plurality of variable display portions each variably displaying a decorative pattern for performance is provided. The image display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. The image display device 9 performs variable display of the decorative symbol as a decorative symbol (for production) during the variable symbol special symbol display period of the special symbol indicator 8. The image display device 9 that performs variable display of decorative designs is controlled by an effect control microcomputer mounted on the effect control board and a drawing processor. At the bottom of the image display device 9, four special symbol hold memory indicators 18 for displaying the number of valid winning balls that have entered the start winning opening 14, that is, the number of hold memories (also referred to as start memory or start prize memory), are provided. ing. The special symbol reservation storage display 18 displays up to four reservation storage numbers in the order of winning. The special symbol hold storage display 18 increases the number of LEDs in the lit state by 1 each time there is a start winning in the start winning opening 14. Then, each time the special symbol display 8 starts variable display, the special symbol hold storage indicator 18 reduces the number of LEDs in the lit state by 1 (that is, turns off one LED). Specifically, the special symbol hold storage display 18 shifts the lighting state each time variable display is started on the special symbol display 8. In this example, the upper limit number (up to 4) is provided for the number of starting memories by winning to the start winning opening 14, but the upper limit number may be four or more.

  A special symbol display (special symbol display device) that variably displays a special symbol as identification information is provided on the upper part of the image display device 9. In this embodiment, the special symbol display 8 is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying numbers 0 to 9, for example. The special symbol display 8 may be configured to variably display a larger number of numbers such as 0 to 99 in order to make it difficult for the player to grasp a specific stop symbol. Further, the image display device 9 performs variable display of the decorative symbol as a symbol for decoration (for production) during the variable symbol display period of the special symbol by the special symbol indicator 8.

  Below the image display device 9 is provided a variable winning ball device 15 that forms a start winning opening 14. The variable winning ball device 15 is opened by the solenoid 16, and when the variable winning ball device 15 is opened, the game ball can be easily won at the start winning port 14. The game ball won in the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a.

  Below the variable winning ball apparatus 15, a special variable winning ball apparatus 20 that is opened by a solenoid 21 in a specific gaming state (big hit state) is provided. The special variable winning ball apparatus 20 has an opening / closing plate, and the large winning opening (variable winning ball apparatus) is opened by controlling the opening / closing plate to be opened. The winning ball that has won the special variable winning ball device 20 is detected by the count switch 23.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting left and right lamps (designs can be visually recognized when lit). For example, if the right lamp is lit at the end of variable display, it is a win. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls entered into the gate 32 is provided. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning ports (ordinary winning ports) 29, 30, 33, and 39. The winning holes 29, 30, 33, and 39 for the game balls are awarded to the winning port switches 29a and 30a, respectively. , 33a, 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. Around the left and right of the game area 7, there are provided decorative lamps 25 blinking and displayed during the game, and at the lower part there is an outlet 26 for absorbing a game ball that has not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decoration LED are examples of a decorative light emitter provided in the gaming machine.

  In this example, a prize ball LED 51 that is lit while paying out a prize ball is provided in the vicinity of the left frame lamp 28b, and a ball break LED 52 that is lit when the refill ball is cut is provided in the vicinity of the top frame lamp 28a. It has been. As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter also simply referred to as a “card unit”) that enables ball lending by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  The card unit includes, for example, a use indicator lamp that indicates whether or not the card unit is in a usable state, a connection table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, When checking the card insertion indicator lamp indicating that the card is inserted, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock is provided to release the unit.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When the game ball enters the start winning opening 14 and is detected by the start opening switch 14a, the special symbol on the special symbol display 8 starts variable display (variation) as long as the variable display of the symbol can be started. The decorative design on the display device 9 starts variable display (variation). If it is not in a state where the variable display of symbols can be started, the start winning memory number is increased by one.

  The variable display of the special symbol on the special symbol display 8 and the variable display of the decorative symbol on the image display device 9 are stopped when a certain time has passed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special variable winning ball apparatus 20 is released until a predetermined time elapses or a predetermined number (for example, 10) of gaming balls wins.

  When the game ball wins the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased.

  FIG. 2 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. 2 also shows the payout control board 37, the effect control board 80, and the like. A game control microcomputer (corresponding to game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. including. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. The I / O port unit 57 may be externally attached.

  The game control microcomputer 560 further includes a random number circuit 503 that generates hardware random numbers.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Further, an input driver circuit 58 for supplying detection signals from the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a to the game control microcomputer 560 is also mounted on the main board 31. Yes. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a big winning opening in accordance with a command from the game control microcomputer 560. 31. Further, a system reset circuit (not shown) for resetting the game control microcomputer 560 when the power is turned on, and an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state are sent to an external device such as a hall computer. An information output circuit (not shown) for outputting is also mounted on the main board 31.

  In addition, the game control microcomputer 560 includes a special symbol display 8 that variably displays special symbols, a normal symbol display 10 that variably displays normal symbols, a special symbol hold memory display 18 and a normal symbol hold memory display 41. Perform display control.

  In this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 receives the effect control command from the game control microcomputer 560 via the relay board 77. The display control of the image display device 9 that receives and displays the decorative design variably is performed.

  FIG. 3 is a block diagram illustrating a circuit configuration example of the relay board 77, the effect control board 80, the lamp driver board 35, and the audio output board 70. In the example shown in FIG. 3, the lamp driver board 35 and the audio output board 70 are not equipped with a microcomputer, but may be equipped with a microcomputer. Further, without providing the lamp driver board 35 and the audio output board 70, only the effect control board 80 may be provided for effect control.

  The effect control board 80 has an effect control microcomputer 100 including an effect control CPU 101 and a RAM. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives a capture signal from the main board 31 input via the relay board 77 ( In response to the (effect control INT signal), an effect control command is received via the input driver 102 and the input port 103. Further, the effect control CPU 101 causes the drawing processor (VDP: video display processor) 109 to perform display control of the image display device 9 based on the effect control command.

  In this embodiment, a rendering processor 109 that controls the display of the image display device 9 in cooperation with the rendering control microcomputer 100 is mounted on the rendering control board 80. The drawing processor 109 has an address space independent of the effect control microcomputer 100, and maps the VRAM therein. The VRAM includes a drawing area for developing image data. Then, the drawing processor 109 transfers the image data in the drawing area to the display area and outputs it to the image display device 9.

  The effect control CPU 101 outputs a command for reading necessary data from the CGROM (not shown) to the drawing processor 109 in accordance with the received effect control command. The CGROM stores character image data and moving image data displayed on the image display device 9, specifically, a person, characters, figures, symbols (including decorative designs), and background image data in advance. ROM. The drawing processor 109 reads image data from the CGROM in response to the instruction from the effect control CPU 101. Then, the drawing processor 109 executes display control based on the read image data.

  The effect control command and the effect control INT signal are first input to the input driver 102 on the effect control board 80. The input driver 102 passes the signal input from the relay board 77 only in the direction toward the inside of the effect control board 80 (does not pass the signal in the direction from the inside of the effect control board 80 to the relay board 77). It is also a unidirectional circuit as a regulating means.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 3 illustrates a diode. A unidirectional circuit is provided for each signal. Furthermore, since the effect control command and the effect control INT signal are output from the main board 31 via the output port 571 that is a unidirectional circuit, the signal from the relay board 77 toward the inside of the main board 31 is restricted. That is, the signal from the relay board 77 does not enter the inside of the main board 31 (the game control microcomputer 560 side). The output port 571 is a part of the I / O port unit 57 shown in FIG. Further, a signal driver circuit that is a unidirectional circuit may be further provided outside the output port 571 (on the relay board 77 side).

  Further, the effect control CPU 101 outputs a signal for driving the lamp to the lamp driver board 35 via the output port 105. Further, the production control CPU 101 outputs sound number data to the audio output board 70 via the output port 104.

  In the lamp driver board 35, a signal for driving the lamp is input to the lamp driver 352 via the input driver 351. The lamp driver 352 amplifies a signal for driving the lamp and supplies the amplified signal to each lamp provided on the frame side such as the top frame lamp 28a, the left frame lamp 28b, and the right frame lamp 28c. Further, it is supplied to a decorative lamp 25 provided on the frame side.

  In the voice output board 70, the sound number data is input to the voice synthesis IC 703 via the input driver 702. The voice synthesizing IC 703 generates voice or sound effect according to the sound number data and outputs it to the amplifier circuit 705. The amplification circuit 705 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 703 to a level corresponding to the volume set by the volume 706 to the speaker 27. The voice data ROM 704 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  FIG. 4 is a block diagram showing a circuit configuration of the drawing processor 109. FIG. 4 also shows an effect control CPU 101 and a CGROM 83.

  When executing the display control of the image display device 9, the CPU 101 for effect control gives a command corresponding to the effect control command to the drawing processor 109 via the CPU interface (CPU I / F) 92. If the command is a command to read image data from the CGROM 83, the drawing circuit 91 of the drawing processor 109 gives an instruction to read necessary data from the CGROM 83 to the CG bus interface (CG bus I / F) 93. The decoder 95 decompresses the compressed frame image data and writes the decompressed frame image data into the drawing material data memory 96A. The drawing circuit 91 in the drawing processor 109 generates image data to be displayed on the image display device 9 according to the input data, and writes the image data in the drawing area of the frame buffer 96B or the frame buffer 96C. Then, the display circuit 97 outputs R (red), G (green), and B (blue) image signals and synchronization signals based on the image data in the drawing area to the image display device 9. The image display device 9 performs, for example, screen display by a dot matrix system that drives a large number of pixels (pixels).

  In the drawing processor 109, drawing material data read from the CGROM 83 is stored in a drawing material data memory (hereinafter referred to as VRAMRS) 96 </ b> A. As drawing material data, still image data or sprites constituting moving image data obtained by decoding (decompressing) moving image data encoded (data compressed) by the MPEG2 (Moving Picture Experts Group phase 2) method or the like Image data is stored. Frame buffers (hereinafter referred to as VRAMFB) 96B and 96C can each have a display area for storing data corresponding to the display screen and a drawing area for drawing data corresponding to the display screen. The drawing processor 109 has a built-in VRAM (video RAM), and the VRAMRS 96A, VRAMFB 96B, and VRAMFB 96C are formed in the VRAM. Further, hereinafter, when the drawing processor 109 executes the process, if any of the VRAMRS 96A and the VRAMFB 96B or the VRAMFB 96C may be used, the expression “VRAM” may be used. The VRAMFB 96B is a frame buffer for drawing and displaying image data (first image data) having a high frame rate (for example, 60 fps). The VRAMFB 96C has a frame rate lower than that of the first image data (for example, 30 fps). It is a frame buffer for drawing and displaying image data (second image data). Also in the VRAMFB 96B, image data (second image data) having a lower frame rate (for example, 30 fps) than the first image data may be drawn and displayed.

  A CG bus and a VRAM bus are provided inside the drawing processor 109. A CG bus interface (CG bus I / F) 93 is installed between the CGROM 83 and the CG bus. The CPU I / F 92 is also connected to the CG bus, and the effect control CPU 101 can access the portion connected to the CG bus via the CPU I / F 92. Specifically, the effect control CPU 101 can access the drawing control register 95 connected to the CG bus.

  Next, the operation of the gaming machine will be described. FIG. 5 is a flowchart showing main processing executed by the game control microcomputer 560 on the main board 31. When the gaming machine is turned on and the input level of the reset terminal to which the reset signal is input becomes high level, the game control microcomputer 560 (specifically, the CPU 56) determines whether the contents of the program are valid. After executing the security check process, which is a process for confirming whether or not, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). After initialization of the built-in device (CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM is accessible (Step S5). In interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is interrupted. It is a mode that shows the included address

  Next, the CPU 56 checks the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port (step S6). When the on-state is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process. In this example, if “55H” is set in the backup flag area, it means that there is a backup (ON state), and if a value other than “55H” is set, it means that there is no backup (OFF state).

  After confirming that there is a backup, the CPU 56 performs a data check of the backup RAM area (parity check in this example) (step S8). In step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 recovers the game state restoration process (steps S41 to S43) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain as they are. The part that should not be initialized is, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, probability variation flag, time reduction flag, etc.), and the area where the output state of the output port is saved (output port buffer) ), A portion in which data indicating the number of unpaid prize balls is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). Then, the process proceeds to step S14.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, and a payout stop An initial value is set to a flag such as a flag for selectively performing processing according to the control state.

  Further, the CPU 56 initializes a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed an initialization process). Is also transmitted to the sub-board (step S13). For example, when the initialization control microcomputer 100 receives the initialization designation command, the image display device 9 performs screen display for notifying that the control of the gaming machine has been performed, that is, initialization notification.

  Further, the CPU 56 executes a random number circuit setting process for initial setting of the random number circuit 503 (step S14). For example, the CPU 56 performs setting according to the random number circuit setting program to cause the random number circuit 503 to update the value of the random R.

  In step S15, the CPU 56 sets a register of the CTC built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When executing the display random number update process and the initial value random number update process, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. In this embodiment, the initial value random number is an initial value of a count value such as a counter for generating a random number for determining whether or not to win a normal symbol (ordinary random number generation counter for normal symbol determination). It is a random number for determining the value. A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 itself controls game devices such as an image display device, a variable winning ball device, a ball payout device, etc. provided in the gaming machine. In the process of transmitting a command signal to be controlled by another microcomputer, or a game machine control process), the count value of the random number for determination per normal symbol is one round (the random number for determination per normal symbol is taken). When the value is incremented by the number of values between the minimum value and the maximum value of the possible values), an initial value is set in the counter.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process in steps S20 to S34 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output when, for example, a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals of the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the input driver circuit 58, and the state determination is performed (switch processing). : Step S21).

  Next, the CPU 56 executes a display control process for performing display control of the special symbol display 8, the normal symbol display 10, the special symbol hold storage display 18, and the normal symbol hold storage display 41 (step S22). For the special symbol display 8 and the normal symbol display 10, control for outputting a drive signal to each display is executed according to the contents of the output buffer set in steps S32 and S33.

  Next, a process of updating the count value of each counter for generating each determination random number such as a random number for determining a big hit symbol used for game control is performed (determination random number update process: step S23). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S24 and S25).

FIG. 7 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Decide a special symbol's off symbol (stop symbol) (for determining off symbol)
(2) Random 2: Determines the special symbol stop symbol when generating a big hit (for big hit symbol determination)
(3) Random 3: Determine the variation pattern (variation time) of special symbols (for variation pattern determination)
(4) Random 4: Determines whether or not to generate a hit based on the normal symbol (for normal symbol hit determination)
(5) Random 5: Random 4 initial value is determined (for determining random 4 initial value)

  In step S23 in the game control process shown in FIG. 6, the counter for generating the big hit symbol determining random number (2) and the normal symbol determining random number (4) is incremented (added by 1). . That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may make it use random numbers other than the random number of said (1)-(5). In this embodiment, the big hit determination random number is a random number generated by the hardware (random number circuit 503) built in the game control microcomputer 560. The big hit determination random number is used as the big hit determination random number. Software random numbers generated based on the program may be used.

  Further, the CPU 56 performs special symbol process processing (step S26). In the special symbol process, the corresponding symbol is executed in accordance with a special symbol process flag for controlling the special symbol display 8 and the special winning award in a predetermined order. The CPU 56 updates the value of the special symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S28).

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S29).

  Further, the CPU 56 executes prize ball processing for setting the number of prize balls based on the detection signals of the start port switch 14a, the count switch 23, and the prize opening switches 29a, 30a, 33a, 39a (step S30). Specifically, the payout control mounted on the payout control board 37 in response to winning detection based on any of the start opening switch 14a, the count switch 23 and the winning opening switches 29a, 30a, 33a, 39a being turned on. A payout control command indicating the number of prize balls is output to the microcomputer. The payout control microcomputer drives the ball payout device 97 in response to a payout control command indicating the number of winning balls.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S31: output process).

  Further, the CPU 56 performs special symbol display control processing for setting special symbol display control data for effect display of the special symbol in the output buffer for setting the special symbol display control data according to the value of the special symbol process flag ( Step S32). For example, if the variation speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 performs variable display of the special symbol on the special symbol display 8 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in an output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S33). For example, when the start flag related to the variation of the normal symbol is set, the CPU 56 switches the display state (“◯” and “×”) for the variation rate of the normal symbol every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer. Thereafter, the interrupt permission state is set (step S34), and the process is terminated.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes in steps S21 to S33 (excluding step S29) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 8 is a table in which the jackpot determination value to be compared with the random R is set. The jackpot determination table includes a normal jackpot determination table (see FIG. 8 (A)) used in a normal state (a gaming state that is not a probability change state) and a probability change jackpot determination table (see FIG. 8 (B)) used in a probability change state. ) The numerical values described in the left column of FIGS. 8A and 8B are jackpot determination values. When the value of the random R matches any one of the jackpot determination values, the CPU 56 determines that the jackpot is to be made. The CPU 56 extracts the count value of the random number circuit 503 at a predetermined time and uses the extracted value as the jackpot determination random number value. If the jackpot determination random number value matches the jackpot determination value shown in FIG. It is decided to make a big hit (probability big hit or normal big hit) for the symbol.

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. Usually, the big hit is a big hit that shifts the gaming state after the big hit game to a state that is not a probable change state. In the case of the probable big hit and the normal big hit, the number of rounds is larger than that in the case of 2R (2 rounds) big hit and the sudden probable big hit, for example, 15 rounds.

  The 2R big hit (small hit) is a big hit in which the number of times of opening of the big winning opening is allowed up to two in the big hit gaming state. Note that when the small hit game ends, the gaming state does not shift to the probable change state. Suddenly probable jackpot is a jackpot where the number of times the big prize opening is allowed is 2 in the big hit gaming state, but the opening time of the big prize opening is extremely short, and the gaming state after the big hit game is shifted to the probable state It ’s a big hit. That is, in this embodiment, the number of rounds is the same between the sudden probability big hit and the small hit.

  In the big hit game of sudden probability change big hit, the number of rounds is smaller than in the case of normal big hit and probability variable big hit, and the allowance opening time for each round (for example, 29 seconds in the case of normal big hit and probability variable big hit) On the other hand, 0.5 seconds) is shorter than that of the normal big hit and the probable big hit, but only the number of lands may be reduced, or only the allowance opening allowance time may be shortened.

  Further, in the probability change state, the probability that the stop symbol of the normal symbol is determined as a winning symbol is increased, the opening time of the variable winning ball device 15 is increased, or the number of times of opening is increased.

  FIG. 8 is an explanatory diagram showing an example of a variation pattern used in this embodiment. In FIG. 8, “EXT” indicates EXT data of the second byte in the effect control command having a two-byte structure. “Variation time” indicates the variation time of the special symbol (variable display period of identification information).

  “Normal fluctuation” is a fluctuation pattern without a reach mode. “Normal fluctuation / shortening” is a fluctuation pattern without a reach mode and a fluctuation time shorter than “normal fluctuation”. “Normal reach” is a variation pattern that is accompanied by a reach mode but whose display result (stop symbol) does not become a big hit symbol. “Reach A” is a variation pattern having a reach form different from “normal reach”. When the reach mode is different, a change mode (speed, rotation direction, etc.), a character image, or the like in a different mode appears in the image display device 9 during the reach variation time (a period during which the reach effect is performed). The background design is different. For example, in “normal reach”, a reach mode is realized by only one type of change mode, whereas in “reach A”, a reach mode including a plurality of change modes having different speeds and directions of change is realized. Further, “reach A / shortening” is a variation pattern having a reach manner similar to “reach A”, but reach variation time is shorter than “reach A”. “Reach A / Extension” is a variation pattern having a reach manner similar to “Reach A”, but the reach variation time is longer than “Reach A”.

  “Reach B” is a fluctuation pattern having a reach mode different from “Normal reach” and “Reach A”. Further, “reach B / shortening” is a variation pattern having a reach manner similar to “reach B”, but the reach variation time is shorter than “reach B”. “Reach B / extension” is a variation pattern having a reach manner similar to “reach B”, but reach variation time is longer than “reach B”. “Reach C” is a variation pattern having a reach form different from “normal reach”, “reach A”, and “reach B”. “Reach C / shortening” is a variation pattern having a reach manner similar to “reach C”, but reach variation time is shorter than “reach C”.

  “Super reach A” is a variation pattern having a reach mode different from “normal reach”, “reach A”, “reach B”, and “reach C”. is there. “Super reach B” is a variation pattern having a reach form different from “normal reach”, “reach A”, “reach B”, “reach C” and “super reach A”. This is a variation pattern. “Reach A / Accuracy” is a variation pattern having a reach form different from “Normal reach”, “Reach A”, “Reach B”, “Reach C”, “Super reach A” and “Super reach B”. It should be noted that the reach form of “reach A / accuracy” is a reach form similar to “reach A”.

  As will be described in detail later, in this embodiment, in the reach production other than “normal reach”, the area where the decorative display of the decorative pattern is performed on the image display device 9 is reduced, and the reach production other than the “normal reach” is performed. It is performed in an area larger than the area where the decorative design variable display is performed.

  In this embodiment, in the case of a big hit, the game control microcomputer 560 is “reach A / shortening”, “reach A”, “reach B / shortening”, “reach B”, “reach C / shortening”. ", Reach C", "Super Reach A" or "Super Reach B". Further, in the case of a probable big hit, the game control microcomputer 560 is “reach A / extension”, “reach B / extension”, “reach C / shortening”, “reach C”, “super reach A” or “ Select "Super Reach B". In case of sudden big odds, select “Reach A / Random”.

  In the short-time state, the fluctuation patterns of “normal fluctuation / shortening”, “reach A / shortening”, “reach B / shortening”, and “reach C / shortening” are selected. In the non-time-short state, other variation patterns are selected. However, the variation pattern of “reach A / accuracy” is used in both the short-time state and the non-short-time state.

  In this embodiment, when a big hit occurs and the big hit game ends, the gaming state becomes a short-time state thereafter until the execution of 100 special symbol changes (variable display) is completed. In the time-short state, the area where the decorative display of the decorative symbol is reduced on the image display device 9 is reduced, and the effect indicating that the time-short state is present is performed in an area larger than the area where the decorative symbol is variablely displayed ( (See FIG. 55). In addition, when the execution of 100 special symbol changes (variable display) is completed, a frame rate change flag, which will be described later, is reset to OFF. Here, as for the number of times of variable display, for example, a variable display counter that increments the count value every time the decorative symbol variation start process is executed may be prepared in advance. The value of the variable display counter may be cleared to “0” every time it is determined to be a big hit, for example. In addition, when it is decided to change to the probability changing state when starting the variable display of the special symbol, the gaming state is shifted to the probability changing state when the big hit game is finished. Note that if the gaming state before the big hit gaming state is the probability variation state, the probability variation state is continued.

  After the transition to the probable change state, the execution of 100 special symbol changes (variable display) is completed until the execution of 100 special symbol changes (variable display) is completed. Then, the gaming state shifts from the probability changing state and the short time state to the normal state (a gaming state that is not the probability changing state and is not in the time saving state). Similarly, in the non-probability change state after the big hit game is finished, when the execution of 100 special symbol changes (variable display) is completed, the game state is changed from the short-time state to the normal state (not the probability-change state and the short-time state). Transition to a non-state gaming state).

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. FIG. 10 is an explanatory diagram showing a signal line of an effect control command transmitted from the main board 31 to the effect control board 80. As shown in FIG. 10, in this embodiment, the effect control command is transmitted from the main board 31 to the effect control board 80 via the relay board 77 using eight signal lines of the effect control signals CD0 to CD7. Further, between the main board 31 and the effect control board 80, a signal line of the effect control INT signal for transmitting the capture signal (effect control INT signal) is also wired.

  In this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  As shown in FIG. 11, the 8-bit effect control command data of the effect control command is output in synchronization with the effect control INT signal. The effect control microcomputer 100 mounted on the effect control board 80 detects that the effect control INT signal has risen, and starts a 1-byte data capturing process through an interrupt process. Therefore, when viewed from the effect control microcomputer 100, the effect control INT signal corresponds to a signal that triggers the capture of effect control command data.

  The effect control command is sent only once so that the effect control microcomputer 100 can recognize it. In this example, “recognizable” means that the level of the effect control INT signal changes, and that it is sent only once so as to be recognizable means that, for example, each of the first and second bytes of the effect control command data Accordingly, the production control INT signal is output in a pulse shape (rectangular wave shape) only once. The effect control INT signal may have a polarity opposite to that shown in FIG.

  FIG. 12 is an explanatory diagram showing an example of the contents of the effect control command transmitted by the game control microcomputer 560. In the example shown in FIG. 12, commands 8001 (H) to 800E (H) are effect control commands (variation) for designating a variation pattern of decorative symbols variably displayed on the image display device 9 in response to variable display of special symbols. Pattern command). The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 800E (H), it controls the image display device 9 to start variable display of decorative symbols. In this embodiment, the variable display of the special symbol and the variable display of the decorative symbol are synchronized (the variable display start time and the variable display end time are the same), so the decorative pattern variation pattern (variation time) Determining also means determining the variation pattern (variation time) of the special symbol.

  The commands 8C01 (H) to 8C05 (H) are effect control commands indicating whether or not to make a big hit and the type of the big hit game. The effect control microcomputer 100 determines the display result of the decorative symbols in response to the reception of the commands 8C01 (H) to 8C05 (H). Therefore, the commands 8C01 (H) to 8C05 (H) are referred to as display result specifying commands.

  Command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of the decorative symbols is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the decorative symbols and derives and displays the display result. The derived display is to finally stop and display the symbol.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the gaming control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command.

  Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration.

  The commands A001 to A004 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 4 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of a big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game and an effect control command (special jackpot end 1 designation command: ending) that specifies that the jackpot game is a non-probable big hit (usually a big hit) 1 designation command). Command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a probable big hit (big hit end 2 designation command: ending 2 designation command). is there.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the image display device 9 is changed according to the contents shown in FIG. 12, the display state of the lamp is changed, or the sound number data is output to the audio output board 70.

  FIG. 13 is an explanatory diagram illustrating an example of the transmission timing of the effect control command. As shown in FIG. 13, the game control microcomputer 560 transmits a change pattern command and a display result specifying command at the start of change. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  Before transmitting the variation pattern command, a background designation command for designating a background image in the image display device 9 according to the gaming state (for example, normal state / short time state / probability varying state) or a gaming state indicating the current gaming state A command may be transmitted. Further, an effect control command indicating the number of reserved memories may be transmitted following the display result specifying command.

  FIG. 14 is a flowchart showing an example of a special symbol process (step S26) program executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. As described above, in the special symbol process, a process for controlling the special symbol display 8 and the special winning opening is executed. In the special symbol process, the CPU 56 performs the start opening switch passing process if the start opening switch 14a for detecting that the game ball has won the start winning opening 14 is turned on, that is, if a start winning is generated. Execute (Steps S311 and S312). Then, any one of steps S300 to S307 is performed.

  The processes in steps S300 to S307 are as follows.

  Special symbol normal processing (step S300): Executed when the value of the special symbol process flag is zero. When the game control microcomputer 560 is ready to start the variable display of the special symbol, it checks the number of reserved memories (the number of start winning memories). The reserved memory number can be confirmed by the count value of the reserved memory number counter. If the number of reserved memories is not 0, it is determined whether or not to win. If it is determined to be a big hit, a big hit flag is set. Then, the internal state (special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  Fluctuation pattern setting process (step S301): This process is executed when the value of the special symbol process flag is 1. The stop symbol after the variable display of the special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from the start of variable display until the display result is derived and displayed (stop display)) Decide to do. Also, a variable time timer for measuring the special symbol variable time is started. Then, the internal state (special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  Display result specifying command transmission process (step S302): executed when the value of the special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  Special symbol changing process (step S303): This process is executed when the value of the special symbol process flag is 3. When the variation time of the variation pattern selected in the variation pattern setting process elapses (the variation time timer set in step S301 times out, that is, the variation time timer value becomes 0), the internal state (special symbol process flag) is stepped. Update to a value corresponding to S304 (4 in this example).

  Special symbol stop process (step S304): executed when the value of the special symbol process flag is 4. The variable display on the special symbol display 8 is stopped and the stop symbol is derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. If the big hit flag is set, the internal state (special symbol process flag) is updated to a value (5 in this example) corresponding to step S305. When the big hit flag is not set, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300. The effect control microcomputer 100 controls the image display device 9 to stop the decorative symbols when it receives the symbol confirmation designation command transmitted by the game control microcomputer 560.

  Preliminary winning opening opening process (step S305): This is executed when the value of the special symbol process flag is 5. In the pre-opening process for the big prize opening, control for opening the big prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). The pre-opening process for the big winning opening is executed for each round, but when the first round is started, the pre-opening process for the big winning opening is also a process for starting the big hit game.

  Large winning opening opening process (step S306): This process is executed when the value of the special symbol process flag is 6. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the special prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value (5 in this example) corresponding to step S305. When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S307 (7 in this example).

  Big hit end process (step S307): executed when the value of the special symbol process flag is 7. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended. Further, a process for setting a flag (for example, a probability variation flag) indicating a gaming state is performed. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 15 is an explanatory diagram illustrating an example of a plurality of types of decorative symbols that are variably displayed on each of the “left”, “middle”, and “right” variable display portions on the display screen of the image display device 9. In this embodiment, in each of the “left”, “middle”, and “right” variable display portions provided on the display screen of the image display device 9, the symbols indicating the numbers “1” to “9” are, for example, It is variably displayed in combination with a predetermined figure such as a roughly diamond shape. A corresponding symbol number is assigned to each of the decorative symbols. Note that the decorative symbols shown in FIG. 15 are basic shapes, and they may be deformed and displayed on the image display device 9. Further, the symbols indicating the numbers “1” to “9” may not be combined with a predetermined graphic.

Hereinafter, display effects in the image display device 9 will be described.
In this embodiment, a still image can be displayed and a moving image can be displayed on the image display device 9.

  16 and 17 are explanatory diagrams illustrating an example in which two moving images are combined and displayed on the image display device 9. In the example shown in FIG. 16, the moving image A data for displaying moving image A which is the first moving image is, for example, 30 frames (30 frames) of image data (frame image data) of frame images a1 to a30. It consists of Therefore, when playback is performed at 33 ms / second, a 1-second moving image display can be realized. The moving image B data for displaying the moving image B which is the second moving image is composed of, for example, 33 frames (33 frames) of image data (frame image data) of the frame images b1 to b33. . Therefore, when playback is performed at 33 ms / second, a moving image display of 1.1 seconds can be realized. Note that the moving image A data for displaying the moving image A which is the first moving image is composed of 60 frames (60 frames) of image data (frame image data) of the frame images a1 to a60, for example. In this case, reproduction may be performed at 1000/60 ms / second in order to realize a moving image display of 1 second. Further, the moving image B data for displaying the moving image B which is the second moving image is composed of, for example, image data (frame image data) of 66 frames (66 frames) of the frame images b1 to b66. In this case, in order to realize a moving image display of 1.1 seconds, reproduction may be performed at 1000/60 ms / second.

In this embodiment, what is displayed on the image display device 9 is called “moving image”, and digital data for obtaining “moving image” is called moving image data. Each frame constituting a moving image is referred to as a “frame image”, and digital data for obtaining a “frame image” is referred to as frame image data.

  FIG. 17 is an explanatory diagram for explaining a display example when the moving image A and the moving image B shown in FIG. 16 are combined and displayed on the image display device 9. Each rectangle shown in FIG. 17 represents a display screen of the image display device 9. FIG. 17A shows a display example when the moving image A is displayed alone on the image display device 9. In this example, in FIG. 17A, it is assumed that the display of the frame images a1 to a30 changes from left to right every 33 ms. FIG. 17B shows a display example when the moving image B is displayed alone on the video display device 9. In this example, in FIG. 17B, it is assumed that the display of the frame images b1 to b33 changes from left to right every 33 ms. The display of the frame images a1 to a60 may be changed every 1000/60 ms for the moving image A, and the display of the frame images b1 to b66 may be changed every 1000/60 ms for the moving image B.

  As an example, FIG. 17C shows an image displayed on the image display device 9 at the timing when the frame image a1 and the frame image b1 are combined when the moving image A and the moving image B are combined. FIG. 17D shows an image displayed on the image display device 9 at the timing at which the frame image a30 and the frame image b2 are combined.

  When frame images a1 to a30 constituting moving image A and frame images b1 to b33 constituting moving image B are sequentially synthesized frame by frame, 30 × 33 = 990 different images (moving image A is formed). In the case of the frame images a1 to a60 and the frame images b1 to b66 constituting the moving image B, 3960 different images) are obtained. In other words, if it is played back at 33 ms / second, it takes 11 seconds (if it is played back at 1000/60 ms, it takes 66 seconds). Therefore, using the moving image A data and moving image B data, In the case of reproduction, a 66-second moving image) can be reproduced.

  In the example shown in FIG. 17, the moving images are synthesized so as to overlap. That is, in the drawing area of VRAMFB 96C (when the frame images a1 to a60 constituting the moving image A and the frame images b1 to b66 constituting the moving image B are sequentially synthesized one frame at a time, the drawing area of the VRAMFB 96B) Moving image A data and moving image B data are written in the same area. Hereinafter, writing image data in the drawing area is referred to as “drawing”. An image corresponding to the image data in the display area is displayed on the image display device 9. The frame images a1 to a30 constituting the moving image A and the frame images b1 to b33 constituting the moving image B are sequentially synthesized frame by frame, or the frame images a1 to a60 constituting the moving image A and the moving image Whether the frame images b1 to b66 constituting the image B are to be sequentially combined one frame at a time may be determined in advance or may be determined according to a gaming state such as a short time state.

  Further, as shown in FIG. 18, the area for drawing the frame image constituting the moving image A and the area for drawing the frame image constituting the moving image B may be shifted. FIG. 18 shows an example in which the frame image b2 is drawn in an area shifted from the area where the frame image a1 is drawn. By such control, a synthesized moving image obtained by synthesizing the moving image A and the moving image B is displayed on the image display device 9.

  FIG. 19 is an explanatory diagram showing the structure of image data in this embodiment. Each pixel of the image data is composed of data of α value, R (red) value, G (green) value, and B (blue) value. The α value is a value indicating transparency, and for example, a value corresponding to any of 0 to 1.0 is set. 0 indicates complete transparency and 1.0 indicates complete opacity. Complete transparency means that R, G, and B values of one image data are not used for the calculation when the combination calculation of one image data (α value is 0) and other image data is performed (for example, 0 And completely opaque means that R, G, and B of one image data when a composite operation of one image data (α value is 1.0) and other image data is performed. Indicates that the value is used as is. Also, the value between 0 and 1.0 is the same as the image data when the composition operation of one image data (α value is between 0 and 1.0) and other image data is performed. Indicates that the R, G, and B values are multiplied by a predetermined coefficient.

  FIG. 20 is an explanatory diagram illustrating an example in which a synthesized moving image is repeatedly reproduced after a 1-second moving image A and a 1.1-second moving image B are synthesized to create an 11-second synthesized moving image. is there. In the example illustrated in FIG. 20, every time 11 seconds have elapsed from the playback start time, in other words, every time the composite moving image ends, the α value of each pixel constituting the moving image B is changed. It is shown. That is, the rendering processor 109 changes the transparency when superimposing display data based on the first image data in each of a plurality of moving image data (each including image data of a plurality of frames). Therefore, if the α value is not changed, the same synthesized moving image is reproduced every 11 seconds. However, by changing the α value, a synthesized moving image that is viewed differently is reproduced after 11 seconds have elapsed. be able to. It should be noted that the frame images a1 to a60 constituting the moving image A and the frame images b1 to b66 constituting the moving image B are sequentially synthesized frame by frame, that is, 1 second moving image A and 1.1 seconds. When the synthesized moving image of 66 seconds and the synthesized moving image of 66 seconds are repeatedly reproduced, the synthesized moving image that is viewed differently after 66 seconds has elapsed by changing the α value. Can do.

  The moving image data is stored in the CGROM 83 after being compressed. When playing back a moving image, the drawing processor 109 reads frame image data (data compressed) constituting the moving image data from the CGROM 83. Then, the decoder 95 expands the compressed frame image data and writes the expanded frame image data to the VRAMRS 96A. Hereinafter, writing image data to the VRAMRS 96A, VRAMFB 96B, or VRAMFB 96C may be referred to as developing the image data.

  The drawing processor 109 in this embodiment has a capability of reproducing an image in 1/60 seconds (displaying an image based on image data). That is, the decoder 95 can decompress the frame image data that has been subjected to data compression every 1/60 seconds. Considering the case of actually reproducing an image in 1/30 seconds, two frame image data can be expanded in a period of reproducing one frame. Therefore, when two moving images are combined and played back, as shown in FIG. 21A, frame image data about the frame images constituting the moving image A in a period of (1/60) × 2 seconds. And the frame image data of the frame image constituting the moving image B are alternately expanded, and as shown in FIG. 21B, the two expanded frame image data are synthesized once every 1/30 seconds. By executing the calculation for this, as shown in FIG. 21C, the synthesized moving image can be reproduced every 1/30 seconds. In other words, the rendering processor 109 sequentially selects one moving image data from a plurality of moving image data for each predetermined cycle, and creates display data from the moving image data selected in the cycle, thereby reducing the processing burden. ing.

FIGS. 22A and 22B are explanatory diagrams for explaining a process of creating a clipping image by clipping (cutting out) image data of an image constituting a synthesized moving image developed on the VRAMRS 96A, for example. is there. The drawing processor 109 is, for example, VRAMRS96.
The image data within the clipping range in A may be drawn in the drawing area, the drawn image data may be transferred to the display area, and the clipping image may be displayed on the image display device 9. You may make it write the image data of an image (it is called an object image) in the area | region (clipping area | region) in which the clipping range was formed. At this time, for example, if the α value of each pixel in the clipping region is set to 0, the target image is formed in the clipping region. Thereafter, the image data in the clipping area is written in the drawing area.

  When the display control shown in FIG. 22 is realized, the size of each frame image constituting the moving images A and B is made larger than the size of the drawing area (corresponding to the size of the display area), Created.

  FIGS. 23A and 23B are explanatory diagrams for explaining processing for displaying a synthesized moving image as a three-dimensional image. The rendering processor 109 performs processing (mapping) for pasting image data of an image constituting a synthesized moving image as a texture onto a polygon image (hereinafter referred to as a polygon) created in the VRAMRS 96A, VRAMFB 96B, or VRAMFB 96C (FIG. 23A). Then, a rendering process is performed to obtain image data of an image for reproduction. The rendering process is a process of creating image data of an image that can be displayed on a two-dimensional display screen, and is visually recognized when a three-dimensional image is viewed from a viewpoint (also referred to as a camera position) set at a predetermined position. This is a process for creating image data of an image to be processed. Note that the polygon shown in FIG. 23 has a shape like a plate-like object curved (a tile-like shape).

  FIG. 24 is an explanatory view showing an application example (variation from the basic form) of variable display of decorative symbols. FIG. 24 shows an example in which the decorative pattern “7” changes to the decorative pattern “8”. In that example, the contents of the display area of the decorative symbols on the display screen of the image display device 9 change as shown in (A) → (D).

  In the example shown in FIG. 24, the display unit “8” is formed in the display unit “7”, and the display unit “8” is displayed so as to gradually increase.

  25 and 26 are explanatory diagrams for realizing processing for realizing variable display of the decorative symbols shown in FIG. The drawing processor 109 first creates a plate-shaped polygon 200 as shown in FIG. A region including a region where a polygon is created in the VRAM corresponds to a virtual three-dimensional space. Then, as shown in FIG. 25B, a process of rotating the plate-shaped polygon 200 is performed. Note that FIG. 25B shows a state of being rotated in one direction (a state of being tilted), but it is possible to perform a three-dimensional rotation process. Then, the drawing processor 109 performs a rendering process on the plate-like polygon 200 using a predetermined viewpoint as shown in FIG. 25C to create a two-dimensional image. In this example, a trapezoidal image is generated.

  Note that the rendering processor 109 of this embodiment always uses a viewpoint that is set at the same position, that is, a viewpoint at a fixed position, when performing rendering processing. In FIG. 25B and the following drawings, the position of the viewpoint is expressed as if it can be arbitrarily set, but this is convenient for drawing in order to make the drawing easy to see. Referring to the example shown in FIG. 25B, for example, when the position of the viewpoint is actually set to the left side in the drawing, the surface side of the plate-shaped polygon 200 is actually set to the left side. A plate-shaped polygon 200 is created so as to face. That is, the polygon that is inclined 90 degrees to the left from the state shown in FIG.

  Polygons are formed as a set of triangles in a virtual three-dimensional space. Depending on how many triangles are combined, polygons of almost arbitrary shape can be created. In this embodiment, the drawing processor 109 changes the position (coordinates) and shape (specifically, how to combine triangles, etc.) to be created in the virtual three-dimensional space, thereby creating a polygon again. Realize movement (rotation, etc.) and shape change. However, the drawing processor 109 may be configured to move the created polygon in the virtual three-dimensional space or change the shape in accordance with the movement or shape change command of the effect control CPU 101. At that time, the CPU 101 for effect control may give the drawing processor 109 a destination or changed shape as a parameter in the command, or a parameter that can be calculated by calculation of the destination or changed shape to the drawing processor 109. May be given.

  The drawing processor 109 uses the created two-dimensional image (see FIG. 25C) as a mask pattern, clips (cuts out) the image data area of the decorative pattern “8” developed in the VRAMRS 96A, and performs clipping. The image data of the selected area (clipping range) is combined with the image data of the decorative pattern “7” developed in the VRAMRS 96A. The rendering processor 109 can also expand the rendering range when performing rendering processing. An example when the rendering range is not enlarged is shown in FIG. 26A, and an example when the rendering range is enlarged is shown in FIG.

  By performing the processing as shown in FIGS. 25 and 26, the decoration pattern variation (variable display) as shown in FIG. 24 is realized.

  In FIG. 25, one type of polygon after movement is shown (FIG. 25B), but actually, processing for moving the polygon further is performed.

  Also, as shown in FIG. 27, the drawing processor 109 performs an alpha blending process on the edge in the clipping range when combining the image data of the clipped area with the image data of the decorative pattern developed in the VRAMRS 96A. Can do. The α blending process is to perform the synthesizing process by setting the α value of the edge portion in the image data to be synthesized (in this example, the image data within the clipping range) to a value lower than 1.0. By subjecting the edge portion to α blend processing, the edge portion becomes translucent, and the boundary portion with the background (“7” image in the example shown in FIG. 27) can be smoothly displayed.

  FIG. 28 is an explanatory view showing still another application example of variable display of decorative symbols. In the example shown in FIG. 28, a part of a frame image constituting a decorative design (in this example, “7”) and a moving image (moving image in which a spaceship moves in this example) is pasted as a texture on the plate-like polygon 200. After being attached, a two-dimensional image obtained by enlarging and rendering the plate-like polygon 200 is used as a decorative design.

  As shown in FIG. 28, the decorative symbols are displayed on the image display device 9 so that the decorative symbol display portion is enlarged as the variable display progresses, and the image of the “spacecraft” is moved.

  In the case of the example shown in the upper and middle stages in FIG. 31, a spacecraft based on a still image may be used as a texture. That is, when the viewpoint is located within a predetermined distance from the polygon, an image based on the frame image data in the moving image data is used as a texture. When the viewpoint is located beyond the predetermined distance from the polygon, an image based on the still image data is used. A texture may be used.

  FIG. 29 is an explanatory diagram showing a modification of the application example of the variable display of the decorative symbols shown in FIG. In the example shown in FIG. 29, a part of a frame image constituting a decorative design (in this example, “7”) and a moving image (moving image in which a spaceship moves in this example) is pasted as a texture on the plate-like polygon 200. After being attached, the two-dimensional image obtained by rotating and enlarging the plate-shaped polygon 200 and using the rendering process is used as a decorative design.

  As shown in FIG. 29, as the display of the decorative symbol is enlarged as the variable display progresses, and the image of the “spacecraft” moves, the image inside the decorative symbol display unit is further tilted. As shown, the decorative symbols are displayed on the image display device 9. FIG. 29 shows a state in which the plate-shaped polygon 200 is rotated in one direction (a state in which the plate-shaped polygon 200 is rotated in the left direction), but it is possible to perform a three-dimensional rotation process.

  In the case of the example shown in the upper stage and the middle stage in FIG. 29, a spacecraft based on a still image may be used as a texture. That is, when the viewpoint is located within a predetermined distance from the polygon, an image based on the frame image data in the moving image data is used as a texture. When the viewpoint is located beyond the predetermined distance from the polygon, an image based on the still image data is used. A texture may be used.

  FIG. 30 is an explanatory diagram for explaining a process of pasting a frame image constituting a synthesized moving image of two moving images A and B as a texture on a plate-shaped polygon. FIG. 30A illustrates a moving image in which a spacecraft moves. FIG. 30B illustrates a moving image in which a satellite moves.

  FIG. 30C shows a state in which the combined moving image of moving images A and B is pasted as a texture on a plate-shaped polygon. Further, the state where the plate-shaped polygon is rotated every time a frame image of one frame in the synthesized moving image is pasted is shown. A rendering process is performed on the rotated plate-shaped polygon using a predetermined viewpoint, and a two-dimensional image used for display is created. The two-dimensional image created in this way is displayed on the image display device 9 with a notice effect to be described later.

  Next, a data transfer method in the rendering processor 109 and a command (command) output from the rendering control CPU 101 to the rendering processor 109 will be described.

  FIG. 31 is an explanatory diagram for explaining transfer of image data. The image data stored in the CGROM 83 can be transferred to the VRAMRS 96A. The image data stored in the CGROM 83 can be transferred to the VRAF 96B or VRAF 96C via the VRAMRS 96A. Further, the image data stored in the VRAMRS 96A can be transferred to the VRAFB 96B or the VRAF 96C. Further, the image data stored in the VRAFB 96B or the VRAFB 96C can be transferred to the VRAMRS 96A. Further, the image data stored in the VRAFB 96B can be transferred to the VRAFB 96C, and the image data stored in the VRAFB 96C can be transferred to the VRAFB 96B.

  FIG. 32 is an explanatory diagram showing a command related to data transfer among commands output from the rendering control CPU 101 to the drawing processor 109. The CGROM transfer command is a command that is output when image data is transferred from the CGROM 83 to the VRAMRS 96A. The VRAMFB transfer command is a command that is output when image data is transferred from the VRAMRS 96A to the VRAMFB 96B or VRAMFB 96C. The inter-VRAMRS transfer command is a command that is output when the image data stored in the VRAMRS 96A is transferred to another region in the VRAMRS 96A. The command output when the image data is transferred from the VRAMRS 96A to the VRAMFB 96B is a VRAMFB1 transfer command, and the command output when the image data is transferred from the VRAMRS 96A to the VRAMFB 96C is a VRAMFB2 transfer command, and the transfer destination is the VRAMFB 96B. Or VRAMFB 96C may be divided depending on whether it is VRAMFB 96C.

  The drawing effect command is a command for designating a drawing effect when image data is transferred from the VRAMRS 96A to the VRAMFB 96B or VRAMFB 96C. The VRAMFB copy command is a command that is output when image data is transferred from the VRAMFB 96B or VRAMFB 96C to the VRAMRS 96A. The automatic transfer command is a command that is output when image data stored in the CGROM 83 is transferred to the VRAFB 96B or the VRAMFB 96C via the VRAMRS 96A. The drawing effect command, the VRAMFB copy command, and the automatic transfer command are the VRAMFB 96B, such as the drawing effect command 1 and the drawing effect command 2, the VRAMFB copy command 1 and the VRAMFB copy command 2, the automatic transfer command 1 and the automatic transfer command 2, and so on. And VRAMFB 96C may be divided respectively.

  In this embodiment, except for the address designation of the CGROM 83, the transfer source address (read address) and transfer destination address (write address) at the time of data transfer are commanded by the X coordinate and Y coordinate of the area. It can also be specified by the address itself where the image data is stored in the memory (ROM or RAM). Further, it is possible to designate a read address and a write address using an index created in advance (area address or the like is set).

  When the drawing circuit 91 of the drawing processor 109 receives the CGROM transfer command, the drawing circuit 91 causes the CG bus interface 93 to read the image data from the reading start address of the CGROM 83 and transfer the image data to the writing address of the VRAMRS 96A. When a VRAMFB transfer command is input, image data is read from the read address of VRAMRS 96A and written to the write address of VRAMFB 96B or VRAMFB 96C according to the state of a frame rate change flag described later. When an inter-VRAM transfer command is input, image data is read from the read address of VRAMRS 96A and written to the write address of VRAMRS 96A. When a drawing effect command is input, when a VRAMFB transfer command is input, image synthesis is performed in accordance with parameters included in the drawing effect command.

  In addition, when the VRAMFB copy command is input, the drawing circuit 91 reads image data from a read address of the VRAMFB 96B or VRAMFB 96C according to a state of a frame rate change flag, which will be described later, and writes it to the write address of the VRAMRS 96A. When an automatic transfer command is input, the image data is read from the read start address of the CGROM 83 to the CG bus interface 93, the image data is transferred to a predetermined area of the VRAMRS 96A, the image data is further read from the predetermined area, and a frame rate change flag to be described later Is written in the write address of the VRAMFB 96B or VRAMFB 96C according to the state.

  FIG. 33 is an explanatory diagram showing commands relating to drawing commands and the like among commands output from the rendering control CPU 101 to the drawing processor 109. The texture attribute setting command is a command for designating the size of the texture. The polygon drawing command is a command for designating a polygon size and the like. The sprite drawing command is a command for designating the size of the sprite image. Note that the addresses (coordinates) relating to the FRAM (registered trademark) FB in the parameters shown in FIG. 33 are addresses in an area other than the drawing area of the VRAMFB 96B or VRAMFB 96C.

  When the texture attribute setting command is input, the drawing circuit 91 reads the image data from the read address determined by the texture attribute setting command when the VRAMFB transfer command is input, and the VRAMFB 96B or the like depending on the state of the frame rate change flag described later. Write to the write address of VRAMFB96C. When a polygon drawing command is input, a polygon image is created in the area of VRAMFB 96B or VRAMFB 96C according to the state of a frame rate change flag described later. Note that the Z value included in the polygon drawing command can be set for each pixel. Therefore, by setting the Z value of each pixel so that the polygon image has a desired shape, the polygon image can be generated in any desired shape. When a sprite drawing command is input, the sprite image data is read from the read address of the VRAMRS 96A and written to the write address of the VRAMFB 96B or VRAMFB 96C according to the state of a frame rate change flag described later.

  FIG. 34 is an explanatory diagram showing a command related to decompressing data-compressed moving image data among commands output from the effect control CPU 101 to the drawing processor 109. The single stream start address is a command for designating a storage address of the image in the CGROM 83 when the moving image data of one moving image is expanded. The single stream area development command is a command for designating a storage address in the VRAMRS 96A of the image data after decompressing the moving image data of one moving image. The multi-stream start address is a command for designating storage addresses of the images in the CGROM 83 when decompressing moving image data of a plurality of (for example, two) moving images. The multi-stream area development command is a command for designating a storage address in the VRAMRS 96A of image data after decompressing moving image data of a plurality of moving images.

The decode execution command is a command that specifies expansion of moving image data of a moving image. When the decoder 95 receives the decode execution command, the moving image data stored in the CGROM 83 in accordance with the single stream start address and the single stream region development command, and using the parameters of the multistream start address and the multistream region development command. Is decoded and stored in the VRAMRS 96A.

  The moving image data has a configuration in which a file header is set at the first address, and then a frame header and compressed data of each frame are sequentially set. In the stream, frame headers and compressed data of frames 1 to N (frame images 1 to n) are set in order from image 1. The moving image data is encoded by, for example, the MPEG2 encoding method.

  Next, a method of decoding moving image data (compressed data) compressed by the decoder 95 will be described with reference to the explanatory diagram of FIG. The frame numbers shown in FIG. 35A are serial numbers of frame image data in the moving image data (frames 1 to N). In the moving image data, the compressed data of frames 1 to N are configured by I picture, B picture, or P picture defined by the MPEG2 encoding method in the order shown in FIG. For example, frame 1 is an I picture, frames 2, 3, 5, and 6 are B pictures, and frames 4 and 7 are P pictures. The subscripts attached to I, B, and P are serial numbers for each picture type.

  As described above, frames 1 to N (frame images 1 to n) are stored as moving image data in order from frame 1 (image 1). For example, frame 1 (image 1) in the stream is an I picture, frames 2, 3, 5, and 6 (images 2, 3, 5, and 6) are B pictures, and frames 4 and 7 (images 4 and 7). Is a P picture.

Next, the operation of the effect control means will be described. FIG. 36 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 33 ms) (step S701). . Next, initial data transfer processing is performed (step S702). In the initial data transfer process, a fixed area (area for storing fixed image data) is set in the VRAMRS 96A, and the decorative design image data (see FIG. 15) stored in the CGROM 83 is transferred to the VRAMRS 96A fixed area. It is a process to do.

  Thereafter, the effect control CPU 101 proceeds to a loop process for monitoring a timer interrupt flag (step S704). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S705) and executes the effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and executes a process of setting a flag according to the received effect control command (command analysis process: step S706). Next, the effect control CPU 101 executes effect control process processing (step S707). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the image display device 9 is executed. Further, a random number update process for updating a counter value of a counter for generating a predetermined random number is executed (step S708). Further, background control processing for displaying a background image displayed on the display screen of the image display device 9 is performed (step S709). Thereafter, the process proceeds to step S704.

  It is assumed that the timer interrupt generation period is 1/33 seconds. Further, it is assumed that the screen change frequency (frame frequency) of the image display device 9 is 30 Hz, and the drawing processor 109 updates the display screen of the image display device 9 at a cycle of 1/33 seconds. The generation period of the timer interrupt may be a value other than 1/33 seconds (for example, 2 ms or 1/66 seconds), but in that case, in the effect control process, for example, a V blank interrupt (for example, from the drawing processor 109) Processing related to drawing is executed in synchronization with the generation of an interrupt generated by the drawing processor 109 at the same cycle as that of the vertical synchronization signal supplied to the image display device 9.

  Further, in the following description, a case where processing for realizing the image change (for example, three types of images in FIG. 28) described with reference to FIGS. 17 to 30 is executed every 1/33 seconds will be described. I do. However, in practice, the image change described with reference to FIGS. 17 to 30 is realized with a period longer than 1/33 seconds. Referring to the example shown in FIG. 28, for example, every 200 ms (0, 2 seconds), the change from the image shown in the upper part in FIG. 28 to the image shown in the middle part, and from the image shown in the middle part Considering that control is performed so that changes to the image shown in the lower row occur, an intermediate image exists between the image shown in the upper row and the image shown in the middle row, and is shown in the middle row. An intermediate image exists between the image and the image shown in the lower row. Then, a series of images including intermediate images are sequentially displayed on the image display device 9 every 1/33 seconds. However, in order to simplify the explanation, for example, the change from the image shown in the upper part to the image shown in the middle part in FIG. 28 and the change from the image shown in the middle part to the image shown in the lower part are performed. A case where control is performed to occur every 1/33 seconds will be described.

  FIG. 37 is a flowchart showing the background control process in step S709. Here, the case where the synthesized moving image illustrated in FIG. 17 is displayed as a background image will be described as an example. Note that the drawing processor 109 is described as VDP in the flowcharts of FIG.

  The effect control CPU 101 confirms whether or not the background control in-process flag is set in the background control process (step S611). If it is set, the process proceeds to step S621. If not set, a background control in-progress flag is set (step S612). Then, the value of the background effect cycle counter is initialized to 0 (step S613). The background effect cycle counter is, for example, a counter that is incremented by 1 every time 11 seconds elapse (when display of a frame image of 330 frames in a cycle of 1/33 seconds is completed). Further, an α buffer (buffer area secured in the VRAMRS 96A) corresponding to an area where the frame image data of the frame image constituting the moving image A is expanded and an area where the frame image data of the frame image constituting the moving image B is expanded. Then, 1.0 is set as the α value in the buffer area in which the α value is set (step S614).

  Further, the production control CPU 101 outputs a multi-stream start address command to the drawing processor 109 (step S615). The address of the CGROM 83 specified by the multi-stream start address command is an address in which the moving image data of the moving images A and B illustrated in FIG. 16 is stored. Further, the multi-stream development area address command is output to the drawing processor 109 (step S616). Then, a decode execution command for instructing multi-stream expansion is output to the drawing processor 109 (step S617). Also, the value of the background frame number counter is initialized to 0 (step S618).

  In step S621, the effect control CPU 101 increments the value of the background frame number counter by one. Then, the frame image data of one frame in the expanded area corresponding to the moving image A (the area where the frame image data of the frame image constituting the moving image A is expanded in the VRAMRS 96A) is output to the VRAMFB 96B (step S622). . Specifically, a VRAMFB transfer command (see FIG. 32) is output to the drawing processor 109. Note that the read address in the VRAMFB transfer command changes according to the value of the background frame number counter. That is, the storage address in the VRAMRS 96A of the frame image data to be output at that time is set as the read address in the VRAMFB transfer command. The write address in the VRAMFB transfer command is the address of the drawing area.

  Further, a drawing effect command for designating the α value of the frame image data of the frame image constituting the moving image B is output to the drawing processor 109 (step S623). Then, the frame image data of one frame in the expanded area corresponding to the moving image B (the area where the frame image data of the frame image constituting the moving image B is expanded in the VRAMRS 96A) is output to the VRAMFB 96B (step S624). . Specifically, a VRAMFB transfer command (see FIG. 32) is output to the drawing processor 109.

  Note that when the moving image A and the moving image B are drawn in the same drawing area (combined so as to completely overlap), the write address in the VRAMFB transfer command output in step S624 is output in step S622. Same as the write address in the VRAMFB transfer command.

  In the drawing processor 109, the decoder 95 expands the moving image A data and the moving image B data stored in the CGROM 83 in accordance with the decode command output in the process of step S617, and stores them in the VRAMRS 96A. Further, one frame image data in the moving image A data is drawn in the drawing area in accordance with the VRAMFB transfer command output in the process of step S622. Then, in response to the VRAMFB transfer command output in step S624, one frame of frame image data in the moving image B data is drawn in the drawing area. At that time, the frame image data output in step S623 is output. The calculation is performed in consideration of the α value by the drawing effect command, and the image is synthesized. Note that the decoder 95 decompresses the frame image data that has been subjected to data compression every 1/60 seconds. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  Thereafter, the effect control CPU 101 checks whether or not the value of the background frame number counter is 330 corresponding to the reproduction of 11 seconds (step S625). If not 330, the process ends. If it is 330, the value of the background effect period counter is incremented by 1 (step S626). When the value of the background effect period counter is 1 (step S627), 0.5 is set as the α value in the α buffer (step S628), and the process proceeds to step S615. If the value of the background effect period counter is 2 (step S629), 0.2 is set as the α value in the α buffer (step S630), and the process proceeds to step S615. If the value of the background effect period counter is neither 1 nor 2, the process proceeds to step S613.

  The display as shown in FIG. 20 is realized by the processing of steps S628 and S630.

  FIG. 38 is an explanatory diagram for describing a modification of the background control process shown in FIG. When the moving image A data and the moving image B data are drawn at the same position in the drawing area, as described above, the write address in the VRAMFB transfer command output in step S624 is output in step S622. The address is the same as the write address in the VRAMFB transfer command (see (a) of FIG. 38A). Also, by shifting the write address in the VRAMFB transfer command output in step S624 from the write address in the VRAMFB transfer command output in step S622 (see (b) of FIG. 44A), FIG. It is possible to display a combined moving image in which the moving image A and the moving image B are combined as illustrated.

  Further, when moving images A and B including a frame image larger than the size of the drawing area are stored in the CGROM 83, the expanded frame image data larger than the size of the drawing area is stored in the VRAMRS 96A. In this case, the read address in the VRAMFB transfer command output in step S622 and the read address in the VRAMFB transfer command output in step S624 are set to the address of the area corresponding to the size of the drawing area. The display of the background image as shown in FIG. Note that the processing in this case is not shown in FIG.

  Furthermore, when frame image data after expansion larger than the size of the drawing area is stored in VRAMRS 96A, the read address in the VRAMFB transfer command output in step S622 is the address of the area corresponding to the size of the drawing area. By setting the address of the area smaller than the size of the read address drawing area in the VRAMFB transfer command output in step S624 (see FIG. 38B), a part of the moving image A is drawn in the drawing area, An image obtained by combining a part of the moving image B with the image is displayed on the image display device 9. That is, the clipping range for the moving image A data among the plurality of moving image data is made different from the clipping range for the moving image B data among the other moving image data. Note that the display circuit 97 of the drawing processor 109 transfers the image data developed in the drawing area of the VRAMFB 96B to the display area every 1/33 seconds, and outputs an image signal based on the image data in the display area to the image display device. Output to 9.

FIG. 39 is a flowchart illustrating another example of the background control process. Here, a case will be described as an example in which a synthesized moving image is mapped as a texture on the polygon illustrated in FIG. 23, and then image data obtained by performing rendering processing is displayed as a background image.
In FIG. 39, some of the steps that are common to the steps in FIG. 37 are omitted.

  In the background control process shown in FIG. 39, when the background control in-progress flag is not set, the effect control CPU 101 performs a process for generating a polygon having a tile shape in the non-drawing area of the VRAMFB 96B ( Step S612B). Specifically, a polygon drawing command that specifies the shape and size of the polygon is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 33), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B.

  In step S622B, a texture attribute setting command is output to set a region to be used as a texture of the frame image included in the moving image A. In step S622C, a VRAMFB transfer command is output to the drawing processor 109 in order to output the frame image data of one frame of the development area corresponding to the moving image A as a texture to the VRAMFB 96B. , And specify the polygon area (area where the polygon is developed).

  In step S624B, a texture attribute setting command is output to set an area to be used as the texture of the frame image included in the moving image B. In step S624C, a VRAMFB transfer command is output to the drawing processor 109 to output one frame of frame image data corresponding to the moving image B to the VRAMFB 96B as a texture. , And specify the polygon area (area where the polygon is developed).

  Next, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as a polygon area) of VRAMRS 96A (step S624D). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to the drawing area of VRAMFB 96B (step S624E).

  Note that when the drawing processor 109 outputs the image data of the drawing area of the VRAMRS 96A to the drawing area of the VRAMFB 96B, the image data already developed in the drawing area of the VRAMFB 96B (in this example, the frame image constituting the moving image A) Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  Other processes are the same as those shown in FIG. 39, the synthesized moving image is mapped as a texture on the polygon illustrated in FIG. 23 by the processing of steps S622B, S622C, S624B to S624E in FIG. 39, and then the image data obtained by performing the rendering processing is displayed as a background image. be able to. The display circuit 97 of the drawing processor 109 outputs an image signal based on the image data developed in the drawing area of the VRAMFB 96B to the image display device 9 every 1/33 seconds.

  FIG. 40 is a flowchart showing the effect control process (step S707) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S807 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command has been received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the variation pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the notice selection process (step S801). In the variation pattern command reception waiting process in step S800, when the data indicated by the received variation pattern command is to execute a reach effect other than “normal reach”, the timing of starting execution of the reach effect. To set the frame rate change flag, VRAMFB 96C is selected as the frame buffer to be used, and the frame rate is set to “30”. The execution start timing of the reach effect may be specified based on the variation pattern command. For example, a table in which the reach start timing of the reach effect is associated with each variation pattern is prepared in advance, and the start start timing of the reach effect may be specified based on the change pattern command.

  Preliminary selection process (step S801): In the image display device 9, it is determined whether or not to execute the preliminary presentation process for notifying the player of the occurrence of the big hit, and when it is determined to execute the preliminary presentation process. Selects the VRAMFB 96C as the used frame buffer by setting the frame rate change flag. Then, the value of the effect control process flag is changed to a value corresponding to the decorative symbol variation start process (step S802). If the variation pattern command received in the variation pattern command reception waiting process in step S800 is to execute a reach effect other than “normal reach”, and the frame rate change flag is set, the frame buffer already used Since VRAMFB96C is selected, it is not necessary to execute the process of setting the frame rate change flag when it is decided to execute the notice effect process.

  Decoration symbol variation start processing (step S802): Control is performed so that the variation of the ornament symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol changing process (step S803).

  Decoration symbol variation processing (step S803): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S804). Also, in the decorative symbol variation process in step S803, the frame rate is set according to the state of the frame rate change flag, and the variation of the decorative symbol is controlled.

  Decoration symbol variation stop processing (step S804): Based on the reception of the effect control command (design determination designation command) for instructing all symbols to stop, the variation of the ornament symbol is stopped and the display result (stop symbol) is derived and displayed. Take control. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S805) or the variation pattern command reception waiting process (step S800). In addition, as will be described in detail later, in the decorative symbol variation stop process in step S804, the state of the frame rate change flag is changed according to whether or not it is a big hit.

  Big hit display processing (step S805): After the end of the variation time, control is performed to display a screen for notifying the image display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S806).

  Big hit game processing (step S806): Control during the big hit game is performed. For example, when an effect control command for display before opening the big winning opening or display when opening the big winning opening is received, display control of the number of rounds in the image display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot end process (step S807).

  Big hit end processing (step S807): In the image display device 9, display control is performed to notify the player that the big hit gaming state has ended. Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800).

  FIG. 41 is a flowchart showing a variation pattern command reception waiting process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process of FIG. 41, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S812). The variation pattern command reception flag is set in the command analysis process when a variation pattern command is received. In the command analysis process, the received fluctuation pattern command or data indicating the received fluctuation pattern command is stored in the fluctuation pattern command storage area of the RAM. Then, the value of the effect control process flag is updated to a value corresponding to the notice selection process (step S801) (step S813). Here, when the data indicating the variation pattern command stored in the variation pattern command storage area of the RAM is to execute a reach effect other than “normal reach”, by setting a frame rate change flag, VRAMFB 96C is selected as the frame buffer to be used.

  FIG. 42 is a flowchart showing a notice selection process in the effect control process shown in FIG. In the advance notice selection process, the effect control CPU 101 changes the variation pattern indicated by the received variation pattern command (stored in the variation pattern command storage area in the RAM in the command analysis process) into the variation patterns A to C (FIG. 9). The reach A, the reach B, and the reach C shown in FIG. 6 are also included (including the types of variation patterns including “shortening” and “extension”) (step S821). If it is any of the variation patterns A to C (step S821; Y), the random number for determining the notice is extracted, and it is determined whether to give the notice effect based on the extracted random number value. In this case, the type of notice effect is determined (step S822). The received display result specifying command is also referred to when determining whether or not to give a notice effect. In this embodiment, the notice effect can be executed when the effect by the variation pattern of reach A, reach B, and reach C is performed, but the effect by another type of variation pattern is performed. Sometimes a notice effect may be executed. When it is determined that the notice effect is to be executed, for example, a notice effect determination flag is set on.

  Then, it is determined whether or not it is decided to execute the notice effect in step S822 (step S823). If it is decided to give the notice effect (step S823; Y), the frame change flag is set to the on state (step S823). Step S824). After executing the process of step S824, when it is determined that none of the variation patterns A to C is determined at step S821 (step S821; N), or when it is determined not to execute the notice effect at step S823 In (Step S823; N), the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation start process (Step S802) (Step S825).

FIG. 43 is an explanatory diagram showing an example of a process for determining whether or not to perform the notice effect and the type of the notice effect when it is determined to perform the notice effect. FIG. 43A shows a command (display result 2-5 designation) indicating that the received display result specifying command (stored in the display result specifying command storage area of the RAM in the command analysis process) is hit. An example of a command (see FIG. 12) is shown. FIG. 43B shows an example in the case where the received display result specifying command is a command indicating a deviation (display result 1 designation command; see FIG. 12).

  When the extracted random number value matches the notice determination value shown in FIG. 43 in the process of step S822, the effect control CPU 101 determines whether or not to give the notice effect according to the matched notice determination value. Then, when it is decided to give the notice effect, it is decided to execute the notice effect (see FIG. 52).

  FIG. 44 is a flowchart showing a decorative symbol variation start process (step S802) in the effect control process shown in FIG. In the decorative symbol variation start process, the effect control CPU 101 reads the variation pattern command or data indicating the received variation pattern command from the variation pattern command storage area (step S830).

  Next, the display result of the decorative symbol (stop symbol) is determined in accordance with the data stored in the display result specifying command storage area of the RAM (that is, the received display result specifying command) (step S831). The effect control CPU 101 stores data indicating the display result of the determined decorative symbol in the decorative symbol display result storage area.

  In step S831, the effect control CPU 101 extracts a predetermined random number and determines a stop symbol based on the extracted random number. At this time, if a display result specifying command indicating display error (display result 1 designation command) is received, a combination of stop symbols that reminds of the error (for example, left middle right symbol does not match, or left and right symbols The middle symbol does not match). Further, when a display result specifying command (display result 2 to 5 designation command) indicating a hit is received, a combination of stop symbols (for example, the left, middle and right symbols match) reminiscent of a big hit is determined. . When a display result specifying command (display result 4 designation command) indicating a probable big hit is received, a combination of stop symbols that recalls a probable big hit (for example, “7” “7” “7”) May be determined. Note that a combination of decorative symbols that evokes a big hit is sometimes referred to as a big hit symbol, and a combination of decorative symbols that evokes a loss is sometimes referred to as a missed symbol.

  Then, the production control CPU 101 selects a process table corresponding to the variation pattern (step S832). Then, the process timer corresponding to the effect execution data 1 in the selected process data is started (step S833). Next, the production control CPU 101 performs the production device (the image display device 9 as the production component, the production component as the production component according to the contents of the process data 1 (display control execution data 1, lamp control execution data 1, sound number data 1). Control of various lamps, LED light emitters, and speaker 27 as a production component is executed (step S834). For example, in order to display an image according to the variation pattern on the image display device 9, a command is output to the drawing processor 109. In addition, a control signal (lamp control execution data) is output to the lamp driver board 35 in order to perform on / off control of various lamps. In addition, a control signal (sound number data) is output to the sound output board 70 in order to output sound from the speaker 27.

  In this embodiment, the effect control CPU 101 performs control so that the decorative pattern is variably displayed by the change pattern corresponding to the change pattern command on a one-to-one basis, but the effect control CPU 101 controls the change pattern command. The variation pattern to be used may be selected from a plurality of types of variation patterns corresponding to.

  Then, the value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S835), the process data valid flag is set (step S836), and the value of the effect control process flag is changed to the decorative pattern variation. A value corresponding to the intermediate process (step S803) is set (step S837).

  FIG. 45 is an explanatory diagram of a configuration example of a process table. The process table is a table in which process data to be referred to when the output control CPU 101 executes control of the rendering device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the image display device 9 in accordance with the data set in the process table. The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. The display control execution data includes data indicating each variation mode constituting the variation mode during the variable display time (variation time) of the variable display of the decorative symbols. Specifically, data relating to the change of the display screen of the image display device 9 is described. The process timer set value is set with a change time in the form of the change.

  The process table shown in FIG. 45 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern. Furthermore, different process tables are prepared according to the difference in the notice effect mode (notice type) when the notice effect is executed.

  FIG. 46 is a flowchart showing the decorative symbol variation process (step S803) in the effect control process shown in FIG. In the decorative symbol variation process, the effect control CPU 101 subtracts 1 from the value of the process timer (step S840) and subtracts 1 from the value of the variation time timer (step S841). Then, it is determined whether or not the process timer has timed out (step S842). When the process timer has timed out (step S842; Y), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S843). Subsequently, it is determined whether the frame rate change flag is set (step S844). If it is set (step S844; Y), the frame rate is set to “30” (step S844A). After executing step S844A, or when it is determined in step S844 that the frame rate change flag has not been set (step S844; N), the content of the display control execution data set next is set. The control state for the image display device 9 is changed based on the current frame rate (step S845A). It is assumed that the frame rate is set to “60” as an initial value. Further, based on the lamp control execution data and sound number data set next, the control state for the light emitters such as lamps and LEDs and the speaker 27 is changed (step S845B). Then, a notice effect process is performed (step S845C).

  Returning to FIG. 46, after executing the processing of step S845C, it is determined whether or not the variable time timer has timed out (step S846). If the variation time timer has timed out (step S846; Y), the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S804) (step S848). On the other hand, if the variable time timer has not timed out (step S846; N), it is determined whether or not a confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847). If the reception flag is set (step S847; Y), the process proceeds to step S848. According to this, even if the variation time timer has not timed out, when the symbol confirmation designation command is received, the control shifts to stop the variation. For example, the variation indicating a long variation time due to noise between substrates or the like. Even when a pattern command is received, the variation of the decorative symbol can be terminated when the regular variation time has elapsed (when the variation of the special symbol is finished). It should be noted that after the process of step S848 is executed or when the confirmed command reception flag is not set in step S847 (step S847; N), the decorative symbol variation process is terminated.

FIG. 47 is a flowchart showing a decoration symbol variation stop process (step S804) in the effect control process shown in FIG. In the decorative symbol variation stopping process, the effect control CPU 101 checks whether or not the confirmation command reception flag is set (step S851). The confirmation command reception flag is set when a symbol confirmation designation command is received in the command analysis process. If the confirmation command reception flag is set (step S851; Y), the confirmation command reception flag is reset (step S852), and control for deriving and displaying the determined stop symbol is performed (step S853). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S854). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol. If the confirmation command reception flag is not set in step S851 (step S851; N), the symbol variation stop process is terminated.

  If it is determined in step S854 to be a big hit (step S854; Y), it is determined whether or not the frame change flag is set (step S855). When it is determined that the frame change flag is not set (step S855; N), the frame change flag is set to the on state (step S856). According to this, since the shift to the short time state is made after the end of the big hit gaming state, the frame rate in the variable display during the short time gaming state is controlled at “30”. After performing the process of step S856, or when it is determined in step S855 that the frame change flag is set (step S855; Y), the value of the effect control process flag is set according to the jackpot display process (step S805). The value is updated (step S857), and the symbol variation stop process is terminated.

  In this embodiment, the effect control microcomputer 100 ends the variation (variable display) of the decorative symbols on the condition that the symbol confirmation designation command has been received (see steps S851 and S853). However, if the variation time timer based on the received variation pattern command times out, the variation of the decorative symbol may be controlled to end without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  If it is determined in step S854 that a big hit is not made (step S854; N), it is determined whether or not a frame change flag is set (step S858). If the frame rate change flag is set (step S858; Y), it is determined whether or not the current gaming state is a time-short state (step S859). Whether or not it is in a short time state may be determined based on a gaming state command transmitted from the main board 31, for example. If the time is short (step S859; Y), it is determined whether or not the value of the variable display counter is “100” (step S860). When the value of the variable display counter is “100” (step S860; Y), or when it is determined in step S859 that the time reduction state is not reached (step S859; N), the frame rate change flag is reset to the off state ( In step S861, the frame rate is set to the initial value “60” (step S862). After executing the process of step S862, or when the frame rate change flag is not set at step S858 (step S858; N), or when the value of the variable display counter is not “100” at step S860 ( In step S860; N), the effect control CPU 101 updates the value of the effect control process flag to a value corresponding to the variation pattern command reception waiting process (step S800) (step S861), and ends the symbol variation stop process. According to this, during the time reduction state, the state in which the frame rate change flag remains set to the on state is maintained, and the frame rate change flag is cleared when the time reduction state ends. Therefore, during the time-shortening state, the decorative symbol is variably displayed at the frame rate of “30”, and when the time-shortening state is finished, the decorative symbol is variably displayed at the frame rate of “60”. In the time reduction state in this embodiment, the area where the decorative display variable display is reduced in the image display device 9 is reduced, and the effect indicating the time reduction state is larger than the area where the decoration display variable display is performed. This is performed in the area (see FIG. 55B). Therefore, the case where the decorative display is variably displayed in the shorter time state (FIG. 55B) than the case where the decorative display is variably displayed in the normal state (FIG. 55A), The player's attention to the decorative design is reduced. For this reason, in the case of a gaming state in which the player's attention to the variable display of decorative symbols is small, the decorative symbols are variablely displayed at a low frame rate, so that the processing burden can be reduced.

  Hereinafter, the process of changing the control state for the image display device 9 in step S845A will be described.

  48 to 50 are flowcharts showing processing when the decorative symbol “7” illustrated in FIG. 24 changes to the decorative symbol “8”. In this example, the display control execution data i to i + 2 in the process table are used as an example.

  When the display control execution data to be used next in the process table is the display control execution data i, the effect control CPU 101 executes the processes of steps S642 to S648 (step S641). When the display control execution data to be used next in the process table is the display control execution data i + 1, the effect control CPU 101 executes the processes of steps S652 to S658 (step S651). If the next display control execution data to be used in the process table is the display control execution data i + 2, the effect control CPU 101 executes the processes of steps S662 to S668 (step S661).

  In step S642, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. Next, a process for generating a plate-like polygon in the non-drawing area of VRAMFB 96B or VRAMFB 96C is performed (step S643). Specifically, a polygon drawing command for designating the arrangement position, shape, and size of the polygon in the virtual three-dimensional space is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 33), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B or VRAMFB 96C. Note that the α value of each pixel in the plate-shaped polygon image data is set to zero. Note that it may be determined in accordance with a set frame rate whether the plate-shaped polygon is generated in the non-drawing area of VRAMFB 96B or the non-drawing area of VRAMFB 96C. For example, a plate-like polygon may be generated in the non-drawing area of the VRAMFB 96B when the frame rate is “60”, and in the non-drawing area of the VRAMFB 96C when the frame rate is “30”. Further, the non-drawing area of VRAMFB 96B is set as an initial value, and the frame rate is set to “30” and the non-drawing area of VRAMFB 96C may be set in the process of step S844A of FIG. .

  Next, the image data of the polygon area of VRAMFB 96B or VRAMFB 96C generated in step S643 is output to a predetermined area (set as a polygon area) of VRAMRS 96A (step S644). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data of the drawing area of VRAMRS 96A is output to the non-drawing area of VRAMFB 96B or VRAMFB 96C (the non-drawing area of VRAMFB in which the plate-like polygon is generated by the processing of step S643) (step S645).

  Then, the image data of the non-drawing area of VRAMFB 96B or VRAMFB 96C is transferred to VRAMRS 96A (step S646). This image becomes a mask pattern.

  Next, the effect control CPU 101 outputs a CGROM transfer command to the drawing processor 109 (step S647). The read address is an address where the image data of the decorative pattern “8” is stored, and the write address is an address where a mask pattern is formed. Then, the image data stored at the address where the mask pattern is formed is output to the drawing area of the VRAMFB 96B or VRAMFB 96C (the drawing area of the VRAMFB in which the plate-like polygon is generated by the processing of step S643) (step S648). In step S648, presentation control CPU 101 outputs a VRAMFB transfer command to drawing processor 109.

  The image as shown in FIG. 24A is displayed on the image display device 9 by the processing as described above. In this embodiment, the clipping process using the mask pattern is realized by developing the image data of the decorative pattern “8” in the area where the mask pattern is developed (step S647).

  In step S652, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. Next, processing for generating a plate-like polygon in the non-drawing area of VRAMFB 96B or VRAMFB 96C is performed (step S653). Note that it may be determined in accordance with a set frame rate whether the plate-shaped polygon is generated in the non-drawing area of VRAMFB 96B or the non-drawing area of VRAMFB 96C. In addition, the α value of each pixel in the image data of the plate-like polygon is set to 0. Further, the size of the plate-shaped polygon created by the process of step S653 is larger than the size of the plate-shaped polygon created by the process of step S643. Further, the position of the plate-shaped polygon created by the process of step S653 is different from the position of the plate-shaped polygon created by the process of step S643. Therefore, the process of moving the polygon is realized.

  Next, the image data of the polygon area of VRAMFB 96B or VRAMFB 96C is output to the polygon area of VRAMRS 96A (step S654). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data of the drawing area of VRAMRS 96A is output to the non-drawing area of VRAMFB 96B or VRAMFB 96C (the non-drawing area of VRAMFB in which the plate-like polygon is generated by the processing of step S653) (step S655).

  Then, the image data in the non-drawing area of VRAMFB 96B or VRAMFB 96C is transferred to VRAMRS 96A (step S656). This image becomes a mask pattern.

  Next, the production control CPU 101 outputs a CGROM transfer command to the drawing processor 109 (step S657). The read address is an address where the image data of the decorative pattern “8” is stored, and the write address is an address where a mask pattern is formed. Then, the image data stored at the address where the mask pattern is formed is output to the drawing area of the VRAMFB 96B or VRAMFB 96C (the drawing area of the VRAMFB in which the plate-like polygon is generated by the processing of step S653) (step S658). In step S658, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109.

  The image as shown in FIG. 24B is displayed on the image display device 9 by the processing as described above.

  In step S662, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109. The read address in the VRAMFB transfer command is an address in which the image data of the decorative pattern “7” in the VRAMRS 96A is stored. Next, a process for generating a plate-shaped polygon in the non-drawing area of VRAMFB 96B or VRAMFB 96C is performed (step S663). Note that it may be determined in accordance with a set frame rate whether the plate-shaped polygon is generated in the non-drawing area of VRAMFB 96B or the non-drawing area of VRAMFB 96C. In addition, the α value of each pixel in the image data of the plate-like polygon is set to 0. Further, the size of the plate-shaped polygon created by the process of step S663 is larger than the size of the plate-shaped polygon created by the process of step S653. Further, the position of the plate-shaped polygon created by the process of step S663 is different from the position of the plate-shaped polygon created by the process of step S653. Therefore, the process of moving the polygon is realized.

  Next, the image data of the polygon area of VRAMFB 96B or VRAMFB 96C is output to the polygon area of VRAMRS 96A (step S664). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data of the drawing area of VRAMRS 96A is output to the non-drawing area of VRAMFB 96B or VRAMFB 96C (the non-drawing area of VRAMFB in which the plate-like polygon is generated by the processing of step S663) (step S665).

  Then, the image data of the non-drawing area of VRAMFB 96B or VRAMFB 96C is transferred to VRAMRS 96A (step S666). This image becomes a mask pattern.

  Next, the effect control CPU 101 outputs a CGROM transfer command to the drawing processor 109 (step S667). The read address is an address where the image data of the decorative pattern “8” is stored, and the write address is an address where a mask pattern is formed. Then, the image data stored at the address where the mask pattern is formed is output to the drawing area of the VRAMFB 96B or VRAMFB 96C (the drawing area of the VRAMFB in which the plate-like polygon is generated by the processing of step S663) (step S668). In step S <b> 668, the effect control CPU 101 outputs a VRAMFB transfer command to the drawing processor 109.

  The image as shown in FIG. 24C is displayed on the image display device 9 by the processing as described above.

  Thereafter, the CPU 101 for effect control controls the drawing processor 109 to display the decorative pattern “8” on the image display device 9.

  In this embodiment, the mask pattern size is changed by creating polygons having different sizes (steps S643, S653, and S663), but the rendering process (steps S645 and S655) is performed without changing the polygon size. At the time of S665), the size of the mask pattern may be changed by changing the size of the area for reading the size of the area for writing the image data. For example, when the size of the area in which image data is written is larger than the size of the area to be read, the drawing processor 109 generates pixels by interpolation processing and performs image enlargement processing.

  Further, it may be possible to display the boundary portion of the image with another image smoothly by performing a process of translucent the edge portion of the image to be rendered. Specifically, when executing the processing of steps S647, S657, and S667, the rendering processor 109 is given a command to set the α value of the edge portion in the image data “8” to a value lower than 1.0. The blending process is performed by α blending the edges.

  In this embodiment, the mask pattern is created and the image data “8” is pasted in the mask pattern. However, after the image data of a predetermined still image is pasted on the polygon, Rendering processing may be performed. In that case, for example, between the processing of step S643 and the processing of step S644, the effect control CPU 101 sends image data of a predetermined still image stored in the CGROM 83 to the VRAMRS 96A in the drawing processor 109 by a CGROM transfer command. In response to the VRAMFB transfer command, the image data of the still image developed in the VRAMRS 96A is pasted on the polygon as a texture. By performing such control, the displayed decorative symbols can be varied.

  FIG. 51 is an explanatory diagram showing the processing of steps S643, S653, and S663 described above. In the process in the case where the decoration pattern of “7” is changed to the decoration pattern of “8”, the size of the plate-shaped polygon to be created is small in the process of step S643 and it is as if it has fallen 90 degrees to the back side. (See FIG. 25). In the process of step S653, the size of the plate-shaped polygon to be created is medium and is created at a position as if it has been tilted 90 degrees to the back side. In the process of step S663, the size of the plate-shaped polygon to be created is large and is created at a position as if it is tilted 90 degrees to the back side.

  As described above, the drawing processor 109 performs control to move to a position corresponding to a plurality of types of identification information variably displayed in a shape corresponding to a plurality of types of identification information variably displayed. In this example, the case of changing from the decorative pattern “7” to the decorative pattern “8” is exemplified as the case of changing from the decorative pattern “6” to the decorative pattern “7”. In addition, it may be controlled to move to a position corresponding to a plurality of types of identification information variably displayed in a shape corresponding to the type of identification information.

  FIG. 52 is a flowchart showing the notice effect processing (see FIG. 46) in step S645D. In the notice effect process, the effect control CPU 101 determines whether or not the notice effect is determined to be executed in the notice selection process shown in FIG. 42 (step S671). In the process of step S671, for example, it may be determined whether or not it is determined to execute the notice effect depending on whether or not the notice effect determination flag is set. When it is determined to execute the notice effect (step S671; Y), it is confirmed whether or not the notice effect flag is set (step S672). If the flag for the notice effect is not set (step S672; N), it is confirmed whether or not the notice effect start timing has come (step S673). The notice effect start timing is the time when a predetermined time has elapsed from the start of the predetermined variable display. By setting data indicating the time in the process data, the effect control CPU 101 notifies the notice. It can be determined whether or not the production start timing has come. If it is not the notice effect start timing (step S673; N) or if it is not determined to execute the notice effect in step S671 (step S671; N), the notice effect process is terminated.

  When it is time to start the notice effect (step S673; Y), the flag for the notice effect is set (step S674). Then, the effect control CPU 101 outputs a multi-stream start address command to the drawing processor 109 (step S675). The address of the CGROM 83 specified by the multi-stream start address command is an address in which the moving image data of the moving images A and B illustrated in FIG. 33 is stored. Further, the multi-stream development area address command is output to the drawing processor 109 (step S676). Then, a decode execution command for instructing multi-stream expansion is output to the drawing processor 109 (step S677). Further, the value of the notice effect cycle number counter is initialized to 0 (step S678).

  Note that the decoder 95 expands the frame image data subjected to data compression every 1/60 seconds in accordance with a decode execution command. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  In step S672, when it is confirmed that the flag for the notice effect is set (step S672; Y), the effect control CPU 101 checks whether the value of the notice effect period counter is 3 (step S680). . If it is not 3 (step S680; N), the value of the notice effect period counter is incremented by 1 (step S681). Further, a process for generating a plate-like polygon in the non-drawing area of the VRAMFB 96B is performed (step S682). Specifically, a polygon drawing command that specifies the shape and size of the polygon is output to the drawing processor 109. When the drawing processor 109 receives a polygon drawing command (see FIG. 33), the drawing processor 109 generates a polygon in the non-drawing area of the VRAMFB 96B. Note that the size and creation position of the plate-shaped polygon differ depending on the value of the notice effect period counter.

  In addition, a texture attribute setting command is output in order to set a region to be used as the texture of the frame image included in the moving image A (see FIG. 30A) (step S683). In addition, in order to output the frame image data of one frame in the development area corresponding to the moving image A to the VRAMFB 96B as a texture, a VRAMFB transfer command is output to the drawing processor 109, but a polygon area ( A region where polygons are developed is designated (step S684).

  In addition, a rendering effect command for designating the α value of the frame image data of the frame image constituting the moving image B (see FIG. 30B) is output to the rendering processor 109 (step S685). Further, a texture attribute setting command is output to set an area to be used as the texture of the frame image included in the moving image B (step S686). Then, one frame of frame image data corresponding to the moving image B (the region where the frame image data of the frame image constituting the moving image B is expanded in the VRAMRS 96A) is output to the polygon region of the VRAMFB 96B ( Step S687). Specifically, a VRAMFB transfer command (see FIG. 32) is output to the drawing processor 109.

  Note that when the drawing processor 109 outputs the image data of the drawing area of the VRAMRS 96A to the drawing area of the VRAMFB 96B, the image data already developed in the drawing area of the VRAMFB 96B (in this example, the frame image constituting the moving image A) Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  Next, the image data of the polygon area of VRAMFB 96B is output to a predetermined area (referred to as polygon area) of VRAMRS 96A (step S688). Specifically, a VRAMFB copy command is output to the drawing processor 109. Then, for rendering, the image data in the drawing area of VRAMRS 96A is output to an area (notice effect window) corresponding to the notice effect area 9a in the drawing area of VRAMFB 96B (step S689), and the notice effect process is terminated. The drawing processor 109 pastes the image data of the synthesized moving image (superimposed image) on the plate-shaped polygon by executing processing according to the VRAMFB transfer command in step S687.

  On the other hand, when the value of the notice effect cycle number counter is 3 (step S680; Y), the effect control CPU 101 checks whether or not the moving image playback flag is set (step S691).

  When the moving image playback flag is not set (step S691; N), the effect control CPU 101 outputs a multi-stream start address command to the drawing processor 109 (step S692). The addresses of the CGROM 83 designated by the multi-stream start address command are two moving images starting from a frame image based on the frame image data used in steps S682 and S683 when the value of the notice effect period number counter is 2. Hereinafter, these are also referred to as moving images A and B). Further, the multi-stream development area address command is output to the drawing processor 109 (step S693). Then, a decode execution command for instructing multi-stream decompression is output to the drawing processor 109 (step S694). Then, a moving image playback flag is set (step S695), and the notice effect processing is terminated.

  Note that the decoder 95 expands the frame image data subjected to data compression every 1/60 seconds in accordance with a decode execution command. At that time, every 1/60 seconds, one frame of frame image data in the moving image A data and one frame of frame image data in the moving image B data are alternately expanded. Therefore, the decompression process for the other moving image data is not started until the decompression process for one moving image data is completed.

  In addition, the drawing processor 109 does not perform texture pasting or rendering processing on the moving image data whose expansion processing is started by the processing in step S694. That is, the moving image based on the moving image data whose expansion process is started by the process of step S694 is displayed on the image display device 9 as it is.

  In the CGROM 83, moving image A data and moving image B data whose expansion processing is started by the processing of step S678 and moving image A data and moving image B data whose expansion processing is started by the processing of step S694 are separately provided. Stored. The resolution of the moving image based on the moving image A data and the moving image B data whose expansion processing is started by the processing of step S694 is the moving image based on the moving image A data and the moving image B data whose expansion processing is started by the processing of step S678. Higher than the resolution. When reproducing high-resolution moving image data (moving image A data and moving image B data whose expansion processing is started by the processing in step S694), texture pasting or rendering processing is not performed, and high-resolution moving image is performed. The burden on the drawing processor 109 when data is being reproduced can be reduced. Further, when the moving image data is reproduced as it is, the display quality can be improved.

  On the other hand, when the moving image playback flag is set (step S691; Y), one frame of frame image data in the development area corresponding to the moving image A is output to another area in the VRAMRS 96A (step S696). . Specifically, an inter-VRAMRS transfer command (see FIG. 32) is output to the drawing processor 109. Further, the frame image data of one frame in the development area corresponding to the moving image B is output to the VRAMRS 96A (step S697). Specifically, an inter-VRAMRS transfer command (see FIG. 32) is output to the drawing processor 109. Note that the write address in the inter-VRAMRS transfer command is an address of an area to which one frame of frame image data in the development area corresponding to the moving image A has been transferred. Therefore, the frame image data of the moving image A and the frame image data of the moving image B are combined in another area in the VRAMRS 96A.

  Note that when the drawing processor 109 outputs the image data in the drawing area to the VRAMRS 96A based on the inter-VRAMRS transfer command, the image data already developed in the VRAMRS 96A (in this example, the frame image constituting the moving image A is displayed). Frame image data) and each pixel. That is, the synthesis process (superposition process) is performed. At the time of combining processing, for example, for each of two image data, addition processing of each of R, G, and B values multiplied by an α value is performed.

  Then, the effect control CPU 101 outputs the image data in the other area of the VRAMRS 96A to the area (notice effect window) corresponding to the notice effect area 9a in the drawing area of the VRAMFB 96B (step S698), and ends the notice effect process. To do. Specifically, a VRAMFB transfer command (see FIG. 32) is output to the drawing processor 109.

  As described above, the notice effect as illustrated in FIGS. 54B to 54E is executed. As described above, when the drawing processor 109 creates display image data over a plurality of frames using polygons in response to a command from the effect control CPU 101, the last frame image data of the plurality of frames is used. Next, the moving image data is reproduced from the frame image data. Thus, when the notice effect is executed, the frame rate change flag is set to the on state, the frame rate is set to “30”, and the decorative symbols are variably displayed. As shown in FIGS. 54B to 54E, when the notice effect is executed, the notice effect shown in FIG. 54A is executed in the variable display area of the decorative pattern in the image display device 9. It is reduced compared to the case where it is not. When the notice effect is executed, the player's attention is gathered in the notice effect being executed, and the degree of attention with respect to the variable display of the decorative symbol is low. Therefore, when the player's attention level is low and the smoothness of the variable display of the decorative design is not required, the processing load is reduced by reducing the frame rate of the variable display of the decorative design from “60” to “30”. It can be reduced.

  Further, in this embodiment, when the data indicated by the received fluctuation pattern command in the fluctuation pattern command reception waiting process in step S800 is to execute a reach effect other than “normal reach”, the frame rate change flag is set. The frame rate is set to “30”. In the reach production other than “normal reach”, the area in which the decorative display of variable display is performed on the image display device 9 is reduced, and the reach production other than “normal reach” is larger than the area in which the decorative display of variable display is performed. Done in the area.

  FIG. 56 is a diagram showing a relationship between a drawing cycle and a display cycle when a reach effect of super reach is performed. In the illustrated example, it is assumed that the time is not short (normal state). Until the reach production of the super reach is started, the frame rate change flag is not set to the on state, and the frame rate is “60” in the frame buffer 96B, and the drawing and display of the decorative symbols are repeatedly performed. (FIG. 57 (A)). Then, the frame rate change flag is set to the ON state at the timing when the reach effect of super reach is started, and the frame rate is set to “30”. During the reach production period, the frame buffer 96C repeatedly draws and displays decorative symbols at a frame rate of “30” (FIG. 57B). The frame image drawn by the frame buffer 96B is transferred to the frame buffer 96C. Further, during the reach period, the frame buffer 96B repeatedly draws and displays the symbols constituting the super reach reach effect at a frame rate of “60”. Then, when the reach effect is finished (variable display of the decorative design is finished and it is off), the frame rate change flag is cleared, and the frame buffer 96B again draws and displays the decorative design with the frame rate of “60”. Repeatedly. The frame image drawn by the frame buffer 96C is transferred to the frame buffer 96B. According to this, it is possible to effectively execute a reach effect with a high degree of player attention, such as a frame rate of “60”. In addition, since the variable display of the decorative design is performed at the frame rate “30” during the reach production period, the processing load can be reduced by controlling the variable display of the decorative design at a low frame rate. The processing burden can be allocated to the processing burden of reach production. The reach effect may be executed by setting the frame rate to “30”. In this case, the drawing and display of symbols by the frame buffer 96B in the super reach production period shown in FIG. 56 may be repeated at 30 frames / second. According to this, the processing burden of reach production (“frame” is reduced by the amount of reduction of the processing load for variable display during the reach production period of super reach (the amount of reduction of the frame rate from “60” to “30”). The amount of execution of reach production of rate “30” can be covered.

(Modification)
In addition, this invention is not limited to the said embodiment, A various deformation | transformation and application are possible. For example, a pachinko gaming machine does not have to have all the technical features shown in the above embodiment, and a part described in the above embodiment so as to solve at least one problem in the prior art. It may be provided with the following structure.

  (1) In the above embodiment, when the area in which the decorative display of the decorative pattern on the image display device 9 is performed is reduced, such as during the execution period of the reach effect other than the notice effect and the reach effect other than “normal reach” or in the short-time state, Although an example in which the frame rate of the symbol variable display is reduced is shown, this is an example. For example, as shown in FIG. 58 (B), the area where the variable display of the decorative symbols is divided into four in the image display device 9, and each area where the variable display of the decorative symbols is performed is more than that shown in FIG. 58 (A). Also in the case of performing a reduction effect, the frame rate of the variable display of decorative symbols performed in each area may be reduced. According to this, since the decorative symbols are variably displayed in each divided area, the player's attention to the variable display will be distributed to each divided area, so that the production is effective. In addition, it is possible to cover the processing burden of simultaneously executing a plurality of variable displays by reducing the processing burden by performing variable display at a low frame rate. An effect in which the area where the decorative symbol variable display is performed may be divided as a notice effect. The example shown in FIG. 58 shows an example in which the variable display area shown in FIG. 58 (B) is divided after the decorative display variable display in the normal state shown in FIG. 58 (A) is performed. However, the variable display area as shown in FIG. 58 (B) may be divided directly without performing the variable display of the normal decoration pattern shown in FIG. 58 (A) at the start of the variable display of the decorative design. . Further, a variation pattern (division variation pattern) indicating that an area where variable display of decorative symbols is performed may be set in advance. In these cases, if the frame rate change flag is set to the ON state in response to the decision to divide the area where the decorative symbols are variably displayed or the fact that the variation pattern command indicating the division variation pattern is received. Good. Then, by referring to the table associated with the received variation pattern command, each variation pattern (division variation pattern) for each divided area is determined or divided according to the decision to divide. The variation pattern for each area may be determined within the variation time range indicated by the received variation pattern command based on the random number for pattern determination. Note that the number of divisions of the area may be arbitrary. For example, the number of divisions may be “2”. Further, the frame rate value to be lowered may be changed according to the number of divisions. For example, when the number of divisions is “2”, the frame rate value of the decorative pattern for each area is set to “30”, and when the number of divisions is “4”, the frame rate of the decorative pattern for each area. The value of may be set to “15”. According to this, the decorative design of each area can be variably displayed by reducing the processing load by reducing the frame rate (ie, reducing the frame rate from “60” to “30” or “15”). To cover the processing burden (for example, two simultaneous variable display of decorative designs at a frame rate of “30”, four simultaneous variable display of decorative symbols at a frame rate of “15”, etc.) Can do.

  (2) In addition, for example, in the production mode (reach omission mode) in which the reach production is omitted, such as a big hit when a specific character appears, the frame rate change flag is set to the on state. Thus, the frame rate of the variable display of the decorative design may be reduced. In this case, for example, as shown in FIG. 55 (B), the area in which the decorative display of the image display device 9 is variably reduced is reduced, and an effect that characters appear sequentially at a predetermined timing is performed. That's fine. According to this, the player comes to pay attention to the characters that appear sequentially, and the degree of attention to the variable display of the decorative symbols decreases. Therefore, since the control is performed at a low frame rate when the player's attention to the variable display is small, the processing burden is reduced, and the processing burden due to execution of other effects can be covered. Further, at the start of the game, the player may select whether to play the game in the reach skip mode or to play the game in the normal mode (a mode in which the reach effect is executed). Further, in the above embodiment, an example in which the frame rate of the variable display of decorative symbols is reduced during the execution period of the notice effect or the reach effect other than “normal reach” is an example. The frame rate of the variable display of decorative symbols may be reduced only during the reach period of “reach”.

  (3) In the embodiment described above, the frame images a1 to a30 constituting the moving image A and the frame images b1 to b33 constituting the moving image B are sequentially synthesized one by one, or the moving image A is constituted. Although the case where the frame images a1 to a60 to be synthesized and the frame images b1 to b66 constituting the moving image B are sequentially synthesized one by one is shown, this is an example. For example, the frame images a1 to a60 constituting the moving image A and the frame images b1 to b33 constituting the moving image B may be sequentially synthesized one by one. In this case, 60 × 33 = 1980 frames of different images are obtained. That is, since it takes 33 seconds to play back at 1000/60 ms, it is possible to play back a 33-second moving image using the moving image A data and the moving image B data.

  (4) Further, in the above embodiment, the decorative display on the image display device 9 is variably displayed on the pachinko gaming machine that shoots a game ball as a game medium to the game area and variably displays the special design or the decorative design. It has been described that a configuration for reducing the frame rate of variable display of decorative symbols is provided when the area to be displayed is reduced. However, the present invention is not limited to this, and the configuration and functions that are the features of the present invention can be applied to other gaming machines such as a slot machine.

  FIG. 59 is a front view of the slot machine 1000, and the slot machine 1000 includes a front door 1b and a housing 1a. As shown in FIG. 1, the slot machine 1000 is configured such that a cylindrical left reel 1002L, a middle reel 1002C, and a right reel 1002R can be visually recognized from a front door 1000b through a see-through window 1003. Around the see-through window 1003 arranged in the center of the panel 1001c, a medal insertion unit 1004 for inserting medals, a MAXBET switch 1006 for setting the maximum bet number, a start switch 1007 for starting a game, and each reel are stopped. A left stop switch 1008L, a middle stop switch 1008C, a right stop switch 1008R, and a game display unit 1013 for displaying information related to the game.

  In addition, the slot machine 1000 includes a liquid crystal display 1051 at the upper part of the front door 1000b, and the speakers 1053 and 1054, the medal payout opening 1011 at the lower part, and the title (model name) of the slot machine 1000, a dividend table, and the like are printed. A lower panel 1001d. Note that the payout table is a table showing a combination of a combination of a combination to be described later and the number of medals paid out according to the combination, and may be printed on the reel panel 1001c or the like and displayed on the liquid crystal display 1051 in a standby state. May be.

  When a player starts a game on the slot machine 1000, generally, a predetermined number of medals (usually three or more) are inserted into the medal insertion unit 1004 or a predetermined bet is operated by operating the MAXBET switch 1006. Set the number (usually the maximum 3 bets). When the bet amount is set, the start switch 1007 is activated, and the slot machine 1000 is ready to start a game. When the player operates the start switch 1007 in a state where the game can be started, each reel (left reel 1002L, middle reel 1002C, right reel 1002R) starts to rotate. In this state, the player operates one of the stop switches 1008L, 1008C, 1008R to stop the rotation of each reel, and the display result is derived and displayed through the fluoroscopic window 1003.

  When the rotation of each reel stops, the game ends, and when a combination of symbols corresponding to a predetermined combination is derived (equipped) as a display result, a winning corresponding to the combination occurs. When the number of medals paid out in accordance with the winning is stored, the medal that exceeds the maximum value is paid out from the medal payout exit 1011 when the medal payout number exceeds the maximum value (usually 50). When a winning combination with a game state transition occurs, the gaming state transitions according to the combination. If no winning combination has occurred, the player operates the MAXBET switch 1006 again or inserts a medal into the medal insertion unit 1004 again to start the next game.

  If the memorized medal number remains when the player finishes the game, the memorized medal number is paid out from the medal payout opening 1011 by the player operating the settlement switch 1010.

  The game display unit 1013 includes a credit indicator 2011 for displaying credits, a game auxiliary indicator 2012 for displaying the number of medals paid out due to winning, an error code indicating the contents when an error occurs, and the like. 1BETLED 2014 for notifying that one bet number is set by lighting, 2BETLED 2015 for notifying that two bet numbers are set, and 3Betling number are set by lighting A 3BET LED 2016 to notify, an insertion request LED 2017 to notify that a medal can be inserted is lit, a start valid LED 2018 to notify that the game start operation by the operation of the start switch 1007 is effective, and a wait state Waiting LED 201 to notify that it is When a replay in LED2020 for notifying is provided by lighting the effect that during replay game, which will be described later. Note that the wait state is a state in which a certain period of time has not elapsed since the start of the previous game, and the reels are thus waiting to start rotating, and in this embodiment is approximately 4.1 seconds.

  Further, “credit” means the number of medals obtained by subtracting the number of bets from the number of medals stored (inserted) in the slot machine 1000. In the present embodiment, when a medal is inserted in a state where the bet number is not set, the automatically inserted medal number is set as the bet number.

  For example, when a player inserts one medal into the medal insertion unit 1004 in a state where no medal is inserted, the bet number is set to 1 and the 1BETLED 2014 is lit. Next, when the player inserts one medal into the medal insertion unit 1004, the bet number is set to 2 and the 2BETLED 2015 is lit. Furthermore, when the player inserts one medal into the medal insertion unit 1004, the maximum bet number is set to 3, and the 3BETLED 2016 and the start valid LED 2018 are lit. In this state, the number of medals inserted into the slot machine 1000 is three, but since all three are set as the number of bets, “0” is displayed on the credit indicator 2011. When the player further inserts one medal into the medal insertion unit 1004 in this state, since the maximum bet number is 3, “1” is displayed on the credit display 2011 as a credit. In the present embodiment, the upper limit of credits is 50 (sheets).

  As shown in FIG. 60, the slot machine 1000 includes a movable display device 1002 therein. The movable display device 1002 includes the reels 1002L, 1002C, and 1002R described above, and reel motors 1032L, 1032C, and 1032R corresponding to the reels 1002L, 1002C, and 1002R. These reel motors 1032L, 1032C, and 1032R rotate the reels 1002L, 1002C, and 1002R, so that a plurality of types of symbols are continuously displayed through the see-through window 1003.

  In addition, the movable display device 1002 is provided with a reel LED 1055 described later, and the reel LED 1055 can irradiate each symbol of the reels 1002L, 1002C, and 1002R independently, thereby improving the visibility of the reels. can do.

  The slot machine 1000 includes an external output board 1111 and outputs a signal from the external output board 1111 to an external device.

  A plurality of types of symbols are arranged on each reel (left reel 1002L, middle reel 1002C, right reel 1002R). That is, 3 × 3 symbols can be visually recognized. Note that the number of symbols that can be visually recognized is not limited to this, and it is sufficient that at least one symbol can be visually recognized on each reel.

  On the outer periphery of each reel 1002L, 1002C, 1002R, “Black 7”, “Net 7”, “White 7”, “White BAR”, “Black BAR”, “Replay”, “Bell”, “Orange”, A total of 21 patterns, such as “watermelon” and “cherry”, which are distinguishable from each other are drawn in a predetermined order.

  Specifically, as shown in FIG. 60, the slot machine 1000 includes a game control board 1040 for controlling the game state, an effect control board 1090 for controlling the effect according to the game state, and a power source for generating electric power for driving electrical components. And a substrate 1105.

  The power supply board 105 is supplied with AC100V power from the outside, and generates DC voltages necessary for driving various electrical components constituting the slot machine 1000 from the AC100V power supply. The generated DC voltage is supplied to the game control board 40 and is also supplied to the effect control board 90 via the game control board 40.

  A command transmission line for transmitting a command from the main control unit 1041 to the sub control unit 1092 and a power supply line for supplying power from the game control board 1040 to the effect control board 1090 include a single cable and connector. Connected through. The units on the side of the effect control board 1090 are operable when all the connectors that connect the command transmission line and the power supply line and each board are connected, and the command transmission line is connected to the effect control board 1090. If it is not in a state, power is not supplied and operation is not possible. That is, the effect control board 1090 can be operated only after both command transmission and the power supply line are connected.

  Further, since the game control board 1040 executes a process related to the game, it is preferable that the game control board 1040 has a configuration inaccessible from the outside for security. Therefore, the game control board 1040 and the effect control board 1090 are unidirectional communication, and communication from the game control board 1040 to the effect control board 1090 is allowed, but communication from the effect control board 1090 to the game control board 1040 is allowed. Is not allowed.

  The power board 1105 is connected to the hopper motor 1034b, the payout sensor 1034c, the setting key switch 1037, the full sensor 1035a, the reset / setting switch 1038, and the power switch 1039.

  The game control board 1040 includes a MAXBET switch 1006, a start switch 1007, stop switches 1008L, 1008C, and 1008R, a settlement switch 1010, a reset switch 1023, a door opening detection switch 1025, a stop switch 1036a, an automatic The settlement switch 1036b is connected to each of the reel sensors 1033L, 1033C, and 1033R, and detection signals from these connected switches are input. Also, the game control board 1040 is connected to a payout sensor 1034c, a full sensor 1035a, a setting key switch 1037, and a reset / setting switch 1038 via a power supply board 1105, and these are connected. A detection signal such as a switch is also input.

  The game control board 1040 includes a credit indicator 2011, a game auxiliary indicator 2012, 1 to 3 BET LEDs 2014 to 2016, an insertion request LED 2017, a start valid LED 2018, a waiting LED 2019, a replaying LED 2020, and a BET. A switch valid LED 1021, left, middle, and right stop valid LEDs 1022L, 1022C, 1022R, a set value display 1024, a flow path switching solenoid 1030, and reel motors 1032L, 1032C, 1032R are connected and connected. The electrical components are driven based on the control of the main control unit 1041 described later. Further, a hopper motor 1034b is connected to the game control board 1040 via a power supply board 1105, and this electric component is also driven based on the control of the main control unit 1041 described later.

  The reset switch 1023 cancels the error state or the stop state by a predetermined key operation, and the set value display 1024 displays the set value at that time while changing the set value or confirming the set value. The switch 1036a selects enabling / disabling of the stop function for controlling the stop state (a state in which the progress of the game is restricted until a reset operation is performed), and the automatic checkout switch 1036b is an automatic checkout process at the end of the big bonus state ( The automatic switching function is controlled to be enabled / disabled to control the medal stored as credit regardless of the player's operation), and the flow path switching solenoid 1030 selects the flow of medals inserted from the medal insertion unit 1004. The road is selectively set to either a hopper tank 1034a side or a medal payout exit 1011 side, which will be described later, provided inside the housing 1000a. Switching, door opening detection switch 1025 detects an open state of the front door 1000b. Each of the above-described parts is provided inside the front door 1000b.

  In addition, an external output board 1111 is connected to the game control board 1040, and the game control board 1040 outputs a signal related to a game to an external device via the external output board 1111.

  The technique control board 1040 includes a main control unit 1041, a random number generation circuit 1042, a sampling circuit 1043, a switch detection circuit 1044, a motor drive circuit 1045, a solenoid drive circuit 1046, an LED drive circuit 1047, and a power interruption detection. A circuit 1048 and a reset circuit 1049 are provided.

  The main control unit 1041 includes, for example, a CPU 1041a, a RAM 1041b, a ROM 1041c, and an I / O 1041d. The ROM 1041c stores a control program. The RAM 1041b reads this control program, and the CPU 1041a executes various processes related to the progress of the game according to the control program, and controls each circuit mounted on the game control board 1040.

  The RAM 1041b stores data such as a winning flag indicating the winning combination and a gaming state flag indicating the current gaming state as the game progresses. Whether or not a winning combination occurs is determined by a lottery of the main control unit 1041 at the start of the game. This lottery is executed based on the game state flag, and the result of the lottery is stored as a winning flag. .

  The game state flag stored in the RAM 1041b is set to a value corresponding to a plurality of types of game states. In the present embodiment, the slot machine 1000 is controlled to a plurality of types of gaming states including a normal gaming state, RT (replay time) 1 to 4 states, an internal medium state, and a bonus state. The normal gaming state is a normal gaming state in which a special combination is not won and a medal payout rate is relatively low. The RT1-4 state is a gaming state in which the winning probability of the re-gamer is different from that in the normal gaming state. The internal state is the gaming state in the game from winning the special role until the special role is won. Here, since the special role has already been won, the role that the special role can win is excluded from the lottery. Is done. The bonus state is a special gaming state that shifts with the occurrence of a special combination winning, and is a gaming state in which the medal payout rate becomes very high due to a significant increase in the probability of a small combination with a medal payout.

  The number generation circuit 1042 is configured by a counter that counts up and updates a value each time a pulse is generated. The sampling circuit 1043 acquires the numerical value counted by the random number generation circuit 1042 and outputs the acquired numerical value to the main control unit 1041. The random number generation circuit 1042 is set for each type of random number used for the progress of the game, and a range of numerical values to be counted for each type of random number is determined. The sampling circuit 1043 acquires the numerical value indicated by the random number generation circuit 1042 as a random number in accordance with an instruction from the CPU 1041a.

  The switch detection circuit 1044 receives detection signals input from various switches connected to the game control board 1040 and outputs the received detection signals to the main control unit 1041. The motor drive circuit 1045 controls various motors such as reel motors 1032L, 1032C, and 1032R based on the motor drive signal output from the main control unit 1041. The solenoid drive circuit 1046 controls the flow path switching solenoid 1030 based on the solenoid drive signal output from the main control unit 1041. The LED drive circuit 1047 controls various LEDs and displays connected to the game control board 1040 based on the LED drive signal output from the main control unit 1041.

  The power interruption detection circuit 1048 monitors the power supply voltage supplied to the slot machine 1000, and outputs a voltage drop signal indicating the detection of the voltage drop to the main control unit 1041 when the voltage drop is detected. The reset circuit 1049 outputs a system reset signal to the main control unit 1041 when the power is unstable, such as when the power is turned on or when the power is turned off. The reset circuit 1049 includes a watchdog timer therein. When the watchdog timer expires, that is, when the operation of the main control unit 1041 stops for a certain time, a reset signal is sent to the main control unit 1041. Output.

  Note that backup power is supplied to the main control unit 1041, and the RAM 1041b can back up stored data. That is, for example, when power supply to the slot machine 1000 is stopped, such as during a power failure, the RAM 1041b can store the stored data for a predetermined period. In addition, the RAM 1041b performs diagnosis processing at the time of activation to determine whether it is normal, and various areas are initialized according to the progress of the game. Note that the area required for continuing the program is not initialized. For this reason, for example, even when a power failure occurs unexpectedly while the game is in progress, the remaining number of credits or the gaming state can be restored to the state before the power failure.

  Further, it is possible to cause the CPU 1041a to execute a ROM read prevention function and a bus output mask function by a control program. The ROM read prevention function is a function capable of prohibiting or permitting the reading operation of the storage data of the ROM 1041c. When the reading operation of the storage data of the ROM 1041c is prohibited, the CPU 1041a cannot read the storage data of the ROM 1041c. The bus output mask function prohibits reading of the stored data in the ROM 1041c from the external device or the like by masking the output of the I / O 1041d when the external device or the like requests reading of the stored data in the ROM 1041c. It is a function. By executing these functions, security can be improved.

  The main control unit 1041 receives detection signals from various switches connected to the game control board 1040, and executes basic processing according to the received detection signals. Further, the main control unit 1041 can execute the interrupt process by interrupting the basic process when an interrupt occurs. In the present embodiment, the main control unit 1041 includes a timer therein, and timer interruption processing (main) is caused by the expiration of the timer, that is, a certain time (about 0.56 ms in the present embodiment) has elapsed. Execute.

  The main control unit 1041 is set so that other interrupts are prohibited during the execution of the above-described interrupt processing, and when a plurality of interrupts are generated, the interrupt processing is executed according to a preset order. To do. If another interrupt factor occurs during the execution of the interrupt process and the interrupt factor continues even after the ongoing interrupt process ends, the interrupt process being executed is A new interrupt will occur at the end.

  The effect control board 1090 is connected with a liquid crystal display 1051, effect effect LED 1052, speakers 1053 and 1054, an effect switch 1056, and a reel LED 1055. These effect devices are a sub-control unit 1092 described later. It is driven by the control.

  The sub-control unit 1092 included in the effect control board 1090 controls the output of the effect devices such as the liquid crystal display 1051, the effect effect LED 1052, the speakers 1053 and 1054, and the reel LED 1055. The sub-control unit 1092 Alternatively, an output control unit that directly controls the output of the effect device may be mounted on the effect control board 1090 or another board. When this configuration is adopted, sub-control unit 1092 obtains the output pattern of the rendering device based on a command from main control unit 1041, and the output control unit performs output control of the rendering device based on the output pattern. By doing in this way, it becomes possible to perform output control of the rendering device by both the sub-control unit 1092 and the output control unit.

  The slot machine 1000 is configured to include the above-described liquid crystal display 1051, effect effect LED 1052, speakers 1053 and 1054, and effect switch 1056 as effect devices, but is not limited to this, and other effect devices can also be employed. Also, it is not always necessary to include the above-described effect device. That is, each of the above-described effect devices is a device that is generally provided for improving the game performance, and does not affect the operation of the slot machine 1000. For this reason, it is possible to employ various effect devices such as a so-called role item that is mechanically driven, a pseudo reel, and a liquid crystal display capable of stereoscopic display. However, since the slot machine 1000 can control the effect state during the assist time (hereinafter referred to as AT), which is a notification period in which the navigation effect can be executed, the slot machine 1000 includes at least an effect device capable of executing the above-mentioned navigation effect. Need to be.

  The effect control board 1090 includes a sub control unit 1092, a display control circuit 1092, an LED drive circuit 1093, an audio output circuit 1094, a reset circuit 1095, a switch detection circuit 1096, a clock device 1097, and a power interruption detection circuit. 1098.

  Similar to the main control unit 1041, the sub control unit 1092 includes, for example, a CPU 1091a, a RAM 1091b, a ROM 1091c, and an I / O 1091d. Similar to the CPU 1041a of the main control unit 1041, the CPU 1091a executes various processes according to the control program. The sub-control unit 1092 receives a command output from the game control board 1040, and executes various controls for performing effects such as control of various circuits based on the received signal.

  The display control circuit 1092 performs display control of the liquid crystal display 1051 based on the display control signal output from the sub control unit 1092. The LED drive circuit 1093 performs drive control of the effect effect LED 1052, the reel LED 1055, and the like based on the LED drive signal output from the sub-control unit 1092. The audio output circuit 1094 performs audio output control of the speakers 1053 and 1054 based on the audio output signal output from the sub-control unit 1092.

  The reset circuit 1095 outputs a reset signal to the sub-control unit 1092 when the power is turned off or when an initialization command is not input for a certain time. The switch detection circuit 1096 receives a detection signal input from, for example, the switch of the effect switch 1056 connected to the effect control board 1090, and outputs the received detection signal to the sub-control unit 1092. The clock device 1097 outputs time information including date information and time information to the sub-control unit 1092. The power interruption detection circuit 1098 monitors the power supply voltage supplied to the slot machine 1000, and outputs a voltage drop signal indicating the detection of the voltage drop to the sub-control unit 1092 when detecting a voltage drop.

  Further, the sub control unit 1092 has an interrupt function similar to the main control unit 1041, and generates an interrupt when receiving a command from the main control unit 1041, and receives a command output from the main control unit 1041. Command reception interrupt processing to be stored in the buffer. Also, unlike the main control unit 1041, the sub control unit 1092 is not set to prohibit other interrupts even during execution of the interrupt process, and executes the command reception interrupt process with the highest priority. Is set. In other words, when an interrupt based on command reception occurs, the sub control unit 1092 interrupts the timer interrupt process (sub) even if the timer interrupt process (sub) is being executed, and receives the command reception interrupt process. Even if interrupts that trigger the timer interrupt process (sub) occur at the same time, the command reception interrupt process is executed with the highest priority.

  The sub-control unit 1092 can control the gaming state to the AT state. When the sub-control unit 1092 shifts to the AT state and wins the push order, it notifies the correct push order. The sub-control unit 1092 informs the player of the correct push order by executing the effect via the liquid crystal display 1051, but is not limited thereto, and may notify by voice or the like via the speakers 1053 and 1054. The left middle right stop valid LEDs 1022L, 1022C, and 1022R may be notified by lighting control.

  Here, in a gaming state that is not in the AT state, the player cannot determine the winning combination or the correct pressing order, and therefore it is difficult to shift the gaming state by the pressing order operation corresponding to the winning combination. However, when the state shifts to the AT state, the sub-control unit 1092 notifies the correct push order (executes the navigation effect) in response to any of the push order promotion replays 1 to 6 being won, so the player is promoted. The replay can be won and the game can be shifted to the RT3 state, and the sub-control unit 1092 notifies the correct push order in response to any of the push order maintenance replays 1 to 5 winning in the RT3 state. The player can win the promotion replay and maintain the gaming state in the RT3 state, and in the RT3 state, the sub-control unit 1092 changes the push order of the correct answer in response to any of the push order entry replays 1 to 4 being won. In order to notify, the player can make a rush replay and shift to the RT4 state. On the liquid crystal display 1051, a variable display of a plurality of types of symbols as identification information is performed in synchronization with the rotation of the reel.

  The sub-control unit 1092 performs the AT lottery process in response to the winning of the specific combination, and controls the AT state when the AT lottery process is won. When the AT lottery process is won, the right to shift to the predetermined game number AT state is given, and the frame rate change flag is set to the on state. The number of games won is started due to the entry replay winning, and the AT state ends when the number of games won after the entry replay is won. The frame rate change flag may be cleared in response to the end of the AT state. In the game controlled to the AT state, the sub-control unit 1092 executes the AT addition lottery process when a specific combination or a preset combination is won again, and if the lottery is won, the sub-control unit 1092 controls to the AT state. A privilege may be given to the player, such as an increase in the number, an AT stock (right to control to the AT state), or the like. When controlled to the AT state, the player's attention is gathered in the navigation effect to be executed, and the player's attention to the variable display of plural kinds of symbols as identification information displayed in synchronization with the rotation of the reel is lowered. To do. Therefore, the frame rate of variable display of a plurality of types of symbols as identification information displayed in synchronization with the rotation of the reel during the period controlled in the AT state is greater than the frame rate during the period not controlled in the AT state. Is also reduced and displayed on the liquid crystal display 1051. According to this, when the player's attention level is low and the smoothness of the variable display is not required, the variable display frame rate is controlled to be low, so that the processing burden can be reduced. During the period controlled by the AT state, the variable display display area of a plurality of types of symbols as identification information displayed in synchronization with the rotation of the reel in the liquid crystal display 1051 is reduced. For example, as shown in FIG. 56, the frame rate may be repeated by drawing and displaying symbols using two frame buffers as in the case of a pachinko machine. In the example shown in FIG. 56, the case where super reach is executed is shown, but this super reach period may be replaced with a period controlled to the AT state.

In addition, the sub-control unit 1092 executes a reach effect similar to that of the pachinko machine on the liquid crystal display 1051 in the internal state after the internal winning of the bonus, and the special symbol (stop symbol) at the time of stoppage is a big hit symbol (specific (Display result), an effect of notifying that the bonus is internally won may be executed. In this case, as in the case of a pachinko machine, a super-reach reach effect may be executed. As shown in FIG. 56, the frame rate of the variable display of the decorative pattern during the super-reach period is set as the decoration during the non-super-reach period. It may be lower than the frame rate of the variable display of symbols.
In other words, regardless of whether or not the jackpot symbol has been derived, it is controlled to the bonus state until it has been controlled to the internal medium state and is advantageous to the player, or even if the jackpot symbol has been derived until winning a specific combination. Even if it is not advantageous for the player, the configuration for changing the frame rate of the present invention may be applied.

Therefore, in the gaming machine according to the present invention,
In a game in which a right that is advantageous to the player (for example, a bonus) is granted, a carry-over means for carrying over the right after the next game if a predetermined condition is not satisfied (for example, a winning of a specific role occurs) When a right (such as a main control unit 1041 that controls a gaming state to an internal state) carries over the right, variable display means (for example, a liquid crystal display) that can variably display a plurality of types of identification information that can identify each of them. 1051), when a specific display result predetermined as a display result (for example, a definite special symbol that becomes a jackpot symbol or a special role) is derived, the fact that the right is granted is notified (for example, A slot machine (such as a slot machine 1000)
Display control means for controlling variable display of the identification information at a first frame rate (for example, “60”) and a second frame rate (for example, “30”) lower than the first frame rate (for example, step) A sub-control unit 1092 that executes the process of S803), and
The display control means controls at the first frame rate when performing variable display of the identification information in a predetermined display area, and variably displays the identification information in a display area smaller than the predetermined display area. Is controlled at the second frame rate (for example, when it is determined to execute the notice effect, the frame rate change flag is set in the process of step S824, and the frame rate is set to "30" in step S844A). Set or set the frame rate change flag and set the frame rate to “30” when winning the AT lottery process),
A slot machine characterized by that.
Is also included.

For this reason, in the above slot machine,
The display control means changes the display area of the variable display to the small display area in order to execute a possibility effect that asks the player whether or not the specific display result is derived in the predetermined display area. When the transition is made, control is performed at the second frame rate (for example, the frame rate change flag is set to the on state and the frame rate is set to “30” at the timing when the reach effect of super reach is started). ,
Or
The display control means performs control at the second frame rate when the predetermined display area is divided and each of the divided display areas is used as the small display area and the variable display is performed in each display area ( In response to receiving a variation pattern command indicating a division variation pattern, the frame rate change flag is set to an ON state)
Or
The display control means is configured to display the second mode in a special mode gaming state in which the possibility of telling the player whether or not the specific display result is derived by a variable display mode is less likely to be executed than in the normal mode. (For example, the frame rate change flag is set to the on state during the time reduction state, and the frame rate change flag is cleared when the time reduction state ends.)
You may do it.

  (5) In the above embodiment, in order to notify the effect control microcomputer 100 of the change pattern indicating the change mode such as the change time and the type of reach effect, one change pattern command is given when the change is started. Although an example of transmission is shown, the variation pattern may be notified to the effect control microcomputer 100 by two or more commands. Specifically, in the case of notification by two commands, the game control microcomputer 560 changes the fluctuation time and fluctuations before reaching the first command (before reaching the second stop if not reaching). A command indicating the mode is sent, and the second command shows the type of reach and the presence / absence of a redrawing effect, etc., after the time of reaching (after the so-called second stop if not reaching) May be transmitted. In this case, the effect control microcomputer 100 may perform effect control in variable display based on the variable time derived from the combination of two commands. The game control microcomputer 560 notifies the change time by each of the two commands, and the effect control microcomputer 100 selects a specific change mode executed at each timing. It may be. When sending two commands, the two commands may be sent within the same timer interrupt. After sending the first command, a certain period of time elapses (for example, the next timer interrupt). You may make it transmit the 2nd command. Note that the variation mode indicated by each command is not limited to this example, and the order of transmission can be changed as appropriate. By notifying the variation pattern by two or more commands in this way, the amount of data that must be stored as the variation pattern command can be reduced.

  (6) In addition, the device configuration and data configuration of the gaming machine, the processing shown in the flowchart, the image display operation in the image display device, the sound output operation in the speaker, and the lighting in the game effect lamp, the decoration segment lamp, and the decoration LED Various production operations including the operation can be arbitrarily changed and modified without departing from the gist of the present invention. In addition, the gaming machine of the present invention is not limited to a payout type gaming machine that pays out a predetermined number of gaming media as prizes based on the occurrence of winnings, and is scored based on the occurrence of winnings by enclosing gaming media It can also be applied to an enclosed game machine that gives The slot machine 1000 is not limited to those in which bets are set using medals and credits as game values, but slot machines that set bets using game balls as game values and credits as game values. It may be a fully credit type slot machine that uses only the bet number to set the bet amount. When using game balls as game media, for example, one medal can correspond to five game balls, and when 3 is set as the bet number in the above embodiment, 15 game balls are used. Equivalent to setting the number of bets. The pachinko gaming machine and the slot machine 1000 are not limited to those using only one of a plurality of types of game values such as medals and game balls, but for example, a plurality of types of medals and game balls. The game value may be used together. For example, the slot machine 1000 can play a game by setting the number of bets using any one of a plurality of types of game values such as medals and game balls, and the medals and game balls etc. Any of a plurality of types of gaming value may be paid out.

  (7) A program and data for realizing the present invention are distributed and provided by a removable recording medium to a computer device included in a gaming machine such as a pachinko gaming machine or a slot machine 1000, for example. The present invention is not limited, and a form distributed by preinstalling in a storage device such as a computer device may be adopted. Furthermore, the program and data for realizing the present invention are distributed by downloading from other devices on a network connected via a communication line or the like by providing a communication processing unit. It doesn't matter.

  The game execution mode is not only executed by attaching a detachable recording medium, but can also be executed by temporarily storing the program and data downloaded via a communication line or the like in an internal memory or the like. It is also possible to execute directly using hardware resources on the other device side on a network connected via a communication line or the like. Furthermore, the game can be executed by exchanging data with other computer devices or the like via a network.

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8 Special symbol display 9 Image display 14 Start prize opening 31 Game control board (main board)
56 CPU
83 CGROM
80 Production control board 91 Drawing circuit 95 Decoder 96A VRAMRS
96B VRAMFB
96C VRAMFB
100 effect control microcomputer 101 effect control CPU
109 Drawing processor 560 Microcomputer for game control 1000 Slot machine 1002 Movable display device 1002L, 1002C, 1002R Reel 1003 Viewing window 1032L, 1032C, 1032R Reel motor 1004 Medals insertion section 1051 Liquid crystal display 1052 Effect effect LED
1053, 1054 Speaker 1055 Reel LED
1057 Production Switch 1006 MAXBET Switch 1007 Start Switch 1008L, 1008C, 1008R Stop Switch 1011 Medal Payout 1010 Checkout Switch 1013 Game Display Unit 1034 Hopper Unit 1035 Overflow Tank 1037 Setting Key Switch 1038 Reset / Setting Switch 1039 Power Switch 1040 Game Control Base 1041 Main control unit 1090 Production control base 1092 Sub control unit 1105 Power supply board 1111 External output board

Claims (1)

When a display result other than the specific display result is derived when a predetermined specific display result is derived as a display result in variable display means capable of variably displaying a plurality of types of identification information that can identify each A gaming machine that is more advantageous to the player than
Display control means for controlling variable display of the identification information at a first frame rate and a second frame rate lower than the first frame rate;
The display control means controls at the first frame rate when performing variable display of the identification information in a predetermined display area, and variably displays the identification information in a display area smaller than the predetermined display area. Control at the second frame rate when performing
A gaming machine characterized by that.

Images