JP4932904B2 - インタープリトおよびトランスレートされたインストラクションの両方に関わるエミュレーションにおけるクロック管理の問題を解決するための方法と装置 - Google Patents

インタープリトおよびトランスレートされたインストラクションの両方に関わるエミュレーションにおけるクロック管理の問題を解決するための方法と装置 Download PDF

Info

Publication number
JP4932904B2
JP4932904B2 JP2009509939A JP2009509939A JP4932904B2 JP 4932904 B2 JP4932904 B2 JP 4932904B2 JP 2009509939 A JP2009509939 A JP 2009509939A JP 2009509939 A JP2009509939 A JP 2009509939A JP 4932904 B2 JP4932904 B2 JP 4932904B2
Authority
JP
Japan
Prior art keywords
clock
translated
instruction
interpreted
execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2009509939A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009535746A (ja
Inventor
サーゲイソン スチュアート
スバ ミウラ ビクター
ワトソン ブライアン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Interactive Entertainment Inc
Original Assignee
Sony Interactive Entertainment Inc
Sony Computer Entertainment Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/700,448 external-priority patent/US7577826B2/en
Priority claimed from US11/696,691 external-priority patent/US7813909B2/en
Priority claimed from US11/696,684 external-priority patent/US7792666B2/en
Priority claimed from US11/696,699 external-priority patent/US7770050B2/en
Application filed by Sony Interactive Entertainment Inc, Sony Computer Entertainment Inc filed Critical Sony Interactive Entertainment Inc
Publication of JP2009535746A publication Critical patent/JP2009535746A/ja
Application granted granted Critical
Publication of JP4932904B2 publication Critical patent/JP4932904B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/441—Register allocation; Assignment of physical memory space to logical memory space

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Devices For Executing Special Programs (AREA)
JP2009509939A 2006-05-03 2007-04-20 インタープリトおよびトランスレートされたインストラクションの両方に関わるエミュレーションにおけるクロック管理の問題を解決するための方法と装置 Active JP4932904B2 (ja)

Applications Claiming Priority (21)

Application Number Priority Date Filing Date Title
US79776106P 2006-05-03 2006-05-03
US74626806P 2006-05-03 2006-05-03
US74626706P 2006-05-03 2006-05-03
US79776206P 2006-05-03 2006-05-03
US79743506P 2006-05-03 2006-05-03
US74627306P 2006-05-03 2006-05-03
US60/746,268 2006-05-03
US60/797,762 2006-05-03
US60/797,435 2006-05-03
US60/746,267 2006-05-03
US60/746,273 2006-05-03
US60/797,761 2006-05-03
US11/700,448 2007-01-30
US11/700,448 US7577826B2 (en) 2006-01-30 2007-01-30 Stall prediction thread management
US11/696,699 2007-04-04
US11/696,684 2007-04-04
US11/696,691 US7813909B2 (en) 2006-05-03 2007-04-04 Register mapping in emulation of a target system on a host system
US11/696,684 US7792666B2 (en) 2006-05-03 2007-04-04 Translation block invalidation prehints in emulation of a target system on a host system
US11/696,699 US7770050B2 (en) 2006-05-03 2007-04-04 Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code
US11/696,691 2007-04-04
PCT/US2007/067146 WO2007130807A2 (en) 2006-05-03 2007-04-20 Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code

Publications (2)

Publication Number Publication Date
JP2009535746A JP2009535746A (ja) 2009-10-01
JP4932904B2 true JP4932904B2 (ja) 2012-05-16

Family

ID=38668435

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2009509939A Active JP4932904B2 (ja) 2006-05-03 2007-04-20 インタープリトおよびトランスレートされたインストラクションの両方に関わるエミュレーションにおけるクロック管理の問題を解決するための方法と装置
JP2009509938A Active JP5048056B2 (ja) 2006-05-03 2007-04-20 ホストシステム上でターゲットシステムをエミュレーションする際のレジスタマッピング

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2009509938A Active JP5048056B2 (ja) 2006-05-03 2007-04-20 ホストシステム上でターゲットシステムをエミュレーションする際のレジスタマッピング

Country Status (3)

Country Link
EP (3) EP2426603B1 (enExample)
JP (2) JP4932904B2 (enExample)
WO (3) WO2007130805A2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013171556A (ja) * 2012-02-23 2013-09-02 Hitachi Ltd プログラム解析システム及び方法
US12017140B2 (en) * 2021-06-07 2024-06-25 Sony Interactive Entertainment LLC Systems and methods for emulation of graphical and audio parameters during a play of a legacy game

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59501684A (ja) * 1982-10-22 1984-10-04 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン 目的命令ストリ−ムへ殆んど実時間で插入するためのソ−スおよび目的命令ストリ−ムの外部における加速式命令写像
US5313614A (en) * 1988-12-06 1994-05-17 At&T Bell Laboratories Method and apparatus for direct conversion of programs in object code form between different hardware architecture computer systems
US5507030A (en) * 1991-03-07 1996-04-09 Digitial Equipment Corporation Successive translation, execution and interpretation of computer program having code at unknown locations due to execution transfer instructions having computed destination addresses
JPH07160537A (ja) * 1993-12-03 1995-06-23 Matsushita Electric Ind Co Ltd シミュレータ
US5852726A (en) * 1995-12-19 1998-12-22 Intel Corporation Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner
US5930158A (en) 1997-07-02 1999-07-27 Creative Technology, Ltd Processor with instruction set for audio effects
US6631514B1 (en) * 1998-01-06 2003-10-07 Hewlett-Packard Development, L.P. Emulation system that uses dynamic binary translation and permits the safe speculation of trapping operations
JP3147851B2 (ja) * 1998-03-27 2001-03-19 日本電気株式会社 シミュレーション方法、シミュレーション装置及びシミュレーションプログラムを記憶した記憶媒体
ES2340370T3 (es) * 1998-10-10 2010-06-02 International Business Machines Corporation Conversion de codigo de programa con traduccion reducida.
US6115054A (en) * 1998-12-29 2000-09-05 Connectix Corporation Graphics processor emulation system and method with adaptive frame skipping to maintain synchronization between emulation time and real time
US6529862B1 (en) * 1999-06-30 2003-03-04 Bull Hn Information Systems Inc. Method and apparatus for dynamic management of translated code blocks in dynamic object code translation
US6882968B1 (en) * 1999-10-25 2005-04-19 Sony Computer Entertainment Inc. Method of measuring performance of an emulator and for adjusting emulator operation in response thereto
US6986128B2 (en) * 2000-01-07 2006-01-10 Sony Computer Entertainment Inc. Multiple stage program recompiler and method
JP2001216177A (ja) * 2000-02-04 2001-08-10 Seiko Epson Corp シミュレーション装置およびシミュレーション方法ならびにシミュレーションプログラムを記憶した記憶媒体
JP4001722B2 (ja) * 2000-03-03 2007-10-31 株式会社ソニー・コンピュータエンタテインメント エンタテインメント装置及びコンピュータシステム
JP4547071B2 (ja) * 2000-03-30 2010-09-22 任天堂株式会社 ゲーム情報記憶媒体およびそれを用いたゲームシステム
JP2002049414A (ja) 2000-05-26 2002-02-15 Yutaka Electronics Industry Co Ltd 産業用機械の保全方法及び保全システム
JP3964142B2 (ja) * 2000-08-15 2007-08-22 株式会社ソニー・コンピュータエンタテインメント エミュレート装置及び部品、情報処理装置、エミュレーション方法、記録媒体、プログラム
US6672963B1 (en) * 2000-09-18 2004-01-06 Nintendo Co., Ltd. Software implementation of a handheld video game hardware platform
US6884171B2 (en) * 2000-09-18 2005-04-26 Nintendo Co., Ltd. Video game distribution network
JP2004318449A (ja) * 2003-04-16 2004-11-11 Hitachi Ltd プログラム実行速度シュミレーション方法
US20050015754A1 (en) * 2003-06-18 2005-01-20 Virtutech Ab Method and system for multimode simulator generation from an instruction set architecture specification
US7805710B2 (en) * 2003-07-15 2010-09-28 International Business Machines Corporation Shared code caching for program code conversion
WO2006033423A1 (en) * 2004-09-20 2006-03-30 Sony Computer Entertainment Inc. Methods and apparatus for emulating software applications

Also Published As

Publication number Publication date
EP2013723A2 (en) 2009-01-14
EP2013723B1 (en) 2019-06-12
EP2013680B1 (en) 2018-08-08
WO2007130806A8 (en) 2008-07-31
WO2007130805A3 (en) 2008-04-10
WO2007130807A3 (en) 2008-10-16
JP2009535746A (ja) 2009-10-01
EP2013680A4 (en) 2009-05-06
JP2009535745A (ja) 2009-10-01
EP2426603B1 (en) 2018-08-08
WO2007130806A2 (en) 2007-11-15
EP2426603A3 (en) 2012-08-29
EP2013723A4 (en) 2009-04-29
EP2013680A2 (en) 2009-01-14
WO2007130806A3 (en) 2008-03-27
WO2007130805A2 (en) 2007-11-15
EP2426603A2 (en) 2012-03-07
JP5048056B2 (ja) 2012-10-17
WO2007130807A2 (en) 2007-11-15

Similar Documents

Publication Publication Date Title
US8234514B2 (en) Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code
US7813909B2 (en) Register mapping in emulation of a target system on a host system
CN101887393B (zh) 基于半虚拟化技术的设备故障复现方法及系统
Ryzhyk et al. Automatic device driver synthesis with Termite
JP5345652B2 (ja) 部分仮想化マシンに基づく統一格納装置
US8352240B2 (en) Decoupling dynamic program analysis from execution across heterogeneous systems
TWI410864B (zh) 在一處理環境中控制指令執行
US8433555B2 (en) Processor emulation using fragment level translation
JP5186320B2 (ja) エミュレーション強化方法及び装置
US20140281695A1 (en) Processor hang detection and recovery
US20070261039A1 (en) Translation block invalidation prehints in emulation of a target system on a host system
JP4932904B2 (ja) インタープリトおよびトランスレートされたインストラクションの両方に関わるエミュレーションにおけるクロック管理の問題を解決するための方法と装置
US9424165B2 (en) Debugging processor hang situations using an external pin
US20240086220A1 (en) Delaying interrupts for virtual machines
CN101583926B (zh) 利用缓冲器便于指令执行的方法和系统
CN109408193A (zh) 虚拟机实现方法、装置及计算机设备

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20101126

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20110126

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120207

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120215

R150 Certificate of patent or registration of utility model

Ref document number: 4932904

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150224

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250