JP4923486B2 - Electronic device and method for manufacturing electronic device - Google Patents

Description

The present invention relates to an electronic device and its manufacturing how having integrated functional unit, in particular, relates to a suitable electronic device and the manufacturing methods from downsizing.

  An electronic device having an integrated function unit such as an integrated circuit is usually packaged. In addition to the basic requirements for packaging, there are no defects in appearance, the integrated function section is hermetically sealed to ensure stability against the atmosphere, etc. It is done. In recent years, with the reduction in size and weight of electronic devices and the like, in addition to these, a smaller package is required.

Examples of such packages are disclosed in the following patent documents. In the one disclosed in Patent Document 1, care must be taken not to cause defects such as chipping at the edge of a product or after that. The one disclosed in Patent Document 2 is considered not to be airtight only by the resin, and it is considered that the resin cannot flow on the integrated circuit side during the manufacturing and the shape controllability cannot be maintained. It is considered necessary. Moreover, since the thing disclosed by patent document 3 applies the cap for airtightness to each device, a reduction in cost may become a subject by an increase in a man-hour. Furthermore, a bonding wire sealing step is also required to improve reliability.
Japanese Patent Laid-Open No. 2002-246489 JP 2005-109221 A JP 2005-94728 A

The present invention has been made in consideration of the above circumstances, Oite the electronic device and its manufacturing how having integrated functional unit, compact, high reliability, the electronic device and its manufacturing side to realize cost reduction The purpose is to provide the law .

In order to solve the above-described problems, an electronic device according to the present invention includes a first surface and a second surface, and an integrated circuit portion and / or a micro electro mechanical system (MEMS) is provided on the first surface. a semiconductor chip which is a first substrate in which an integrated functional unit having an electro-mechanical system) is formed; and a sealing member provided at a position surrounding the integrated functional unit on the first surface of the first substrate; A gap between the second substrate provided opposite to the first substrate via the sealing member, and the first substrate and the second substrate, and at least in an outer region of the sealing member comprising a protection resin provided, wherein the sealing member is a material of the metal, said first substrate, said sealing member and the first substrate on the first surface of the first substrate characterized in that it have a metallization layer for connecting.

  That is, in this electronic device, the integrated functional unit on the first substrate is hermetically sealed by the sealing member that surrounds the integrated functional unit and the second substrate that faces the first substrate through the sealing member. The Further, a protective resin is provided outside the sealing member and in the gap between the first substrate and the second substrate.

  Therefore, since the gap between the first substrate and the second substrate can be filled with the protective resin in appearance, defects such as chipping of products are less likely to occur. In addition to the protective resin, a sealing member is present on the inside thereof, so that the airtightness of the integrated function part is maintained. Further, even if the first substrate and the second substrate are symmetrical in shape, for example, there is no limitation. Therefore, the first and second substrates of a large piece are bonded together and scribed to be separated into individual pieces. Is easy. The individual pieces require a small area for the protective resin and the sealing member, but most of them can be integrated functions. Therefore, a small size, high reliability, and cost reduction can be realized.

In the electronic device manufacturing method according to the present invention , a plurality of integrated function units having an integrated circuit unit and / or a microelectromechanical system are formed on the first surface, and surround each of the plurality of integrated function units. a step of bonding the second substrate through said sealing member is positioned closely sealing member of a metal material on the first substrate serving as a semiconductor wafer of the metallized layer on the metallized layer is formed as the first A step of filling and curing a protective resin in a space between the substrate and the second substrate, which is not the side where the integrated function part of the sealing member exists, and the first substrate and the second substrate And a step of separating the substrate attached to the substrate corresponding to each of the plurality of integrated function units.

  According to this manufacturing method, since the gap between the first substrate and the second substrate is filled with the protective resin in appearance, defects such as chipping of products are less likely to occur. Further, in addition to the protective resin, a structure in which a sealing member is present inside the protective resin can be provided, and good airtightness of the integrated function portion can be maintained. Furthermore, the first substrate and the second substrate may be symmetrical, for example, and can be easily separated into pieces. The individual pieces require a small area for the protective resin and the sealing member, but most of them can be integrated functions. Therefore, a small size, high reliability, and cost reduction can be realized.

According to the present invention, it is possible to provide a small, high reliability, the electronic device and its manufacturing how to realize cost reduction.

As an embodiment of the electronic device according to the present invention, the second substrate is a semiconductor substrate, and the second substrate is disposed on a surface of the second substrate facing the first substrate. a second metallization layer for connecting the sealing member can be a. This is a structure in which a semiconductor material is also used for the second substrate and the metallized layer formed thereon is connected to a sealing member. A strong connection between the metals can be obtained even on the second substrate side.

  As an embodiment, the second substrate may be a semiconductor substrate, a glass substrate, a ceramic substrate, or a metal substrate. These are general examples of materials for the second substrate.

  As an embodiment, the protective resin may be provided so as to cover the side surfaces of the first and second substrates. In such an embodiment, the interface between the main surface of the first and second substrates and the protective resin is not exposed to the outside world, so that the reliability is further improved.

  Further, as an embodiment, the first substrate is formed on the second surface of the first substrate so as to be electrically conductive to the conductive through via that penetrates the first substrate. And a terminal that serves as a signal input / output terminal of the integrated function unit through the through via. In this embodiment, input / output terminals are provided on the first substrate side.

  Further, as an embodiment, the semiconductor device further includes conductive bumps sandwiched in a gap between the first substrate and the second substrate, and the second substrate conducts through the second substrate. And a terminal provided on a surface of the second substrate opposite to the side facing the first substrate so as to be electrically connected to the through via, the terminal However, it may be a signal input / output terminal of the integrated function unit through the through via and the bump. In this embodiment, input / output terminals are provided on the second substrate side.

  Further, as an embodiment as a manufacturing method according to the present invention, the step of dividing into pieces is performed after the step of filling and curing the protective resin, and the step of filling and hardening the protective resin includes the first step. Or a through hole arranged in a row on the second substrate, which is a gap between the first substrate and the second substrate and is not on the side where the integrated function part of the sealing member exists It can be made through the through hole communicating with the space. In this method, the protective resin is filled through the through holes arranged in the first substrate or the second substrate before the separation. There is an advantage that the protective resin can be easily filled using the capillary phenomenon.

  Further, as an embodiment, the step of dividing into individual pieces is performed before the step of filling and curing the protective resin, and the step of filling and hardening the protective resin is performed by bonding the pieces into pieces. It is also possible to apply the protective resin to the laminated side surface formed by laminating a plurality of layers. After dividing into individual pieces, a plurality of these are stacked in a laminated manner, and a protective resin is applied to the side surface. It is suitable when it is difficult to make a through hole due to individual circumstances or substrate material.

Further, as an embodiment, the step of attaching the second substrate includes forming a second metallized layer on the second substrate and providing the sealing member on the second metallized layer, made by the action of the sealing member as a connecting layer for said metallization layer which had been formed on the first substrate can be a. According to this, the first and second substrates can be firmly connected using the sealing member as a metal material.

  As an embodiment, it is assumed that the step of bonding the second substrate is such that conductive bumps are sandwiched and fixed between the first substrate and the second substrate. be able to. This is one method for providing an electrical connection portion between the integrated function portion provided on the first substrate and the second substrate side when the input / output terminal is provided on the second substrate side.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic structural diagram showing the configuration of an electronic device according to an embodiment of the present invention. 1A is a cross-sectional view, and FIG. 1B is a cross-sectional view in the direction of the arrow at the position A-Aa shown in FIG.

  As shown in FIG. 1, the electronic device 10 includes a semiconductor chip 11 (first substrate), a cap wafer chip 12 (second substrate), a sealing member 14, a protective resin 15, and solder bumps 16 (input / output terminals). Have The semiconductor chip 11 includes an integrated circuit portion 11a (integrated function portion), a rewiring portion 11b, a through via 11c, a chip back surface wiring portion 11d, and a metallized layer 11e. A metallized layer 13 is formed on the cap wafer chip 12.

  The integrated circuit part 11a is a kind of integrated function part built on the semiconductor chip 11, and is located opposite to the sealing member 14 and the semiconductor chip 11 provided in a ring shape as a plan view as shown in the figure. It is located in a cavity formed by the cap wafer chip 12 and is protected in an airtight state.

  A rewiring portion 11b is drawn out from a pad (not shown) for inputting and outputting signals and the like formed in the integrated circuit portion 11a. The rewiring portion 11b is a conductive material provided through the semiconductor chip 11. The through vias 11c are electrically connected to each other. The through vias 11c are electrically connected to a chip back surface wiring portion 11d provided on the back surface of the semiconductor chip 11, and solder bumps 16 are attached to the chip back surface wiring portion 11d, respectively. The solder bumps 16 function as input / output terminals of the electronic device 10, respectively.

  As shown in the figure, the back surface of the region of the semiconductor chip 11 where the sealing member 14 and the protective resin 15 are provided can be used as the solder bump 16 mounting position. For example, in FIG. 1A, the width of the sealing member 14 is 100 μm, the width of the protective resin 15 is 50 μm, and the diameter of the through via 11c is 100 μm. As can be seen from these sizes, the semiconductor chip 11 requires a region for providing the sealing member 14 and the protective resin 15, but the increase is slight. For forming the through via 11c penetrating the semiconductor chip 11, a known through plug forming technique can be used. Schematically, for example, an oxide film is previously formed on the inner wall surface of the through hole for the through via 11c, and Cu is grown and filled therein by plating.

  The metallized layer 11 e is formed surrounding the integrated circuit portion 11 a on the semiconductor chip 11, and mediates the connection between the sealing member 14 and the semiconductor chip 11. The sealing member 14 is connected to the cap wafer chip 12 by a metallized layer 13 provided on the cap wafer chip 12 at a position corresponding to the sealing member 14. The thickness of the metallized layers 11e and 13 is several μm, for example, and the thickness of the sealing member 14 is about 10 μm to 50 μm, for example. The metallized layers 11e and 13 are formed on the semiconductor chip 11 or the cap wafer chip 12 which is a semiconductor material by the same process. For example, a laminated structure of Ti (adhesive layer), Cu (underlying layer for plating), Ni (barrier layer), and Au (surface plated layer) can be formed from the substrate side.

  The sealing member 14 can be, for example, Au—Sn alloy solder. The connection between the sealing member 14 and the metallized layers 11e and 13 is preferable because the metal is firmly connected to each other and the purpose of sealing the integrated circuit portion 11a is achieved. Although other metal materials can be used as the sealing member 14, it is preferable to use a material having a high melting point (for example, 300 ° C. or higher) so as not to be melted by heat when the electronic device 10 is mounted.

  An epoxy resin, for example, can be used for the protective resin 15 located between the semiconductor chip 11 and the cap wafer chip 12 and outside the sealing member 14. As described above, the structure in which the outer side of the sealing member 14 is covered with the protective resin 15 fills the space between the semiconductor chip 11 and the cap wafer chip 12 in appearance, thereby simplifying the shape of the electronic device 10 as a whole and making it mechanically robust. Improves.

  In addition, the double structure of the sealing member 14 and the protective resin 15 improves airtightness and good reliability. In particular, since the sealing member 14 is an inorganic material together with the metallized layers 11e and 13, the airtightness is very good, and it is also advantageous that it is lead-free in consideration of the environment. Moreover, the structure of the sealing member 14 and the metallized layers 11e and 13 is stable in the thickness direction and has high resistance to external pressure. These points do not change even when there is a space between the sealing member 14 and the protective resin 15.

  Note that the integrated circuit portion 11a on the semiconductor chip 11 may be a MEMS, or may be a hybrid of an integrated circuit and a MEMS. As the metallized layers 11e and 13, instead of 1) Ti / (Cu) / Ni / Au, 2) Cr / (Cu) / Ni / Au, 3) Ti / (Cu) / Pd from the substrate side. (Or Pt) / Au, 4) Cr / (Cu) / Pd (or Pt) / Au, etc. Here, (Cu) indicates that it may not be necessary depending on the production method. Further, in these 1) to 4), Sn can be used instead of Au.

  The sealing member 14 can be made of Au, lead-free solder, high-temperature solder (Pb 85% or more), etc. in addition to the Au—Sn alloy. As the protective resin 15, a silicone resin or a novolac resin can be used in addition to the epoxy resin. Epoxy resins contribute by improving airtightness, and silicone resins contribute by improving moisture absorption resistance. Further, in the electronic device 10 of this embodiment, since the semiconductor chip 11 and the cap wafer chip 11 are the same material, they have the same thermal expansion coefficient, and the thermal stress generated at the connecting portion such as the sealing member 14 is small. Can contribute to high reliability.

  Next, the manufacturing process of the electronic device shown in FIG. 1 will be described with reference to FIGS. FIG. 2 is a process diagram schematically showing a manufacturing process of the electronic device shown in FIG. FIG. 3 is a continuation diagram of FIG. 2 and is a process diagram schematically showing a manufacturing process of the electronic device shown in FIG. 2 and 3 that are the same as or equivalent to the components shown in FIG.

  First, referring to FIG. 2A, a metallized layer 11e having a predetermined pattern is formed at a predetermined position on the device wafer 11A. The device wafer 11A is a wafer before being diced (separated) into the semiconductor chip 11, and the integrated circuit portion 11a, the rewiring portion 11b, the through via 11c, and the chip back surface wiring portion 11d are already formed. To do. In the figure, the vicinity of the adjacent integrated circuit portion 11a on the device wafer 11A is drawn. The illustrated internal dimension between the metallized layers 11e to be formed is, for example, 100 μm to 200 μm.

  In order to form the metallized layer 11e, first, Ti (0.1 μm) / Cu (0.1 μm) is sputtered on the oxide film of the device wafer 11A, and a resist is formed thereon. The formed resist is processed into a pattern in which a region where the metallized layer 11e is to be formed is omitted. The width removed by processing is, for example, 100 μm. Thereafter, Cu (1 μm) / Ni (3 μm) / Au (3 μm) are sequentially electroplated, and the resist is removed after electroplating. Then, Ti / Cu is removed by etching using Ni / Au formed by plating as a mask. As a result, a metallized layer 11e is formed on the device wafer 11A as shown in FIG.

  Next, referring to FIG. 2B, a metallized layer 13 having a predetermined pattern is formed at a predetermined position on the cap wafer 12A. The cap wafer 12A is a wafer before being diced (divided into pieces) into the cap wafer chip 12, and a through hole 12a for resin injection is already formed (the diameter is, for example, 80 μm). The cap wafer 12A has a configuration as a plan view as shown in FIG. 4, for example. For example, deep RIE (reactive ion etching) or laser processing can be used to form the resin injection through hole 12a.

  The metallized layer 13 is formed on the cap wafer 12A in the same manner as the metallized layer 11e on the device wafer 11A. The pattern of the metallized layer 13 is the same as the pattern of the metallized layer 11e.

  Next, as shown in FIG. 2 (c), Au-Sn plating is formed on the metallized layer 13 on the cap wafer 12A (for example, 30 μm thick) to form a sealing member 14, and the sealing member 14 is formed. The cap wafer 12A thus placed is placed opposite to the device wafer 11A. With this opposing arrangement, the sealing member 14 is just opposite to the metallized layer 11e on the device wafer 11A. The plating formation as the sealing member 14 may be performed on the metallized layer 11e on the device wafer 11A, or may be performed on both the metallized layers 13 and 11e.

  The sealing member 14 may be made of the metal described above in addition to the Au—Sn alloy. Furthermore, instead of plating formation, a bulk metal connection method, a printing method of a paste material containing metal particles, and a paste material application method using its own weight or capillary effect may be used.

  Next, as shown in FIG. 2D, the device wafer 11A and the cap wafer 12A are connected (bonded) with the sealing member 14 as an intermediary. For this purpose, the sealing member 14 is heated to a melting temperature, and a certain amount of pressure is applied in a direction in which the device wafer 11A and the cap wafer 12A face each other. This is to ensure connection on the entire wafer surface. In this connection, since the sealing member 14 is melted, the sealing member 14 connects the metallized layers 11e and 13 so as to absorb them even if the metallized layers 11e and 13 have height variations. The heating temperature is, for example, 350 ° C. at a peak, and is preferably a high temperature, so that it is preferably performed in a low oxygen atmosphere such as a nitrogen atmosphere. When the sealing member 14 is made of another material, the temperature and pressure settings are changed according to the material.

  Next, as shown in FIG. 3A, the integrated circuit section is formed by the sealing member 14 in the gap between the device wafer 11A and the cap wafer 12A through the resin injection through hole 12a formed in the cap wafer 12A. A protective resin 15A before curing is injected and filled in a space separated from 11a. For this injection / filling, a printing method, a dip method, or the like can be used, but this space in the gap between the device wafer 11A and the cap wafer 12A is open at the end of the wafer, and the capillary due to surface tension is used. Can be easily filled depending on the phenomenon. In addition, it is more preferable to perform defoaming when injecting and filling the protective resin 15A.

  Next, heating is performed in the state shown in FIG. 3B to cure the protective resin 15 </ b> A to obtain a cured protective resin 15. This heating is performed at 150 ° C. for about 30 minutes if the protective resin is, for example, an epoxy resin. In the case of another resin (silicone resin or novolak resin), the temperature and time suitable for the resin are set.

  Next, as shown in FIG. 3C, the device wafer 11 </ b> A and the cap wafer 12 </ b> A are diced by the dicing blade 20 at the position where the resin injection through holes 12 a are aligned and separated. For example, the distance when the dicing blade 20 disappears is 100 μm. In this case, the diameter of the resin injection through hole 12a is 80 μm, so the trace of the resin injection through hole 12a is not separated. Does not remain. However, on the contrary, there is almost no problem even when the diameter of the resin injection through hole 12a is 100 μm, and the loss due to singulation by the dicing blade 20 is 80 μm.

  If the solder bumps 16 are attached after the separation shown in FIG. 3C, the electronic device shown in FIG. 1 can be obtained. As described above, the manufacturing method is not particularly complicated, and the cost increase can be minimized. In addition, since the shape of the electronic device 10 is simplified and defects such as chipping are less likely to occur, there is an aspect in which waste is eliminated and costs are reduced.

  In the above manufacturing process, the resin injection through hole 12a is provided in advance in the cap wafer 12A. However, the resin injection through hole 12a may be provided in advance in the device wafer 11A. However, in general, it is preferable to provide the resin injection through hole 12a on the cap wafer 12A because there is no concern about the influence on the integrated circuit portion 11a. Further, the resin injection through hole 12a is not provided in advance before the connection between the device wafer 11A and the cap wafer 12A, but is formed in one after the device wafer 11A and the cap wafer 12A are bonded. You may make it provide.

  The cap wafer 12A may be a normal wafer having a thickness of, for example, 650 μm, and may be polished to a desired required thickness before being attached to the device wafer 11A. This polishing can be performed after pasting, or can be performed after being separated into pieces. For dicing (dividing into pieces) by the dicing blade 20, dicing by laser processing may be used instead.

  To supplement the cap wafer 12A shown in FIG. 4, the resin injection through-holes 12a may be arranged on each line of the lattice pattern, but at least one between the adjacent adjoining pieces. I just need it. Further, the cross-sectional shape may not be a circle, and may be, for example, an ellipse or a rectangle. The maximum diameter can be set to, for example, 50 μm to 100 μm in view of the disappearance due to dicing and the injectability of the protective resin 15A.

  The resin injection through hole 12a can also be used as a hole through which the device wafer 11A can be seen. In other words, the cap wafer 12A may be aligned with the device wafer 11A using the resin injection through hole 12a. Further, the resin injection through hole 12a can be used as a mark indicating a dicing position for separating into pieces when the device wafer 11A and the cap wafer 12A are bonded to each other.

  Next, an electronic device according to another embodiment of the present invention will be described with reference to FIG. FIG. 5 is a schematic cross-sectional view showing the structure of an electronic device according to another embodiment of the present invention. Components identical or equivalent to those shown in the already described drawings are given the same reference numerals. It is. The description is omitted unless it is added.

  This electronic device 30 uses a cap glass piece 32 as a second substrate, and a UV curable resin 34 is used as a sealing member for connecting the cap glass piece 32 and the semiconductor chip 11. This embodiment is suitable for devices (eg, optical devices) that are not resistant to exposure to high temperatures (above 150 ° C.) because they do not use a metallic, high-melting sealing member 14.

  FIG. 6 is a partial process diagram showing a part of the manufacturing process of the electronic device shown in FIG. 5 in a schematic cross section, and a step corresponding to the process shown in FIG. 2C in the previous embodiment. It is shown. In the present embodiment, the glass plate 32A is used in place of the cap wafer 12A, and a resin injection through hole 32a is previously formed in the glass plate 32A. An uncured UV curable resin 34A is formed in such a frame-shaped predetermined pattern on such a glass plate 32A. And these glass plates 32A and device wafer 11A are bonded together via UV hardening resin 34A.

  After bonding, UV irradiation is performed from the glass plate 32A side to cure the UV curable resin 15A. As a result, the device wafer 11A and the glass plate 32A are temporarily fixed. Thereafter, for example, heating is performed at 150 ° C. for 30 minutes to completely cure the UV curable resin 15A. Subsequent processes are almost the same as those from FIG.

  In addition to the printing method, the dispensing method and the transfer method can be used to form the predetermined pattern of the UV curable resin 34A. Further, as a matter of course, the UV curable resin 34 can be replaced with an epoxy resin or the like.

  In the present embodiment, since the glass plate 32A is used as the second substrate, alignment with the device wafer 11A is relatively simple. Further, since the UV curable resin 34 as a sealing member is provided, it is not necessary to form a metallized layer, and the man-hour burden is light. Further, even if the device wafer 11A or the like has surface irregularities, the UV curable resin 34A absorbs this and the function as a sealing member is not impaired. However, there is a disadvantage compared to the previous embodiment in that the UV curable resin 34A may spread laterally. However, the advantage by having the protective resin 15 is not impaired at all.

  Next, another manufacturing process for manufacturing the electronic device 10 shown in FIG. 1 will be described with reference to FIG. FIG. 7 is a partial process diagram schematically showing a part of another manufacturing process for manufacturing the electronic device shown in FIG. 7 that are the same as those already described in FIG.

  In this manufacturing mode, the protective resin 15A is not filled through the resin injection through-holes formed in the cap wafer 12A or the device wafer 11A, but after these are bonded and separated into pieces, the protective resin 15A is used. Fill from the side. For this reason, as shown in FIG. 7, the separated pieces are arranged in a laminated form, and the protective resin 15 </ b> A is applied and filled in each surface of the formed laminated side surface by a method such as printing. It is the same as that of other embodiment to make it harden by heating after that. Such filling of the protective resin 15A from the side surface can be similarly adopted in embodiments other than this embodiment.

  In the present embodiment, it is not necessary to make a through hole in the cap wafer 12A or the device wafer 11A, and the man-hour burden is light. Further, an electronic device 10A having a protective resin 15 on the side surfaces of the cap wafer chip 12 and the semiconductor chip 11 as shown in FIG. 8 can be easily obtained. By doing so, the interface between the main surfaces of the cap wafer chip 12 and the semiconductor chip 11 and the protective resin 15 is not exposed to the outside world, so that the reliability is further improved. FIG. 8 is a schematic cross-sectional view showing the structure of an electronic device according to still another embodiment of the present invention, and the components already described are given the same reference numerals.

  Supplementing the electronic device 10A shown in FIG. 8, the side surfaces (dicing surfaces) of the first substrate (semiconductor chip 11) and the second substrate (cap wafer chip 12) are covered with a protective resin 15 and activated by cutting. There is also an advantage of improving the reliability as an electronic device by protecting the formed side from the external environment. Although the size of the electronic device is somewhat larger, since the thickness of the protective resin 15 on the side surface is about 20 μm to 50 μm at most, there is almost no influence on the size of the electronic device 10A as a whole. In addition, the entire side surface of the electronic device 10A is completely covered with resin, and is resistant to external mechanical shocks.

  Next, an electronic device according to still another embodiment of the present invention will be described with reference to FIG. FIG. 9 is a schematic cross-sectional view showing the structure of an electronic device according to still another embodiment of the present invention. Components that are the same as or equivalent to those shown in the already described drawings are denoted by the same reference numerals. It is. The description is omitted unless it is added.

  The electronic device 40 of this embodiment is an aspect in which the solder bumps 16 as input / output terminals are provided on the side of the cap wafer chip 120 as the second substrate. Therefore, the cap wafer chip 120 is provided with a wiring portion 12b similar to the rewiring portion 11b, a through via 12c similar to the through via 11c, and a wiring portion 12d similar to the chip back surface wiring portion 11d. Since the cap wafer chip 120 is a semiconductor, the wiring part 12b, the through via 12c, and the wiring part 12d can be formed by applying the same process as that of the semiconductor chip 11 (device wafer 11A).

  For electrical connection between the wiring part 12b in the cavity on the cap wafer chip 120 and the rewiring part 11b on the semiconductor chip 11, for example, bumps 41 obtained by curing a conductive paste are used. FIG. 10 is a partial process diagram schematically showing a part of the manufacturing process of the electronic device shown in FIG. 9 and shows a stage corresponding to FIG. 2C (the reference numerals have already been described). Corresponds to the thing). As shown in FIG. 10, the cap wafer 120 is formed with a resin injection through hole 120a similar to the resin injection through hole 12a, and conductive bumps 41 are printed on the wiring portion 12b, for example. It is formed by the law. The formed bump 41 is dried and in a semi-cured state.

  In such a state, the device wafer 11A and the cap wafer 120A are bonded together by the sealing member 14 as described above. At this time, the bump 41 is sandwiched between the device wafer 11A and the cap wafer 120A, and its head is plastically deformed to be brought into close contact with the rewiring portion 11b on the device wafer 11b, thereby establishing electrical conduction. In this embodiment, the resin injection through hole 120a can be formed simultaneously with the formation of the through hole for forming the through via 12c.

  Each embodiment has been described above. As the first substrate, a glass substrate, a ceramic substrate, or a metal substrate can be used in addition to a semiconductor material. In addition to a semiconductor material, a glass substrate, a ceramic substrate, or a metal substrate can be used as the second substrate. As the combination of the first substrate and the second substrate, in addition to 1) semiconductor / semiconductor, 2) semiconductor / glass substrate, 3) glass substrate / glass substrate, 4) semiconductor / ceramic substrate, 5) ceramic substrate / Metal substrates, 6) metal substrates / metal substrates, 7) ceramic substrates / ceramic substrates, etc. are possible preferred combinations.

  In the case where the first substrate is a semiconductor or glass substrate, an integrated function unit made monolithically can be provided as is well known, but in the case of another substrate, Can be different integrated circuit units mounted on the first substrate.

  In addition to the metal and the resin, glass can be used for the sealing member. In the case of glass, it is melted and placed on a first or second substrate in a frame-like predetermined pattern to serve as an intermediary member for bonding these substrates. In the case of using a resin, it is possible to take advantage of both of the advantages, such as securing airtightness by using this as an epoxy system and securing moisture absorption resistance by using a silicone system as the protective resin 15. Moreover, you may use a conductive thing as resin which is a sealing member. In that case, a metallized layer that mediates conductivity is provided between the first and second substrates.

1 is a schematic structural diagram showing a configuration of an electronic device according to an embodiment of the present invention. Process drawing which shows the manufacturing process of the electronic device shown in FIG. 1 with a typical cross section. FIG. 3 is a continuation diagram of FIG. 2, and a process diagram schematically showing a manufacturing process of the electronic device shown in FIG. 1. The top view which shows typically the structure of the cap wafer used for manufacturing the electronic device shown in FIG. The typical sectional view showing the structure of the electronic device concerning another embodiment of the present invention. FIG. 6 is a partial process diagram schematically showing a part of a manufacturing process of the electronic device shown in FIG. The partial process figure which shows a part of another manufacturing process which manufactures the electronic device shown in FIG. 1 with a typical perspective view. The typical sectional view showing the structure of the electronic device concerning another embodiment of the present invention. The typical sectional view showing the structure of the electronic device concerning another embodiment of the present invention. FIG. 10 is a partial process diagram showing a schematic cross section of a part of the manufacturing process of the electronic device shown in FIG. 9.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10,10A, 30,40 ... Electronic device, 11 ... Semiconductor chip, 11A ... Device wafer, 11a ... Integrated circuit part, 11b ... Redistribution part, 11c ... Through-via, 11d ... Chip back surface wiring part, 11e ... Metallization layer, DESCRIPTION OF SYMBOLS 12,120 ... Cap wafer chip | tip, 12A, 120A ... Cap wafer, 12a, 120a ... Through hole for resin injection, 12b ... Wiring part, 12c ... Through-via, 12d ... Wiring part, 13 ... Metallization layer, 14 ... Sealing member, DESCRIPTION OF SYMBOLS 15 ... Protective resin, 15A ... Protective resin (before hardening), 16 ... Solder bump, 20 ... Dicing blade, 32 ... Cap glass piece, 32A ... Glass plate, 32a ... Through hole for resin injection, 34 ... UV curable resin, 34A ... UV curable resin (before curing), 41 ... conductive bumps.

Claims (11)

A semiconductor chip as a first substrate, comprising: a first surface; a second surface; and an integrated function portion having an integrated circuit portion and / or a microelectromechanical system formed on the first surface;
A sealing member provided at a position surrounding the integrated function portion of the first surface of the first substrate;
A second substrate provided opposite to the first substrate via the sealing member;
A protective resin provided at least in an outer region of the sealing member in a gap between the first substrate and the second substrate;
The sealing member is made of metal,
The electronic device, wherein the first substrate has a metallized layer connecting the first substrate and the sealing member on the first surface of the first substrate.   The second substrate is a semiconductor substrate, and a second metallized layer that connects the second substrate and the sealing member on a surface of the second substrate facing the first substrate. The electronic device according to claim 1, comprising:   The electronic device according to claim 1, wherein the second substrate is a semiconductor substrate, a glass substrate, a ceramic substrate, or a metal substrate.   The electronic device according to claim 1, wherein the protective resin is provided so as to cover side surfaces of the first and second substrates.   The first substrate includes a conductive through via that penetrates the first substrate and a terminal provided on the second surface of the first substrate so as to be electrically connected to the through via. The electronic device according to claim 1, wherein the terminal serves as a signal input / output terminal of the integrated function unit through the through via. Further comprising conductive bumps sandwiched in a gap between the first substrate and the second substrate;
The second substrate is opposite to a conductive through via that penetrates the second substrate and a side of the second substrate that faces the first substrate so as to be electrically connected to the through via. 2. The electronic device according to claim 1, further comprising: a terminal provided on a surface on the second side, wherein the terminal serves as a signal input / output terminal of the integrated function unit via the through via and the bump. . A plurality of integrated function units having an integrated circuit unit and / or a micro electro mechanical system are formed on the first surface, and a metallized layer is formed so as to surround each of the plurality of integrated function units. A step of positioning a metal sealing member on the metallization layer of the semiconductor wafer and bonding the second substrate through the sealing member;
Filling and curing a protective resin in a space between the first substrate and the second substrate that is not on the side where the integrated function part of the sealing member exists; and
A method of manufacturing an electronic device, comprising: a step of separating the first substrate and the second substrate bonded to each of the plurality of integrated function units. The step of dividing into pieces is performed after the step of filling and curing the protective resin,
The step of filling and curing the protective resin is a through hole arranged in the first substrate or the second substrate, and is a gap between the first substrate and the second substrate. The method of manufacturing an electronic device according to claim 7, wherein the electronic device is formed through the through hole communicating with the space on the side of the sealing member that is not on the side where the integrated function unit exists. The step of dividing into pieces is performed before the step of filling and curing the protective resin,
The step of filling and curing the protective resin is performed by applying the protective resin to a laminated side surface formed by stacking a plurality of the laminated pieces that are separated into pieces. An electronic device manufacturing method according to claim 7.   In the step of bonding the second substrate, the second metallized layer is formed on the second substrate and the sealing member is provided on the second metallized layer, and the sealing member is attached to the first substrate. 8. The method of manufacturing an electronic device according to claim 7, wherein the electronic device is made to act as a connection layer for the metallized layer formed on the substrate.   8. The step of bonding the second substrate is such that conductive bumps are sandwiched and fixed between the first substrate and the second substrate. Electronic device manufacturing method.

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