JP4900226B2 - Multilayer ceramic substrate, manufacturing method thereof, and electronic component - Google Patents

Description

  The present invention relates to a structure of a multilayer ceramic substrate formed by laminating a plurality of ceramic layers and a method for manufacturing the same. The present invention also relates to an electronic component using the multilayer ceramic substrate.

  Today, multilayer ceramic substrates are used in various electronic components such as antenna switch modules, PA (Power Amplifier) modules, and filter modules in mobile communication terminal devices such as mobile phones.

  In such a multilayer ceramic substrate, a plurality of ceramic layers are laminated, wiring layers are formed between the layers, and the wiring layers are connected by via wiring. In particular, LTCC (Low Temperature Co-fired Ceramics) can be sintered together with a wiring material or the like at a low temperature and is therefore suitable as a material for the ceramic layer in such a configuration.

  A functional element such as a semiconductor chip is mounted on such a multilayer ceramic substrate and functions as an electronic component. Patent Document 1 describes an example of the structure of a multilayer ceramic substrate, and a sectional view thereof is shown in FIG. In this multilayer ceramic substrate 90, two ceramic layers 91a and 91b are laminated, and an internal wiring 92 is formed between the ceramic layers 91a and 91b. A ceramic layer also exists below this layer, but is omitted. External wiring 93 is formed on the surface of the ceramic layer 91 b, and the internal wiring 92 and the external wiring 93 are connected by via wiring 94. Although FIG. 7 is a cross-sectional view, the internal wiring 92 and the external wiring 93 are patterned in the surface direction of each ceramic layer in a desired shape as much as possible. The via wiring 94 has a substantially cylindrical shape that penetrates the ceramic layer 91b.

  A semiconductor chip is directly bonded to the external wiring 93 or an electrical connection with the semiconductor chip is taken. Generally, solder having a low melting point is used for such bonding. In this case, the solder is joined to the pad portion (connecting conductor portion) 93a in the external wiring 93, but the solder may flow out of the pad portion 93a. At this time, the solder of the pad portion of the adjacent external wiring may come into contact with each other, and a portion that should not be connected may be connected. Moreover, since solder flows out, it may be impossible to join at a desired pad portion 93a. For this reason, an insulating overcoat layer 95 with low solder wettability is formed on the surface of the ceramic layer 91b at locations other than the pad portion 93a where soldering is performed. The overcoat layer 95 is made of, for example, glass ceramic, and is formed by patterning by printing and baking. This firing is performed simultaneously with the ceramic layers 91a and 91b, the internal wiring 92, the external wiring 93, the via wiring 94, and the like. After the firing, a metal plating layer 96 made of gold (Au) or nickel (Ni) having high solder wettability is formed on the surface of the external wiring 93 by plating.

  When manufacturing the above structure, a green sheet obtained by dispersing a powder material in an organic binder and molding it into a sheet is used as a layer to be the ceramic layers 91a and 91b, and the internal wiring 92, the external wiring 93, and the via wiring 94 are formed. A laminated body is formed by printing a silver paste on the metal layer to be. A glass ceramic layer material to be the overcoat layer 95 is formed on the laminate by printing, and the laminate is pressed in the vertical direction in FIG. 7 to flatten the overcoat layer 95 and then sintered. Do. Ceramic layers 91a and 91b, internal wiring 92, external wiring 93, and via wiring 94 are formed by this sintering, and then a metal plating layer 96 is formed by plating.

  Using this structure, it was possible to manufacture an electronic component formed by mounting a large number of semiconductor chips on a multilayer ceramic substrate and joining them using solder.

  On the other hand, Patent Document 2 discloses a method for manufacturing a multilayer ceramic substrate in which sintering is performed in two stages instead of simultaneous firing. That is, in this manufacturing method, a plurality of first ceramic green sheets on which internal wirings are formed are stacked and fired, and second ceramic green sheets on which external wirings on the surface layer are formed on both main surfaces of the ceramic substrate. In this method, a multilayer body is formed by laminating, and the multilayer body is further sintered.

JP 2006-156948 A JP 2006-140513 A

  However, in recent years, the pattern of the internal wiring 92 and the external wiring 93 has been further miniaturized as the semiconductor modules are highly integrated. For example, in the external wiring 93, one side of the pad portion 93a for electrical connection with the semiconductor chip or the semiconductor chip wiring is 300 μm or less, the interval between the pad portions is 200 μm or less, and in the case of higher density, one side is 200 μm or less. It is necessary to set the interval between the pad portions to 100 μm or less. In such a case, in particular, soldering defects due to the overcoat layer 95 occurred.

  The overcoat layer 95 is formed by printing, and is formed so as to be aligned with the external wiring 93 or the like that becomes the base of printing. If the alignment accuracy is poor, the overlay accuracy between the overcoat layer 95 and the external wiring 93 is deteriorated, and the portions that should be covered by the overcoat layer 95 are exposed or pads that are originally supposed to be soldered. The portion 93a may be covered with the overcoat layer 95, resulting in poor bonding. Therefore, the overlay accuracy in the state after firing may be insufficient particularly for a fine pattern. In particular, in a fine pattern, the pad portion 93a may be covered with the overcoat layer due to bleeding when the overcoat layer 95 is printed.

  The overcoat layer is formed by printing a paste, and is pressed after printing to flatten the overcoat layer. At this time, a local high pressure may be applied depending on the presence or absence of the pattern below the overcoat layer, and cracks may occur after firing from there. In addition, the overcoat layer may not be densely fired due to a difference in sintering shrinkage between the overcoat layer and the ceramic layer. For this reason, when the plating is performed after the overcoat layer 95 is formed, the plating solution may soak into the overcoat layer 95 and the purpose of making it difficult for the overcoat layer 95 to be soldered may not be achieved. Therefore, in the multilayer ceramic substrate using the overcoat layer, when the wiring pattern is miniaturized, defects in soldering and defects due to the plating solution frequently occur.

  Further, along with the miniaturization of the pattern of the external wiring 93, the diameter of the opening of the via wiring 94 in the surface layer has been required to be further reduced from the conventionally used size of about φ100 μm. Since the via wiring is formed by filling the via hole with a material such as an electrode paste by a printing process, if the ceramic layer 91b is thick, it is difficult to process the via hole in which the via wiring is formed. In addition, it has become difficult to satisfy both the filling of the electrode paste into the via hole and the formation of a fine pattern in the printing process.

  Patent Document 2 proposes a manufacturing method in which a multilayer body is sintered in two stages in order to obtain a highly accurate surface layer conductor pattern. However, in practice, it is difficult to densely press the unfired green sheet on the sintered ceramic substrate. Furthermore, it has been practically difficult to fire them without peeling defects and heat damage.

  Therefore, in the multilayer ceramic substrate using the overcoat layer, defective soldering frequently occurs when the wiring pattern is miniaturized.

  The present invention has been made in view of such a problem, and in a multilayer ceramic substrate by simultaneous firing (sintering is not strictly distinguished, sometimes referred to as sintering. The same applies hereinafter). It is an object of the present invention to provide an invention that solves the problem of poor soldering associated with miniaturization of external wiring patterns and via diameter reduction.

In order to solve the above problems, the present invention has the following configurations.
The gist of the invention described in claim 1 is a multilayer ceramic substrate in which a plurality of ceramic layers are laminated and a connection conductor portion is provided on the outermost surface, the via conductor and the connection conductor having a metal plating layer on the surface. The outermost ceramic layer having a thickness of 15 to 90 μm, the ceramic layer thicker than the outermost ceramic layer and adjacent to the outermost ceramic layer, and the outermost ceramic layer When the formed between the adjacent ceramic layers, comprising an internal wiring connected to the connecting conductor part by the via wiring, as viewed in the stacking direction of the multilayer ceramic substrate, the connecting conductor portion The via wiring, the connecting conductor portion, and the internal wiring are formed on a side opposite to the outermost ceramic layer of the adjacent ceramic layer. That the internal wiring of the lower ceramic layer are connected to each other in an electrically independent state, characterized in that the surface of said connecting conductor part, and the ceramic surface of the ceramic layer of the outermost surface is on the same plane A multilayer ceramic substrate. The metal plating layer is preferably a plating layer mainly composed of nickel (Ni) and / or gold (Au).

  According to such a configuration, the outermost ceramic layer is integrally fired while maintaining the overlay accuracy with the adjacent ceramic layer, so that a uniform and dense integrated structure is obtained. Therefore, poor soldering and poor penetration of the plating solution are reduced. At this time, the internal wiring and the connecting conductor are directly connected by via wiring, and the surface of the connecting conductor and the ceramic surface are formed on substantially the same plane, so that the conductor is distorted. Such deformation does not occur. In addition, since these wirings are entirely embedded and covered with a high-quality insulating layer (the outermost ceramic layer), insulation defects such as migration are reduced.

The gist of the invention described in claim 2 resides in the multilayer ceramic substrate according to claim 1, wherein the total thickness of the ceramic layer on the outermost surface and the adjacent ceramic layer exceeds 40 μm. .

  The thickness of the sintered ceramic layer is basically governed by the thickness of the ceramic green sheet before firing. When the thickness of the outermost ceramic layer is less than 15 μm, it may be difficult to stack the first ceramic green sheets. Further, when the thickness of the outermost ceramic layer exceeds 90 μm, it is difficult to process a small-diameter via on the first ceramic green sheet. Moreover, when the thickness of the adjacent ceramic layer is 15 μm or less, it may be difficult to laminate the second ceramic green sheet before firing. Also in the adjacent ceramic layer, a via diameter of about φ100 μm is necessary, and it is preferable that the sheet thickness be capable of via hole processing. For this reason, it is usually preferable that the upper limit thickness of the second ceramic layer be 150 μm or less. Further, when the total thickness of the outermost ceramic layer and the adjacent ceramic layer is 40 μm or less, the first ceramic green sheet and the second ceramic green sheet are poorly adhered and are laminated. May be difficult. As described above, the upper limit of the total thickness needs to be a thickness capable of processing via holes in both the surface layer and the second layer, and is preferably about 240 μm.

SUMMARY OF THE INVENTION according to claim 3, before Symbol connecting conductor part is a plurality arranged on the outermost surface, according to claim 1 or 2 minimum spacing between the connecting conductor part is equal to or is 200μm or less In the multilayer ceramic substrate.

  In such a multilayer ceramic substrate, surface-mounted components can be mounted particularly at high density, and highly functional and high performance electronic components can be obtained.

The gist of the invention described in claim 4 is a method for manufacturing a multilayer ceramic substrate, wherein a plurality of ceramic layers are laminated and a multilayer ceramic substrate having a connecting conductor portion provided on the outermost surface is formed by sintering, the first ceramic green sheet surface to a thickness after sintering becomes a ceramic layer of the outermost surface of 15 to 90 m, before SL inside the first ceramic green sheets, the connecting conductor portion and the internal wiring after sintering And a metal layer that becomes the connection conductor after sintering formed on a surface wider than the metal layer that becomes the via wiring when viewed in the stacking direction of the multilayer ceramic substrate. and surface ceramic green sheet forming step of forming the formed surface layer ceramic green sheet, the ceramic layer of the outermost surface after thicker sintering than the superficial ceramic green sheets And lower ceramic green sheets forming step of forming a lower ceramic green sheets forming a metal layer serving as the internal wiring after the sintering the second ceramic green sheet to be the ceramic layers in contact, the surface layer ceramic green sheet and lower ceramic green a sheet stacking bonding, the upper ceramic sheet laminate and the surface of the metal layer serving as the connecting conductor portion and the first ceramic green sheet surface to form the upper ceramic sheet laminate in the same plane formed Separately from the step and the upper ceramic sheet laminate, a lower ceramic sheet that becomes a ceramic layer adjacent to the ceramic layer adjacent to the outermost ceramic layer and a ceramic layer adjacent to the surface opposite to the outermost ceramic layer, Lower ceramic sheet forming step to be formed and gold to be the via wiring The upper ceramic sheet laminate in a state in which the metal layer, the metal layer serving as the connecting conductor, and the metal layer serving as the internal wiring are electrically independent from each other and connected to each other in the lower ceramic sheet. and it consists in a method for manufacturing a multilayer ceramic substrate characterized by having a sintering step of firing the multilayer ceramic body unsintered made of the lower ceramic sheet.

  According to this method, the outermost ceramic layer is integrally fired while maintaining the overlay accuracy with the adjacent ceramic layer, so that a uniform and dense multilayer ceramic substrate can be manufactured.

The gist of the invention described in claim 5 is the production of the multilayer ceramic substrate according to claim 4, further comprising a plating step of forming a metal plating layer on the surface of the connecting conductor portion after sintering. Lies in the way.

  By such a manufacturing method, a multilayer ceramic substrate composed of a large number of layers can be manufactured particularly easily.

SUMMARY OF THE INVENTION according to claim 6, claim 4 or 5 total pre Symbol thickness of the first ceramic green sheet the second ceramic green sheet is characterized in that beyond 56μm In a method for producing a multilayer ceramic substrate.

  As described above, when the thickness of the first ceramic green sheet is less than 20 μm, it may be difficult to laminate the first ceramic green sheet. If it exceeds 120 μm, via processing may be difficult. When the second ceramic green sheet has a thickness of 20 μm or less, it may be difficult to stack. In order to provide a via opening having a slightly large opening, the thickness is preferably about 200 μm. Moreover, in order to laminate with good adhesion, it is preferable that the total thickness of both ceramic green sheets exceeds 56 μm. In such a configuration, it is preferable that the outermost ceramic layer is thin, and the adjacent ceramic layers are at least equal in thickness, desirably thicker so as to have a difference in thickness. As a result, the connecting conductor portion can be sufficiently embedded and easily formed on the same plane. In addition, fine holes can be formed in the via wiring, and the conductor hole-filling printing can be performed satisfactorily, and problems of printing misalignment and bleeding can be reduced.

  The gist of the invention described in claim 7 is that when at least the surface ceramic green sheet is pressure-bonded and the lower ceramic green sheet is laminated and pressure-bonded to the surface ceramic green sheet in the upper ceramic sheet laminate forming step. The method of manufacturing a multilayer ceramic substrate according to any one of claims 4 to 6, wherein the step is performed in a reduced pressure atmosphere.

  According to this method, the connecting conductor portion can be sufficiently embedded and formed on the same plane. At this time, even if the surface ceramic green sheet is thin, generation of wrinkles and gaps can be prevented, and a multilayer ceramic substrate with high alignment accuracy and high accuracy can be obtained.

The gist of the invention described in claim 8 is that the multilayer ceramic substrate according to any one of claims 1 to 3 is used, and a surface mount component is mounted on the metal plating layer using soldering. It exists in the electronic component characterized by having been made.
The gist of the invention described in claim 9 resides in the electronic component according to claim 8, wherein the surface mounted component includes at least one of a semiconductor chip, a chip capacitor, and a chip resistor.

  Since the present invention is configured as described above, even when the wiring pattern is miniaturized, a multilayer ceramic substrate with reduced soldering defects and a method for manufacturing the same are provided. Moreover, the electronic component with high reliability can be obtained using these.

  The present invention will be described below with reference to specific embodiments. However, the present invention is not limited to these embodiments.

  FIG. 1 is a partial cross-sectional view of an upper portion of a multilayer ceramic substrate 10 according to an embodiment of the present invention, and FIG. 2 is a perspective view of the structure thereof. Here, only one side of the multilayer ceramic substrate 10 (upper side in FIG. 1) is described, but the same structure can be applied to the other side. In the multilayer ceramic substrate 10, an internal wiring 13 is formed between a ceramic layer 11 adjacent to the outermost ceramic layer and an outermost ceramic layer (surface ceramic layer) 12. One end of the via wiring 14 is connected to the internal wiring 13, and a pair of via wirings 14 are provided for the internal wiring 13. Here, in this multilayer ceramic substrate 10, a surface ceramic layer 12, which is the outermost ceramic layer, is provided on the surface, and the connecting conductor portion 15 is embedded in the surface ceramic layer 12, The surface of 15 and the surface of the connecting conductor portion 15 are in the substantially same plane. Further, a thin metal plating layer 16 is formed on the exposed surface of the connecting conductor portion 15 as compared with the connecting conductor portion. 1 and 2, one layer is described as the ceramic layer 11 and the internal wiring 13, but the ceramic layer 11 and the internal wiring 13 can be laminated any number of times, and the internal wirings 13 are connected to each other. Electrical connection can be achieved by via wiring having the same structure as described above. Here, the surface of the surface ceramic layer 12 and the surface of the connecting conductor portion 15 are substantially on the same plane, even if there is a step between them, there is no problem in soldering or the like. Specifically, the step is about 10 μm or less. Since the thickness of the metal plating layer 16 is thinner than this, the surface of the metal plating layer 16 is also substantially flush with the surface of the surface ceramic layer 15.

  On the surface of the multilayer ceramic 10, a plurality of semiconductor chips and functional elements are electrically connected via the connecting conductor portion 15 and the metal plating layer 16. At this time, current flows in the internal wiring 13 through the connecting conductor portion 15 and the via wiring 14. Although omitted in FIGS. 1 and 2, a resistor, an inductor, a capacitor, and the like can be formed inside the multilayer ceramic substrate 10 in the same manner as the internal wiring 13. By functionally connecting them, for example, a high-frequency circuit can be configured, and an electronic component can be formed using the multilayer ceramic substrate 10. Examples of the electronic component include a power amplifier used for a front end portion of a wireless communication device such as a mobile phone and a module component such as an antenna switch.

The ceramic layer 11 is made of a material containing LTCC (Low Temperature Co-fired Ceramics), for example, alumina (Al ₂ O ₃ ), silicon oxide (SiO ₂ ), or the like. Specifically, it is composed of oxides of aluminum (Al), silicon (Si), strontium (Sr), and titanium (Ti), which are 10 to 60% by mass in terms of Al ₂ O _{3 and in} terms of SiO ₂ , respectively. It is a material consisting of 25 to 60% by mass, 10 to 50% by mass in terms of SrO, and 20% by mass or less in terms of TiO ₂ . This layer is formed by sintering a green sheet made of this material at a temperature of about 900 ° C. The green sheet is obtained, for example, by molding a slurry in which the above oxide powder is dispersed in an organic binder made of, for example, polyvinyl butyral resin and a plasticizer made of di-n-butyl phthalate. The thickness is about 10 to 190 μm after drying in the temperature range of 70 to 100 ° C. This material is insulating and has high mechanical strength.

  The surface ceramic layer 12 is also formed of the same material as the ceramic layer 11, but its thickness is thinner than the ceramic layer 11 and is about 20 to 120 μm. The material of the surface ceramic layer 12 may be a material having substantially the same composition as that of the ceramic layer 11, but even if the composition is different, the material can be sintered at the same temperature and has good bonding with the ceramic layer 11. Good.

  The internal wiring 13 is formed, for example, by forming a silver paste on the green sheet to be the ceramic layer 11 by printing and then performing the baking. The thickness is, for example, about 5 to 30 μm, and is patterned as much as possible for wiring during printing. In addition, if it is a conductor which can be patterned by printing etc. and can be used as wiring after sintering of the ceramic layers 11 and 12, for example, a copper-based paste can be used instead of the silver paste.

  The via wiring 14 has a substantially cylindrical shape for connecting the connecting conductor portion 15 and the internal wiring 13, and the same material as the internal wiring 13, for example, silver paste is used as the material thereof. The via wiring 14 is formed by forming a hole having the same shape in a green sheet that becomes the surface ceramic layer 12 and the like after sintering, and filling the hole with a silver paste or the like and then performing the firing.

  The connecting conductor portion 15 constitutes a pad portion for soldering and is similarly formed of the same material as that of the internal wiring 13, but as shown in FIG. 2, soldering can be easily performed thereon. It has a shape (rectangular, circular, etc.).

  The metal plating layer 16 is formed mainly of Au or Ni with good solder wettability. Specifically, a Ni underlayer having a thickness of about 2 to 5 μm is formed, and an Au layer having a thickness of about 0.02 to 0.1 μm is formed thereon. For example, the connection conductor is formed by electroless plating. Formed on the portion 15. With the metal plating layer 16, the semiconductor chip can be mechanically and electrically connected to the connecting conductor portion 15 using solder.

  FIG. 3 shows a process cross-sectional view in the method for manufacturing the multilayer ceramic substrate 10. This manufacturing method will be described below.

  First, as shown in FIG. 3A, a silver paste layer (metal layer) 22 to be a via wiring 14 is formed in a first ceramic green sheet 21 to be a surface ceramic layer 12 after sintering, and ceramic green On the surface of the sheet 21, a surface ceramic green sheet 24 in which a silver paste layer (metal layer) 23 that becomes the connecting conductor portion 15 after sintering is formed (surface ceramic green sheet forming step). The ceramic green sheet 21 is formed on the support film 40. As the support film 40, a PET (polyester) film that is chemically stable and highly plastic is preferably used. The silver paste layer 22 is formed by providing an opening corresponding to the via wiring 14 in the ceramic green sheet layer 21 by, for example, laser processing and filling the opening with silver paste. Along with the miniaturization of the silver paste layer 23 (connecting conductor portion 15), the opening hole formed by laser processing needs to have a fine diameter, for example, φ100 μm or less, more preferably about φ60 to 80 μm. Is required. The silver paste layer 23 is formed simultaneously with the silver paste layer 22 by, for example, printing (screen printing).

  Next, as shown in FIG. 3B, a lower ceramic green sheet 27 in which a silver paste layer (metal layer) 26 to be the internal wiring 13 is formed on the ceramic green sheet 25 to be the ceramic layer 11 by printing. It is formed separately from the above (lower ceramic green sheet forming step). The silver paste layer 26 is patterned as much as possible for the internal wiring 13. Although simplified here, when the ceramic layer and internal wiring are multilayered, the lower ceramic sheet is created by laminating the corresponding ceramic green sheet layer and silver paste layer in the same way. Step (lower ceramic sheet forming step) is performed separately.

  Next, the ceramic green sheets 24 and 27 of FIGS. 3A and 3B are laminated and pressure-bonded to form an upper ceramic sheet laminate 28 before sintering as shown in FIG. 3C (upper ceramic sheet). Laminate forming step). In this operation, when the crimping is performed in the vertical direction in FIG. 3, the ceramic green sheets 21 and 25 are deformed and the silver paste layer 26 is formed in the ceramic green sheets 21 and 25 as shown in FIG. Thus, the upper ceramic sheet laminate 28 in which the silver paste layer 23 is embedded in the ceramic green sheet 21 is obtained. In the upper ceramic sheet laminate 28, the surface of the ceramic green sheet 21 and the surface of the silver paste layer 23 that becomes the connecting conductor portion 15 are substantially on the same plane. When a plurality of lower green sheets are used as described above, these are laminated and pressure-bonded here. Details of the upper ceramic sheet laminate forming step will be described later. Further, the positional relationship between the surface of the ceramic green sheet 21 and the surface of the silver paste layer 23 that becomes the connecting conductor portion 15 is the same as the surface of the surface ceramic layer 12 and the surface of the connecting conductor portion 15.

  Thereafter, a separately formed ceramic green sheet layer is appropriately laminated and pressure-bonded (lower ceramic sheet laminated body forming step). The lower ceramic sheet laminated body is appropriately laminated and pressure-bonded to the upper ceramic sheet laminated body 28 as necessary. The multilayer ceramic body before sintering is sintered (sintering process). This condition may be, for example, a non-oxidizing atmosphere, but is set to 900 ° C. for about 2 hours in an air firing atmosphere. As a result, as shown in FIG. 3D, the ceramic green sheet 25 is on the ceramic layer 11, the silver paste layer 26 is on the internal wiring 13, the ceramic green sheet 21 is on the surface ceramic layer 12, and the silver paste layer 22 is on The silver paste layer 23 becomes the connecting conductor 15 in the via wiring 14, and an integrated sintered body is obtained.

  Finally, as shown in FIG. 3 (e), the metal plating layer 16 is formed on the connecting conductor portion 15 by electroless plating (plating step).

  Although not shown in the drawing, the multilayer ceramic substrate 10 is then divided or broken as appropriate after mounting surface mount components such as a semiconductor chip, a chip capacitor, and a chip resistor to become an electronic component.

  The multilayer ceramic substrate 10 shown in FIG. 1 can be manufactured by the above manufacturing method. On the surface of the multilayer ceramic substrate 10, a thin surface ceramic layer 12 is formed instead of the overcoat layer in the conventional multilayer ceramic substrate. Therefore, for the following reasons, when soldering is performed on this, since the solder layer is formed only on the metal plating layer 16 having good wettability, the soldering is appropriately performed on the connecting conductor portion 15. It can be carried out.

  First, since the thickness is small despite the extremely small diameter opening (via wiring), the filling amount of the silver paste is appropriate. Therefore, the silver paste layer 23 can be formed on the silver paste layer 22 without printing misalignment. Further, since the silver paste layers 22 and 23 can be printed and formed at the same time, there is no bleeding phenomenon, and a fine connection conductor portion 15 can be formed.

  Further, since the surface ceramic layer 12 can have a dense structure similar to the ceramic layer 11, the plating solution does not soak into the interior when the metal plating layer 16 is formed (FIG. 3E). Therefore, the metal plating layer 16 is formed only on the surface of the connecting conductor portion 15, and it is difficult to cause a defect in joining by subsequent soldering.

  Also, in general, when a conductor that becomes a current path that increases the current density is covered with an insulating layer, if the film quality of this insulating layer is poor, an insulation failure occurs in the insulating layer when a current is applied for a long time. In other words, so-called migration may occur. In the vicinity of the surface of the multilayer ceramic substrate having the conventional structure using the overcoat layer shown in FIG. 7, the external wiring is the path having the highest current density. The lower surface of the current path is a dense ceramic layer, but the upper surface is covered with a non-dense overcoat layer. Therefore, the current path is not sufficiently covered, and migration may occur. On the other hand, in the vicinity of the surface of the multilayer ceramic substrate 10, the path having the highest current density is the internal wiring 13, the lower surface of which is the dense ceramic layer 11, and the upper surface is similarly a dense surface layer ceramic. Covered with layer 12. Therefore, it is difficult to cause migration and a highly reliable multilayer ceramic substrate can be obtained.

  Therefore, even when the wiring patterns such as the internal wiring 13 and the connecting conductor portion 15 are miniaturized, it is possible to obtain a highly reliable electronic component with reduced soldering defects. For example, even if a plurality of connecting conductor portions 15 are arranged and the minimum interval is 200 μm or less, defective soldering can be reduced.

  In this manufacturing method, in the upper ceramic sheet laminate forming step shown in FIG. 3 (c), it is necessary to laminate the thin surface ceramic green sheet 24 and the lower ceramic green sheet 27 and pressure-bond them. At this time, a haze or vacancy (air accumulation) can be formed between the surface ceramic green sheet 24 and the lower ceramic green sheet 27, or a surface where the surface ceramic green sheet 24 is partially lifted to cause poor adhesion can be formed. is there. Such a portion can be eliminated by increasing the pressure at the time of pressure bonding, but in that case, the thin surface ceramic green sheet 24 may be broken. Therefore, when manufacturing this multilayer ceramic substrate 10, optimization of this upper ceramic sheet laminated body formation process is especially important.

  Therefore, in this manufacturing method, the upper ceramic sheet laminate forming step shown in FIG. FIG. 4 is a process cross-sectional view showing the details of this vacuum lamination pressure bonding method.

  First, in FIG. 4A, an adhesive sheet 41 for temporarily fixing the laminated ceramic green sheets is installed on the vacuum press machine lower part 52. The pressure-sensitive adhesive sheet 41 can be easily peeled off from the laminate after completion of the lamination. Next, as shown in FIG. 3A, the first ceramic green sheet 21 (surface ceramic green sheet 24) on which the silver paste layers 23 and 22 are formed is placed on the pressure-sensitive adhesive sheet 41. (Metal layer) Installed with the 23 side down.

  Next, as shown in FIG. 4B, with the press machine upper part 51 sandwiching the adhesive sheet 41 and the surface ceramic green sheet 24 between the press machine lower part 52, the periphery is supported by the elastic body 53. The space in which the adhesive sheet 41 and the surface ceramic green sheet 24 are installed is evacuated by vacuuming.

  Thereafter, as shown in FIG. 4C, pressure is applied to the surface ceramic green sheet 24 in the vertical direction in FIG. In this step, for example, at a temperature of 30 to 90 ° C., a pressure of 0.98 to 9.8 MPa is applied and pressure bonding is performed for 5 to 100 seconds.

  Thereafter, as shown in FIG. 4D, the inside of the vacuum press is opened to the atmosphere, and the support film 40 is peeled from the surface ceramic green sheet 24.

  Through the above steps, the silver paste layer 23 is embedded in the surface ceramic green sheet 24. In addition, by reducing the space in which the surface ceramic green sheet 24 is installed, even when the surface ceramic green sheet 24 is thin, for example, 80 μm or less in thickness, the gap between the adhesive sheet 41 is eliminated. Adhesion can be increased. That is, by reducing the pressure, the adhesion can be enhanced with a low pressure, so that even if the surface ceramic green sheet 24 is thin, no tearing or the like occurs.

  Next, as shown in FIG. 4E, a silver paste layer 26 is formed on the second ceramic green sheet 25 shown in FIG. 3B on the laminated surface ceramic green sheets 24. The lower ceramic green sheet 27 thus formed is aligned and installed.

  Next, as shown in FIG. 4 (f), the surface ceramic green sheet 24 and the lower ceramic green sheet 27 are sandwiched between the press machine upper part 51 and the press machine lower part 52, and the periphery is supported by an elastic body 53, as shown in FIG. In this state, the space in which the adhesive sheet 41 and the surface ceramic green sheet 24 are installed is evacuated to reduce the pressure.

  Thereafter, as shown in FIG. 4G, pressure is applied to the surface ceramic green sheet 24 and the lower ceramic green sheet 27 in the vertical direction in FIG. In this step, for example, at a temperature of 30 to 90 ° C., a pressure of 0.98 to 9.8 MPa is applied and pressure bonding is performed for 5 to 100 seconds.

  Thereby, the upper ceramic sheet laminate 28 is formed. Thereafter, as shown in FIG. 4 (h), the inside of the vacuum press is opened to the atmosphere, and the support film 40 is peeled from the lower ceramic green sheet 27.

  Through the above process, the silver paste layer 26 is embedded between the surface ceramic green sheet 24 and the lower ceramic green sheet 27. At this time, even if the surface ceramic green sheet 24 is thin, since the lower ceramic green sheet 27 is relatively thick, the embedding is sufficiently performed. Further, by reducing the pressure in the space where the surface ceramic green sheet 24 or the like is installed, even when the surface ceramic green sheet 24 is thin, the lower ceramic green sheet 27 is thick, so that the deformation of the surface ceramic green sheet 24 is accepted. It is possible to eliminate the vacancy between and improve the adhesion. That is, by reducing the pressure, the adhesion can be increased with a low pressure.

  Thereafter, a predetermined number of ceramic green sheets (lower ceramic sheets) are laminated and pressure-bonded in the same process, and finally the adhesive sheet 41 is peeled off. Alternatively, the lower ceramic sheet laminate 29 is formed by separately laminating and pressing (lower ceramic sheet forming step), and laminating and crimping in the same manner as described above, and finally as shown in FIG. A multilayer ceramic body 30 before sintering is formed. In FIG. 4 (i), the upper and lower sides are shown reversed from FIGS. 4 (a) to (h).

  Although described here in a simplified manner, the lower ceramic sheet laminate 29 is appropriately provided with a metal layer serving as an internal wiring constituting the high-frequency circuit, and, similarly to the above, a green sheet provided with a silver paste layer Are suitably laminated and pressure-bonded. In addition, in the lamination pressure bonding of the third and subsequent ceramic green sheets from the top, the pressure bonding can be performed without reducing the pressure. This is because the thickness of the second ceramic green sheet is sufficient, and the metal layers after the third layer are easily embedded in the ceramic green sheet layer, and the adhesion between the ceramic green sheet layers is increased.

  Thereafter, the multilayer ceramic substrate 10 is obtained by performing the steps after FIG.

  In addition, although the multilayer ceramic substrate 10 can be manufactured with the above manufacturing method, it is not restricted to this, If this is a manufacturing method which can manufacture the same structure, this can be used.

  In the above example, the structure near the surface of the multilayer ceramic substrate was mentioned. However, the structure inside the multilayer ceramic substrate and the structure on the opposite surface can be sintered together by the above-described sintering process. If so, it is optional.

  The above multilayer ceramic substrate was manufactured by the above manufacturing method. The ceramic green sheet material is the above LTCC material, and a slurry is prepared by adding 15 parts by weight of polyvinyl butyral resin and 10.5 parts by weight of di-n-butyl phthalate to 100 parts by weight of the LTCC material. A sheet was formed. The thickness of the second ceramic green sheet serving as the internal ceramic layer was in the range of 20 to 190 μm, and the thickness of the first ceramic green sheet serving as the surface ceramic sheet was in the range of 14 to 120 μm. An opening of φ60 μm was formed by laser processing, and whether or not the opening could be formed at this time was evaluated. Thereafter, a desired pattern and via wiring were formed by screen printing. Then, by using the above-mentioned vacuum lamination pressure bonding method, the first ceramic green sheet (surface ceramic green sheet) and the second ceramic green sheet (lower ceramic green sheet) are laminated by changing their thickness. A ceramic substrate was produced. At this time, the pressure reduction condition of the atmosphere in the vacuum lamination pressure bonding method was set to 80 kPa pressure reduction from atmospheric pressure, and a pressure of 6.1 MPa was applied to the laminated body at a temperature of 70 ° C. for 60 seconds. Thereafter, the ceramic green sheet was checked for tearing and peeling.

  Next, the multilayer ceramic body before sintering was fired, a metal plating layer was formed, and a multilayer ceramic substrate was produced. “Migration resistance evaluation was performed on this substrate by plating evaluation, continuity test evaluation, and insulation test. In addition, a multilayer ceramic substrate using a conventional overcoat layer was manufactured (Sample No. 24). The overcoat layer of Sample No. 24 was a ceramic material having a thickness of 12 μm, and this ceramic layer was colored by adding Co to the ceramic material in the multilayer ceramic substrate. The thickness of the ceramic layer adjacent to the overcoat layer was 50 μm after firing, and the thickness of the underlying ceramic layer was 25 μm after firing.

  The above evaluation results are shown in Table 1. The evaluation criteria here are as follows.

(Plating property)
Each sample after firing was subjected to Ni plating with an average film thickness of 5 μm and Au plating with an average film thickness of 0.4 μm using a commercially available electroless Ni plating solution and Au plating solution. The connection conductor after plating is observed with an electron microscope (SEM), and the state of the surface of the connection conductor is evaluated according to the following criteria from the area ratio of the plating attached to the connection conductor. ○.
Plating area ratio is 100%: Excellent Plating area ratio is less than 100% and 95% or more: Good Plating area ratio is less than 95%: Poor

(Continuity test)
Whether or not a desired pattern is connected to the multilayer ceramic substrate after plating was confirmed for all paths. The evaluation was based on the following criteria, and “good” or better was evaluated as “good”.
Continuity test pass rate is 100%: Excellent Continuity test pass rate is less than 100% and 95% or more: Good Continuity test pass rate is less than 95%: Poor

(Insulation test)
Apply 4V between the terminals connected to the surface layer electrodes to the multilayer ceramic substrate after plating, and place it in a high temperature and high humidity layer of 85 ° C. and 85% relative humidity for 1000 hours to reduce the leakage current between the surface layer electrodes. Migration resistance was evaluated by measuring. When the normal current value was 0.01 μA or less, when the current value exceeded 0.01 μA, it was recognized that a leak current was generated, and the evaluation was performed according to the following criteria.
Insulation test pass rate is 100%: Excellent Insulation test pass rate is less than 100% and 95% or more: Good Insulation test pass rate is less than 95%: Poor

  From the results shown in Table 1, in the formation of via holes, via holes having an opening hole diameter of φ60 μm by a laser could be formed in the examples of the present invention. However, the surface ceramic green sheet has a thick 148 μm. In 21 this could not be formed.

  In the upper ceramic sheet laminate forming step, the thickness of the surface (first) green sheet, which is an example of the present invention, is 20 to 120 μm, the thickness of the second green sheet exceeds 20 μm, and In the case where the total thickness of the first green sheet and the second green sheet exceeded 56 μm, there was no tearing or peeling, and a multilayer ceramic substrate could be manufactured through the subsequent sintering process. On the other hand, this total thickness is small. 1. No. 1 where the first green sheet is thin In No. 22, in the peeling of the support film after pressure bonding, the sheet was broken and could not be laminated. In addition, No. having a small total thickness. 2, no. No. 7, the first green sheet is thin In No. 23, when the support film was peeled after pressure bonding, an air pocket that was considered to be poor adhesion occurred between the adhesive sheet and the first green sheet, or between the first green sheet and the second green sheet. In addition, the thickness of the first and second green sheets that do not break or peel, and the thickness of the outermost ceramic layer corresponding to the total thickness range, the thickness of the adjacent ceramic layer, And the total thickness of these is the range after 15-90 micrometers in thickness after baking, and exceeds 15 micrometers, and exceeds 40 micrometers.

  In the evaluation of plating properties, No. 1 using a conventional overcoat layer was used. In the substrate of 24 (Comparative Example), defective plating frequently occurred. This is because the surface of the electrode (connecting conductor portion) that should be exposed is covered with an overcoat layer, and a portion that is not plated is generated. On the other hand, in the examples of the present invention in which no overcoat layer was used, the stacking was not possible. 1, no. It was judged that the surface of the electrode (connecting conductor part) and the ceramic surface of the surface (first) green sheet were substantially on the same plane except for 22, and good plating properties were confirmed.

  In addition, in the continuity test evaluation, it was confirmed that the examples of the present invention were good. On the other hand, no. No. 21 could not form a 60 μm via in the surface layer, resulting in poor conduction. No. 2, no. 7, no. In 23, poor conduction was confirmed in part. This is presumably because defects such as delamination and cracks occurred in the fired structure due to poor adhesion during green sheet lamination.

  5 shows cross-sectional SEM photographs of these structures ((a) No. 24: conventional multilayer ceramic substrate, (b) No. 4: multilayer ceramic substrate of Example). In the conventional multilayer ceramic substrate (a), the lower ceramic layer 91b of the external wiring 93 serving as a current path has a dense structure, but the upper overcoat layer 95 is not dense porous. On the other hand, in the embodiment (b), the internal wiring 13 is sandwiched between the dense ceramic layers 11 and 12.

  The results of measuring the migration characteristics of these multilayer ceramic substrates are shown in FIG. 6 (a: No. 24, b: No. 4). Here, regarding the migration determination, the dependency on the energization time was examined using the insulation test failure rate in the above-described insulation test as the migration occurrence rate. From the results shown in FIG. 6, migration occurred in 400 hours or more in the multilayer ceramic substrate of the comparative example, whereas no migration was observed in 1000 hours in the multilayer ceramic substrate of the example. Therefore, it was confirmed that the multilayer ceramic substrate of the example has high reliability. This is because the current path on the outermost surface is covered with a ceramic layer having a dense structure.

1 is a partial cross-sectional view of a multilayer ceramic substrate according to an embodiment of the present invention. 1 is a partial perspective view showing a structure of a multilayer ceramic substrate according to an embodiment of the present invention. It is process sectional drawing which shows the manufacturing method of the multilayer ceramic substrate which concerns on embodiment of this invention. It is a figure which shows the process of the vacuum lamination pressure bonding method used in the manufacturing method of the multilayer ceramic substrate which concerns on embodiment of this invention. It is a cross-sectional TEM photograph near the conductor part for a connection in a comparative example (a) and an Example (b). It is the measurement result which investigated the migration incidence in the comparative example (a) and the Example (b). It is sectional drawing of an example of the conventional multilayer ceramic substrate.

Explanation of symbols

10, 90 Multilayer ceramic substrate 11, 91a, 91b Ceramic layer 12 Surface ceramic layer 13, 92 Internal wiring 14, 94 Via wiring 15 Conductor portion 16, 96 Metal plating layer 21, 25 Ceramic green sheet layers 22, 23, 26 Metal layer 24 Surface ceramic green sheet 27 Lower ceramic green sheet 28 Upper ceramic sheet laminate 29 Lower ceramic sheet laminate 30 Multilayer ceramic body 40 Support film 41 Adhesive sheet 51 Press machine upper part 52 Press machine lower part 53 Elastic body 93 External wiring 93a Pad Part

Claims (9)

A multilayer ceramic substrate in which a plurality of ceramic layers are laminated and provided with a conductor part for connection on the outermost surface,
An outermost ceramic layer having a thickness of 15 to 90 μm in which via wiring and the connection conductor portion having a metal plating layer on the surface are formed;
A ceramic layer thicker than the outermost ceramic layer and adjacent to the outermost ceramic layer;
An inner wiring formed between the outermost ceramic layer and the adjacent ceramic layer and connected to the connecting conductor by the via wiring;
When viewed in the stacking direction of the multilayer ceramic substrate, the connecting conductor portion is formed on a surface wider than the via wiring,
The via wiring, the connecting conductor portion, and the internal wiring are electrically independent from the internal wiring in the lower ceramic layer formed on the side of the adjacent ceramic layer opposite to the outermost ceramic layer. Connected to each other,
Multilayer ceramic substrate and the surface of said connecting conductor part, and the ceramic surface of the ceramic layer of the outermost surface, characterized in that on the same plane. 2. The multilayer ceramic substrate according to claim 1, wherein a total thickness of the outermost ceramic layer and the adjacent ceramic layer exceeds 40 μm. Arranging a plurality before Symbol connecting conductor part is the outermost surface, the multilayer ceramic substrate according to claim 1 or 2 minimum spacing between the connecting conductor part is equal to or is 200μm or less. A method for producing a multilayer ceramic substrate, comprising: laminating a plurality of ceramic layers and forming a multilayer ceramic substrate having a connecting conductor portion provided on an outermost surface by sintering,
The first ceramic green sheet surface to a thickness after sintering becomes a ceramic layer of the outermost surface of 15 to 90 m, before SL inside the first ceramic green sheets, the connecting conductor portion and the internal wiring after sintering And a metal layer that becomes the connection conductor after sintering formed on a surface wider than the metal layer that becomes the via wiring when viewed in the stacking direction of the multilayer ceramic substrate. A surface ceramic green sheet forming step for forming the formed surface ceramic green sheet;
The superficial ceramic green lower ceramic green sheets forming a metal layer serving as the internal wiring after the sintering the second ceramic green sheet to be the ceramic layer adjacent to the ceramic layer of the outermost thick after sintering the seat A lower ceramic green sheet forming step to be formed;
The superficial ceramic green sheet and the lower layer ceramic green sheets are laminated crimped, said a connecting conductor part to become the surface of the metal layer and the first ceramic green sheet surface is in the same plane upper ceramic sheet laminate Forming an upper ceramic sheet laminate,
Separately from the upper ceramic sheet laminate, a lower ceramic sheet that forms a lower ceramic sheet adjacent to the ceramic layer adjacent to the outermost ceramic layer and an adjacent ceramic layer on the surface opposite to the outermost ceramic layer. A ceramic sheet forming step;
In a state where the metal layer serving as the via wiring, the metal layer serving as the connection conductor portion, and the metal layer serving as the internal wiring are electrically independent from and connected to the internal wiring in the lower ceramic sheet, A sintering step of firing an unsintered multilayer ceramic body comprising the upper ceramic sheet laminate and the lower ceramic sheet ;
A method for producing a multilayer ceramic substrate, comprising: The method for producing a multilayer ceramic substrate according to claim 4, further comprising a plating step of forming a metal plating layer on the surface of the connection conductor portion after sintering . Method for manufacturing a multilayer ceramic substrate according to claim 4 or 5 total pre Symbol thickness of the first ceramic green sheet and the second ceramic green sheet is characterized in that beyond the 56 .mu.m. In the upper ceramic sheet laminate forming step,
When pressure-bonding at least the surface ceramic green sheet, and when laminating and pressure-bonding the lower ceramic green sheet on the surface ceramic green sheet are performed in a reduced pressure atmosphere. The manufacturing method of the multilayer ceramic substrate of any one of Claims 1.   An electronic component comprising the multilayer ceramic substrate according to any one of claims 1 to 3, wherein a surface mount component is mounted on the metal plating layer by soldering.   The electronic component according to claim 8, wherein the surface mount component includes at least one of a semiconductor chip, a chip capacitor, and a chip resistor.