JP4867134B2 - Manufacturing method of semiconductor device - Google Patents

Description

The present invention relates to a method of manufacturing a semi-conductor device, in particular, it is suitably applied to a method of forming a film thickness different gate insulating film on the same substrate.

In a MOSFET (Metal Oxide Field Effect Transistor) using a thin-film SOI (Silicon On Insulator) substrate, the lower end of the gate electrode is rounded to perform electric oxidation after forming the gate insulating film in order to suppress electric field concentration, Thermal oxidation treatment for baking the oxide film is performed.
In the conventional semiconductor manufacturing process, in order to form gate insulating films having different thicknesses on the same substrate, a thick oxide film is formed on the entire surface by thermal oxidation, and then a thick oxide film in a region where a thin oxide film is formed. A thin oxide film is formed by removing and re-oxidizing.

Further, for example, in Patent Document 1, in order to form gate insulating films having different thicknesses on the same substrate, oxygen atoms are ion-implanted into the semiconductor substrate under different conditions, and oxygen introduction layers having different depths are oxidized. A method for converting to a membrane is disclosed.
Japanese Patent Laid-Open No. 10-92957

  However, if the thin-film SOI substrate is thermally oxidized after the gate insulating film is formed, the SOI layer in the source / drain region where the SOI layer is exposed is also oxidized, and the SOI layer becomes thinner by the subsequent cleaning process. . For this reason, there is a problem that the resistance of the source / drain region is increased, and the SOI layer penetrates when the contact is formed.

Further, in the method of forming gate insulating films having different thicknesses on the same substrate by reoxidation, it is necessary to remove the thick oxide film in the region where the thin oxide film is to be formed. For this reason, when removing the thick oxide film, etching damage occurs on the surface of the semiconductor layer, and the quality of the interface of the gate insulating film is deteriorated.
Further, in the method disclosed in Patent Document 1, since oxygen atoms need to be ion-implanted into the semiconductor substrate, there is a problem that the semiconductor substrate is damaged and the crystal quality of the semiconductor substrate is deteriorated.

It is an object of the present invention, while suppressing the deterioration of the quality of the gate insulating film interface, to form a film thickness different gate insulating film on the same substrate, capable of reducing the thinning of the semiconductor layer half It is providing the manufacturing method of a conductor apparatus.

In order to solve the above-described problem, according to a semiconductor device of one embodiment of the present invention, a first field effect transistor using a thermal oxide film as a gate insulating film and the first field effect transistor are formed. And a second field effect transistor formed on the same substrate and having a laminated film having a three-layer structure of thermal oxide film / silicon nitride film / oxide film as a gate insulating film.
Thereby, the gate insulating film can be thinned by removing the antioxidant film on the thermal oxide film. For this reason, in order to reduce the thickness of the gate insulating film in a part of the region, there is no need to remove the thick thermal oxide film and then reattach the thin thermal oxide film. As a result, when the gate insulating film is thinned, it is not necessary to expose the surface of the semiconductor layer by etching of the thermal oxide film, and the gate insulating film having a different thickness is suppressed while suppressing deterioration of the quality of the gate insulating film interface. The film can be formed on the same substrate.

  Also, by stacking the antioxidant film on the thermal oxide film, it becomes possible to perform the thermal oxidation process with the source / drain layer covered with the antioxidant film, and the thermal oxidation process is performed after the gate insulating film is formed. Even in this case, the semiconductor layer of the source / drain layer can be prevented from being thinned. For this reason, even when a field effect transistor is formed on a thin-film SOI substrate, it is possible to suppress the increase in resistance of the source / drain layer and to prevent the SOI layer from penetrating during contact formation. Can do.

In addition , by removing the silicon nitride film on the thermal oxide film, it is possible to reduce the thickness of the gate insulating film, while suppressing the deterioration of the quality of the interface of the gate insulating film and the same gate insulating film with different thicknesses. It can be formed on a substrate.

In addition, it is possible to perform a thermal oxidation process while the source / drain layer is covered with a silicon nitride film. Even when the thermal oxidation process is performed after the gate insulating film is formed, the semiconductor layer of the source / drain layer is oxidized. It is possible to suppress the increase in resistance of the source / drain layer.
Furthermore, by providing an oxide film on the silicon nitride film, an opening can be formed in the silicon nitride film using the oxide film as a hard mask. Therefore, an opening can be formed in the silicon nitride film by wet etching using hot phosphoric acid as an etchant, and etching damage to the thermal oxide film under the silicon nitride film can be suppressed. It is possible to suppress deterioration of the film quality.

In the semiconductor device according to one embodiment of the present invention, the first and second field effect transistors are formed over an SOI substrate.
As a result, element isolation of the field effect transistor can be easily performed, latch-up can be prevented, and the source / drain junction capacitance can be reduced. It is possible to increase the speed.

According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the thermal oxide film, the silicon nitride film, and the oxide film are sequentially formed on the first semiconductor and the second semiconductor formed on the same substrate. Forming a first opening for exposing the surface of the silicon nitride film in the oxide film formed on the first semiconductor; and the oxide film having the first opening formed therein. Etching the silicon nitride film to form a second opening in the silicon nitride film to expose the surface of the thermal oxide film, and the heat exposed through the second opening. Forming a first gate electrode on the oxide film and forming a second gate electrode on the oxide film formed on the second semiconductor.
In addition, according to the method of manufacturing a semiconductor device according to one aspect of the present invention, the step of sequentially forming the thermal oxide film, the silicon nitride film, and the oxide film on the semiconductor, and the first opening exposing the surface of the silicon nitride film Forming a portion in the oxide film, and etching the silicon nitride film using the oxide film in which the first opening is formed as a mask to form a second opening that exposes the surface of the thermal oxide film Forming on the silicon nitride film; forming a first gate electrode on the thermal oxide film exposed through the second opening; and forming a second gate electrode on the oxide film; It is characterized by providing.

This makes it possible to form gate insulating films with different thicknesses on the same substrate without exposing the surface of the semiconductor layer, and to prevent etching damage on the surface of the semiconductor layer. Deterioration of interface quality can be suppressed.
The method for manufacturing a semiconductor device according to one aspect of the present invention further includes a step of thermally oxidizing the surfaces of the first and second gate electrodes.

  Thus, the surfaces of the first and second gate electrodes can be thermally oxidized while the semiconductor surface on which the source / drain layer is formed is covered with the silicon nitride film. Therefore, it is possible to round the lower end of the gate electrode while suppressing the thinning of the semiconductor layer in which the source / drain layer is formed, and to reduce the electric field concentration at the lower end of the gate electrode. Can be improved.

  In addition, according to the method for manufacturing a semiconductor device of one embodiment of the present invention, ions are implanted into the semiconductor using the first and second gate electrodes as a mask, so that both sides of the first and second gate electrodes are respectively provided. Forming the disposed first and second LDD layers, forming first and second sidewall spacers on the sidewalls of the first and second gate electrodes, respectively, and first and second sidewall spacers; A step of performing a thermal oxidation process, and implanting ions into the semiconductor using the first and second gate electrodes and the first and second sidewall spacers as a mask, thereby forming lateral sides of the first and second sidewall spacers; Forming first and second source / drain layers respectively disposed in the first and second layers.

  Thereby, the thermal oxidation treatment of the sidewall spacer can be performed while the semiconductor surface on which the source / drain layer is formed is covered with the silicon nitride film. Therefore, the sidewall spacer can be baked while suppressing the thinning of the semiconductor layer on which the source / drain layer is formed.

Hereinafter, a semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.
1 and 2 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention.
In FIG. 1A, a BOX layer 2 is formed on a support substrate 1, and semiconductor layers 3 a and 3 b that are separated from each other by mesa processing are formed on the BOX layer 2. Here, the semiconductor layer 3a can be provided with the high breakdown voltage transistor formation region E1, and the semiconductor layer 3b can be provided with the low breakdown voltage transistor formation region E2.

As the support substrate 1, a semiconductor substrate such as Si, Ge, SiGe, GaAs, InP, GaP, GaN, or SiC may be used, or an insulating substrate such as glass, sapphire, or ceramic may be used. Also good. Moreover, as a material of the semiconductor layers 3a and 3b, for example, Si, Ge, SiGe, SiC, SiSn, PbS, GaAs, InP, GaP, GaN, ZnSe, and the like can be used. As the BOX layer 2, for example, An insulating layer such as SiO ₂ , SION, or Si ₃ N ₄ or a buried insulating film can be used. Moreover, as a semiconductor substrate in which the semiconductor layers 3a and 3b are formed on the BOX layer 2, for example, an SOI substrate can be used. As the SOI substrate, a SIMOX (Separation by Implanted Oxgen) substrate, a bonded substrate, or a laser is used. An annealed substrate or the like can be used. Further, as the semiconductor layers 3a and 3b, a polycrystalline semiconductor layer or an amorphous semiconductor layer may be used in addition to a single crystal semiconductor layer.

  Then, thermal oxidation of the semiconductor layers 3a and 3b is performed to form thermal oxide films 4a and 4b on the surfaces of the semiconductor layers 3a and 3b, respectively. Then, an antioxidant film 5 is formed on the semiconductor layers 3a and 3b on which the thermal oxide films 4a and 4b are respectively formed by a method such as CVD or sputtering. For example, a silicon nitride film can be used as the antioxidant film 5. Then, an oxide film 6 is formed on the antioxidant film 5 by a method such as CVD.

  Next, as shown in FIG. 1B, a resist pattern R provided with an opening Rb for exposing the oxide film 6 on the semiconductor layer 3b is formed on the oxide film 6 by using a photolithography technique. . Then, by etching the oxide film 6 using the resist pattern R as a mask, an opening 6b exposing the antioxidant film 5 on the semiconductor layer 2b is formed in the oxide film 6.

  Next, as shown in FIG. 1C, after removing the resist pattern R, the antioxidant film 5 is etched using the oxide film 6 as a mask to expose the thermal oxide film 4 on the semiconductor layer 2b. An opening 5 b is formed in the antioxidant film 5. As a result, by removing the antioxidant film 5 on the thermal oxide film 4b, a thin gate insulating film can be formed on the semiconductor layer 2b. For this reason, when the gate insulating film on the semiconductor layer 2b is thinned, it is not necessary to expose the surface of the semiconductor layer 2b by etching the thermal oxide film 4b, thereby preventing etching damage on the surface of the semiconductor layer 2b. Therefore, it is possible to suppress the deterioration of the quality of the gate insulating film interface of the semiconductor layer 2b.

When a silicon nitride film is used as the antioxidant film 5, the opening 5b can be formed in the antioxidant film 5 by wet etching using hot phosphoric acid as an etchant. As a result, etching damage to the thermal oxide film 4b on the semiconductor layer 2b can be suppressed, and deterioration of the film quality of the thermal oxide film 4b can be suppressed.
Further, by forming the opening 5b in the antioxidant film 5 using the oxide film 6 as a hard mask, it is possible to prevent the resist pattern R from being melted out by the etching solution of the antioxidant film 5. Deterioration of etching accuracy can be suppressed.

Further, by forming the opening 5b in the antioxidant film 5 by wet etching using hot phosphoric acid as an etchant, it becomes possible to prevent over-etching of the thermal oxide film 4b on the semiconductor layer 2b, and the thermal oxide film The film thickness accuracy of 4b can be ensured.
Next, as shown in FIG. 2A, a polycrystalline silicon layer is deposited on the oxide film 6 in which the opening 6b is formed by a method such as CVD. Then, by patterning the polycrystalline silicon layer using a photolithography technique and an etching technique, a gate electrode 6a is formed on the oxide film 6 on the semiconductor layer 3a, and on the thermal oxide film 4b on the semiconductor layer 3b. A gate electrode 6b is formed. Here, by forming the gate electrode 7a on the oxide film 6 on the semiconductor layer 3a, a gate insulating film having a three-layer structure of the thermal oxide film 4a / antioxidation film 5 / oxide film 6 is formed on the semiconductor layer 3a. It becomes possible to form. Further, by forming the gate electrode 7b on the thermal oxide film 4b on the semiconductor layer 3b, a gate insulating film made of the thermal oxide film 4a can be formed on the semiconductor layer 3b. Therefore, gate insulating films having different film thicknesses can be formed on the same support substrate 1, and field effect transistors having different breakdown voltages can be mounted on the same support substrate 1.

  Next, as shown in FIG. 2 (b), thermal oxidation is performed on the surfaces of the gate electrodes 7a and 7b to form rounded portions 10 at the lower ends of the gate electrodes 7a and 7b, respectively. Add roundness to the bottom edge. Here, when the rounded portion 10 is formed at the lower ends of the gate electrodes 7a and 7b, the surface of the semiconductor layers 3a and 3b on which the source / drain layers 11a and 11b are respectively formed is covered with the antioxidant film 5, and the gate is formed. It becomes possible to thermally oxidize the surfaces of the electrodes 7a and 7b. Therefore, the semiconductor layers 3a and 3b in which the source / drain layers 11a and 11b are formed can be prevented from being thermally oxidized, and the thin film of the semiconductor layers 3a and 3b in which the source / drain layers 11a and 11b are formed. The lower ends of the gate electrodes 7a and 7b can be rounded while suppressing the formation. As a result, it is possible to reduce the electric field concentration at the lower ends of the gate electrodes 7a and 7b while suppressing the increase in resistance of the source / drain layers 11a and 11b, thereby improving the breakdown voltage of the field effect transistor. Can be made.

  Then, by using the gate electrodes 7a and 7b as a mask, impurities such as As, P, and B are ion-implanted into the semiconductor layers 3a and 3b, so that low-concentration impurity introduction layers disposed on both sides of the gate electrodes 7a and 7b, respectively. LDD (Lightly Doped Drain) layers 8a and 8b are formed on the semiconductor layers 3a and 3b, respectively. Then, an insulating layer is formed on the semiconductor layers 3a and 3b on which the LDD layers 8a and 8b are formed by a method such as CVD, and the insulating layer is etched back using anisotropic etching such as RIE. Side walls 9a and 9b are formed on the side walls of the electrodes 7a and 7b, respectively. Here, when the side walls 9a and 9b are respectively formed on the side walls of the gate electrodes 7a and 7b, the insulating layer can be etched back while the surface of the BOX layer 2 is covered with the antioxidant film 5, and the BOX layer 2 can be prevented from being removed.

  Then, the sidewalls 9a and 9b are baked by performing a thermal oxidation process on the sidewalls 9a and 9b. Here, when the sidewalls 9a and 9b are baked, the thermal oxidation of the sidewalls 9a and 9b is performed while the surfaces of the semiconductor layers 3a and 3b on which the source / drain layers 11a and 11b are formed are covered with the antioxidant film 5, respectively. Processing can be performed. Therefore, it is possible to suppress the thinning of the semiconductor layers 3a and 3b on which the source / drain layers 11a and 11b are formed, and to suppress the increase in resistance of the source / drain layers 11a and 11b. It is possible to prevent the semiconductor layers 3a and 3b from penetrating during contact formation.

Then, by using the gate electrodes 7a and 7b and the side walls 9a and 9b as masks, impurities such as As, P, and B are ion-implanted into the semiconductor layers 3a and 3b, respectively, so that they are arranged on the sides of the side walls 9a and 9b. Source / drain layers 11a and 11b made of the high-concentration impurity introduced layer are formed on the semiconductor layers 3a and 3b, respectively.
Next, as shown in FIG. 2C, after removing the antioxidant film 5 on the source / drain layers 11a and 11b, the thermal oxide films 4a and 4b on the source / drain layers 11a and 11b are removed. .

  In the above-described embodiment, the field effect transistor formed on the SOI substrate has been described as an example. However, in addition to the field effect transistor formed on the SOI substrate, the electric field formed on the bulk semiconductor substrate is also described. You may apply to an effect type transistor. For example, the present invention may be applied to a TFT (Thin Film Transistor).

Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention.

Explanation of symbols

  E1 high breakdown voltage transistor formation region, E2 low breakdown voltage transistor formation region, 1 support substrate, 2 BOX layer, 3a, 3b semiconductor layer, 4a, 4b thermal oxide film, 5 antioxidant film, 6 oxide film, 7a, 7b gate electrode, 8a, 8b LDD layer, 9a, 9b Side wall spacer, 10 round portion, 11a, 11b source / drain layer, R resist pattern, Rb opening

Claims (2)

Sequentially forming a thermal oxide film, a silicon nitride film, and an oxide film on the first semiconductor and the second semiconductor formed on the same substrate;
Forming a first opening in the oxide film formed on the first semiconductor to expose a surface of the silicon nitride film;
Etching the silicon nitride film using the oxide film in which the first opening is formed as a mask to form a second opening in the silicon nitride film exposing the surface of the thermal oxide film;
Forming a first gate electrode on the thermal oxide film exposed through the second opening and forming a second gate electrode on the oxide film formed on the second semiconductor; A method for manufacturing a semiconductor device, comprising:   2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of thermally oxidizing the surfaces of the first and second gate electrodes.

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