JP4854287B2 - Semiconductor device - Google Patents

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Publication number
JP4854287B2
JP4854287B2 JP2005357075A JP2005357075A JP4854287B2 JP 4854287 B2 JP4854287 B2 JP 4854287B2 JP 2005357075 A JP2005357075 A JP 2005357075A JP 2005357075 A JP2005357075 A JP 2005357075A JP 4854287 B2 JP4854287 B2 JP 4854287B2
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semiconductor chip
connection terminal
conductive adhesive
conductive
electrode portion
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JP2007165419A (en
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友明 黒石
大道 光明寺
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

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  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

本発明は基板面に半導体チップなどの電気部品を実装する実装方法に関するものである。   The present invention relates to a mounting method for mounting an electrical component such as a semiconductor chip on a substrate surface.

図５は基板１に半導体チップ２を実装する一例を示している。
図５（ａ）では、基板１の接続端子３に、導電性接着剤４を介して半導体チップ２の電極部５を押し付け、導電性接着剤４が硬化した後に、図５（ｂ）に示すようにアンダーフィル６を基板１と半導体チップ２との間に充填し硬化させて、接続端子３と電極部５との電気接続個所に水分などが浸入しないように保護している。
特開２００１−３０８５１０公報 図５ FIG. 5 shows an example of mounting the semiconductor chip 2 on the substrate 1.
In FIG. 5A, the electrode portion 5 of the semiconductor chip 2 is pressed against the connection terminal 3 of the substrate 1 via the conductive adhesive 4, and after the conductive adhesive 4 is cured, it is shown in FIG. 5B. In this way, the underfill 6 is filled between the substrate 1 and the semiconductor chip 2 and cured to protect moisture and the like from entering the electrical connection portion between the connection terminal 3 and the electrode portion 5.
Japanese Patent Laid-Open No. 2001-308510 FIG.

上記のような実装構造の場合、硬化した導電性接着剤４の弾性率は１０００ＭＰａ程度，硬化したアンダーフィル６の弾性率は１０００ＭＰａ程度であって、半導体チップ２は基板１に強固に固定されている。   In the case of the mounting structure as described above, the elastic modulus of the cured conductive adhesive 4 is about 1000 MPa, the elastic modulus of the cured underfill 6 is about 1000 MPa, and the semiconductor chip 2 is firmly fixed to the substrate 1. Yes.

このような実装済みの半導体装置において、半導体チップ２に図６に仮想線で示すように変形しようとする反りが発生しても、半導体チップ２は上記のように導電性接着剤４ならびにアンダーフィル６によって基板１に強固に固定されているため、変形することができず、当初にはこの反りに伴う応力が蓄積されるだけであるが、蓄積された前記応力がアンダーフィル６の付勢力を超えたときに、図６に示すように半導体チップ２が実際に反り返った状態に変形し、接続端子３と電極部５との電気接続個所に破断Ａが発生して電気接続が不良になる障害が発生する。   In such a mounted semiconductor device, even if the semiconductor chip 2 warps to be deformed as indicated by a virtual line in FIG. 6, the semiconductor chip 2 is in contact with the conductive adhesive 4 and the underfill as described above. 6 is firmly fixed to the substrate 1 so that it cannot be deformed. Initially, only the stress associated with this warp is accumulated, but the accumulated stress exerts the biasing force of the underfill 6. When exceeding, the semiconductor chip 2 is deformed into a warped state as shown in FIG. 6, and a failure A occurs in the electrical connection portion between the connection terminal 3 and the electrode portion 5, resulting in poor electrical connection. Will occur.

本発明は電気接続個所をアンダーフィルで水分などの浸入から保護することができ、しかも、電気部品に変形が発生した場合でも電気接続を維持することができる実装方法を提供することを目的とする。   An object of the present invention is to provide a mounting method that can protect an electrical connection portion from intrusion of moisture or the like with an underfill, and that can maintain electrical connection even when deformation occurs in an electrical component. .

本発明の半導体装置は、電気部品の電極部を基板の接続端子に電気接続した半導体装置であって、前記接続端子の端子面の中央および前記電極部の電極面の中央にそれぞれ１つのみ凹部が設けられ、前記電極部と基板の接続端子の間に硬化状態において２ＭＰａ〜５ＭＰａの弾性率の導電性接着剤が介装され、前記導電性接着剤の周囲に硬化状態で２０ＭＰａ〜１００ＭＰａの弾性率を有するアンダーフィル樹脂が充填されていることを特徴とする。 The semiconductor device of the present invention is a semiconductor device in which an electrode part of an electrical component is electrically connected to a connection terminal of a substrate, and only one recess is provided in each of the center of the terminal surface of the connection terminal and the center of the electrode surface of the electrode part. And a conductive adhesive having an elastic modulus of 2 MPa to 5 MPa in a cured state is interposed between the electrode portion and the connection terminal of the substrate, and an elastic property of 20 MPa to 100 MPa in the cured state around the conductive adhesive. It is characterized by being filled with an underfill resin having a rate.

この構成によると、導電性接着剤が従来に比べて低弾性率であるため、電気部品の変形を許容することによって不要な応力が電気部品に蓄積されることを低減でき、しかも、前記変形に伴って導電性接着剤が引き延ばされることによって、前記電気部品に変形が発生した場合でも電気接続を維持できる。   According to this configuration, since the conductive adhesive has a lower elastic modulus than conventional ones, it is possible to reduce the accumulation of unnecessary stress in the electrical component by allowing the electrical component to be deformed. As a result, the conductive adhesive is stretched, so that the electrical connection can be maintained even when the electrical component is deformed.

（実施の形態１）
図１（ｂ）は本発明の実装方法によって実装した半導体装置を示している。
電気部品としての半導体チップ２の電極部５と基板１の接続端子３の間には、硬化状態において低弾性率の導電性接着剤７が介装されている。また、半導体チップ２と基板の間には硬化状態でも低弾性率を有するアンダーフィル６が充填されている。ここで、導電性接着剤７には硬化状態の弾性率が２ＭＰａ〜５ＭＰａになるよう調製した導電性シリコンゴムを使用した。アンダーフィル６には硬化状態の弾性率が２０ＭＰａ〜１００ＭＰａになるよう調製したシリコン樹脂を使用した。前記導電性シリコンゴムはシリコン樹脂に炭素粉末などの導電性物質を分散させて構成されている。半導体チップ２の電極部５と基板１の接続端子３は何れも高弾性率の例えば金（Ａｕ）であった。金（Ａｕ）の弾性率は１００００ＭＰａ以上である。シリコンゴム，シリコン樹脂以外に、フッ素ゴム，フッ素樹脂などを用いても良い。シリコンゴムとフッ素樹脂の組み合わせ、フッ素ゴムとシリコン樹脂の組み合わせでもよい。 (Embodiment 1)
FIG. 1B shows a semiconductor device mounted by the mounting method of the present invention.
A conductive adhesive 7 having a low elastic modulus is interposed between the electrode portion 5 of the semiconductor chip 2 as an electrical component and the connection terminal 3 of the substrate 1 in the cured state. An underfill 6 having a low elastic modulus is filled between the semiconductor chip 2 and the substrate even in a cured state. Here, as the conductive adhesive 7, conductive silicon rubber prepared so that the elastic modulus in a cured state was 2 MPa to 5 MPa was used. For the underfill 6, a silicon resin prepared so that the elastic modulus in a cured state was 20 MPa to 100 MPa was used. The conductive silicone rubber is configured by dispersing a conductive substance such as carbon powder in a silicon resin. The electrode part 5 of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 are both high elastic modulus, for example, gold (Au). The elastic modulus of gold (Au) is 10,000 MPa or more. In addition to silicon rubber and silicon resin, fluororubber and fluororesin may be used. A combination of silicon rubber and fluororesin, or a combination of fluororubber and silicon resin may be used.

実装工程の最初は図１（ａ）に示すように、各接続端子３に対してインクジェットプリンタ（図示せず）のヘッドから導電性接着剤７が供給される。導電性接着剤７はディスペンサによって供給しても良い。   At the beginning of the mounting process, as shown in FIG. 1A, a conductive adhesive 7 is supplied from the head of an ink jet printer (not shown) to each connection terminal 3. The conductive adhesive 7 may be supplied by a dispenser.

次に図１（ｂ）に示すように、接続端子３に、導電性接着剤７を介して半導体チップ２の電極部５を押し付け、導電性接着剤７が硬化した後にアンダーフィル６を基板１と半導体チップ２との間に充填し硬化させて、接続端子３と電極部５との電気接続個所に水分などが浸入しないように保護している。   Next, as shown in FIG. 1B, the electrode portion 5 of the semiconductor chip 2 is pressed against the connection terminal 3 via the conductive adhesive 7, and after the conductive adhesive 7 is cured, the underfill 6 is attached to the substrate 1. Between the semiconductor chip 2 and the semiconductor chip 2, it is filled and cured to protect moisture and the like from entering the electrical connection portion between the connection terminal 3 and the electrode portion 5.

このように構成したため、半導体チップ２に図１（ｃ）に示すように中央部に比べて外周部が大きく上方に反り返る変形が発生した場合には、導電性接着剤７ならびにアンダーフィル６が低弾性率であるため、半導体チップ２の前記変形を妨げることが従来に比べて少なく、半導体チップ２に不要な応力が蓄積されない。このように半導体チップ２の前記変形を許容するとともに、導電性接着剤７が従来に比べて低弾性率であるため、図１（ｃ）の外周側の接続端子３と電極部５との接続個所に見られるように、半導体チップ２の前記変形に伴って、導電性接着剤７が上下方向に引き延ばされることによって、半導体チップ２に変形が発生した場合でも電気接続を維持できる。   With this configuration, when the semiconductor chip 2 is deformed such that the outer peripheral portion largely warps upward compared to the central portion as shown in FIG. 1C, the conductive adhesive 7 and the underfill 6 are low. Due to the elastic modulus, the deformation of the semiconductor chip 2 is less disturbed than in the past, and unnecessary stress is not accumulated in the semiconductor chip 2. Thus, while permitting the deformation of the semiconductor chip 2 and the conductive adhesive 7 has a lower elastic modulus than the conventional one, the connection between the connection terminal 3 and the electrode portion 5 on the outer peripheral side in FIG. As can be seen, the conductive adhesive 7 is extended in the vertical direction along with the deformation of the semiconductor chip 2, so that the electrical connection can be maintained even when the semiconductor chip 2 is deformed.

（実施の形態２）
図２は本発明の（実施の形態２）を示す。
図１に示した（実施の形態１）では、接続端子３の端子面と電極部５の電極面の対向部か、何れも平面であったが、この（実施の形態２）では図２（ａ）に見られるように、接続端子３の端子面の中央部に凹部８が形成されている。電極部５の電極面の中央部には凹部９が形成されている。その他は（実施の形態１）と同じである。 (Embodiment 2)
FIG. 2 shows (Embodiment 2) of the present invention.
In (Embodiment 1) shown in FIG. 1, both the terminal surface of the connection terminal 3 and the electrode surface of the electrode portion 5 are flat, but in this (Embodiment 2), FIG. As can be seen from a), a recess 8 is formed in the center of the terminal surface of the connection terminal 3. A concave portion 9 is formed at the center of the electrode surface of the electrode portion 5. Others are the same as (Embodiment 1).

このように構成したため、インクジェットプリンタのヘッドから発射されて接続端子３の端子面に着弾した導電性接着剤７、またはディスペンサから供給された導電性接着剤７を、接続端子３に電極部５を押し付けるまで、安定して接続端子３の端子面の中央に維持させることができる。   Since it comprised in this way, the conductive adhesive 7 which was discharged from the head of the inkjet printer and landed on the terminal surface of the connection terminal 3 or the conductive adhesive 7 supplied from the dispenser is used, and the electrode part 5 is provided on the connection terminal 3. Until it is pressed, it can be stably maintained at the center of the terminal surface of the connection terminal 3.

また、このように凹部８，９を設けることによって、導電性接着剤７と接続端子３との接着面積が増大し、導電性接着剤７と電極部との接着面積が増大して、図２（ｂ）に示すように半導体チップ２の変形に伴う導電性接着剤７の上下方向への引き延ばし動作がより確実になり、電気接続の信頼性が向上する。   Further, by providing the recesses 8 and 9 in this manner, the adhesion area between the conductive adhesive 7 and the connection terminal 3 is increased, and the adhesion area between the conductive adhesive 7 and the electrode portion is increased, and FIG. As shown in (b), the up and down operation of the conductive adhesive 7 accompanying the deformation of the semiconductor chip 2 becomes more reliable, and the reliability of electrical connection is improved.

なお、上記の各実施の形態では導電性接着剤７を基板１の側の接続端子３に供給したが、これは半導体チップ２の電極部５に供給して、接続端子３と電極部５とで導電性接着剤７を挟み込むように構成することもできる。また、接続端子３と電極部５の両方に導電性接着剤７を供給して、接続端子３と電極部５とで導電性接着剤７を挟み込むように構成することもできる。   In each of the above embodiments, the conductive adhesive 7 is supplied to the connection terminal 3 on the substrate 1 side, but this is supplied to the electrode part 5 of the semiconductor chip 2, and the connection terminal 3, the electrode part 5, The conductive adhesive 7 can be sandwiched between. Alternatively, the conductive adhesive 7 may be supplied to both the connection terminal 3 and the electrode part 5 so that the conductive adhesive 7 is sandwiched between the connection terminal 3 and the electrode part 5.

上記の（実施の形態２）では、接続端子３に凹部８を設け、電極部５にも凹部９を設けたが、導電性接着剤７が着弾しない方の面には凹部を形成しないことによってもほぼ同様の効果を期待できる。   In the above (Embodiment 2), the connection terminal 3 is provided with the recess 8 and the electrode part 5 is also provided with the recess 9. However, by not forming the recess on the surface on which the conductive adhesive 7 does not land. Can expect almost the same effect.

（実施の形態３）
図３は本発明の（実施の形態３）を示す。
（実施の形態１）では、半導体チップ２の電極部５と基板１の接続端子３は高弾性率であり、導電性接着剤７とアンダーフィル６がともに低弾性率のものを使用したが、この（実施の形態３）では半導体チップ２の電極部５Ａが低弾性率の導電性樹脂で形成されている点だけが（実施の形態１）とは異なっている。 (Embodiment 3)
FIG. 3 shows (Embodiment 3) of the present invention.
In (Embodiment 1), the electrode part 5 of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 have a high elastic modulus, and both the conductive adhesive 7 and the underfill 6 have a low elastic modulus. This (Embodiment 3) differs from (Embodiment 1) only in that the electrode portion 5A of the semiconductor chip 2 is formed of a low elastic conductive resin.

具体的には、電極部５Ａもフッ素系樹脂に導電性粒子を２０重量％〜５０重量％入れて導電性を付与した。ここで導電性粒子をさらに多くした場合には、弾性率が上がるので好ましくない。導電性粒子としては、銀粒子１μｍを用いたが、他の導電性粒子でもよい。導電性粒子の径が大きくなると弾性率が高くなるので、１μｍ以下の径のものがよい。   Specifically, the electrode part 5A was also provided with conductivity by putting 20 wt% to 50 wt% of conductive particles in a fluororesin. If the conductive particles are further increased, the elastic modulus is increased, which is not preferable. As the conductive particles, silver particles of 1 μm are used, but other conductive particles may be used. Since the elastic modulus increases as the diameter of the conductive particles increases, a particle having a diameter of 1 μm or less is preferable.

このように構成したため、基板１に実装した半導体チップ２が、図３（ｂ）に示すように変形した場合には、それに伴って、低弾性率の導電性接着剤７，低弾性率のアンダーフィル６，ならびに低弾性率の電極部５Ａが、弾性変形することによって、半導体チップ２に変形が発生した場合でも電気接続を維持できる。   With this configuration, when the semiconductor chip 2 mounted on the substrate 1 is deformed as shown in FIG. 3B, the low-modulus conductive adhesive 7 and the low-modulus undercoat are accompanied accordingly. Even when the semiconductor chip 2 is deformed, the electrical connection can be maintained by elastically deforming the film 6 and the electrode portion 5A having a low elastic modulus.

下記の（表１）のサンプル１〜サンプル５は、電極部５Ａの材質とアンダーフィル６の材質との組み合わせと熱特性の実験結果を示している。なお、サンプル６は比較例で、電極部５Ａの材質が金（Ａｕ）、アンダーフィル６がエポキシ樹脂である。   Sample 1 to Sample 5 below (Table 1) show the experimental results of the combination of the material of the electrode portion 5A and the material of the underfill 6 and the thermal characteristics. Sample 6 is a comparative example in which the electrode portion 5A is made of gold (Au) and the underfill 6 is an epoxy resin.

Figure 0004854287
サンプル１は電極部５Ａの材質が導電性のフッ素樹脂、アンダーフィル６がフッ素樹脂である。サンプル２は電極部５Ａの材質が導電性のシリコン樹脂、アンダーフィル６がシリコン樹脂である。サンプル３は電極部５Ａの材質が導電性のフッ素樹脂、アンダーフィル６がシリコン樹脂である。サンプル４は電極部５Ａの材質が導電性のシリコン樹脂、アンダーフィル６がエポキシ樹脂である。サンプル５は電極部５Ａの材質が導電性のフッ素樹脂、アンダーフィル６がエポキシ樹脂である。
Figure 0004854287
 In Sample 1, the material of the electrode portion 5A is a conductive fluororesin, and the underfill 6 is a fluororesin. In the sample 2, the material of the electrode portion 5A is conductive silicon resin, and the underfill 6 is silicon resin. In the sample 3, the material of the electrode portion 5A is a conductive fluororesin, and the underfill 6 is a silicon resin. In the sample 4, the material of the electrode portion 5A is a conductive silicon resin, and the underfill 6 is an epoxy resin. In the sample 5, the material of the electrode portion 5A is a conductive fluororesin, and the underfill 6 is an epoxy resin.

ここで（表１）の熱特性とは、高湿高温にて１０℃と８０℃の繰り返しを５００サイクル与えた各サンプルの電導率を測定し、◎印は変化１％未満、○印は変化１％以上で３％未満、△印は変化３％以上、×印は熱特性の改善が見られない、である。使用した各樹脂の弾性率は、下記の通りである。   Here, the thermal characteristics of (Table 1) indicate the electrical conductivity of each sample subjected to 500 cycles of 10 ° C. and 80 ° C. at high humidity and high temperature, ◎ indicates less than 1% change, ○ indicates change. 1% or more and less than 3%, Δ mark indicates a change of 3% or more, and X mark indicates no improvement in thermal characteristics. The elastic modulus of each resin used is as follows.

フッ素樹脂 ５０〜 ２００Ｍｐａ
エポキシ樹脂 １０００〜２０００Ｍｐａ
シリコン樹脂 １〜 ５０Ｍｐａ
金（Ａｕ） １００００Ｍｐａ以上
（表１）の実験結果を検討する。 Fluorine resin 50-200Mpa
Epoxy resin 1000-2000Mpa
Silicone resin 1-50Mpa
The experimental result of gold (Au) 10000 Mpa or more (Table 1) will be examined.

比較例のサンプル６は、基板１と半導体チップ２とエポキシ樹脂のアンダーフィル６と金（Ａｕ）の電極部５Ａとの熱膨張の差が大きく、熱的に不安定。
サンプル４とサンプル５は、サンプル６に比較してシリコン樹脂の電極部５Ａ，フッ素樹脂の電極部５Ａが周辺の熱膨張を緩和しているため良いが、熱的に弱い。 The sample 6 of the comparative example has a large thermal expansion difference among the substrate 1, the semiconductor chip 2, the epoxy resin underfill 6, and the gold (Au) electrode portion 5 </ b> A, and is thermally unstable.
Samples 4 and 5 are good because the silicon resin electrode portion 5A and the fluororesin electrode portion 5A alleviate the thermal expansion of the surroundings compared to the sample 6, but they are thermally weak.

サンプル２は、電極部５Ａとアンダーフィル６が同じ熱膨張率なので、安定しているが、熱的安定性に弱い。
サンプル１とサンプル３は、何れも熱特性が良好であった。 The sample 2 is stable because the electrode portion 5A and the underfill 6 have the same coefficient of thermal expansion, but is weak in thermal stability.
Sample 1 and sample 3 both had good thermal characteristics.

サンプル５は、サンプル１とサンプル３と同じく電極部５Ａにフッ素樹脂を使用しているが、熱特性はあまりよくない。これは、アンダーフィル６として使用しているエポキシ樹脂のために電極部５Ａに変形が発生しているためと思われる。   Sample 5 uses a fluororesin for electrode portion 5A as in samples 1 and 3, but its thermal characteristics are not so good. This is probably because the electrode portion 5A is deformed due to the epoxy resin used as the underfill 6.

このように、電極部５Ａとアンダーフィル６に硬化状態で低弾性率の樹脂を採用したサンプル１〜サンプル３が従来例のサンプル６に比べて熱特性が飛躍的に向上して信頼性の向上が確認できた。また、（実施の形態１）のように半導体チップ２の変形に伴って、低弾性率の導電性接着剤７とだけが変形する場合と比べると、この（実施の形態３）では導電性接着剤７とアンダーフィル６に加えて電極部５Ａが効果的に弾性変形し、信頼性はより高い。   Thus, Sample 1 to Sample 3, which employs a low-modulus resin in a cured state for the electrode portion 5A and the underfill 6, have dramatically improved thermal characteristics and improved reliability compared to the sample 6 of the conventional example. Was confirmed. Further, as compared with the case where only the low elastic modulus conductive adhesive 7 is deformed as the semiconductor chip 2 is deformed as in (Embodiment 1), in this (Embodiment 3), the conductive bonding is performed. In addition to the agent 7 and the underfill 6, the electrode portion 5A is effectively elastically deformed, and the reliability is higher.

なお、上記の例では半導体チップ２の電極部５Ａと基板１の接続端子３の内の一方である電極部５Ａだけを、硬化状態で低弾性率の導電性樹脂で形成したが、基板１の接続端子３だけを硬化状態で低弾性率の導電性樹脂で形成したり、半導体チップ２の電極部５Ａと基板１の接続端子３の両方を硬化状態で低弾性率の導電性樹脂で形成して構成することもできる。   In the above example, only the electrode portion 5A which is one of the electrode portion 5A of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 is formed of a conductive resin having a low elastic modulus in a cured state. Only the connection terminal 3 is formed with a low elastic modulus conductive resin in a cured state, or both the electrode portion 5A of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 are formed with a low elastic modulus conductive resin in a cured state. It can also be configured.

（実施の形態４）
図４は本発明の（実施の形態４）を示す。
（実施の形態１）では、半導体チップ２の電極部５と基板１の接続端子３は高弾性率であり、導電性接着剤７とアンダーフィル６がともに低弾性率のものを使用したが、この（実施の形態４）では図４（ａ）に示すように、半導体チップ２と基板１の電気的接続に、高弾性率の材料として従来例として図５に示したものと同じ、硬化した状態での弾性率が１０００ＭＰａ程度の導電性接着剤４を使用した。半導体チップ２の電極部５Ａは（実施の形態３）を示す図３（ａ）と同じ低弾性率の導電性樹脂を採用した。 (Embodiment 4)
FIG. 4 shows (Embodiment 4) of the present invention.
In (Embodiment 1), the electrode part 5 of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 have a high elastic modulus, and both the conductive adhesive 7 and the underfill 6 have a low elastic modulus. In this (Embodiment 4), as shown in FIG. 4 (a), the same electrical connection between the semiconductor chip 2 and the substrate 1 as shown in FIG. The conductive adhesive 4 having an elastic modulus in a state of about 1000 MPa was used. The electrode part 5A of the semiconductor chip 2 employs the same low elastic conductive resin as in FIG. 3A showing the third embodiment.

このように構成したため、基板１に実装した半導体チップ２が、図４（ｂ）に示すように変形した場合には、それに伴って、低弾性率のアンダーフィル６，ならびに低弾性率の電極部５Ａが弾性変形することによって、半導体チップ２に変形が発生した場合でも電気接続を維持でき、従来例に比べて信頼性が向上する。   With this configuration, when the semiconductor chip 2 mounted on the substrate 1 is deformed as shown in FIG. 4B, the low-elasticity underfill 6 and the low-elasticity electrode portion are accompanied accordingly. By elastically deforming 5A, electrical connection can be maintained even when the semiconductor chip 2 is deformed, and reliability is improved as compared with the conventional example.

なお、上記の例では半導体チップ２の電極部５Ａと基板１の接続端子３の内の一方である電極部５Ａだけを、硬化状態で低弾性率の導電性樹脂で形成したが、基板１の接続端子３だけを硬化状態で低弾性率の導電性樹脂で形成したり、半導体チップ２の電極部５Ａと基板１の接続端子３の両方を硬化状態で低弾性率の導電性樹脂で形成して構成することもできる。   In the above example, only the electrode portion 5A which is one of the electrode portion 5A of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 is formed of a conductive resin having a low elastic modulus in a cured state. Only the connection terminal 3 is formed with a low elastic modulus conductive resin in a cured state, or both the electrode portion 5A of the semiconductor chip 2 and the connection terminal 3 of the substrate 1 are formed with a low elastic modulus conductive resin in a cured state. It can also be configured.

また、（実施の形態３）（実施の形態４）において、基板１の接続端子３の面と半導体チップ２の電極部５Ａの面は何れも平面であったが、（実施の形態２）の図２に示すように凹部８，９を形成することもできる。基板１の接続端子３の面と半導体チップ２の電極部５Ａの面の一方にだけ凹部８または凹部９を形成することもできる。   Further, in (Embodiment 3) (Embodiment 4), the surface of the connection terminal 3 of the substrate 1 and the surface of the electrode portion 5A of the semiconductor chip 2 are both flat surfaces. As shown in FIG. 2, the recesses 8 and 9 can be formed. The concave portion 8 or the concave portion 9 can be formed only on one of the surface of the connection terminal 3 of the substrate 1 and the surface of the electrode portion 5A of the semiconductor chip 2.

劣悪な動作環境においても安定して動作する高信頼性の半導体装置の実現に寄与できる。   This contributes to the realization of a highly reliable semiconductor device that operates stably even in a poor operating environment.

本発明の（実施の形態１）の実装工程の断面図と半導体チップが変形した場合の断面図Sectional view of mounting process of (Embodiment 1) of the present invention and sectional view when semiconductor chip is deformed 本発明の（実施の形態２）の実装工程の要部断面図と半導体チップが変形した場合の断面図Sectional view of main part of mounting process of (Embodiment 2) of the present invention and sectional view when semiconductor chip is deformed 本発明の（実施の形態３）の実装状態の要部断面図と半導体チップが変形した場合の断面図Cross-sectional view of the main part in the mounted state of (Embodiment 3) of the present invention and a cross-sectional view when the semiconductor chip is deformed 本発明の（実施の形態４）の実装状態の要部断面図と半導体チップが変形した場合の断面図Cross-sectional view of the main part in the mounted state of (Embodiment 4) of the present invention and a cross-sectional view when the semiconductor chip is deformed 従来の実装工程の断面図Cross-sectional view of conventional mounting process 半導体チップが変形した場合の従来の断面図Conventional sectional view when the semiconductor chip is deformed

符号の説明Explanation of symbols

１ 基板
２ 半導体チップ（電気部品）
３ 接続端子
５，５Ａ 電極部
６ アンダーフィル
７ 導電性接着剤
８，９ 凹部 1 Substrate 2 Semiconductor chip (electrical component)
3 Connection terminal 5, 5A Electrode 6 Underfill 7 Conductive adhesive 8, 9 Recess

Claims (2)

電気部品の電極部を基板の接続端子に電気接続した半導体装置であって、
前記接続端子の端子面の中央および前記電極部の電極面の中央にそれぞれ１つのみ凹部が設けられ、前記電極部と基板の接続端子の間に硬化状態において２ＭＰａ〜５ＭＰａの弾性率の導電性接着剤が介装され、
前記導電性接着剤の周囲に硬化状態で２０ＭＰａ〜１００ＭＰａの弾性率を有するアンダーフィル樹脂が充填されている
半導体装置。 A semiconductor device in which an electrode part of an electrical component is electrically connected to a connection terminal of a substrate,
Only one recess is provided in the center of the terminal surface of the connection terminal and in the center of the electrode surface of the electrode part, and the conductivity of elasticity is 2 MPa to 5 MPa in the cured state between the electrode part and the connection terminal of the substrate. An adhesive is inserted,
A semiconductor device in which an underfill resin having an elastic modulus of 20 MPa to 100 MPa in a cured state is filled around the conductive adhesive. 前記導電性接着剤を導電性シリコンゴムまたは導電性フッ素樹脂とした
請求項１記載の半導体装置。 The conductive adhesive semiconductor device according to claim 1 Symbol placement was conductive silicon rubber or a conductive fluororesin.
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