JP4838977B2 - Circuit board and circuit board manufacturing method - Google Patents

Description

  The present invention relates to a circuit board and a method for manufacturing the circuit board.

  With the recent progress in downsizing and high functionality of electronic devices, development of build-up circuit boards corresponding to thinning and high density wiring is required. Since the build-up circuit board can be connected only with the circuit layer that requires interlayer connection with a non-through hole, only the through hole of the inner layer plate and the hole that penetrates the entire circuit board are not necessarily required. It is suitable for thinning and miniaturization of substrates, and has been developed in recent years.

In the build-up circuit board, when the build-up layer is formed on the inner layer plate having the non-through hole, the non-through hole should be formed immediately above the non-through hole from the viewpoint of efficiency of wiring and high density. Is increasing (via-on-via structure). In the build-up circuit board having three or more conductor layers, there is an inner layer plate in which a non-through hole reaching the first inner layer conductor layer is formed, and an outer layer layer is provided immediately above the non-through hole of the inner layer plate. When forming a non-through hole, fill the non-through hole of the inner layer plate that has been electrolessly or electrolessly plated with a conductive material, or fill the non-through hole with a conductive material or insulating resin, and then cover the non-through hole. It is necessary to apply metal plating. Alternatively, the non-through holes of the inner layer plate are filled by electrolytic copper plating. Then, a second inner conductor layer is formed (see, for example, Patent Document 1, Patent Document 2, Patent Document 3, and Patent Document 4). In addition, when the inside of the non-through hole of the inner layer plate that is directly above is not filled with conductive material, insulating resin, or electrolytic copper plating, electroless or electrolytic metal plating applied to the non-through hole of the outer layer One inner conductor layer, the second inner conductor layer, and the outer conductor layer may be connected.
JP-A-9-116266 JP 2001-223469 A JP 2001-7526 A JP 2000-101247 A

  When filling the non-through holes of the inner layer plate of the build-up circuit board with a conductive material, it is not always necessary to perform metal plating so as to cover the non-through holes. However, since the conductive material contains conductive particles, it has a very high viscosity in the paste state compared to the insulating resin, and the filling of small diameter non-through holes and high aspect ratio non-through holes causes voids and the like. ,Have difficulty. In addition, even when the non-through holes can be filled with the conductive material, the conductive material is hardened and the hardness is larger than that of the insulating resin. For example, it is difficult to completely remove the copper layer on the surface of the inner layer plate because the copper layer may be deeply shaved off. In addition, when there is a polishing residue, it may cause defective circuit formation.

  When the second non-through hole 17 is formed immediately above the first non-through hole (via-on-via structure), when the first non-through hole of the inner layer plate of the build-up circuit board is filled with the insulating resin 21, From the viewpoint of ensuring connection reliability, it is necessary to perform metal plating so as to cover the first non-through hole (see FIG. 2A). In particular, it is essential when the diameter of the first non-through hole of the inner layer plate is larger than the diameter of the second non-through hole 17 formed immediately above. The thickness of the inner conductor layer is generally disadvantageous for forming a fine circuit because the base copper layer, the copper plating of the non-through hole, and the copper plating covering the non-through hole overlap. Further, when the non-through hole of the inner layer plate is filled with electrolytic copper plating, the inner conductor layer is similarly thickened.

  In addition, when the inside of the first non-through hole of the inner layer plate having a structure directly above is not filled with conductive material, insulating resin or electrolytic copper plating, the plating applied to the second non-through hole 17 of the outer layer Since it is necessary to connect the first inner layer conductor layer, the second inner layer conductor layer, and the outer layer conductor layer, the inner wall diameter of the second non-through hole inevitably is the inner wall diameter of the first non-through hole. Since it becomes smaller and deeper, a high aspect ratio is obtained (see FIG. 2B). For this reason, the metal plating adhesion in the second non-through hole 17 is lowered and the filling property of the non-through hole by the solder resist is lowered.

  The present invention eliminates the need for metal plating to cover the non-through holes filled with the insulating resin, and enables the formation of fine circuits by forming the non-through holes in the outer layer with a low aspect ratio. It is an object of the present invention to provide a highly reliable circuit board with high connection reliability and a method for manufacturing the circuit board.

The present invention is characterized by the following.
(1) An inner layer plate having a first non-through hole with a plated inner wall diameter ΦI, an inner layer conductor layer with a diameter ΦL provided in an opening of the first non-through hole of the inner layer plate, and the inner layer An insulating resin layer formed on the surface of the conductor layer and a second non-opening hole having a diameter ΦO that is located immediately above the first non-through hole having an inner wall diameter ΦI formed in the insulating resin layer. In a circuit board having a through hole, the first non-through hole with an inner wall diameter ΦI is embedded with an insulating resin, and the first non-through hole with an inner wall diameter ΦI, an inner layer conductor layer with a diameter ΦL, and an opening diameter A circuit board having at least one connection hole structure in which the second non-through hole of ΦO has a relationship of ΦI <ΦO <ΦL.
(2) The circuit board according to (1), wherein the plated inner wall diameter ΦI is Φ0.001 to 0.09 mm.
(3) A step of preparing an inner layer plate having an inner layer circuit, a step of forming an insulating resin layer on the inner layer circuit surface of the inner layer plate, a first non-through hole reaching the inner layer circuit is formed in the insulating resin layer, and plating Forming a first non-through hole having an inner wall diameter ΦI in the inner layer plate, and forming a conductor layer having an inner layer conductor layer having a diameter ΦL larger than the diameter ΦI at the opening of the first non-through hole. A step of forming an insulating resin layer on the surface of the conductor layer including the inner conductor layer having the diameter ΦL, an opening diameter ΦO reaching the inner conductor layer larger than the diameter ΦI and smaller than the diameter ΦL immediately above the first non-through hole. A circuit board manufacturing method including a step of forming at least one second non-through hole in the insulating resin layer.
(4) The step of forming an insulating resin layer on the surface of the conductor layer including the inner conductor layer having the diameter ΦL includes a step of filling the first non-through hole having the inner wall diameter ΦI with an insulating resin. A method of manufacturing a circuit board.

  According to the present invention, it is possible to provide a circuit board that has high connection reliability and is capable of forming a fine circuit, and a method for manufacturing the circuit board. Since the non-through hole with the opening diameter ΦO has a relationship of ΦI <ΦO <ΦL, even if the non-through hole is formed immediately above the non-through hole, the through-hole filled with the insulating resin The covering metal plating is not necessary, whereby the fine wiring of the line / space = 40/40 μm level or less can be efficiently formed in the inner conductor layer.

  In the circuit board shown in the present invention, the first non-through hole 2 having the inner wall diameter ΦI5 formed in the inner layer plate 22, the inner conductor layer 1 having the diameter ΦL6, and the opening diameter ΦO4 formed in the insulating resin layer 7 are used. The second non-through hole 17 has one or more connection hole structures having a relationship of ΦI <ΦO <ΦL (see FIG. 1A). Since the second non-through hole 17 having the opening diameter ΦO 4 has a relationship of ΦI <ΦO <ΦL, even if the second non-through hole 17 is formed immediately above the first non-through hole 2. Metal plating covering the first non-through hole 2 filled with the insulating resin 7 is unnecessary, and the formation of fine wiring is easy. Further, since the inner conductor layer 1 having the diameter ΦL6 is larger than the second non-through hole 17 having the opening diameter ΦO4, it is possible to secure a sufficient connection area. On the other hand, when the inner conductor layer 1 having the diameter ΦL6 is smaller than the second non-through hole having the opening diameter ΦO4, a sufficient connection area cannot be ensured, and a position shift occurs when the non-through hole is drilled. In such a case, a connection failure may occur. Further, if the second non-through hole 17 having the opening diameter ΦO4 is smaller than the first non-through hole 2 having the inner wall diameter ΦI5, the second non-through hole 17 is formed immediately above the first non-through hole 2. Inevitably, metal plating covering the first non-through hole 2 filled with the insulating resin 7 is necessary, and the inner conductor layer 1 becomes thick, making it difficult to form fine wiring.

  As long as each diameter of the first non-through hole, the inner layer conductor layer, and the second non-through hole has a relationship of ΦI <ΦO <ΦL, as long as the relationship is maintained, The ranges of the diameters of the first non-through hole, the inner conductor layer, and the second non-through hole are not particularly limited. However, the opening diameter ΦO of the second non-through hole is the first non-through hole from the viewpoint of alignment at the time of circuit formation or non-through hole formation, thinning of the circuit board and high density of wiring. The inner wall diameter ΦI of the hole is Φ0.05-0.20 mm larger, and the diameter ΦL of the inner conductor layer is Φ0.05-0.20 mm larger than the opening diameter ΦO of the second non-through hole. ,preferable. Thereby, a sufficient connection area can be ensured between the inner conductor layer and the second non-through hole, and a circuit board with high connection reliability can be obtained.

  The inner wall diameter ΦI of the plated first non-through hole is preferably Φ0.001 to 0.09 mm, and more preferably Φ0.01 to 0.04 mm. If it is less than Φ0.001 mm, it is difficult to drill the first non-through hole, and the inside of the non-through hole is not sufficiently immersed in the plating solution, so that it is difficult to perform plating. Further, in order to make the inner wall diameter of the first non-through hole less than Φ0.001 mm, it is necessary to apply a thick plating, and it becomes difficult to form fine wiring of the inner conductor layer. On the other hand, if it exceeds Φ0.09 mm, the diameter of the inner conductor layer and the opening diameter of the second non-through hole are inevitably increased, which is disadvantageous in reducing the thickness of the circuit board and high-density wiring. In addition, the thickness of the insulating layer in which the plated first non-through hole is formed is preferably 0.01 to 0.30 mm, and preferably 0.03 to 0.1 mm from the viewpoints of non-through hole drilling and plating. More preferred.

  The diameter ΦL of the inner conductor layer provided in the opening of the first non-through hole is preferably Φ0.11 mm to 0.65 mm, more preferably Φ0.2 mm to 0.50 mm, and Φ0.25 mm to 0.35 mm. Further preferred. When the non-through hole of Φ0.09 mm is formed with a diameter of less than Φ0.11 mm, the tolerance is less than Φ0.01 mm on one side, and alignment during circuit formation is difficult, and when Φ0.65 mm is exceeded, This is disadvantageous in reducing the thickness of the circuit board and high-density wiring.

  The opening diameter ΦO of the second non-through hole located immediately above the first non-through hole is preferably Φ 0.08 to 0.25 mm, and particularly preferably Φ 0.08 to 0.15 mm. If it exceeds Φ0.25 mm, it is disadvantageous in reducing the thickness of the circuit board and performing high-density wiring. If the diameter is less than 0.08 mm, it is difficult to form solder balls directly in the non-through holes when the second non-through hole is located in the outermost layer. Note that the non-through hole may be formed across a plurality of insulating resin layers (see FIG. 1B). In the circuit board of the present invention, since the plated first non-through hole is filled with insulating resin, the second non-through hole formed immediately above has a low aspect ratio, It is also possible to easily fill the non-through holes with the solder resist and directly form the solder balls in the non-through holes.

  In the circuit board of the present invention, the thickness of the inner conductor layer is preferably 1 to 20 μm, and more preferably 5 to 15 μm. When the thickness exceeds 20 μm, when a conductor layer is formed by a subtractive method, it becomes difficult to form fine wiring by side etching, and when a conductor layer is formed by an additive method or the like, the plating resist is partially covered. Since it precipitates, it becomes difficult to form fine wiring.

  In the method for producing a circuit board shown in the present invention, in the step of forming a non-through hole, the boring can be performed by a method using a carbon dioxide laser, UV laser, or excimer laser, but a carbon dioxide laser is preferable. Further, examples of the plating after drilling include copper, tin, solder, nickel, gold and the like. From the viewpoint of economy and workability, copper plating is preferable, and electrolytic copper plating is more preferable. When copper foil exists on the surface of the insulating resin layer, a conformal mask may be formed on the copper foil and laser drilling may be performed. Further, if the existing copper foil is 5 μm or less in thickness, laser drilling can be performed directly without forming a conformal mask. Even if the insulating resin filled in the non-through holes becomes slightly concave from the surface of the conductor layer due to laser drilling or the remaining removal process of the drilling resin, there are particular problems such as connection reliability of the circuit board. There is no. In addition, the thickness of the insulating resin layer in which the non-through hole is formed is preferably 0.01 to 0.30 mm, more preferably 0.03 to 0.10 mm, from the viewpoint of non-through hole drilling and plating.

  In the step of forming the inner conductor layer having a diameter ΦL larger than the diameter ΦI at the opening of the first non-through hole having the inner wall diameter ΦI of the inner layer plate, the inner layer conductor layer having the diameter ΦL is the other conductor layer of the inner layer plate. At the same time formed. The conductor layer may be formed using a subtractive method or an additive method. Further, the thickness of the formed conductor layer is preferably 20 μm or less, and more preferably 15 μm or less. In order to form a conductor layer having a thickness of 20 μm or less, it is preferable to use a base copper foil having a thickness of 5 μm or less for the inner layer plate and further perform copper plating of 15 μm or less.

  In the step of forming the insulating resin layer on the conductor layer surface of the inner layer plate, the insulating resin is preferably a thermosetting resin or a thermoplastic. Examples of the thermosetting resin include, but are not limited to, a phenol resin, an epoxy resin, a polyimide resin, a cyanate resin, a maleimide resin, an isocyanate resin, a benzocyclobutene resin, and a vinyl resin. One type of thermosetting resin may be used alone, or two or more types may be mixed and used. Examples of the thermoplastic resin include fluororesin, polyphenylene ether, modified polyphenylene ether, polyphenylene sulfide, polycarbonate, polyether imide, polyether ether ketone, polyarylate, polyamide, polyamide imide, polybutadiene, and polyimide. It is not limited. One type of thermoplastic resin may be used alone, or two or more types may be mixed and used. Moreover, the inorganic filler may be included.

  When forming an insulating resin layer, a commercially available prepreg, resin varnish, resin film, or the like can be used. Examples of commercially available prepregs include GEA-679FZPE (trade name, manufactured by Hitachi Chemical Co., Ltd.). When an insulating resin layer is formed on the surface of the conductor layer of the inner layer plate by pressing or the like through a prepreg between the copper foil and the inner layer plate, the plated non-through holes are simultaneously formed by an insulating resin such as a prepreg. Filling is preferred. In addition to the press, a resin varnish may be applied to the inner layer plate, similarly, an insulating resin layer may be formed on the surface of the conductor layer, and the non-through holes may be filled with the insulating resin.

  Alternatively, the first non-through hole plated may be filled with an insulating resin for filling a hole in advance. Commercially available products can be used as the insulating resin for filling holes. In this case, before forming the conductor layer on the inner layer plate, after the plating of the first non-through hole, it is filled with an insulating resin for filling a hole. Thereafter, a circuit conductor layer is formed, and an insulating resin layer is formed on the surface.

  The first non-through hole of the plated inner layer plate according to the present invention is preferably filled with 50% or more of the volume of the non-through hole with an insulating resin, and is filled with 80% or more of the volume of the hole. And more preferably 100% of the pore volume.

  In the present invention, the second non-through hole with the opening diameter ΦO located immediately above the first non-through hole with the inner wall diameter ΦI of the inner layer plate is only required to have a relationship of ΦI <ΦO <ΦL, As long as the relationship is maintained, the range of the diameter of the non-through hole is not particularly limited. Further, it may be formed over a plurality of insulating resin layers (see FIG. 1B). In addition, from the viewpoint of thinning the circuit board and high-density wiring, the inner wall diameter ΦI of the plated first non-through hole is preferably Φ0.001 to 0.09 mm, more preferably Φ0.01 to 0.04 mm. preferable. Further, the opening diameter ΦO of the second non-through hole is preferably Φ0.08 to 0.25 mm, more preferably Φ0.08 to 0.20 mm.

  Hereinafter, the present invention will be described with reference to examples (see FIGS. 3a and 3b). The present invention is not limited to the following examples.

  Insulating resin layer laminated with 3 μm thick copper foil Glass cloth base epoxy resin copper clad laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) with nominal thickness of 0.06 mm A through hole of Φ0.15 mm is formed, electrolytic copper plating of 10 μm is applied to form a plated conductor layer, and a dry film for etching resist NIT215 (trade name, manufactured by Nichigo Morton Co., Ltd.) is temporarily pressure-bonded with a laminator. A mold mask is laminated and exposed to ultraviolet rays to bak the circuit on both sides, developed with 1% aqueous sodium carbonate solution to form an etching resist, and the copper portion without the etching resist is removed with ferric chloride aqueous solution, and 3% water The etching resist was stripped and removed with an aqueous solution of sodium oxide to form wiring on both surfaces, thereby forming a first circuit board 8 serving as an inner layer plate (FIG. 3a ( )).

The wiring surface of the first circuit board 8 is roughened, and a prepreg GEA-679FZPE having a nominal thickness of 0.04 mm obtained by impregnating glass cloth with an epoxy resin on both sides of the first circuit board (Hitachi Chemical Co., Ltd.) (Trade name), 35 μm 3 μm copper foil with carrier copper foil MT35S3 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) is vacuum-pressed at 24.5 × 10 ⁵ Pa (25 kgf / cm ² ). And a temperature of 175 ° C. and a holding time of 1.5 hours, an insulating resin layer 7 ′ is formed on the wiring (conductor layer), the carrier copper foil is peeled off, leaving the 3 μm copper foil 9, and the second circuit. A substrate 10 was obtained. At this time, all the through holes of the first circuit board were filled with the insulating resin 7 '(FIG. 3a (b)).

  A dry film NIT225 (trade name, manufactured by Nichigo Morton Co., Ltd.) is temporarily bonded to both surfaces of the second circuit board 10 with a laminator, a negative mask is laminated, exposed to ultraviolet light, and the circuit is baked on both surfaces. Developing with an aqueous sodium solution to form an etching resist, removing the copper portion without the etching resist with an aqueous ferric chloride solution, stripping and removing the etching resist with a 3% aqueous sodium hydroxide solution, and applying laser to the non-through hole location A Φ0.05 mm conformal mask 11 serving as an irradiation mask and a laser position recognition pattern were formed as a third circuit board 12.

  Conditions of beam irradiation diameter Φ0.15 mm, frequency 500 Hz, pulse width 4 μs, 4 shots on both surfaces of the third circuit board 12 by a carbon dioxide laser processing machine LC-1C / 21 (trade name, manufactured by Hitachi Via Mechanics Co., Ltd.) The first non-through hole 2 (unplated) having a diameter of 0.05 mm was formed as a fourth circuit board 13 (FIG. 3a (d)).

  10 μm electrolytic copper plating is applied to the fourth circuit board 13 so that the inner wall diameter ΦI5 of the first non-through hole 2 is 0.03 mm, and then an etching resist dry film NIT215 (trade name, manufactured by Nichigo Morton Co., Ltd.) Is temporarily bonded with a laminator, a negative mask is laminated, exposed with ultraviolet rays, the circuit is baked on both sides, developed with 1% aqueous sodium carbonate solution to form an etching resist, and the copper portion without the etching resist is ferric chloride. Then, the etching resist was stripped and removed with a 3% aqueous sodium hydroxide solution to form a wiring (conductor layer) of line / space = 40/40 μm to form a fifth circuit board 14 serving as an inner layer plate. . At that time, a 0.30 mm land (inner layer conductor layer) 1 of ΦL6 was formed in the first non-through hole 2 (FIG. 3a (e)).

A prepreg GEA-679FZPE having a nominal thickness of 0.04 mm, in which the wiring (conductor layer) surface of the fifth circuit board 14 is roughened, and the glass circuit cloth is impregnated with epoxy resin on both sides of the fifth circuit board 14. (Trade name, manufactured by Hitachi Chemical Co., Ltd.), a 35 μm 3 μm copper foil MT35S3 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) with carrier copper foil is vacuum-pressed at a pressure of 24.5 × 10 ⁵ Pa ( 25 kgf / cm ² ), a temperature of 175 ° C., and a holding time of 1.5 hours, and the insulating resin layer 7 was formed. At that time, the first non-through hole 2 was filled with an insulating resin 7 of prepreg GEA-679FZPE. The carrier copper foil was peeled off, leaving a 3 μm copper foil 9 to form a sixth circuit board 15 (FIG. 3a (f)).

  A dry film NIT225 (product name, manufactured by Nichigo Morton Co., Ltd.) is temporarily bonded to both surfaces of the sixth circuit board 15 with a laminator, a negative mask is laminated, exposed to ultraviolet light, and the circuit is printed on both surfaces by baking with 1% carbonic acid. An etching resist is formed by developing with a sodium aqueous solution, a copper portion without the etching resist is removed with a ferric chloride aqueous solution, and the etching resist is peeled and removed with a 3% sodium hydroxide aqueous solution. A third mask substrate 16 (FIG. 3b) is formed by forming a Φ0.15 mm conformal mask 20 serving as a laser irradiation mask and a laser position recognition pattern at the second non-through hole installation location on one non-through hole. (G)).

  The conditions of the beam irradiation diameter Φ0.3 mm, the frequency 500 Hz, the pulse width 17 μs, and the four shots on the both surfaces of the seventh circuit board 16 by a carbon dioxide laser processing machine LC-1C / 21 (trade name, manufactured by Hitachi Via Mechanics Co., Ltd.) Then, a second non-through hole 17 of ΦO 0.15 mm is formed on the first non-through hole 2 of the seventh circuit board to form an eighth circuit board 18 (FIG. 3b (h) )).

  10 μm electrolytic copper plating is applied to the eighth circuit board 18, and then an etching resist dry film NIT215 (product name, manufactured by Nichigo-Morton Co., Ltd.) is temporarily bonded with a laminator, a negative mask is laminated, and exposed to ultraviolet rays. The circuit is baked on both sides, developed with 1% sodium carbonate aqueous solution to form an etching resist, the copper part without the etching resist is removed with ferric chloride aqueous solution, and the etching resist is peeled off with 3% sodium hydroxide aqueous solution. Then, a wiring (conductor layer) 3 was formed to form a ninth circuit board 19 (FIG. 3b (i)).

  As a result of evaluating the formability of the line / space = 40/40 μm of the fifth circuit board 14 which is the produced inner layer board, there was no defect such as disconnection or short circuit, and the line width was within 40 ± 5 μm. It was. Moreover, the cross section of the circuit board was observed, and the filling property of the insulating resin in the first non-through hole was examined. As a result, it was confirmed that all the substrates were filled.

(Comparative Example 1)
Insulating resin layer laminated with 3 μm thick copper foil Glass cloth base epoxy resin copper clad laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) with nominal thickness of 0.06 mm A through hole of Φ0.15 mm is formed, electrolytic copper plating of 10 μm is applied to form a plated conductor layer, and a dry film for etching resist NIT215 (trade name, manufactured by Nichigo Morton Co., Ltd.) is temporarily pressure-bonded with a laminator. A mold mask is laminated and exposed to ultraviolet rays to bak the circuit on both sides, developed with 1% aqueous sodium carbonate solution to form an etching resist, and the copper portion without the etching resist is removed with ferric chloride aqueous solution, and 3% water The etching resist was stripped and removed with an aqueous sodium oxide solution to form wirings on both sides to form a first circuit board.

A prepreg GEA-679FZPE (Hitachi Chemical Industry Co., Ltd.) having a nominal thickness of 0.04 mm obtained by roughening the wiring surface of the first circuit board and impregnating glass cloth with epoxy resin on both sides of the first circuit board. Product, trade name), a 35 μm carrier copper foil-attached 3 μm copper foil MT35S3 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) with a vacuum press at a pressure of 24.5 × 10 ⁵ Pa (25 kgf / cm ² ), Lamination was performed under conditions of a temperature of 175 ° C. and a holding time of 1.5 hours, and the carrier copper foil was peeled off to obtain a second circuit board.

  A dry film NIT225 (trade name, manufactured by Nichigo Morton Co., Ltd.) is temporarily bonded to both sides of the second circuit board with a laminator, a negative mask is laminated, exposed to ultraviolet rays, and the circuit is printed on both sides, and 1% sodium carbonate. Develop with aqueous solution to form etching resist, remove copper part without etching resist with ferric chloride aqueous solution, peel off and remove etching resist with 3% sodium hydroxide aqueous solution, and irradiate the non-through hole installation location with laser A Φ0.20 mm conformal mask and a laser position recognition pattern were formed to form a third circuit board.

  On both surfaces of the third circuit board, carbon dioxide laser processing machine LC-1C / 21 (trade name, manufactured by Hitachi Via Mechanics Co., Ltd.) under conditions of beam irradiation diameter Φ0.3 mm, frequency 500 Hz, pulse width 20 μs, 4 shots Each hole was processed to form a non-through hole with a diameter of 0.20 mm to form a fourth circuit board.

  The fourth circuit board was plated with 10 μm electrolytic copper to form a first non-through hole with an inner wall diameter of Φ0.18 mm. The first non-through hole was filled with hole-filling ink SER-490BNH (manufactured by Yamaei Chemical Co., Ltd., trade name), and further subjected to electrolytic copper plating of 10 μm to further form a plated conductor layer.

  Next, dry film NIT215 (product name, manufactured by Nichigo Morton Co., Ltd.) for etching resist is temporarily pressure-bonded with a laminator, a negative mask is laminated, exposed to ultraviolet rays, the circuit is printed on both sides, and developed with a 1% aqueous sodium carbonate solution. An etching resist is formed, and the copper portion without the etching resist is removed with a ferric chloride aqueous solution, and the etching resist is peeled and removed with a 3% sodium hydroxide aqueous solution, and a line / space = 40/40 μm wiring (inner conductor) Layer) to form a fifth circuit board. At that time, a land (inner conductor layer) having a diameter of 0.40 mm was formed in the non-through hole.

  Thereafter, a circuit board was produced in the same manner as in Example 1. As a result of evaluating the formability of the line / space = 40/40 μm of the fifth circuit board which is the produced inner layer board, some defects such as disconnection and short circuit occurred, and the line width was within 40 ± 10 μm Met.

  As described above in Example 1, the first non-through hole is also as small as Φ0.09 mm or less, and the first non-through hole is larger than this without impairing the high density of the circuit board. Therefore, it is not necessary to perform plating on the insulating resin, so that the conductor layer of the inner layer plate is thin and fine wiring can be formed. Further, the filling of the insulating resin in the non-through holes is performed simultaneously with the formation of the insulating resin layer on the surface of the conductor layer of the inner layer plate, the filling property is good, and the circuit board can be manufactured efficiently. On the other hand, Comparative Example 1 has a large non-through hole and requires plating after filling the non-through hole with the insulating resin, so that the conductor layer of the inner layer plate becomes thick and it is difficult to form fine wiring.

It is sectional drawing of the connection hole structure of the circuit board of this invention. It is sectional drawing of the conventional circuit board. It is sectional drawing of the circuit board in the manufacturing process of the Example of this invention. It is sectional drawing of the circuit board in the manufacturing process of the Example of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Inner layer conductor layer 2 ... 1st non-through-hole 3 ... Conductor layer 4 ... Opening diameter (PHI) O of 2nd non-through-hole
5 ... Inner wall diameter ΦI of the first non-through hole
6 ... Diameter of inner conductor layer ΦL
7 ... Insulating resin (insulating resin layer)
7 '... Insulating resin (insulating resin layer)
DESCRIPTION OF SYMBOLS 8 ... 1st circuit board 9 ... Copper foil 10 ... 2nd circuit board 11 ... Conformal mask 12 ... 3rd circuit board 13 ... 4th circuit board 14 ... Fifth circuit board 15 ... Sixth circuit board 16 ... Seventh circuit board 17 ... Second non-through hole 18 ... Eighth circuit board 19 ... No. 9 circuit board 20 ... conformal mask 21 ... insulating resin 22 for filling holes ... inner layer board

Claims (5)

An inner layer plate having a first non-through hole with an inner wall diameter of ΦI plated with a thickness of 15 μm or less, an inner layer conductor layer with a diameter of ΦL provided at an opening of the first non-through hole of the inner layer plate, The insulating resin layer formed on the surface of the inner layer conductor layer and the first hole of the opening diameter ΦO that is located immediately above the first non-through hole of the inner wall diameter ΦI formed in the insulating resin layer and reaches the inner layer conductor layer . In a circuit board having a second non-through hole having an aspect ratio smaller than that of one non-through hole , the inner conductor layer is pressed with an insulating resin when forming the insulating resin layer of the inner layer plate, and the copper having a thickness of 5 μm or less and foil, the foil surface and are formed by etching the thickness 15μm following plating applied to the inner wall of the first blind holes, said first non-penetrating pores of the inner wall diameter ΦI Embedded with insulating resin formed on the inner conductor layer surface The first non-through hole with the inner wall diameter ΦI, the inner conductor layer with the diameter ΦL, and the second non-through hole with the opening diameter ΦO satisfy ΦI <ΦO <ΦL , and ΦO is Φ0. A circuit board having one or more connection hole structures having a relationship of larger from 0.5 to 0.20 mm .   The circuit board according to claim 1, wherein the insulating resin embedded in the first non-through hole is formed to be substantially flat with respect to the surface of the inner conductor layer.   The circuit board according to claim 1, wherein the second non-through hole is formed across a plurality of insulating resin layers. A step of preparing an inner layer board having an inner layer circuit, by pressing a copper foil having a thickness of 5 μm or less to the inner layer board through an insulating resin, thereby forming an insulating resin layer in which the copper foil is laminated on the inner layer circuit surface; forming, the copper foil was partially removed, said first non-penetrating pores of the non plating reaching the inner layer circuit formed in the insulating resin layer at a portion where the copper foil is removed, the copper foil surface and Plating the inner wall of the unplated first non-through hole with a thickness of 15 μm or less to form a first non-through hole with an inner wall diameter of ΦI in the inner layer plate, at the opening of the first non-through hole; Forming a conductive layer including an inner conductive layer having a diameter ΦL larger than the diameter ΦI by etching, forming an insulating resin layer on the surface of the conductive layer including the inner conductive layer having a diameter ΦL, and in the first non-through hole A step of filling the insulating resin layer with the insulating resin Has a smaller opening diameter ΦO than Φ0.05~0.20mm larger and diameter ΦL than the diameter ΦI directly above the first non-through-hole, and a small second aspect ratio than the first blind holes Forming at least one non-through hole in the insulating resin layer so as to reach the inner conductor layer and remain embedded with the insulating resin filled in the first non-through hole. A method of manufacturing a circuit board. A second non-through-hole of the small opening diameter ΦO than Φ0.05~0.20mm larger and diameter ΦL than the diameter ΦI directly above the first non-through hole, reach the inner conductor layer, and the first In the step of forming at least one insulating resin in the insulating resin layer so that the insulating resin filled in the non-through hole remains embedded, the embedded insulating resin remains in the inner conductor layer. The circuit board manufacturing method according to claim 4, wherein the circuit board is formed so as to be substantially flat with respect to the surface.

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