JP4792503B2 - Transconductance amplifier - Google Patents

Description

  The present invention relates to a transconductance amplifier, and more particularly to a transconductance amplifier that converts a voltage into a current.

    A transconductance amplifier is an amplifier that supplies an output current proportional to an input voltage, and generally has a stable gain (transconductance). In other words, when the input voltage is changed over a predetermined operating input range, the output current changes proportionally, that is, the output current is linear with respect to the input voltage.

  As a conventional transconductance amplifier having a good linearity between an input voltage and an output current in a predetermined operation input range, for example, a method using a source-grounded MOS transistor pair as shown in FIG. 1 is known. (See Non-Patent Document 1). By using the MOS transistors 113 and 114 that are cascode-connected to the amplifiers 106 and 107 and the MOS transistors 111 and 112, respectively, the drain voltages of the MOS transistors 111 and 112 are always constant with respect to changes in input. Has been. The transistor size (the ratio of channel width to channel length), tuning voltage value Vctrl and common voltage Vcm of each MOS transistor is set so that the MOS transistors 111 and 112 forming the differential pair operate in the triode region. Further, the voltage generation circuit 100 and the fixed voltage generator 119 are controlled so that the MOS transistors 113 and 114 operate in the saturation region, respectively. The input voltages Vip and Vin are controlled by the differential pair input voltage generation circuit 120. The differential pair input voltage generation circuit 120 receives the input voltage Vinput and the common voltage Vcm, and uses the voltage Vip as the gate terminal of the MOS transistor 111. The voltage Vin is output to the gate terminal of the MOS transistor 112.

  FIG. 2 shows the relationship between the input voltage and the transconductance Gm obtained by differentiating the output current with the input voltage in a conventional transconductance amplifier. It can be seen that the transconductance Gm is constant near Vip−Vin = 0, and the output current is proportional to the input voltage. It is also possible to adjust the transconductance Gm by controlling the tuning voltage Vctrl while maintaining the linearity between the input voltage and the output current, and when the tuning voltage Vctrl is changed from the medium level to the small level and the large level. Each transconductance Gm is shown.

  However, in the conventional transconductance amplifier as shown in FIG. 1, when the tuning voltage Vctrl is increased to adjust the transconductance, the input voltage and the output current of the transconductance amplifier are changed as shown in FIG. There was a problem that the linearity between them deteriorated. That is, since the range in which the transconductance Gm is constant varies depending on the magnitude of the tuning voltage Vctrl, the transconductance Gm can be adjusted while maintaining the linearity between the input voltage and the output current over the entire operation input range. In order to do so, it is necessary to narrow the adjustment range of the transconductance Gm by narrowing the operation input range or reducing the change amount of the tuning voltage Vctrl.

Behzad Razavi, written by Tadahiro Kuroda, “Design and application of analog CMOS integrated circuits”, Maruzen Co., Ltd., July 30, 2005, p559

  The present invention has been made in view of such problems, and the object of the present invention is to suppress a change due to the magnitude of the tuning voltage Vctrl in a range where the relationship between the input voltage and the output current is linear. An object of the present invention is to provide a transconductance amplifier capable of adjusting a transconductance in an operating input range.

  In order to achieve such an object, the present invention provides a transconductance amplifier that supplies an output current proportional to an input voltage, and includes a source grounded first and second MOS transistors operating in a triode region. The formed differential pair, a third MOS transistor whose source terminal is connected to the drain terminal of the first MOS transistor, which operates in the saturation region, and a second MOS transistor whose source terminal operates in the saturation region A fourth MOS transistor connected to the drain terminal of the first MOS transistor; a first amplifier having a negative input terminal connected to the source terminal of the third MOS transistor and an output terminal connected to the gate terminal of the third MOS transistor; The negative input terminal is connected to the source terminal of the fourth MOS transistor, and the output terminal is connected to the gate of the fourth MOS transistor. A second amplifier connected to the terminal, a tuning voltage input to the positive input terminal voltage of the first and second amplifiers, and a common voltage of the first voltage and the second voltage input to the differential pair Are generated so that the difference between the tuning voltage and the common voltage is constant, the first voltage to which the common voltage is input and output to the gate terminal of the first MOS transistor, and the second voltage A differential pair input voltage generation circuit for generating a second voltage to be output to the gate terminal of the MOS transistor, and the second voltage is 2 × (common voltage) − (first voltage), The voltage is the difference between the first voltage and the second voltage, and the output current is the first current Ip flowing between the drain and source of the first and third MOS transistors, and the second and fourth voltages. MOS transistor drain and source It is a difference from the second current In flowing between the sources.

  In the transconductance amplifier, the voltage generation circuit includes a voltage generator, a fixed current source, and a resistor connected in series between the voltage generator and an output terminal of the fixed current source. The tuning voltage can be output from between and the common voltage can be output from between the resistor and the fixed current source.

  In the transconductance amplifier, the voltage generation circuit includes a voltage generator, a fixed current source, and a resistor connected in series between the voltage generator and an input terminal of the fixed current source. Can be the common voltage, and the connection point between the resistor and the fixed current source can be the tuning voltage.

  The transconductance amplifier includes a second current source, fifth and sixth MOS transistors, and a third amplifier, in which a voltage generator is connected in series, and a source terminal of the sixth MOS transistor, The drain terminal of the fifth transistor and the negative input terminal of the third amplifier are connected, and the gate terminal of the fifth transistor grounded at the source is connected to the drain terminal of the sixth MOS transistor and the second current source. The gate voltage of the fifth MOS transistor can be a common voltage, and the positive input terminal voltage of the third amplifier can be a tuning voltage.

  In the transconductance amplifier, the fifth MOS transistor may have a current mirror relationship with the first and second MOS transistors, and the sixth MOS transistor may have a current mirror relationship with the third and fourth MOS transistors.

  In the transconductance amplifier, the second current source can be made variable.

  In the transconductance amplifier, the voltage generator can be made variable.

  According to the present invention, it is possible to provide a transconductance amplifier having a wide transconductance tuning range in which the range having good linearity between the input voltage and the output current does not depend on the tuning voltage Vctrl.

FIG. 1 is a circuit diagram of a conventional transconductance amplifier. FIG. 2 is a diagram for explaining the operation when a conventional transconductance amplifier is tuned. FIG. 3 is a circuit diagram of the transconductance amplifier of the present invention. FIG. 4 is a diagram for explaining the operation of the MOS transistor 111. FIG. 5 is a diagram for explaining the operation of the differential pair. FIG. 6 is a diagram for explaining the operation when the transconductance amplifier according to the embodiment of the present invention is tuned. FIG. 7 is a circuit diagram of the transconductance amplifier according to the second embodiment of the present invention. FIG. 8 is a circuit diagram of the transconductance amplifier according to the third embodiment of the present invention. FIG. 9 is a circuit diagram of the transconductance amplifier according to the fourth embodiment of the present invention. FIG. 10 is a diagram illustrating an example of the differential pair input voltage generation circuit 120 according to an embodiment of the present invention. FIG. 11 is a diagram showing another example of the differential pair input voltage generation circuit 120 according to the embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 3 shows a circuit diagram of the transconductance amplifier according to Embodiment 1 of the present invention. As shown in FIG. 3, the transconductance amplifier according to the present embodiment includes a differential pair formed by source-grounded MOS transistors 111 and 112, MOS transistors 113 and 114, amplifiers 106 and 107, and voltage generation. The circuit 100 and the differential pair input voltage generation circuit 120 are configured.

  The voltage generation circuit 100 can generate a common voltage Vcm of all differential signals input to the differential pair and a tuning voltage Vctrl for controlling the transconductance, and can output the tuning voltage Vctrl to the positive input terminals of the amplifiers 106 and 107. And the voltage Vcm are connected so as to be output to the differential pair input voltage generation circuit 120, respectively. The drain terminals of the MOS transistors 111 and 112 are connected to the source terminals of the MOS transistors 113 and 114, respectively. The gate terminals of the MOS transistors 111 and 112 are terminals for outputting the voltage Vip of the differential pair input voltage generation circuit 120, Vin. Are connected to the output terminals. The differential pair input voltage generation circuit 120 receives an input voltage Vinput and a common voltage Vcm input from an input terminal INPUT, and generates a voltage Vip and a voltage Vin. The drain terminals of the MOS transistors 111 and 112 and the source terminals of the MOS transistors 113 and 114 are connected to the negative input terminals of the amplifiers 106 and 107, respectively. The output terminals of the amplifiers 106 and 107 are connected to the gate terminals of the MOS transistors 113 and 114, respectively. The MOS transistors 111 and 112 are adjusted to operate in the triode region, and the MOS transistors 113 and 114 are adjusted to operate in the saturation region.

  FIG. 10 shows an embodiment of the differential pair input voltage generation circuit 120. The input voltage Vinput that is substantially equivalent to the difference between the voltage Vip and the voltage Vin (input of the transconductance amplifier) and the common voltage Vcm are input, and the voltages Vip and Vin input to the differential pair are output. .

  The input voltage Vinput becomes the differential signals Vinputp and Vinputn via the single differential conversion circuit 130. The HPF (high-pass filter) composed of the resistors Rhp1 and Rhp2 and the capacitors Chp1 and Chp2 shares the reference potential of each signal. After the voltage Vcm is corrected, it is output to the gate terminals of the MOS transistors 111 and 112. Of course, the voltage input to the differential pair may be directly generated based on Vinputp and Vinputn which are differential signals without using the single differential conversion circuit 130.

  FIG. 11 shows another embodiment of the differential pair input voltage generation circuit 120. The input voltage Vinput that is substantially equivalent to the difference between the voltage Vip and the voltage Vin (input of the transconductance amplifier) and the common voltage Vcm are input, and the voltages Vip and Vin input to the differential pair are output. .

  The input voltage Vinput becomes the differential signals Vinputp and Vinputn through the single differential conversion circuit 130. After the reference potentials of the respective signals are corrected to the common voltage Vcm by the level shift circuits 131 and 132, the gates of the MOS transistors 111 and 112 are changed. Output to the terminal. Of course, the voltage input to the differential pair may be directly generated based on Vinputp and Vinputn which are differential signals without using the single differential conversion circuit 130.

  Here, it is added that the differential pair input voltage generation circuit is not limited to the above two embodiments.

  In such a configuration, a difference Vip−Vin between voltages Vip and Vin generated at the gate terminals of the MOS transistors 111 and 112 is used as an input voltage, and currents Ip and In flowing through the drain terminals OP and ON of the MOS transistors 113 and 114 are input. 3 is an output current, the circuit shown in FIG. 3 functions as a transconductance amplifier.

  Here, FIG. 4 shows the value of the current Ip with respect to the gate voltage Vip of the MOS transistor 111 and the value obtained by differentiating the current Ip with the gate voltage Vip, that is, the transconductance Gmp of the MOS transistor 111. Hereinafter, focusing on the MOS transistor 111, how the current Ip changes according to the gate voltage Vip of the MOS transistor 111 will be described with reference to FIG.

  By the amplifiers 106 and 107 and the MOS transistors 113 and 114, the drain voltages of the MOS transistors 111 and 112 forming the differential pair are always constant (= Vctrl) with respect to the input change.

  In the region where the gate voltage Vip is from 0 V to the threshold voltage Vth1 of the MOS transistor 111, the current Ip is 0 (blocking region).

  In the region where the gate voltage Vip is Vth1 <Vip <Vctrl + Vth1, the MOS transistor 111 operates in the saturation region, and the current Ip at that time is expressed by the following equation.

Here, k ₁ is a coefficient which depends on the manufacturing process and transistor size. Further, in the region where Vip is Vip> Vctrl + Vth1, the MOS transistor 111 operates in the triode region, and the current Ip at that time is expressed by the following equation.

  Here, when the voltage of the gate voltage Vip, which is the boundary between the saturation region and the triode region, is Vtr1,

となる。

It becomes.

  Hereinafter, a differential pair composed of the MOS transistors 111 and 112 will be described with reference to FIG.

  The gate voltage of the MOS transistor 112 is set to Vin. Further, when the input differential common voltage of the gate voltage Vip and the gate voltage Vin is Vcm, the gate voltage Vin is

で与えられる。よってゲート電圧Ｖｉｐを変化させたとき、ＭＯＳトランジスタ１１２のトランスコンダクタンスＧｍｎの絶対値の変化は、図５のようにちょうどＧｍｐの曲線をコモン電圧Ｖｃｍで折り返したようになる。

Given in. Therefore, when the gate voltage Vip is changed, the change in the absolute value of the transconductance Gmn of the MOS transistor 112 is as if the Gmp curve is folded back at the common voltage Vcm as shown in FIG.

  The total transconductance Gm of the differential pair is given by the sum of Gmp and Gmn. As shown in FIG. 5, the total transconductance Gm can obtain good linearity within a range of ± (Vcm−Vtr1) with Vcm as the center. It should be noted that Vcm is set to satisfy Vtr1 <Vcm in order to operate both MOS transistors 111 and 112 in the triode region.

  Here, in the present invention, when tuning the transconductance, not only the tuning voltage Vctrl but also the input differential common voltage Vcm is controlled to control a region having good linearity. Specifically, the common voltage is adjusted in the voltage generation circuit 100 so that the difference from the tuning voltage becomes a constant. When Vcm−Vtr1 is calculated from Expression (3), it can be expressed as the following expression.

  From the equation (5), it is found that the influence of the tuning voltage Vctrl on Vcm−Vtr1 can be reduced by making the difference between the common voltage Vcm and the tuning voltage Vctrl constant.

  That is, even if the tuning voltage Vctrl is changed for the purpose of tuning the transconductance, the transconductance amplifier can obtain good linearity by adjusting the input differential common voltage Vcm in accordance with the change of the tuning voltage Vctrl. Can be kept constant (see FIG. 6).

  In particular,

を満たすように電圧発生回路１００が調整されると、数式（６）を数式（５）に代入して

When the voltage generation circuit 100 is adjusted so as to satisfy the following equation, the equation (6) is substituted into the equation (5).

が得られる。つまり図６に示されているように、±βの領域で良好な線形性を有することができる。ここでβは任意の定数である。

Is obtained. That is, as shown in FIG. 6, it can have good linearity in the range of ± β. Here, β is an arbitrary constant.

  Accordingly, the present invention can provide a transconductance amplifier that suppresses a change due to the magnitude of the tuning voltage Vctrl in a range having good linearity in the operation input range and has a wide transconductance tuning range.

(Embodiment 2)
FIG. 7 shows a circuit diagram of a transconductance amplifier according to Embodiment 2 of the present invention. The transconductance amplifier according to the present embodiment includes a differential pair formed by source-grounded MOS transistors 111 and 112, MOS transistors 113 and 114, amplifiers 106 and 107, a voltage generation circuit 100, and a differential pair. And an input voltage generation circuit 120.

  The voltage generation circuit 100 can generate a common voltage Vcm of all differential signals input to the differential pair and a tuning voltage Vctrl for controlling the transconductance, and can output the tuning voltage Vctrl to the positive input terminals of the amplifiers 106 and 107. And the voltage Vcm are connected so as to be output to the differential pair input voltage generation circuit 120, respectively. The drain terminals of the MOS transistors 111 and 112 are connected to the source terminals of the MOS transistors 113 and 114, respectively. The gate terminals of the MOS transistors 111 and 112 are terminals for outputting the voltage Vip of the differential pair input voltage generation circuit 120, Vin. Are connected to the output terminals. The differential pair input voltage generation circuit 120 receives an input voltage Vinput and a common voltage Vcm input from an input terminal INPUT, and generates a voltage Vip and a voltage Vin. The drain terminals of the MOS transistors 111 and 112 and the source terminals of the MOS transistors 113 and 114 are connected to the negative input terminals of the amplifiers 106 and 107, respectively. The output terminals of the amplifiers 106 and 107 are connected to the gate terminals of the MOS transistors 113 and 114, respectively. The MOS transistors 111 and 112 are adjusted to operate in the triode region, and the MOS transistors 113 and 114 are adjusted to operate in the saturation region.

  As shown in FIG. 7, the transconductance amplifier of the present embodiment is obtained by replacing the configuration of the voltage generation circuit 100 in the first embodiment with a configuration as shown below. That is, the voltage generation circuit 100 includes a voltage generator 102, a fixed current source 109, and a resistor Rd. The resistor Rd is connected between the voltage generator 102 and the fixed current source 109. It is connected to the output side. The resistor Rd is not limited to a resistor made of polysilicon formed on the chip, and may be, for example, a metal wiring or a MOS transistor operated in a triode region.

  Here, if the output from the voltage generator 102 is Vctrl, and the voltage at the connection point between the fixed current source 109 and the resistor Rd or the voltage follower is Vcm, the product Rd × Id of the resistor Rd and the fixed current Id is It is the difference between Vcm and Vctrl. As described above, with the configuration shown in FIG. 7, Vcm and Vctrl can always be maintained at a constant voltage difference, and when this difference is configured to be β + Vth1, good linearity is obtained in the range of ± β according to Equation (5). Can have sex. Here, β is an arbitrary constant. The tuning voltage Vctrl and the common voltage Vcm can be set to desired values by setting the output voltage of the voltage generator 102 to a desired value. Here, the output voltage of the voltage generator 102 may be variable, or the output voltage value may be fixed after the tuning voltage Vctrl and the common voltage Vcm are set to desired values.

  Therefore, the present embodiment enables a transconductance amplifier having a wide transconductance tuning range while suppressing a change due to the magnitude of the tuning voltage Vctrl in a range having good linearity in the operation input range.

(Embodiment 3)
FIG. 8 shows a circuit diagram of a transconductance amplifier according to Embodiment 3 of the present invention. The transconductance amplifier according to the present embodiment includes a differential pair formed by source-grounded MOS transistors 111 and 112, MOS transistors 113 and 114, amplifiers 106 and 107, a voltage generation circuit 100, and a differential pair. And an input voltage generation circuit 120.

  The voltage generation circuit 100 can generate a common voltage Vcm of all differential signals input to the differential pair and a tuning voltage Vctrl for controlling the transconductance, and can output the tuning voltage Vctrl to the positive input terminals of the amplifiers 106 and 107. And the voltage Vcm are connected so as to be output to the differential pair input voltage generation circuit 120, respectively. The differential pair input voltage generation circuit 120 receives an input voltage Vinput and a common voltage Vcm input from an input terminal INPUT, and generates a voltage Vip and a voltage Vin. The drain terminals of the MOS transistors 111 and 112 are connected to the source terminals of the MOS transistors 113 and 114, respectively. The gate terminals of the MOS transistors 111 and 112 are terminals for outputting the voltage Vip of the differential pair input voltage generation circuit 120, Vin. Are connected to the output terminals. The drain terminals of the MOS transistors 111 and 112 and the source terminals of the MOS transistors 113 and 114 are connected to the negative input terminals of the amplifiers 106 and 107, respectively. The output terminals of the amplifiers 106 and 107 are connected to the gate terminals of the MOS transistors 113 and 114, respectively. The MOS transistors 111 and 112 are adjusted to operate in the triode region, and the MOS transistors 113 and 114 are adjusted to operate in the saturation region.

  As shown in FIG. 8, the transconductance amplifier of the present embodiment is obtained by replacing the configuration of the voltage generation circuit 100 in the first embodiment with a configuration as shown below. That is, the voltage generation circuit 100 includes a voltage generator 104, a fixed current source 110, and a resistor Rd, and the resistor Rd is connected between the voltage generator 104 and the fixed current source 110. Is connected to the input side. The resistor Rd is not limited to a resistor made of polysilicon formed on the chip, and may be, for example, a metal wiring or a MOS transistor operated in a triode region.

  Here, if the output from the voltage generator 104 is Vcm and the voltage at the connection point between the fixed current source 110 and the resistor Rd or the voltage follower is Vctrl, the product Rd × Id of the resistor Rd and the fixed current Id is It is the difference between Vcm and Vctrl. Thus, with the configuration shown in FIG. 8, Vcm and Vctrl can always be kept at a constant voltage difference, and when this difference is configured to be β + Vth1, good linearity is achieved in the range of ± β according to Equation (5). Can have sex. Here, β is an arbitrary constant. By setting the output voltage of the voltage generator 104 to a desired value, the common voltage Vcm and the tuning voltage Vctrl can be set to desired values. Here, the output voltage of the voltage generator 104 may be variable, or the output voltage value may be fixed after the common voltage Vcm and the tuning voltage Vctrl are set to desired values.

  Therefore, the present embodiment enables a transconductance amplifier having a wide transconductance tuning range while suppressing a change due to the magnitude of the tuning voltage Vctrl in a range having good linearity in the operation input range.

(Embodiment 4)
FIG. 9 shows a circuit diagram of a transconductance amplifier according to Embodiment 4 of the present invention. The transconductance amplifier according to the present embodiment includes a differential pair formed by source-grounded MOS transistors 111 and 112, MOS transistors 113 and 114, amplifiers 106 and 107, a voltage generation circuit 100, and a differential pair. And an input voltage generation circuit 120.

  The voltage generation circuit 100 can generate a common voltage Vcm of all differential signals input to the differential pair and a tuning voltage Vctrl for controlling the transconductance, and can output the tuning voltage Vctrl to the positive input terminals of the amplifiers 106 and 107. And the voltage Vcm are connected so as to be output to the differential pair input voltage generation circuit 120, respectively. The drain terminals of the MOS transistors 111 and 112 are connected to the source terminals of the MOS transistors 113 and 114, respectively. The gate terminals of the MOS transistors 111 and 112 are terminals for outputting the voltage Vip of the differential pair input voltage generation circuit 120, Vin. Are connected to the output terminals. The differential pair input voltage generation circuit 120 receives an input voltage Vinput and a common voltage Vcm input from an input terminal INPUT, and generates a voltage Vip and a voltage Vin. The drain terminals of the MOS transistors 111 and 112 and the source terminals of the MOS transistors 113 and 114 are connected to the negative input terminals of the amplifiers 106 and 107, respectively. The output terminals of the amplifiers 106 and 107 are connected to the gate terminals of the MOS transistors 113 and 114, respectively. The MOS transistors 111 and 112 are adjusted to operate in the triode region, and the MOS transistors 113 and 114 are adjusted to operate in the saturation region.

  The voltage generation circuit 100 includes a voltage generator 104, a fixed current source 110, and a resistor Rd. The resistor Rd is connected between the voltage generator 104 and the fixed current source 110, and is input to the fixed current source 110. Connected to the side. The resistor Rd is not limited to a resistor made of polysilicon formed on the chip, and may be, for example, a metal wiring or a MOS transistor operated in a triode region.

  As shown in FIG. 9, the transconductance amplifier of the present embodiment is obtained by replacing the voltage generator 104 in the third embodiment with the following configuration. That is, the voltage generator 104 includes a current source 105, MOS transistors 115 and 116, and an amplifier 108. The drain terminal of the MOS transistor 115 whose source is grounded and the source terminal of the MOS transistor 116 are connected to each other. The drain terminal of the MOS transistor 116 is connected to the output side of the current source 105. A connection point between the MOS transistor 116 and the current source 105 is connected to the gate terminal of the MOS transistor 115. The positive input terminal of the amplifier 108 is connected to the connection point between the fixed current source 110 and the resistor Rd, and the negative input terminal is connected to the drain terminal of the MOS transistor 115 and the source terminal of the MOS transistor 116. The output of the amplifier 108 is connected to the gate terminal of the MOS transistor 116.

  Here, the output from the voltage generator 104, that is, the voltage at the connection point between the drain terminal of the MOS transistor 116, the current source 105, and the gate terminal of the MOS transistor 115 is Vcm, and the voltage at the connection point between the fixed current source 110 and the resistor Rd. Alternatively, if the voltage follower is Vctrl, the product Rd × Id of the resistance Rd and the fixed current Id is the difference between Vcm and Vctrl. As described above, with the configuration shown in FIG. 9, Vcm and Vctrl can always be maintained at a constant voltage difference, and when this difference is configured to be β + Vth1, good linearity is obtained in the region of ± β according to Equation (5). Can have sex. Here, β is an arbitrary constant. By setting the output current of the current source 105 to a desired value, the output of the voltage generator 104 can be set to a desired value, and the tuning voltage Vctrl and the common voltage Vcm can be set to desired values. Here, the output current of the current source 105 may be variable, or after the output current of the current source 105 is set so that the tuning voltage Vctrl and the common voltage Vcm have desired values, the value of the output current may be fixed. good.

  It is desirable that the MOS transistor 115 has a transistor size such that the MOS transistors 111 and 112 constituting a transconductance amplifier and the MOS transistor 116 have a current mirror relationship with the MOS transistors 113 and 114, respectively. That is, when the current mirror ratio is, for example, γ, the transistor size of the MOS transistor 115 × γ = the transistor size of the MOS transistors 111 and 112, and the transistor size of the MOS transistor 116 × γ = the transistor size of the MOS transistors 113 and 114. Configure as follows. At this time, if the current output from the current source 105 is Ic, current mirroring is performed with a mirror ratio γ, and Ip = γ × (Ic−Id) and In = γ × (Ic−Id).

  As described above, the present embodiment is a transconductance amplifier that suppresses a change due to the magnitude of the tuning voltage Vctrl in the range having a good linearity in the operation input range, and has a wide transconductance tuning range. It enables a transconductance amplifier having the feature that the currents Ip and In flowing through the MOS transistors 111 and 112 to be formed can be directly determined by the current mirror ratio by the current source 105.

Claims (7)

A transconductance amplifier that supplies an output current proportional to the input voltage,
A differential pair formed of first and second source-grounded MOS transistors operating in the triode region;
A third MOS transistor operating in a saturation region and having a source terminal connected to a drain terminal of the first MOS transistor;
A fourth MOS transistor operating in a saturation region and having a source terminal connected to a drain terminal of the second MOS transistor;
A first amplifier having a negative input terminal connected to a source terminal of the third MOS transistor and an output terminal connected to a gate terminal of the third MOS transistor;
A second amplifier having a negative input terminal connected to the source terminal of the fourth MOS transistor and an output terminal connected to the gate terminal of the fourth MOS transistor;
The tuning voltage input to the positive input terminal voltage of the first and second amplifiers, and the common voltage of the first voltage and the second voltage input to the differential pair, the tuning voltage and the common A voltage generation circuit for generating a constant difference from the voltage;
A differential pair that receives the common voltage and generates the first voltage output to the gate terminal of the first MOS transistor and the second voltage output to the gate terminal of the second MOS transistor. An input voltage generation circuit,
The second voltage is 2 × (the common voltage) − (the first voltage),
The input voltage is a difference between the first voltage and the second voltage;
The output current includes a first current Ip flowing between the drain and source of the first and third MOS transistors, and a second current In flowing between the drain and source of the second and fourth MOS transistors. Transconductance amplifier characterized by the difference between The voltage generation circuit includes a voltage generator, a fixed current source, and a resistor connected in series between the voltage generator and an output terminal of the fixed current source,
The transconductance amplifier according to claim 1, wherein the tuning voltage is output from between the voltage generator and the resistor, and the common voltage is output from between the resistor and the fixed current source. The voltage generation circuit includes a voltage generator, a fixed current source, and a resistor connected in series between the voltage generator and an input terminal of the fixed current source,
The transconductance amplifier according to claim 1, wherein a connection point between the voltage generator and the resistor is the common voltage, and a connection point between the resistor and the fixed current source is the tuning voltage. The voltage generator is
A second current source, fifth and sixth MOS transistors, and a third amplifier connected in series;
A source terminal of the sixth MOS transistor, a drain terminal of the fifth transistor, and a negative input terminal of the third amplifier;
The gate terminal of the fifth transistor whose source is grounded is connected to the drain terminal of the sixth MOS transistor and the output terminal of the second current source,
4. The transconductance amplifier according to claim 3, wherein a gate voltage of the fifth MOS transistor is the common voltage, and a positive input terminal voltage of the third amplifier is the tuning voltage. The fifth MOS transistor has a current mirror relationship with the first and second MOS transistors, and the sixth MOS transistor has a current mirror relationship with the third and fourth MOS transistors. The transconductance amplifier according to claim 4.   6. The transconductance amplifier according to claim 4, wherein the second current source is variable.   7. The transconductance amplifier according to claim 2, wherein the voltage generator is variable.

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