JP4792375B2 - Test apparatus, adjustment board, and adjustment method - Google Patents

Description

  The present invention relates to a test apparatus, an adjustment board, and an adjustment method. In particular, the present invention relates to a test apparatus, an adjustment board, and an adjustment method for adjusting the timing of input / output signals with respect to a device under test.

  The test apparatus includes a plurality of test modules for controlling the test of the device under test, a mother board connected to these test modules, and a socket board placed on the mother board. The socket board has a socket for mounting the device under test, and electrically connects the device under test and the motherboard. With such a configuration, the test module outputs a signal to the device under test, and inputs a signal from the device under test to advance the test process.

  Further, the test module delays an input signal to the device under test by a delay element. As a result, even if a delay occurs in the signal supplied to the device under test, it is tested whether it operates normally within a predetermined standard range. Here, when delaying the input signal to the device under test, the signal should be similarly delayed for each of the plurality of input terminals of the device under test, and the signal input to these input terminals at the same timing. I must. Similarly, when testing the timing at which a signal is output from the device under test, the test apparatus must make the timing for fetching the output signal from the device under test the same for each output terminal.

  However, the characteristics of the delay elements or the wiring delay are different for each terminal. For this reason, if the delay amount set for the delay element is the same for each terminal, the timings of a plurality of input signals to be simultaneously input may be different. For this reason, conventionally, prior to the test process of the device under test, an adjustment process called calibration is provided, and adjustment is performed so that signals are simultaneously input to a plurality of terminals.

In the calibration, the test device places the calibration board on the motherboard. For example, the calibration board inputs an output signal output from an output terminal of the motherboard to a plurality of input terminals of the motherboard. Then, the test apparatus adjusts the delay amount set for the delay element provided at the input terminal so that the timing at which the output signal is captured at each of the plurality of input terminals is the same (for example, patent document) 1).
International Publication No. 2002/101404 Pamphlet

  In the calibration, when the delay amount is adjusted for a large number of terminals at a time, the amplitude of the signal waveform is reduced. Therefore, a plurality of calibration boards are conventionally used. That is, the test apparatus adjusts the delay amount in the group to the same for each group into which the input / output terminals are classified by using a certain calibration board. Further, the delay amount between groups is adjusted to be the same using another calibration board. As a result, the delay amounts of all the input / output terminals are adjusted to be the same.

  However, even when calibration is performed by dividing some of the terminals, the amplitude of the signal waveform becomes small, which may cause an error in the amount of signal delay. In addition, when a plurality of calibration boards are required, an operation of sequentially placing a plurality of calibration boards for one calibration process is required, which is troublesome.

  In order to solve the above problems, in the first embodiment of the present invention, a test apparatus for testing a device under test, each of which is a plurality of signal output units for outputting signals to the terminals of the device under test, Connected to multiple signal input units that input signals output from the terminal of the device under test, and multiple signal output units and one signal input unit that serves as a reference when adjusting the output timing of multiple signal output units The first connection unit for propagating the output signal output from the signal output unit sequentially selected from each of the plurality of signal output units to the signal input unit based on the same timing designation for the selected signal output unit A first adjustment unit that adjusts the output timing of each of the plurality of signal output units so that the reference signal input unit receives the output signal to be output in response at the same timing; When adjusting the input timing of the signal input unit, the second connection unit that sequentially connects each of the plurality of signal input units to one of the adjusted signal output units is the same as the adjusted signal output unit. A second adjustment unit that adjusts each input timing of the signal input unit of the connection destination so that each of the signal input units of the connection destination receives the output signal output according to the timing specification of the connection destination at the same timing Providing equipment.

  The first connection unit is provided corresponding to each of the plurality of signal output groups obtained by dividing the plurality of signal output units, and outputs an output signal from the selected signal output unit from the first terminal of the signal output group. Output signals from unselected signal output units from the first terminal, and output signals from the signal output group to which the selected signal output unit among the plurality of signal output groups belongs. A second switching unit that inputs from one terminal and outputs the signal to a reference signal input unit, and does not output an output signal from another signal output group to the reference signal input unit; and outputs of a plurality of signal output units When the timing is adjusted, the second switching unit is connected to the signal input unit as a reference, and when the output timing of the plurality of signal output units is not adjusted, the second switching unit and the reference signal input unit are During it may have a first switch to disconnect the.

The second connection unit is provided corresponding to each of the plurality of signal output groups, and connects or disconnects between one signal output unit in the signal output group and the second terminal of the signal output group. A plurality of second switches and a plurality of signal input groups provided corresponding to each of the plurality of signal input groups, and the selected signal input unit is connected to the third terminal of the signal input group; A plurality of third switches that disconnect between the signal input unit and the third terminal; a plurality of second terminals; and a transmission line that connects between the third terminals of the corresponding signal input groups. Also good.
The first adjustment unit propagates an output signal from one signal output unit connectable to the second terminal to the reference signal input unit by the first connection unit for each of the plurality of signal output groups. After adjusting the output timing of one signal output unit, an output signal from another signal output unit that cannot be connected to the second terminal is propagated to one signal input unit by the first connection unit, and the other signal output unit The second adjustment unit adjusts the output timing, and in parallel with the adjustment of the output timing of the other signal output units by the first adjustment unit, the second adjustment unit sets the plurality of second switches to the connected state, and each of the plurality of signal input groups. A signal input unit other than the reference signal input unit may be sequentially connected to the third terminal to adjust the input timing of the signal input unit.

Each of the plurality of signal input units is a signal input / output unit that inputs a signal output from a terminal of the device under test and outputs a signal to the terminal, and is provided for each pair of a plurality of signal input groups. A plurality of inter-group switches connecting a transmission line connected to the third terminal of the signal input group and a transmission line connected to the third terminal of the signal input group paired with the signal input group; The first signal input / output unit in one signal input group is selected and connected to the third terminal of the first signal input group, and the second signal input group paired with the first signal input group is selected. The second signal input / output unit is sequentially selected and sequentially connected to the third terminal of the second signal input group, and the first signal input / output unit is in accordance with the same timing designation as the adjusted signal output unit. Output signal to output The third adjustment section and may further comprise a second signal output unit adjusts the output timing of the first signal input unit to receive at the same timing.
In addition, a transmission path from a plurality of signal output units to the signal input / output unit to be connected through the first terminal and the third terminal, and transmission from the first signal input / output unit to the second signal input / output unit The path may be substantially equal in length.

  In the second embodiment of the present invention, a test apparatus for testing a device under test, each of which outputs a signal to a terminal of the device under test, and each output from the terminal of the device under test A plurality of signal input units for inputting a signal to be transmitted, and a signal output unit for reference that is connected to the plurality of signal input units and one signal output unit for reference when adjusting the input timing of the plurality of signal input units The first connection unit that propagates the output signal output from the signal input unit sequentially selected from each of the plurality of signal input units, and the output signal that the reference signal output unit outputs according to the same timing designation, A first adjusting unit that adjusts the input timing of each of the plurality of signal input units so that the selected signal input unit receives at the same timing; and an output timing of the plurality of signal output units In the case of adjusting the output, each of the plurality of signal output units is connected to one of the adjusted signal input units in sequence, and each of the signal output units outputs in accordance with the same timing designation. There is provided a test apparatus including a second adjustment unit that adjusts each input timing of a signal output unit so that each of the adjusted signal input units as connection destinations receives the signal at the same timing.

  According to a third aspect of the present invention, there is provided an adjustment board used for adjusting a test apparatus for testing a device under test. The test apparatus is provided with a performance board or an adjustment board on which the device under test is mounted. A test head, a plurality of signal output units that are stored in the test head and each output a signal to a terminal of the device under test via the performance board, and are stored in the test head, and each is stored in the test head. A plurality of signal input units for inputting signals output from the terminals via the performance board, and a plurality of signal output units and a plurality of units for controlling the adjustment board mounted on the test head instead of the performance board Based on the result of switching the connection between the signal input parts and propagating the signal from the connected signal output part to the signal input part An adjustment device that adjusts output timing or input timing, and the adjustment board includes a plurality of signal output units and a single signal input unit as a reference when adjusting the output timings of the plurality of signal output units. The first connection unit that propagates the output signal output from the signal output unit selected from each of the plurality of signal output units to the signal input unit based on the reference and the input timing of the plurality of signal input units is adjusted In this case, an adjustment board is provided that includes a second connection unit that sequentially connects each of the plurality of signal input units to any of the adjusted signal output units.

According to a fourth aspect of the present invention, there is provided an adjustment method for adjusting a test apparatus for testing a device under test, wherein the test apparatus includes a plurality of signal output units each outputting a signal to a terminal of the device under test; A plurality of signal input units that respectively input signals output from the terminals of the device under test, and a plurality of signal output units and one signal input unit that serves as a reference when adjusting the output timing of the plurality of signal output units A first connection unit that propagates an output signal output from a signal output unit that is connected and sequentially selected from each of the plurality of signal output units to a signal input unit that is a reference, and adjusts the input timing of the plurality of signal input units In some cases, each of the plurality of signal input units includes a second connection unit that sequentially connects to one of the adjusted signal output units. The first connection unit outputs a plurality of signal outputs. Adjust the output timing of each of the multiple signal output units so that the reference signal input unit receives the output signal output in response to the same timing designation by the signal output unit selected sequentially from each unit at the same timing Each of the connected signal input units so that each of the connected signal input units receives the output signal output in accordance with the same timing designation at the same timing. Adjusting the input timing.
The above summary of the invention does not enumerate all the necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.

  Hereinafter, the present invention will be described through the best mode for carrying out the invention (hereinafter referred to as an embodiment). However, the following embodiment does not limit the invention according to the claims, and the embodiment is described below. All the combinations of features described in the above are not necessarily essential to the solution of the invention.

  FIG. 1 shows the overall configuration of the test apparatus 10. The test apparatus 10 includes a control device 110, a device interface unit 120, and a test module 130, and tests the device under test 100. The test apparatus 10 may test a plurality of devices under test 100 in parallel as illustrated, or may test only a single device under test 100. The control device 110 instructs the test module 130 to control the test of the plurality of devices under test 100. The device interface unit 120 connects each of the plurality of devices under test 100 to each of the plurality of test modules 130.

  The test module 130 has a plurality of pin resources. The test module 130 supplies a test signal to the connection target device under test 100 for each pin resource, and the pass / fail of the device under test 100 is determined based on an output signal output from the device under test 100 according to the test signal. Determine. The pin resource is provided with a delay element for testing the timing margin of the test signal, in addition to the function of supplying the test signal and the function of capturing the output signal. The test module 130 controls a delay element provided in each pin resource to delay a test signal to be supplied or adjust a timing for capturing an output signal.

  Here, in order to appropriately perform the timing margin test, the test module 130 must have the same delay amount of the test signal supplied to a plurality of terminals provided in the same device under test 100. . On the other hand, if the same delay amount is set for each delay element, the delay amount may not be the same due to the difference in characteristics of the delay elements. Prior to the test of the device under test 100, the test apparatus 10 according to the present embodiment processes an adjustment process called calibration, and signals are input to a plurality of terminals at the same timing according to the same timing designation. The purpose is to adjust so that.

  FIG. 2 shows a functional configuration of the control device 110. The control device 110 includes a first adjustment unit 150, a second adjustment unit 160, and a third adjustment unit 170, and instructs the device interface unit 120 to adjust the signal input / output timing for each terminal. Specifically, the first adjustment unit 150 adjusts the timing of outputting a signal to the driver terminal of the device under test 100 by adjusting the delay amount of the delay element included in the pin resource. The second adjustment unit 160 uses the adjusted driver terminal to output a signal to the I / O terminal of the device under test 100 and to acquire a signal from the I / O terminal of the device under test 100. Adjust. The third adjustment unit 170 uses these adjusted terminals to adjust the signal input / output timings of the other terminals. Details of each adjustment process will be described later.

  FIG. 3 shows a schematic configuration of the device interface unit 120. The device interface unit 120 includes a test head 200 and a motherboard 220. A plurality of test modules 130 are built in the test head 200. The test head 200 has a plurality of terminals for transmitting and receiving signals to and from the plurality of devices under test 100, and connects the plurality of test modules 130 and the plurality of devices under test 100. The motherboard 220 is placed on the test head 200 and connects terminals provided on the plurality of test modules 130 to the socket board 210 or the calibration board 215. A socket board 210 or a calibration board 215 can be mounted on the test head 200 with a mother board 220 interposed.

  The socket board 210 is an example of a performance board according to the present invention, and has a plurality of sockets 240, and each of the plurality of devices under test 100 is mounted in each of the plurality of sockets 240. When the socket board 210 is mounted on the test head 200, each terminal of the device under test 100 is connected to the test module 130. The calibration board 215 is an example of an adjustment board according to the present invention, and includes wiring that connects some of a plurality of terminals provided on the motherboard 220 to other terminals. By this wiring, the output signal of the test module 130 is input to the test module 130 as it is.

  FIG. 4 shows a functional configuration of the test module 130. The test module 130 includes a timing generator 300, a pattern generator 310, and a plurality of pin resources 320. The timing generator 300 receives from the pattern generator 310 a test set signal indicating the timing for supplying a test pattern to the device under test 100. The timing generator 300 generates a timing signal indicating the timing for supplying the test pattern to the device under test 100 based on the test set signal, and supplies the timing signal to each of the plurality of pin resources 320. The pattern generator 310 generates a pattern signal indicating a test pattern for testing the device under test 100 and supplies the pattern signal to the pin resource 320. Further, the pin resource 320 receives a supply of a reference clock from the control device 110 that synchronizes the operation of the entire test apparatus 10. Further, the pin resource 320 receives supply of a rate signal that determines the timing of the test operation from the control device 110.

  The pin resource 320 includes an output control unit 330, a signal output unit 340, an input control unit 350, a signal input unit 360, and a phase comparison unit 370. The output control unit 330 supplies a signal output unit 340 to supply the pattern signal supplied from the pattern generator 310 to the device under test 100 at a timing specified by the timing signal supplied from the timing generator 300. Control. Specifically, the output control unit 330 sets or resets the signal output unit 340 that is an SR latch. Further, the output control unit 330 changes the timing signal and delays the test signal in accordance with an instruction from the control device 110. The signal output unit 340 outputs a test signal to the terminal of the device under test 100 under the control of the output control unit 330.

  The input control unit 350 compares the output signal captured by the signal input unit 360 with an expected value signal, and determines whether the device under test 100 is good or bad. Further, the input control unit 350 controls the timing at which the signal input unit 360 takes the output signal in accordance with an instruction from the control device 110. The signal input unit 360 inputs a signal output from the terminal of the device under test 100 in accordance with the signal received from the input control unit 350. When the calibration board 215 is mounted on the mother board 220, the phase comparison unit 370 detects the phase difference between the output signal and the reference clock and outputs it to the control device 110. In response to this, the control device 110 sets a predetermined delay amount in the output control unit 330 and / or the input control unit 350 in order to correct the difference in the phase difference for each terminal.

  In FIG. 4, a signal output unit 340 and a signal input unit 360 are provided for each pin resource 320, but only one of them may be provided depending on the type of terminal. That is, for example, in the pin resource 320 connected to the driver terminal of the device under test 100, although a signal is output to the driver terminal, the signal is not captured from the driver terminal. For this reason, such a pin resource 320 may not have the signal input unit 360.

  FIG. 5 shows an example of the circuit configuration of the calibration board 215. On the left side of the figure, terminals corresponding to driver terminals of the device under test 100 are shown. These terminals are designated as PIN1 to PIN8. Each terminal receives a signal input from a signal output unit 340 provided in the corresponding pin resource 320. Also, these signal output units 340 are divided into a plurality of signal output groups. These signal output groups are referred to as signal output groups 500-1 to 500-4. The signal output group 500-1 has PIN1 and PIN2, the signal output group 500-2 has PIN3 and PIN4, the signal output group 500-3 has PIN5 and PIN6, and the signal output group 500-4 has PIN7 and PIN8. Belong to each.

  Moreover, the terminal corresponding to the I / O terminal of the device under test 100 is shown on the right side of the figure. These terminals are designated PINI1 to PINI8. Each terminal receives a signal output from the signal output unit 340 provided in the corresponding pin resource 320. In addition, signals output from these respective terminals are taken in by the signal input unit 360 provided in the corresponding pin resource 320. Thus, the set of the signal output unit 340 and the signal input unit 360 operates as an example of the signal input / output unit according to the present invention. A plurality of sets for the signal output unit 340 and the signal input unit 360 are divided into a plurality of signal input groups. These signal input groups are referred to as signal input groups 505-1 to 505-4. The signal input group 505-1 has PINI1 and PINI2, the signal input group 505-2 has PINI3 and PINI4, the signal input group 505-3 has PINI5 and PINI6, and the signal input group 505-4 has PINI7 and PINI8. Belong to each.

  The calibration board 215 includes a first connection unit 510, a second connection unit 520, and an inter-group switch 550. The first connection unit 510 is used when adjusting the output timing of the plurality of signal output units 340 (corresponding to PIN1 to PIN8). The first connection unit 510 is connected to the plurality of signal output units 340 and a reference signal input unit 360 (for example, the signal input unit 360 of PINI1). Then, the first connection unit 510 propagates the output signal output from the signal output unit 340 sequentially selected from each of the plurality of signal output units 340 to the signal input unit 360 as a reference. The first adjusting unit 150 described above has a plurality of output signals that the selected signal output unit 340 outputs in response to the same timing designation, so that the signal input unit 360 as a reference receives at the same timing. Each output timing of the signal output unit 340 is adjusted. Thus, for example, the output timing of the signal output unit 340 is adjusted to be the same for each of PIN1, PIN3, PIN5, and PIN7 with reference to PINI1. Further, the output timing of the signal output unit 340 is adjusted to be the same for each of PIN2, PIN4, PIN6, and PIN8 with reference to PINI1.

  As a specific configuration, the first connection unit 510 includes a plurality of first switching units provided corresponding to each of the signal output groups 500-1 to 500-4. The first switching unit is realized by the switch D1 and the switch D2-2. Here, the switch is preferably a relay switch in order to increase accuracy. An example of the first switching unit corresponding to the signal output group 500-4 will be described. The first switching unit corresponding to the signal output group 500-4 uses the output signal from the selected signal output unit 340 as the first terminal of the signal output group 500-4 (the first terminal is 1 in the figure). Output from Further, the first switching unit does not output the output signal from the unselected signal output unit 340 from the first terminal. That is, by controlling the switch D1 and the switch D2-2, one of the signal output units 340 of PIN7 and PIN8 is selected and connected to the first terminal.

  The first connection unit 510 includes a second switching unit 530. The second switching unit 530 inputs a signal output from the signal output group to which the selected signal output unit 340 of the signal output groups 500-1 to 500-4 belongs from the first terminal and serves as a reference (for example, PINI1). To the signal input unit 360). Then, the second switching unit 530 does not output the output signal from the other signal output group 500 to the signal input unit based on the output signal. The first connection unit 510 includes a switch C1 that is an example of a first switch. The switch C1 is connected to the signal input unit 360 (for example, corresponding to PINI1) with the second connection unit 520 as a reference when adjusting the output timing of the plurality of signal output units 340 (corresponding to PIN1 to PIN8). The switch C1 disconnects between the second connection unit 520 and the reference signal input unit 360 when the output timings of the plurality of signal output units 340 are not adjusted.

  The second connection unit 520 is used when adjusting the input timing of a plurality of signal input units 360 (e.g., corresponding to PINI7 and PINI8). Then, the second connection unit 520 sequentially connects each of the plurality of signal input units 360 to one of the adjusted signal output units 340. The second adjustment unit 160 described above outputs an output signal output by the adjusted signal output unit 340 (for example, the signal output unit 340 of the PIN 7) in accordance with the same timing designation to each of the connection destination signal input units 360 (for example, The input timings of the signal input units 360 to be connected are adjusted so that the signal input units 360 of the PINI 7 and PINI 8 receive at the same timing. Thereby, for example, the input timing of the signal input unit 360 of PINI7 and PINI8 is adjusted to be the same with PIN7 as a reference.

  The processing performed by the second connection unit 520 for the signal output groups 500-1 to 500-3 and the signal input groups 505-1 to 505-3 is also performed for the signal output group 500-4 and the signal input group 505-4. Is almost the same. That is, the input timing of the signal input unit 360 of PINI1 and PINI2 is adjusted to be the same with PIN1 as a reference. Further, the input timings of the signal input units 360 of PINI3 and PINI4 are adjusted to be the same with respect to PIN3. Also, the input timings of PINI5 and PINI6 are adjusted to be the same with PIN5 as a reference.

  As a specific configuration, the second connection unit 520 corresponds to each of the plurality of second switches provided corresponding to each of the signal output groups 500-1 to 500-4 and each of the signal input groups 505-1 to 505-1. It has the some 3rd switch provided, and the transmission line 540 provided corresponding to each of the signal input groups 505-1-4. The second switch is realized by a switch D2-1 in the drawing. The switch D2-1 connects or disconnects between one signal output unit 340 in the corresponding signal output group 500 and the second terminal of the signal output group 500. The third switch is realized by the switch C1 and the switch C2. The third switch connects the selected signal output unit 340 to the third terminal of the corresponding signal output group 500, and disconnects the other signal output unit 340 from the third terminal. In addition, the transmission line 540 connects each of the plurality of second terminals to the third terminal of the corresponding signal input group 505. The second terminal and the third terminal are indicated by circles in the drawing.

  The inter-group switch 550 is provided for each pair of the plurality of signal input groups 505. For example, one inter-group switch 550 is provided for the pair of signal input group 505-1 and signal input group 505-2, and another is provided for the pair of signal input group 505-3 and signal input group 505-4. . The inter-group switch 550 is connected to the transmission line connected to the third terminal of the corresponding one of the signal input groups 505 and to the third terminal of the other signal input group 505 paired with the signal input group 505. Connect the transmission line. The inter-group switch 550 is configured by, for example, a switch M1 and a switch M2. When the switch M2 is short-circuited, the third terminals of the signal input group 505-1 and the signal input group 505-2 are connected to each other, and the third terminals of the signal input group 505-3 and the signal input group 505-4 are connected to each other. Connected to.

In the figure, a circle, a triangle, and a square mark indicating the substantial length of the transmission path are shown. The length from the signal output unit 340 on the driver terminal side to the first terminal is equal to the length from the third terminal to the signal output unit 340 and the signal input unit 360 on the I / O terminal side, and this length is indicated by a circle. To express. The length from the second terminal to the switch M2 is equal to the length from the switch M2 to the third terminal, and this length is represented by a triangle mark. Moreover, the length from each 1st terminal to the 2nd switching part 530 is mutually equal, and this length is represented by the square mark. Furthermore, three switches are arranged on the path from the signal output unit 340 on the driver terminal side to the signal output unit 340 and the signal input unit 360 on the I / O terminal side. By doing so, the signal delay amount of each wiring in the calibration board 215 can be made equal, so that the correction processing according to the signal delay amount of the wiring becomes unnecessary, and the efficiency of the calibration processing can be improved.
Although the circuit configuration of the calibration board 215 has been described with reference to FIG. 5, the circuit described here may be provided in the socket 240 instead of the calibration board 215. According to such a configuration, although it is necessary to reduce the size of the circuit, calibration can be performed in a situation closer to the actual test situation of the memory under test 100.

  FIG. 6 shows the state of the control signal in each step of the calibration process. The calibration process according to the present embodiment includes a total of five steps from step A to step E. In each step, each switch becomes On (connected state) or Off (disconnected state). The same control signal is transmitted to each of the plurality of switches having the same symbol, and each takes the same state. For example, when four switches D1 are included in the calibration board 215, all of them are turned on or all of them are turned off, and only some of the switches D1 are turned on. There is no. Both D2-1 and D2-2 are handled as the switch D2, and each takes the same state.

In Step A, the first adjustment unit 150 sets the switches M1, M2, D1, D2, C1, and C2 to On, Off, On, Off, On, and Off, respectively. Then, the first connection unit 510 of the calibration board 215 connects any one of the plurality of signal output units 340 (PIN1, PIN3, PIN5, and PIN7) on the driver side to the signal input unit 360 serving as a reference on the I / O side. To do. This state is shown in FIG.
FIG. 7 shows a signal transmission path in step A. Since the switch D1 is On, the signal output unit 340 of PIN1 is connected to the second switching unit 530, the signal output unit 340 of PIN3 is connected to the second switching unit 530, and the signal output unit 340 of PIN5 is connected to the second switching unit 530. The signal output unit 340 of the PIN 7 is connected to the second switching unit 530. In addition, since the switch C1 is On, the second switching unit 530 is connected to the signal output unit 340 or the signal input unit 360 of PINI1. Thus, for each of the signal output groups 500-1 to 500-4, the signal output from one signal output unit 340 that can be connected to the second terminal is propagated to the signal input unit 360 as a reference by the first connection unit 510. Can do.

In this state, the first adjustment unit 150 sequentially selects each signal output unit 340 by transmitting a control signal for switching the second switching unit 530. The first adjustment unit 150 then outputs a plurality of signals so that the selected signal output unit 340 outputs an output signal output in accordance with the same timing designation, and the signal input unit 360 as a reference receives at the same timing. Each output timing of the output unit 340 is adjusted. Whether or not the signals are received at the same timing is realized by the control of the input control unit 350 and the phase comparison unit 370 shown in FIG. The output timing adjustment process is realized by the control of the output control unit 330 shown in FIG.
As described above, the output timing by the signal output unit 340 is adjusted to be the same in PIN1, PIN3, PIN5, and PIN7.
In step A, the switch M1 may be set to Off.

Returning to FIG. In subsequent step B, the second adjustment unit 160 sets the switches M1, M2, D1, D2, C1, and C2 to On, Off, Off, On, On, and Off, respectively. Then, the first connection unit 510 of the calibration board 215 connects one of the driver-side signal output units 340 (PIN2, PIN4, PIN6, and PIN8) to the I / O-side reference signal input unit 360. To do. This state is shown in FIG.
FIG. 8 shows a signal transmission path in step B. Since the switch D2-2 is On, the signal output unit 340 of PIN2 is connected to the second switching unit 530, the signal output unit 340 of PIN4 is connected to the second switching unit 530, and the signal output unit 340 of PIN6 is second switched. The signal output unit 340 of PIN 8 is connected to the second switching unit 530. In addition, since the switch C1 is On, the second switching unit 530 is connected to the signal output unit 340 or the signal input unit 360 of PINI1. As a result, for each of the signal output groups 500-1 to 500-4, the signal output from the other signal output unit 340 that cannot be connected to the second terminal is propagated to the signal input unit 360 as a reference by the first connection unit 510. it can.

In parallel with the adjustment of the output timing of the other signal output unit 340, the second adjustment unit 160 sets the switch C1 to the connected state, sets the switch D2-1 to On, and sets the switch M1 to On. As a result, the signal output unit 340 of PIN1 is connected to the signal input unit 360 or signal output unit 340 of PINI2. Similarly, the signal output unit 340 of PIN3 is connected to the signal input unit 360 or signal output unit 340 of PINI4, the signal output unit 340 of PIN5 is connected to the signal input unit 360 or signal output unit 340 of PINI6, and the signal of PIN7 The output unit 340 is connected to the signal input unit 360 or the signal output unit 340 of the PINI 8. Accordingly, the signal input units 360 other than the reference signal input unit 360 for each of the signal output groups 500-1 to 500-4 can be sequentially connected to the third terminal, and the input timing of the signal input unit 360 can be adjusted. .
In step B, the switch M1 may be set to Off.

  Returning to FIG. In subsequent step C, the second adjustment unit 160 sets the switches M1, M2, D1, D2, C1, and C2 to On, Off, Off, On, Off, and On, respectively. Then, the second connection unit 520 of the calibration board 215 uses the unadjusted signal input unit 360 (for example, the signal input unit 360 of PINI1) or any of the adjusted signal output units 340 (for example, the signal output unit of PIN1). 340). This state is shown in FIG.

  FIG. 9 shows a signal transmission path in step C. Since the switch C1 is Off and the switch C2 is On, the signal output unit 340 of the PIN1 is connected to the signal input unit 360 of the PINI1. Similarly, the signal output unit 340 of PIN3 is connected to the signal input unit 360 of PINI3, the signal output unit 340 of PIN5 is connected to the signal input unit 360 of PINI5, and the signal output unit 340 of PIN7 is the signal input of PINI7. Connected to the unit 360. Thereby, the input timing in the signal input unit 360 on the I / O terminal side can be made the same in the signal input group 505.

  Returning to FIG. In subsequent step D, the third adjustment unit 170 sets the switches M1, M2, D1, D2, C1, and C2 to Off, On, Off, On, Off, and On, respectively. Then, the inter-group switch 550 is connected to the transmission line connected to the third terminal of the corresponding one signal input group 505 and to the third terminal of the other signal input group 505 paired with the signal input group 505. Connect the transmission line. In addition, since the switch C2 is On, the odd-numbered PIN signal input unit 360 or signal output unit 340 is selected from each signal input group 505 and connected to the other signal output unit 340 or signal input unit 360 of the pair. The This state is shown in FIG.

FIG. 10 shows the signal transmission path in step D. The third adjustment unit 170 selects the signal output unit 340 or the signal input unit 360 of the PINI 1 that is the first signal input / output unit in the signal input group 505-1 that is the first signal input group, and the signal Connect to the third terminal of the input group 505-1. This connection is realized by turning on the switch C2. In addition, the third adjustment unit 170 is a signal output unit 340 of the PINI3 that is the second signal input / output unit in the signal input group 505-2 that is the second signal input group paired with the signal input group 505-1. Alternatively, the signal input unit 360 is selected and connected to the third terminal of the signal input group 505-2. Since the switch M2 is On, as a result, the signal output unit 340 or the signal input unit 360 of PINI1 is connected to the signal output unit 340 or the signal input unit 360 of PINI3. Similarly, the signal output unit 340 or the signal input unit 360 of the PINI 5 is connected to the signal output unit 340 or the signal input unit 360 of the PINI 7. Thereby, the signal output unit 340 and the signal input unit 360 of the odd-numbered PIN are adjusted to the same input / output timing between different signal input groups 505.
In this step D, the switch D1 may be set to On, and the switch D2 may be set to Off.

  Returning to FIG. In subsequent step E, the third adjustment unit 170 sets the switches M1, M2, D1, D2, C1, and C2 to Off, On, Off, On, On, and Off, respectively. Then, as in Step D, the inter-group switch 550 includes a transmission line connected to the third terminal of the corresponding one of the signal input groups 505, and the third of the other signal input group 505 paired with the signal input group 505. Connect the transmission line connected to the terminal. However, unlike the step D, since the switch C1 is On, the signal input unit 360 or the signal output unit 340 of the even-numbered PIN is selected from each signal input group 505, and the other signal output unit 340 or signal of the other pair of the pair is selected. Connected to the input unit 360. This state is shown in FIG.

FIG. 11 shows a signal transmission path in step E. The third adjustment unit 170 selects the signal output unit 340 or the signal input unit 360 of the PINI2 that is the first signal input / output unit in the signal input group 505-1 that is the first signal input group, and the signal Connect to the third terminal of the input group 505-1. This connection is realized by turning on the switch C1. Further, the third adjustment unit 170 is a signal output unit 340 of the PINI4 that is the second signal input / output unit in the signal input group 505-2 that is the second signal input group paired with the signal input group 505-1. Alternatively, the signal input unit 360 is selected and connected to the third terminal of the signal input group 505-2. Since the switch M2 is On, as a result, the signal output unit 340 or the signal input unit 360 of PINI2 is connected to the signal output unit 340 or the signal input unit 360 of PINI4. Similarly, the signal output unit 340 or the signal input unit 360 of the PINI 6 is connected to the signal output unit 340 or the signal input unit 360 of the PINI 8. As a result, the signal output unit 340 and the signal input unit 360 of even-numbered PINs are adjusted to the same input / output timing between different signal input groups 505.
In this step E, the switch D1 may be set to On, and the switch D2 may be set to Off.

  In step D and step E described above, the selected second signal input / output unit (for example, I / O terminal side) is connected from the selected first signal input / output unit (for example, PINI1 on the I / O terminal side). The length of the transmission path leading to PINI3) is expressed as the sum of two circle symbols and two triangle symbols. On the other hand, the length of the transmission line from the signal output unit 340 on the driver terminal side to the signal input unit 360 on the connection destination I / O terminal side via the first terminal and the third terminal is also equal to two circle symbols. Expressed as the sum of two symbols. Thus, since the lengths of these transmission lines are equal to each other, the output timing is adjusted to be the same between the signal output unit 340 on the driver terminal side and the signal output unit 340 on the I / O terminal side.

  As described above with reference to FIGS. 1 to 11, according to the test apparatus 10 according to the present embodiment, the calibration board 215 is placed in advance on the motherboard 220 before the test is started, and the calibration process is performed. By doing so, the input / output timing of the signal can be adjusted appropriately. Thereby, the accuracy of the timing margin test and the like can be improved. In addition, the calibration process has been implemented with a single calibration board 215, compared to the case where a plurality of calibration boards 215 have been alternately mounted so far, thereby reducing labor. can do.

  FIG. 12 shows a circuit configuration of the calibration board 215 in a modification of the present embodiment. This modification aims at adjusting the input timing of the signal input unit 360 on the I / O terminal side, not the signal output unit 340 on the driver terminal side. In this modification, the configuration other than the calibration board 215 is substantially the same as the configuration in the embodiment described with reference to FIGS. The calibration board 215 has a first connection part 1200 and a second connection part 1210. The first connection unit 1200 adjusts the input timing of a plurality of signal input units 360 (for example, PINI1, PINI3, PINI5, and PINI7) on the I / O terminal side, and the plurality of signal input units 360 and the reference Connected to a signal output unit 340 (for example, PIN1). Then, the first connection unit 1200 propagates the output signal output from the signal output unit 340 as a reference to the signal input unit 360 sequentially selected from each of the plurality of signal input units 360.

  The first connection unit 1200 is realized by the switch C1, the switch D1-1, and the switch D2-1. When adjusting the odd number PIN signal input section 360, the switch C1 is turned on, the switch D1-1 is turned on, and the switch D2-1 is turned off. As a result, the signal output from the signal output unit 340 on the driver terminal side is propagated to the signal input unit 360 on the I / O terminal side via the switch C1 and the switch D1-1 sequentially. When the even number PIN signal input unit 360 is adjusted, the switch D1-1 is turned off and the switch D2-1 is turned on. As a result, the signal output from the signal output unit 340 on the driver terminal side is propagated to the signal input unit 360 on the I / O terminal side via the switch C1 and the switch D1-2 in order.

  When the second connection unit 1210 adjusts the output timing of the plurality of signal output units 340 on the driver terminal side, each of the plurality of signal output units 340 is adjusted to the adjusted signal input unit on the I / O terminal side. 360 is sequentially connected to any one of 360. The second connection unit 1210 is realized by the switch C1 and the switch C2. For example, in the case where the output timings of the signal output unit 340 of the PIN7 on the driver side and the signal output unit 340 of the PIN8 are adjusted to be the same, the second connection unit 1210 sets the switches C1 and C2 to On and Off, and the switch C1. And the state in which C2 is set to Off and On are sequentially set, and the output timing of the signal output unit 340 is adjusted to be the same for each of them.

  FIG. 13 shows the state of the control signal at each step in the modification of the present embodiment. In Step A, the first adjustment unit 150 sets the switches M1, M2, D1, D2, C1, and C2 to On, Off, On, Off, On, and Off, respectively. Then, the second connection unit 1210 connects the signal output unit 340 serving as a reference on the driver side to any of the plurality of signal input units 360 (PINI1, PINI3, PINI5, and PINI7) on the I / O side. The first adjustment unit 150 sequentially selects each of these signal input units 360 by switching a switch (SW). Then, the first adjustment unit 150 inputs these signal so that the selected signal input unit 360 receives the output signal output in response to the same timing designation by the signal output unit 340 as a reference at the same timing. Each input timing of the unit 360 is adjusted.

  In subsequent step B, the second adjustment unit 160 sets the switches M1, M2, D1, D2, C1, and C2 to On, Off, Off, On, On, and Off, respectively. Then, the second connection unit 1210 connects the signal input unit 360 serving as the reference on the driver terminal side to any one of the plurality of signal output units 340 (PIN2, PIN4, PIN6, and PIN8) on the I / O terminal side. The first adjustment unit 150 sequentially selects each of these signal input units 360 by switching a switch (SW). Then, the first adjustment unit 150 inputs these signal so that the selected signal input unit 360 receives the output signal output in response to the same timing designation by the signal output unit 340 as a reference at the same timing. Each input timing of the unit 360 is adjusted.

  In parallel with this, the second adjustment unit 160 outputs an output signal output by each of the signal output units 340 on the driver terminal side in accordance with the same timing designation, to an adjusted signal input unit 360 (for example, a connection destination) Each input timing of the signal output unit 340 on the driver side is adjusted so that each of PINI1, PINI3, PINI5, and PINI7) is received at the same timing. In Step B, since the switch C1 is On and the switch C2 is Off, the input timing is set to be the same for the even-numbered PIN on the driver side. Further, in step C, the switch C1 is turned off and the switch C2 is turned on, so that the input timing is set to be the same for the odd-numbered PINs on the driver side.

  In subsequent step D, the third adjustment unit 170 sets the switches M1, M2, D1, D2, C1, and C2 to Off, On, Off, On, Off, and On, respectively. Then, the switch M2 has a transmission line connected to the third terminal of the corresponding one signal input group 505 and a transmission line connected to the third terminal of the other signal input group 505 paired with the signal input group 505. And connect. In addition, since the switch D2-2 is On, the odd-numbered PIN signal input unit 360 or signal output unit 340 is selected from each signal input group 505, and the other signal output unit 340 or signal input unit 360 of the pair is selected. Connected. Further, in the subsequent step E, since the switch D1-2 is On, the signal input unit 360 or the signal output unit 340 of the even-numbered PIN is selected from each signal input group 505, and the other signal output unit 340 of the pair is selected. Alternatively, the signal input unit 360 is connected. Thereby, the input timing of the signal output unit 340 on the I / O terminal side is also adjusted to be the same.

As described above, also in this modification, the signal input / output timings of the signal output unit 340 and the signal input unit 360 can be adjusted to be substantially the same by a total of five steps using one calibration board 215. .
As described above, according to the test apparatus 10 described with reference to the embodiment and the modifications thereof, the signal delay amount of each terminal in a state where the input terminal and the output terminal are connected one-to-one using one calibration board. Can be calibrated to make them the same. As a result, it is possible to reduce the trouble of re-mounting the calibration board and to increase the accuracy of calibration.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

FIG. 1 shows the overall configuration of the test apparatus 10. FIG. 2 shows a functional configuration of the control device 110. FIG. 3 shows a schematic configuration of the device interface unit 120. FIG. 4 shows a functional configuration of the test module 130. FIG. 5 shows an example of the circuit configuration of the calibration board 215. FIG. 6 shows the state of the control signal in each step of the calibration process. FIG. 7 shows a signal transmission path in step A. FIG. 8 shows a signal transmission path in step B. FIG. 9 shows a signal transmission path in step C. FIG. 10 shows the signal transmission path in step D. FIG. 11 shows a signal transmission path in step E. FIG. 12 shows a circuit configuration of the calibration board 215 in a modification of the present embodiment. FIG. 13 shows the state of the control signal at each step in the modification of the present embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Test apparatus 100 Device under test 110 Control apparatus 120 Device interface part 130 Test module 150 1st adjustment part 160 2nd adjustment part 170 3rd adjustment part 200 Test head 210 Socket board 215 Calibration board 220 Motherboard 240 Socket 300 Timing generator 310 pattern generator 320 pin resource 330 output control unit 340 signal output unit 350 input control unit 360 signal input unit 370 phase comparison unit 500 signal output group 505 signal input group 510 first connection unit 520 second connection unit 530 second switching unit 540 Transmission line 550 Inter-group switch 1200 First connection unit 1210 Second connection unit

Claims (8)

A test apparatus for testing a device under test,
A plurality of signal output units each outputting a signal to the terminal of the device under test;
A plurality of signal input units each for inputting a signal output from a terminal of the device under test;
In the case of adjusting the output timing of the plurality of signal output units, the signal outputs connected to the plurality of signal output units and the one signal input unit as a reference, and sequentially selected from each of the plurality of signal output units A first connection unit for propagating to the signal input unit based on an output signal output by the unit;
The output timing of each of the plurality of signal output units is adjusted so that the reference signal input unit receives the output signal output by the selected signal output unit according to the same timing designation at the same timing. A first adjustment unit;
In the case of adjusting the input timing of the plurality of signal input units, a second connection unit that sequentially connects each of the plurality of signal input units to any of the adjusted signal output units;
Each of the signal input units of the connection destination receives the output signal output by each of the adjusted signal output units according to the same timing designation so that each of the signal input units of the connection destination receives at the same timing. A second adjustment unit for adjusting the input timing;
With
The first connection part is:
Provided corresponding to each of a plurality of signal output groups obtained by dividing the plurality of signal output units, the output signal from the selected signal output unit is output from the first terminal of the signal output group, and is not selected A plurality of first switching units that do not output an output signal from the signal output unit from the first terminal;
An output signal from the signal output group to which the signal output unit selected from the plurality of signal output groups belongs is input from the first terminal and output to the signal input unit as a reference, and the other signals A second switching unit that does not output to the signal input unit based on an output signal from the output group;
When adjusting the output timings of the plurality of signal output units, the second switching unit is connected to the signal input unit with the second switching unit as a reference, and when the output timings of the plurality of signal output units are not adjusted. And a first switch for disconnecting between the signal input section as a reference. The second connection portion is
A plurality of second switches which are provided corresponding to each of the plurality of signal output groups and which connect or disconnect between one of the signal output units in the signal output group and the second terminal of the signal output group; ,
Provided corresponding to each of a plurality of signal input groups obtained by dividing the plurality of signal input units, connecting the selected signal input unit to a third terminal of the signal input group, and other signal input units A plurality of third switches for disconnecting from the third terminal;
The test apparatus according to claim 1, each having a pre-Symbol second terminal, and a transmission line connecting between said third terminal of the corresponding signal input group. The first adjustment unit, with respect to each of the plurality of signal output groups, to the signal input unit based on an output signal from the one signal output unit connectable to the second terminal by the first connection unit After the propagation timing is adjusted and the output timing of the one signal output section is adjusted, the output signal from the other signal output section that cannot be connected to the second terminal is propagated to the one signal input section by the first connection section. Adjust the output timing of the other signal output unit,
The second adjustment unit sets the plurality of second switches in a connected state in parallel with the adjustment of the output timing of the other signal output unit by the first adjustment unit, and sets a reference for each of the plurality of signal input groups. The test apparatus according to claim 2 , wherein the signal input unit other than the signal input unit is connected to the third terminal in order to adjust the input timing of the signal input unit. Each of the plurality of signal input units is a signal input / output unit that inputs a signal output from a terminal of the device under test and outputs a signal to the terminal,
Provided for each pair of the plurality of signal input groups, connected to the third terminal of the signal input group and connected to the third terminal of the signal input group paired with the signal input group A plurality of inter-group switches connecting the transmission lines
The first signal input / output unit in the first signal input group is selected and connected to the third terminal of the first signal input group, and a second pair that is paired with the first signal input group The second signal input / output unit in the signal input group is sequentially selected and sequentially connected to the third terminal of the second signal input group, and the first signal input / output unit is adjusted. Third adjustment for adjusting the output timing of the first signal input / output unit so that the second signal input / output unit receives the output signal output in accordance with the same timing designation as the signal output unit at the same timing The test apparatus according to claim 3 , further comprising: a unit. A transmission path from the plurality of signal output units to the signal input / output unit to be connected via the first terminal and the third terminal; and the second signal input / output unit from the first signal input / output unit The test apparatus according to claim 4 , wherein the length of the transmission line leading to is substantially equal. A test apparatus for testing a device under test,
A plurality of signal output units each outputting a signal to the terminal of the device under test;
A plurality of signal input units each for inputting a signal output from a terminal of the device under test;
When adjusting the input timings of the plurality of signal input units, the plurality of signal input units and the one signal output unit serving as a reference are connected, and an output signal output from the signal output unit serving as a reference is output to the plurality of signal inputs. A first connection unit for propagating from each of the signal input units to the signal input unit sequentially selected;
The input timing of each of the plurality of signal input units is adjusted so that the selected signal input unit receives the output signal output according to the same timing designation by the signal output unit as a reference at the same timing A first adjustment unit;
In the case of adjusting the output timing of the plurality of signal output units, a second connection unit that sequentially connects each of the plurality of signal output units to any of the adjusted signal input units;
Each input timing of the signal output unit so that each of the adjusted signal input units as connection destinations receives an output signal output according to the same timing designation by each of the signal output units at the same timing. and a second adjusting unit for adjusting,
The first connection part is:
Provided in correspondence with each of a plurality of signal input groups obtained by dividing the plurality of signal input units, and an input signal from the selected signal input unit is input from a first terminal of the signal input group and is not selected A plurality of first switching units that prevent an input signal from the signal input unit from being input from the first terminal;
An input signal from the signal input group to which the signal input unit selected from the plurality of signal input groups belongs is input from the first terminal and output to the signal output unit as a reference, and the other signals A second switching unit that does not input to the signal output unit based on an input signal from the input group;
When adjusting the input timings of the plurality of signal input units, the second switching unit is connected to the signal output unit with the second switching unit as a reference, and the input timings of the plurality of signal input units are not adjusted. And a first switch for disconnecting between the reference signal output unit and
Test equipment that have a. An adjustment board used for adjusting a test apparatus for testing a device under test,
The test apparatus comprises:
A performance head on which the device under test is mounted or a test head on which the adjustment board is mounted;
A plurality of signal output units which are stored in the test head and each output a signal to a terminal of the device under test via the performance board;
A plurality of signal input units which are stored in the test head and each input a signal output from a terminal of the device under test via the performance board;
The connection between the plurality of signal output units and the plurality of signal input units is controlled by controlling the adjustment board placed on the test head instead of the performance board, and the signal output units connected And an adjustment device that adjusts the output timing or input timing based on the result of propagating the signal from the signal to the signal input unit,
The adjustment board is
In the case of adjusting the output timing of the plurality of signal output units, the signal outputs connected to the plurality of signal output units and the one signal input unit as a reference, and sequentially selected from each of the plurality of signal output units A first connection unit for propagating to the signal input unit based on an output signal output by the unit;
In the case of adjusting the input timing of the plurality of signal inputs, each of said plurality of signal input unit, have a second connecting portion for sequentially connected to one of the signal output unit of the adjusted,
The first connection part is:
Provided corresponding to each of a plurality of signal output groups obtained by dividing the plurality of signal output units, the output signal from the selected signal output unit is output from the first terminal of the signal output group, and is not selected A plurality of first switching units that do not output an output signal from the signal output unit from the first terminal;
An output signal from the signal output group to which the signal output unit selected from the plurality of signal output groups belongs is input from the first terminal and output to the signal input unit as a reference, and the other signals A second switching unit that does not output to the signal input unit based on an output signal from the output group;
When adjusting the output timings of the plurality of signal output units, the second switching unit is connected to the signal input unit with the second switching unit as a reference, and when the output timings of the plurality of signal output units are not adjusted. And a first switch for disconnecting between the reference signal input unit and
Adjustment for the board to have a. An adjustment method for adjusting a test apparatus for testing a device under test,
The test apparatus comprises:
A plurality of signal output units each outputting a signal to the terminal of the device under test;
A plurality of signal input units each for inputting a signal output from a terminal of the device under test;
In the case of adjusting the output timing of the plurality of signal output units, the signal outputs connected to the plurality of signal output units and the one signal input unit as a reference, and sequentially selected from each of the plurality of signal output units A first connection unit for propagating to the signal input unit based on an output signal output by the unit;
When adjusting the input timings of the plurality of signal input units, each of the plurality of signal input units comprises a second connection unit that sequentially connects to any of the adjusted signal output unit,
The reference signal input unit receives, at the same timing, an output signal output by the signal output unit sequentially selected from each of the plurality of signal output units by the first connection unit according to the same timing designation. Adjusting the output timing of each of the plurality of signal output units;
Each of the signal input units of the connection destination receives the output signal output by each of the adjusted signal output units according to the same timing designation so that each of the signal input units of the connection destination receives at the same timing. Adjusting the input timing , and
The first connection part is:
Provided corresponding to each of a plurality of signal output groups obtained by dividing the plurality of signal output units, the output signal from the selected signal output unit is output from the first terminal of the signal output group, and is not selected A plurality of first switching units that do not output an output signal from the signal output unit from the first terminal;
An output signal from the signal output group to which the signal output unit selected from the plurality of signal output groups belongs is input from the first terminal and output to the signal input unit as a reference, and the other signals A second switching unit that does not output to the signal input unit based on an output signal from the output group;
When adjusting the output timings of the plurality of signal output units, the second switching unit is connected to the signal input unit with the second switching unit as a reference, and when the output timings of the plurality of signal output units are not adjusted. And a first switch for disconnecting between the reference signal input unit and
Adjust how having a.

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