JP4784558B2 - Power amplification device and wireless communication device using the same - Google Patents

Description

  The present invention relates to a power amplification device and a wireless communication device using the same, and more particularly to a power amplification device having a distortion compensation function and a wireless communication device using the same.

  A wireless communication device typified by a mobile phone adopting a linear modulation method such as CDMA (Code Division Multiple Access) requires a low distortion and high efficiency power amplification device. As this type of power amplifying apparatus, a power amplifying apparatus having a distortion compensation function is known.

  An example of the configuration is shown in FIG. The power amplifying apparatus according to this conventional example includes an amplifying FET 101, an input matching circuit 102, a feedforward path 103, a low-frequency choke inductor 104, and an output matching circuit 105, and suppresses third-order distortion by linearization using feedforward. It is to do.

  The operation principle of the power amplifying apparatus having the above configuration is as follows. First, when two sine wave signals or modulated wave signals are input via the input matching circuit 102, the amplification FET 101 operates as a large signal. That is, it is a state in which higher-order harmonics are generated in addition to the fundamental wave. Of the second-order distorted wave generated in the amplifying FET 101, a component present at a low frequency passes through the RF choke inductor 111 and the capacitor 112 in the feedforward path 103 and is then converted into a voltage signal by the load resistor 113. . The low frequency component is amplified by the low frequency amplifier 114.

  The low frequency signal amplified by the low frequency amplifier 114 passes through the capacitor 116 and the choke inductor 117 and is then reinjected into the drain of the amplifying FET 101. A part of the reinjected low-frequency signal is newly converted into third-order distortion by the nonlinearity of the amplifying FET 101. Then, at the drain of the amplifying FET 101, the third-order distortion that originally existed cancels out the newly-generated third-order distortion, and as a result, the third-order distortion component decreases.

  The principle of distortion reduction in the feedforward method is analytically explained by mathematical formulas as follows.

The input / output characteristics of the power amplifier are expressed in polynomial form as follows.
{EMBED Equation.3, } …… (1)
Here, assuming that the angular frequencies of the two sine wave signals input to the power amplifier are ω1 and ω2, the angular frequency of the second-order distortion component generated at the power amplifier output is ω2−ω1. This component is reinjected into the power amplifier again in some way. In the above conventional example, reinjection is performed from the drain side of the amplification FEE 101.

{EMBED Equation.3, }… (2)
In the formula (2), two items are low-frequency secondary distortion components. Here, H is an amplitude coefficient, and φ is a phase shift amount.

Next, the expression (2) is substituted into the expression (1). If all terms are expressed, it becomes complicated. If only terms based on the second order coefficient are expressed, it becomes as follows.

  Since the last two terms in the equation (3) have angular frequency components of 2ω1-ω2 and 2ω2-ω1, they are third-order distortion components (IM3). If these terms cancel out the third-order distortion component originally generated in the power amplifier, the third-order distortion component can be reduced.

  As another conventional example, there is a linear amplifier described in Patent Document 1. Also in this linear amplifier, the basic concept of reducing the third-order distortion by taking out the low-frequency second-order distortion component and reinjecting it is the same. However, unlike the above-described conventional example, a configuration is adopted in which low-frequency secondary distortion components are extracted from the output unit and fed back to the input unit.

JP-A-7-22849

  By the way, the power amplifying device according to the conventional example described above is configured by a single-stage transistor. However, in a power amplifier used in an ordinary mobile phone terminal or the like, a two-stage or three-stage transistor is often used in order to obtain a sufficient power gain. The biggest problem is that a coil having a very large inductance is required as the low-frequency choke inductor 104 because the low-frequency signal is reinjected into the drain of the amplifying FET 101. The low frequency choke inductor 104 is necessary for separating the low frequency component to be reinjected from the DC power source, that is, preventing the low frequency component from passing to the power source side. As the low-frequency choke inductor 104, an inductance value of several μH is required in some cases. This is contrary to the idea of small size and low cost.

  In addition, in another conventional example described in Patent Document 1, an effect is obtained in the case of a waveform in which repetition of two sine wave signals or the like continues, but when a random signal such as a digital modulation wave is input, The desired third-order distortion reduction effect cannot be obtained due to the propagation time delay of the feedback path. In particular, for signals with a fast chip rate, that is, signals with fast envelope fluctuations, such as a recent W (Wide-band) -CDMA modulated wave, it is considered that distortion cancellation is difficult in time because of the feedback method.

  The present invention has been made in view of the above problems, and its purpose is to achieve power amplification that can be realized at low distortion and high efficiency, in a small size and at low cost, while taking advantage of the feedforward method. An apparatus and a wireless communication apparatus using the same are provided.

Therefore, the power amplifying device of the present invention has a frequency converter that converts an IF signal of an intermediate frequency into a higher frequency RF signal, and the high frequency RF signal after the conversion is input through a bandpass filter and a driver amplifier. , a power amplifier of a wireless communication device having a multistage high-frequency amplifying unit to output the multistage amplifying the high frequency of the RF signal the input transistors of the plurality of stages, a high frequency RF output from the multistage RF amplifier As a feed-forward circuit for reducing third-order distortion in a signal, it is frequency-converted to the RF signal from the input side of the frequency converter that is located in front of a multistage high-frequency amplifier and receives the IF signal of the intermediate frequency. The low frequency signal component of the intermediate frequency IF signal before extraction is extracted, and the extracted low frequency signal component is A detector for converting into an envelope signal; a low frequency amplifier connected to the detector for amplifying the envelope signal input from the detector; and connected to the low frequency amplifier for amplification by the low frequency amplifier A phase shifter that adjusts the phase of the low-frequency second-order distortion component of the envelope signal, and a series circuit of a resistor and a choke inductor connected to the gate or base of the final stage transistor of the multistage high-frequency amplifier includes a bias circuit for applying a bias voltage to the gate or base, and the phase shifter, the bias circuit including the series circuit of the resistance and the choke inductor is connected, the multistage RF amplifier device is connected to the gate or the base of the transistor of the last stage, the said envelope signal and phase adjusted in the low frequency second-order distortion component gate Or output to the base, injected into the bias voltage applied by the bias circuit.
In addition, the wireless communication device of the present invention is a power amplifying device constituting the front end of the transmission system, a frequency converter that converts an IF signal of an intermediate frequency into a higher frequency RF signal, and a high frequency after the change And a multi-stage high-frequency amplifier that multi-stage amplifies the input high-frequency RF signal with a plurality of stages of transistors and outputs the multi-stage RF signal. As a feedforward circuit for reducing third-order distortion in a high-frequency RF signal output from a high-frequency amplifier, an input of the frequency converter that is positioned in front of the multistage high-frequency amplifier and receives the IF signal of the intermediate frequency From the side, the low frequency signal component of the intermediate frequency IF signal before frequency conversion to the RF signal is extracted. A detector that converts the extracted signal component into an envelope signal, a low-frequency amplifier that is connected to the detector and that amplifies the envelope signal input from the detector, and is connected to the low-frequency amplifier A phase shifter for adjusting the phase of the low-frequency second-order distortion component of the envelope signal amplified by the low-frequency amplifier, and a resistor connected to the gate or base of the final-stage transistor of the multi-stage high-frequency amplifier And a bias circuit for applying a bias voltage to the gate or base, and the phase shifter is connected to the bias circuit including the series circuit of the resistor and the choke inductor. Connected to the gate or base of the final stage transistor of the multi-stage high-frequency amplifier, and the phase of the low-frequency second-order distortion component is The envelope signal integer and outputs to the gate or base, is injected against the bias voltage applied by the bias circuit.

  In the power amplifying apparatus configured as described above, the detector extracts a part of the high-frequency signal and converts the extracted signal into an envelope signal, thereby efficiently extracting the low-frequency secondary distortion component. The extracted low-frequency second-order distortion component is phase-adjusted by a phase shifter and injected with respect to a bias voltage applied by a bias circuit to the gate / base of the final stage transistor of the multistage high-frequency amplifier. By injecting the second-order distortion component into the gate / base bias of the final-stage transistor, the second-order distortion component is converted into third-order distortion by the non-linearity of the transistor, and cancels out the third-order distortion originally generated in the multistage high-frequency amplifier. Is done. In addition, since the bias circuit prevents the low-frequency secondary distortion component from passing to the power supply side in the bias circuit, it is not necessary to use a large inductance element.

  According to the present invention, in a power amplifying apparatus having a distortion compensation function, a low-frequency second-order distortion component is efficiently extracted by a detector, phase-adjusted by a phase shifter, and then the gate / base of the final stage transistor of the multistage high-frequency amplifier. The second-order distortion component is converted into third-order distortion by the nonlinearity of the transistor, and the converted third-order distortion is originally generated in the multistage high-frequency amplifier. Since this cancels out the third-order distortion, the adjacent channel leakage power can be reduced, and the bias circuit blocks the passage of the low-frequency second-order distortion component to the power supply side. As a result, it is possible to reduce the size and cost of the power amplifying device.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 is a block diagram illustrating a configuration example of a power amplifying device according to the first embodiment of the present invention.

  In FIG. 1, between a circuit input terminal 11 and a circuit output terminal 12, a multistage high-frequency amplifier 13 in which amplification transistors are connected in multiple stages is connected. A detector 15, a low-frequency amplifier 16, and a phase shifter 17 are connected in cascade to an input end of the multistage high-frequency amplifier 13 via an RF coupler 14. However, the low frequency amplifier 16 and the phase shifter 17 are not essential components, and only one of them may be provided as necessary. The output signal of the phase shifter 17 is injected into the bias circuit of the gate (or base) of the final stage transistor of the multistage high frequency amplifier 13. The feedforward means is formed as described above.

  Next, the circuit operation of the power amplification device according to the first embodiment having the above-described configuration will be described.

  A high frequency modulation signal such as N (Narrow-band) -CDMA or W-CDMA is input from the circuit input terminal 11. Although the details are omitted here, the linear modulation signal such as CDMA is different from the constant envelope modulation signal such as GMSK (Gaussian (-filtered) Minimum Shift Keying), and the envelope is included because it includes information in the amplitude direction. Line level is fluctuating.

  Most of the input high frequency modulation signal is input to the multistage high frequency amplifier 13 as it is. A part of the high frequency modulation signal is taken out by the RF coupler 14 and inputted to the detector 15. The signal that enters the detector 15 is converted into an envelope signal of a modulated wave by a device using nonlinearity such as a diode. Although harmonics more than twice the modulated wave are also generated inside the detector 15, only a low frequency signal near the DC frequency is output due to the low pass characteristic of the output part of the detector 15. This low-frequency signal corresponds to a signal existing in the vicinity of direct current among the second-order distortion components of the modulated wave.

  The low-frequency signal (low-frequency secondary distortion signal) output from the detector 15 is input to the low-frequency amplifier 16, where it is subjected to appropriate voltage amplification and output. The output signal of the low-frequency amplifier 16 is further input to the phase shifter 17, subjected to phase adjustment determined here, and then injected into the final stage gate bias circuit of the multistage high-frequency amplifier 13. Here, it is assumed that the low-frequency amplifier 16 is configured by an FET. However, when the low-frequency amplifier 16 is configured by a bipolar transistor, the output signal of the phase shifter 17 is the base bias circuit of the final stage of the multistage high-frequency amplifier 13. Injected into.

  Compared with the case where the output signal of the phase shifter 17 is injected from the drain / collector bias, when the gate / base bias is injected, a large current does not flow through the bias circuit, so that a resistor can be inserted in series. The low-frequency signal has its resistance as a load, so that the gate / base potential in the final stage varies. Injecting from the drain / collector bias is impossible because a large power loss occurs when a resistor is inserted. Therefore, an inductor having a large inductance value is required as a load for the low frequency signal.

  The final-stage transistor normally operates in a large non-linear state in order to perform high-efficiency operation. Therefore, the low-frequency signal input to the final stage gate / base bias circuit is converted into third-order distortion by the non-linearity of the transistor according to the theory described in the above equation (3). Then, the converted third-order distortion is canceled out with the third-order distortion component originally generated in the multistage high-frequency amplifier 13, so that the third-order distortion component in the output is reduced.

  There is an adjacent channel leakage power ratio (ACPR) as an index for determining the distortion specification of the power amplifier. The dominant distortion factor that determines the ACPR specification is the third-order distortion component. Therefore, if third-order distortion can be reduced, ACPR can also be reduced. Thereby, since the power amplifier can be used in a larger nonlinear state, it is possible to achieve high efficiency of the power amplifier.

(Specific example of the first embodiment)
FIG. 2 is a circuit diagram showing a specific example of a power amplifying device according to a modification of the first embodiment, in which the same reference numerals are given to the same parts as those in FIG.

  In FIG. 2, the circuit portions of the low frequency amplifier 16 and the phase shifter 17 of FIG. 1 are omitted. An input matching circuit 18 is connected between the circuit input terminal 11 and the multistage high frequency amplifier 13, and an output matching circuit 19 is connected between the multistage high frequency amplifier 13 and the circuit output terminal 12.

  In this specific example, a case where the multistage high-frequency amplifier 13 has a two-stage configuration is shown as an example, and an FET is used as a transistor constituting the multistage high-frequency amplifier 13. That is, the multistage high frequency amplifier 13 has a first stage FET 131 and a final stage FET 132, and the drain of the first stage FET 131 and the gate of the final stage FET 132 are coupled via the interstage matching circuit 133. The gate of the first stage FET 131 is connected to the first stage gate potential via a resistor R11. The drain of the first stage FET 131 is connected to the power supply Vcc via the RF choke inductor L11.

  The gate bias circuit 134 of the final stage FET 132 includes a bias resistor R12 and an RF choke inductor L12 connected in series between the final stage gate potential and the gate of the final stage FET 132, the gate of the final stage FET 132, and the phase shifter 17 ( And an RF choke inductor L13 and a DC cut capacitor C11 connected in series with each other (see FIG. 1). The drain of the final stage FET 132 is connected to the power supply Vcc via the choke inductor L14 and is connected to the circuit output terminal 12 via the capacitor C12 and the output matching circuit 19.

  In the gate bias circuit 134, the RF choke inductor L12 functions to block the passage of the high frequency signal to the power source side and to pass the low frequency signal and the DC signal to the power source side. The DC cut capacitor C11 has a function of passing the low-frequency signal supplied from the phase shifter 17 toward the final stage FET 132 and blocking the passage of the DC signal. As a capacitance value of the DC cut capacitor C11, a relatively large value (up to several μF) is required. However, due to recent development of devices, it is easy to obtain a small and low-cost element.

  Incidentally, as described in the prior art, a large inductance (for example, several μH to 10 μH) is used as a choke inductor (low-frequency choke inductor 104 in FIG. 13) that blocks the passage of a low-frequency secondary distortion signal to the power supply side. This is not the case when using a device, which leads to an increase in the size and cost of the power amplifying device. On the other hand, in the power amplifying device according to this example, the choke inductor L14 may be about several nH to 10 nH, which can greatly contribute to downsizing and cost reduction.

  As the RF coupler 14, a capacitor C13 is used. The detector 15 uses a diode as a nonlinear element. Similar effects can be obtained by using FETs or bipolar transistors instead of diodes as nonlinear elements. The anode of the diode D is connected to the output terminal of the input matching circuit 18 via the RF coupling capacitor C13. A resistor R13 is connected between the anode of the diode D and the ground. A capacitor C14 and a resistor R14 are connected in parallel between the cathode of the diode D and the ground.

  As described above, in the power amplifying apparatus having the distortion compensation function, the low-frequency secondary distortion component is efficiently extracted by the detector 15 and reinjected into the gate / base bias circuit of the final stage transistor of the multistage high frequency amplifier 13. By adopting the configuration, the multistage high-frequency amplifier 13 is linearized, that is, the injected second-order distortion component is converted into third-order distortion by the nonlinearity of the transistor, and the converted third-order distortion is originally generated in the multistage high-frequency amplifier 13. Since this cancels out the third-order distortion, the adjacent channel leakage power can be reduced.

  In particular, the following effects can be obtained by reinjecting the low-frequency second-order distortion component between the stages of the multi-stage high-frequency amplifier 13, specifically, the gate / base bias circuit at the final stage. That is, the gate circuit of the FET has a very high impedance compared to the drain, and normally, as is clear from the specific example of FIG. 2, a gate potential is applied via the bias resistor R12. Accordingly, since the low-frequency second-order distortion component is prevented from passing to the power source side by the bias resistor R12, it is not necessary to use a large inductance element as described in the prior art. Cost can be reduced.

  In addition, since the feedforward configuration is used instead of the feedback configuration, the effect of reducing third-order distortion can be obtained even when a modulated wave whose envelope fluctuates at high speed, such as a W-CDMA modulated wave, is amplified. it can. This indicates that it can be applied to W-CDMA and next-generation high-speed modulation systems. Further, the components added for linearization to the conventional normal power amplifying device are the detector 15, the low frequency amplifier 16, the phase shifter 17, and the like, which can be realized in a small size by using the IC technology. It is. Therefore, the configuration of the power amplifying apparatus according to the present embodiment is suitable for modularization, and an all-in-one linearized power amplifying apparatus can be realized by modularization.

  In the specific example of FIG. 2, the case where the multistage high-frequency amplifier 13 has a two-stage configuration has been described as an example. Similar effects can be obtained by reinjecting the next strain component. However, since the final stage transistor operates non-linearly to increase the power conversion efficiency, and distortion occurs there, reinjection into the gate / base bias circuit of the final stage transistor further improves the distortion compensation effect. Can be increased.

  FIG. 3 is a characteristic diagram showing input power with respect to output power & ACPR (adjacent channel leakage power ratio) when an N-CDMA modulated wave signal is input to the power amplifying apparatus according to the present embodiment. The center frequency of the modulated wave is 900 MHz.

  In FIG. 3, ACPR indicates the power ratio between the power at the frequency offset from the RF frequency of the modulated wave by ± 900 MHz and the own channel. LFFF (solid line in the figure) indicates the characteristic when the distortion compensation according to the present invention is performed, and NoFF (dotted line in the figure) indicates the characteristic when the distortion compensation according to the present invention is not performed. As is clear from the characteristics of LFFF (Low Filter Feed Forward), it can be seen that ACPR is reduced at most input power levels by performing distortion compensation according to the present invention.

  FIG. 4 is a frequency spectrum diagram showing the effect when distortion compensation (LFFF) according to the present invention is performed. In FIG. 4, the alternate long and short dash line (A) indicates the spectrum of the input signal, and the dotted line (B) indicates the spectrum output by the ordinary multistage power amplifier without performing distortion compensation according to the present invention (without LFFF). Shows the spectrum when the distortion compensation according to the present invention is performed (with LFFF). The solid line (C) exceeds the dotted line (B) at frequencies near the adjacent channel, which is the effect of the distortion compensation of the present invention.

  FIG. 5 is a characteristic diagram of conversion efficiency (PAE) -input power of the power amplifying device according to the present invention. In FIG. 3, if the ACPR specification given to the power amplification device is −50 dBc, only the input power of about −4 dBm can be inputted when the distortion compensation according to the present invention is not performed. On the other hand, by performing distortion compensation according to the present invention, the input power can be increased to -0.5 dBm. Accordingly, it can be seen from the characteristic diagram of FIG. 5 that an increase in conversion efficiency (PAE) of about 10% is obtained.

  Next, specific configuration examples of the low frequency amplifier 16 and the phase shifter 17 will be described.

  FIG. 6 is a circuit diagram showing an example of the configuration of the low frequency amplifier 16. The low-frequency amplifier 16 according to this example includes an operational amplifier OP11 having an input signal Vin as a non-inverting input, a variable resistor VR11 connected between an inverting (−) input terminal and an output terminal of the operational amplifier OP11, and an operational amplifier OP11. And a resistor R21 having one end connected to the output end of the non-inverting amplifier.

  FIG. 7 is a circuit diagram showing an example of the configuration of the phase shifter 17. The phase shifter 17 according to the present example is connected to the operational amplifier OP12, one end of which is commonly connected to be a circuit input terminal, and the other end is connected to the inverting input terminal and the non-inverting input terminal of the operational amplifier OP12. And a resistor R22, a capacitor C22 connected between the non-inverting input terminal of the operational amplifier OP12 and the ground, and a resistor R23 connected between the inverting input terminal and the output terminal of the operational amplifier OP12. It has become.

In the phase shifter 17 configured as described above, assuming that the resistance value of the variable resistor VR12 is R and the capacitance value of the capacitor C22 is C, the phase shift amount Δθ at each angular frequency ω is
Δθ = tan ⁻¹ {−2ωCR / (1-ω ² C ² R ² )}
It is represented by

(First modification of the first embodiment)
FIG. 8 is a block diagram illustrating a configuration example of a power amplifying device according to a first modification of the first embodiment. In the figure, the same parts as those in FIG. 1 are denoted by the same reference numerals.

  The power amplifying device according to this modification employs a configuration in which a band pass filter (or low pass filter) 20 is disposed between the detector 15 and the low frequency amplifier 16. The basic operation of the power amplifying apparatus having such a configuration is the same as that shown in FIG. However, in the power amplifying device according to the present modification, the harmonic component contained in the low frequency signal output from the detector 15 is actively dropped by the band pass filter (or low pass filter) 20 and the low frequency second order distortion. Only the ingredients are taken out.

  In this way, the bandpass filter (or low-pass filter) 20 is arranged after the detector 15 for extracting the low-frequency component from the high-frequency signal, and the harmonic component contained in the low-frequency signal is actively dropped to reduce the low frequency 2 By extracting only the second-order distortion component, only the low-frequency second-order distortion component is reinjected into the gate / base bias circuit at the final stage of the multistage high-frequency amplifier 13, and the third-order distortion canceling effect is enhanced. Therefore, the effect of distortion compensation can be further enhanced.

(Second modification of the first embodiment)
FIG. 9 is a block diagram illustrating a configuration example of a power amplifying device according to a second modification of the first embodiment. In FIG. 9, the same components as those in FIG. 1 are denoted by the same reference numerals.

  In the first embodiment and the first modification, the detector 15 that detects the second-order distortion component of the low-frequency signal is arranged in the RF stage, whereas in the present modification, the detector 15 is connected to the IF stage. A configuration is adopted in which a part of the IF signal is provided to the detector 15 via the coupler 14A.

  In FIG. 9, a frequency converter 21, a band pass filter (BPF) 22, a driver amplifier 23 and a multistage high frequency amplifier 13 are connected in cascade between a circuit input terminal 11 and a circuit output terminal 12. The frequency converter 21 mixes the local oscillation signal provided from the local oscillator 24 with the IF signal to convert it into an RF signal.

  The power amplifying apparatus according to the second specific example can be applied to a transmitter having an IF stage as a transmission system. Then, the low frequency signal when the input signal passes through the detector 15, the low frequency amplifier 16, the phase shifter 17 and the like due to the delay time while passing through the frequency converter 21, the band pass filter 22, the driver amplifier 23 and the like. Since the delay time is canceled out, it is possible to prevent the deterioration of the linearization characteristic due to the delay time shift.

  In the first embodiment and its modification, the phase shifter 17 is disposed after the low frequency amplifier 16, but the originally generated third order distortion and the newly generated third order distortion are canceled out. At this time, it is not always necessary to adjust the phase of the low-frequency secondary distortion component by the phase shifter 17. In that case, the same effect can be obtained even if the phase shifter 17 is omitted.

  By the way, the detector 15 detects the envelope (including the second-order distortion) of the high-frequency signal using the nonlinearity of the diode or the like. However, since the diode is an analog element, the characteristic variation due to process variations and temperature changes is not caused. Inevitable. When the output voltage of the detector 15 is affected by these fluctuation factors, the linearization characteristic of the amplifier is degraded. In view of this point, a power amplifying device according to a second embodiment of the present invention described below is provided.

[Second Embodiment]
FIG. 10 is a block diagram illustrating a configuration example of the power amplifying device according to the second embodiment of the present invention. The power amplifying apparatus according to the second embodiment employs a configuration in which a baseband signal is directly converted to an RF signal without using an intermediate frequency in a transmission system such as a wireless terminal.

  In FIG. 10, the digital baseband unit 31 converts the I signal and the Q signal into analog signals by the D / A converters 311 and 312, respectively, and outputs them to the envelope calculation means, for example, the square wave detection circuit 313. Then, the envelope is calculated, the amplitude of the envelope is adjusted by the low frequency amplifier 314, the phase is adjusted by the phase shifter 315, and then the analog signal is converted by the D / A converter 316. Output as.

  The I signal and the Q signal output from the digital baseband unit 31 as analog signals pass through low-pass filters (LPF) 32 and 33 and are input to the quadrature modulator 34. The quadrature modulator 34 converts the I signal and Q signal into a high-frequency signal. After the conversion, the signal is input to the multistage high-frequency amplifier 36 via the driver amplifier 35.

  On the other hand, the low-frequency analog signal output from the digital baseband unit 31 is equivalent to the low-frequency secondary distortion signal in the first embodiment, and preferably passes between the stages of the multi-stage high-frequency amplifier 36 after passing through the low-pass filter 37. Is input to the gate / base bias circuit of the final stage transistor. When the multistage high frequency amplifier 36 is configured using, for example, an FET, the configuration of the bias circuit is the same as the configuration of the final stage bias circuit 134 of FIG.

  As described above, by calculating the envelope in the digital baseband unit 31, it is not necessary to use an analog element such as a diode as a detection circuit, so that characteristic deterioration due to element variation can be avoided. Similarly, since it is not necessary to use analog circuits as the low-frequency amplifier 314 and the phase shifter 315, characteristic deterioration due to element variations can be avoided.

  As in the case of the first modification of the first embodiment, a harmonic component included in the low-frequency signal can be obtained by disposing a digital BPF or LPF after the square wave detection circuit 313 serving as an envelope calculation unit. It is possible to extract only the low-frequency secondary distortion component. As a result, only the low-frequency second-order distortion component is reinjected into the gate / base bias circuit at the final stage of the multi-stage high-frequency amplifier 36, so that the effect of distortion compensation can be further enhanced.

  By the way, in the power amplifying device according to the first embodiment, the high frequency signal is directly input to the multistage high frequency amplifier 13, whereas the low frequency signal generated by the detector 15 is the low frequency amplifier 16 and the phase shifter 17, In the case of the first modification, the passage time becomes longer because the passage passes through the BPF (or LPF) 20. There is no problem if the passage time can be sufficiently ignored with respect to the chip rate of the signal modulation wave, but if it cannot be ignored, the linearization characteristics of the power amplifying device will deteriorate. In view of this point, a power amplifying apparatus according to a third embodiment of the present invention described below is provided.

[Third Embodiment]
FIG. 11 is a block diagram showing a configuration example of a power amplifying device according to the third embodiment of the present invention. In FIG. 11, the same parts as those in FIG.

  The power amplifying device according to the present embodiment employs a configuration in which a delay element 31 such as a SAW (Surface Acoustic Wave) filter is disposed between the circuit input terminal 11 and the multistage high-frequency amplifier 13. As a result, the high frequency signal passes through the delay element 31 and is input to the multistage high frequency amplifier 13.

  Thus, by arranging the delay element 31 between the circuit input terminal 11 and the multistage high-frequency amplifier 13, the low-frequency amplifier 16 and the phase shifter 17, and in some cases, the low-pass that passes through the BPF (or LPF) 20. Since the difference between the delay time of the frequency signal and the delay time of the high-frequency signal passing through the delay element 31 is reduced, it is possible to prevent deterioration of the linearization characteristic due to the delay time delay. That is, the linearization method according to the present invention can be applied even to a modulated signal having a high chip rate.

[Application example]
The power amplifying device according to any one of the first to third embodiments described above is used to configure a power amplifier of an RF front end unit in a wireless communication device, for example, a CDMA mobile phone. FIG. 12 is a block diagram showing an example of the configuration of the RF front end unit in the CDMA mobile phone.

  In FIG. 12, the received wave received by the antenna 71 passes through a band allocating filter 72 that is shared for transmission / reception, and is supplied to a mixer 74 after the signal level is made constant by an AGC amplifier 73. The mixer 74 is mixed with the local oscillation frequency from the local oscillator 75 to be converted to an intermediate frequency (IF), and then supplied to a subsequent baseband IC (not shown).

  On the other hand, on the transmission side, the IF signal supplied from the previous baseband IC is supplied to the mixer 76, where it is mixed with the local oscillation frequency from the local oscillator 77 and converted to an RF signal. The RF signal is amplified by the high frequency power amplifier 78 and then supplied to the antenna 71 through the post-band sorting filter 72, and is transmitted from the antenna 71 as a radio wave.

  In the RF front end unit of the CDMA mobile phone having the above-described configuration, the power amplification device according to any of the first to third embodiments described above is used as the high-frequency power amplifier 78 on the transmission side.

  As described above, in the RF front end unit in the wireless communication device, the power amplifying device according to any one of the first to third embodiments is used as the high-frequency power amplifier 78 on the transmission side. There is no need to use elements, and miniaturization and cost reduction are possible, which can greatly contribute to miniaturization and cost reduction of the radio communication device itself, especially when applied to portable radio communication devices such as cellular phones. The effect is great.

  In the application example described above, the case where the present invention is applied to a CDMA mobile phone has been described as an example. However, the present invention is not limited to this application example, and can be applied to all wireless communication apparatuses.

It is a block diagram which shows the structural example of the power amplification apparatus which concerns on 1st Embodiment of this invention. It is a circuit diagram which shows the specific example of the power amplification apparatus which concerns on the modification of 1st Embodiment. It is a characteristic view which shows the input power with respect to the output power & ACPR when the N-CDMA modulated wave signal is inputted to the power amplifying apparatus according to the first embodiment. It is a frequency spectrum figure which shows the effect at the time of performing distortion compensation by this invention. It is a characteristic figure of conversion efficiency-input power of a power amplification device concerning the present invention. It is a circuit diagram which shows an example of a structure of a low frequency amplifier. It is a circuit diagram which shows an example of a structure of a phase shifter. It is a block diagram which shows the structural example of the power amplification apparatus which concerns on the 1st modification of 1st Embodiment. It is a block diagram which shows the structural example of the power amplification apparatus which concerns on the 2nd modification of 1st Embodiment. It is a block diagram which shows the structural example of the power amplification apparatus which concerns on 2nd Embodiment of this invention. It is a block diagram which shows the structural example of the power amplification apparatus which concerns on 3rd Embodiment of this invention. It is a block diagram which shows an example of a structure of RF front end part in a CDMA system mobile telephone. It is a circuit diagram which shows the prior art example of the power amplifier with a distortion compensation function.

Explanation of symbols

  13, 36 ... multi-stage high frequency amplifier, 14, 14A ... coupler, 15, 313 ... detector, 16, 314 ... low frequency amplifier, 17, 315 ... phase shifter, 20 ... filter (LPF / BPF), 21 ... frequency Converter, 23 ... Driver amplifier, 31 ... Delay element

Claims (2)

A frequency converter that converts an IF signal of an intermediate frequency into a frequency of a higher frequency RF signal, and a high frequency RF signal after the conversion are input through a band pass filter and a driver amplifier. the power amplifier device of a wireless communication device having a multistage high-frequency amplifying unit to output the multi-stage amplified by the transistor in a plurality of stages,
As a feedforward circuit for reducing third-order distortion in a high-frequency RF signal output from the multistage high-frequency amplifier,
A low frequency signal component of the IF signal of the intermediate frequency before being converted into the RF signal is input from the input side of the frequency converter that is positioned in front of the multistage high frequency amplifier and receives the IF signal of the intermediate frequency. A detector for taking out and converting the taken out low frequency signal component into an envelope signal;
A low-frequency amplifier that is connected to the detector and amplifies the envelope signal input from the detector;
A phase shifter that is connected to the low frequency amplifier and adjusts a phase of a low frequency second-order distortion component of the envelope signal amplified by the low frequency amplifier;
A bias circuit for applying a bias voltage to the gate or base, including a series circuit of a resistor and a choke inductor connected to the gate or base of the final stage transistor of the multistage high-frequency amplifier ;
Have
The phase shifter is
The bias circuit including the series circuit of the resistance and the choke inductor is connected, which is connected to the gate or the base of the transistor of the last stage of the multistage high-frequency amplification unit, to adjust the phase of the low frequency second-order distortion component the envelope signal is output to the gate or base, power amplifier you injected into the bias voltage applied by the bias circuit. As a power amplifying device constituting a front end of a transmission system, a frequency converter that converts an IF signal of an intermediate frequency into a frequency of a higher-frequency RF signal, and a high-frequency RF signal after the change is converted into a bandpass filter and a driver amplifier A multi-stage high-frequency amplifier that multi-stage amplifies and outputs the input high-frequency RF signal with a plurality of stages of transistors,
As a feedforward circuit for reducing third-order distortion in a high-frequency RF signal output from the multistage high-frequency amplifier,
A low-frequency signal component of the IF signal of the intermediate frequency before being frequency-converted to the RF signal from the input side of the frequency converter where the IF signal of the intermediate frequency is input in front of the multistage high-frequency amplifier A detector that converts the extracted signal component into an envelope signal;
A low-frequency amplifier that is connected to the detector and amplifies the envelope signal input from the detector;
A phase shifter that is connected to the low frequency amplifier and adjusts a phase of a low frequency second-order distortion component of the envelope signal amplified by the low frequency amplifier;
A bias circuit for applying a bias voltage to the gate or base, including a series circuit of a resistor and a choke inductor connected to the gate or base of the final stage transistor of the multistage high-frequency amplifier;
Have
The phase shifter is
The bias circuit including the series circuit including the resistor and the choke inductor is connected to the gate or base of the final stage transistor of the multistage high-frequency amplifier, and the phase of the low-frequency second-order distortion component is adjusted. An envelope signal is output to the gate or base and injected with respect to a bias voltage applied by the bias circuit.
Wireless communication device.

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