JP3549182B2 - Transmission amplifier - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a transmission amplifier which is applied to, for example, a mobile communication device and operates linearly.
[0002]
[Prior art]
FIG. 3 shows a conventional transmission amplifier. The data signal from the input terminal 11 is converted into a waveform signal of, for example, an in-phase component signal and a quadrature component signal of a QPSK signal in a waveform generation circuit 12, and a quadrature modulator 13 quadrature modulates a carrier with these waveform signals. The modulation output signal is adjusted in gain (level) as needed by the amplitude modulation circuit 14, output-amplified by the saturation amplifier, that is, the transmission amplifier 15, and output to the output terminal 16.
[0003]
4A, the signal from the input terminal 17 is supplied to the gate of the FET 19 through the matching circuit 18, the source of the FET 19 is grounded, the drain is connected to the power supply terminal 22 through the load 21, and The output terminal 16 is connected through the matching circuit 20. The gate of the FET 19 is connected to the terminal 24 through the impedance element 23.
[0004]
Conventionally, in order to perform efficient linear operation with the saturated amplifier 15, as shown in FIG. 3, the output of the waveform generating circuit 12 is supplied to the envelope generating circuit 27, and the input signal of the saturated amplifier 15 is A signal corresponding to the envelope is generated, and a DC amplifier 28 is controlled by the envelope signal. A DC input of a terminal 29 is controlled by the DC amplifier 28, and a power supply terminal of the saturation amplifier 15, for example, a drain power supply in FIG. It is supplied to terminal 22. In this way, the drain voltage of the saturation amplifier 15 is controlled by the DC amplifier 28, and the saturation level of the saturation amplifier 15 dynamically follows the input signal envelope, thereby achieving efficient linear operation.
[0005]
A DC-DC converter may be used instead of the DC amplifier 28. As described above, since the drain voltage is conventionally controlled, that is, the voltage on the output side of the amplifier 15 is directly controlled, a large current flows to the DC amplifier (DC-DC converter) 28 and the input signal ( Data), it was necessary to control a large current at a high speed. For this reason, when a DC amplifier is used, the efficiency of the DC amplifier deteriorates, so that the efficiency of the transmission amplifier as a whole deteriorates. In addition, when a DC-DC converter is used, the efficiency is good, but in addition to the drawback that the circuit scale is larger than that of a DC amplifier, when used in a high-speed broadband wireless modulation scheme whose modulation band exceeds megahertz, The follow-up speed of the DC-DC converter was too late to use.
[0006]
From this point, the output of the envelope generation circuit 27 is supplied to the bias generation circuit 31, and the output of the bias generation circuit 31 is output as shown in FIG. The voltage is applied to the terminal 24 to control the gate bias of the FET 19. That is, when the output signal of the amplitude modulation circuit 14 is, for example, as shown in FIG. 5B, an envelope signal of the signal of FIG. 5B is obtained from the envelope generation circuit 27, and the output bias control signal of the bias generation circuit 31 is shown in FIG. As described above, the amplitude corresponds to the upper side of the envelope of the output of the amplitude modulation circuit 14. If the amplitude of the output of the amplitude modulation circuit 14, that is, the amplitude of the input signal of the saturation amplifier 15, is large, the gate bias becomes large. Bias is reduced.
[0007]
That is, in the drain current-drain-source voltage characteristics of the saturated amplifier 15 (FIG. 4A) shown in FIG. 4B, the gate bias becomes large at the point a for the input 33 when the input signal amplitude of the amplifier 15 is large. For the input 34 when the input signal amplitude is small, the gate bias becomes small at point b. That is, in the related art, the drain current Ia corresponding to the gate bias point a flows so as not to saturate with a large amplitude. However, according to the control illustrated in FIG. 5A, at the time of the small amplitude input, the drain current Ia corresponds to Ib corresponding to the bias point b. Power consumption. That is, according to the configuration shown in FIG. 5A, the gate bias is controlled to follow the amplitude of the input signal, that is, a constant back-off value is obtained in accordance with the amplitude value of the modulation signal, and high efficiency is realized. In addition, since the bias is controlled not on the drain side but on the gate side, there is no need for a DC amplifier or a DC-DC converter.
[0008]
[Problems to be solved by the invention]
Although the configuration shown in FIG. 5A is more efficient than that shown in FIG. 3, for example, in the large amplitude state 36 in the signal shown in FIG. 5B, the gate bias is held at Vga as shown in FIG. 5C. The large amplitude state 36 is almost lower than the peak value Pp when viewed instantaneously, and the gate bias value Vga corresponds to the peak value Pp. In this regard, it can be said that there is a portion where the drain current is flown uselessly, that is, there is room for improvement in efficiency.
[0009]
[Means for Solving the Problems]
According to the first aspect of the present invention, a bias control signal that follows the instantaneous amplitude of the input signal of the transmission amplifier is generated by the bias generation circuit, and the bias of the transmission amplifier is synchronized with the transmission signal and the instantaneous amplitude by the bias control signal. Controlled.
According to the second aspect of the present invention, the input signal is supplied to the inverse distortion characteristic amplifier to provide the inverse distortion characteristic, and whether or not the input signal level is equal to or more than a threshold value close to the saturation level of the output-input characteristic of the transmission amplifier It is determined by the switching means that the input signal is supplied to the transmission amplifier as it is when it is determined to be equal to or less than the threshold value, and the inverse distortion characteristic amplifier determined to be equal to or more than the threshold value is supplied to the transmission amplifier.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1A shows an embodiment of the first aspect of the present invention, and portions corresponding to those in FIGS. 3 and 4A are denoted by the same reference numerals. In this embodiment, the output signal of the amplitude modulation circuit 14 is branched and supplied to the bias generation circuit 41. The bias generation circuit 41 generates a bias control signal corresponding to the instantaneous value of the amplitude of the input signal. That is, when the output signal of the amplitude modulation circuit 14 is, for example, as shown in FIG. 1B, the frequency and the bias control signal are the same as shown in FIG. 1C, the phase is the same, and the amplitude is also corresponding. However, the minimum value of the instantaneous value of the bias control signal is substantially the same as the value Qb when the amplitude is small and the value Qa when the amplitude is large. The amplitude value is small when the amplitude of the output signal is small Psb, and is large when the output signal is large Psa. Moreover, the output signal (FIG. 1B) and the bias control signal (FIG. 1C) have the same phase. That is, if the bias generation signal is accompanied by a delay in the bias generation circuit 41, a delay corresponding to the delay is given to the output signal of the amplitude modulation circuit 14 by the delay circuit 42, and the saturation amplifier 15 and the FET 19 in FIG. It is supplied to the gate. The bias control signal is applied to the gate bias terminal 24 of the FET 19 in this example.
[0011]
According to this configuration, the instantaneous level of the input signal and the corresponding gate bias are applied to the saturation amplifier 15 so that an appropriate gate bias is always applied even when viewed instantaneously, as shown in FIG. 5A. More efficient than the ones.
FIG. 2A shows an embodiment of the third aspect of the present invention, in which parts corresponding to those in FIGS. 3, 4A and 5A are denoted by the same reference numerals. In this embodiment, the output of the amplitude modulation circuit 14 is supplied to an inverse distortion characteristic amplifier 51. The output-input characteristics of the inverse distortion characteristic amplifier are as shown in FIG. 2B. That is, the saturation amplifier 15 deviates from linearity and gradually saturates as the input level increases, as shown by the curve 52. Therefore, when the input level Vi1 starts to gradually approach saturation, the characteristic of the inverse distortion amplifier 51 is changed so that the nonlinearity is compensated and a correction characteristic curve 54 that approaches the linearity characteristic curve 53 is given to the input signal. Selected. In other words, the characteristic curve 52 of the amplifier 15 is a reverse distortion characteristic curve 54 that compensates for the occurrence of distortion due to the non-linear portion and prevents the distortion from occurring.
[0012]
The output of the amplitude modulation circuit 14 is branched and supplied to the determination means 56. The determination means 56 uses the input level at which the saturation amplifier 15 starts to be saturated, Vi1 in FIG. 2B as a threshold, compares this with the output signal of the amplitude modulation circuit 14, and determines that this output signal is higher than the threshold Vi1. If it is larger, the output of the inverse distortion characteristic amplifier 51 is selected, and if it is smaller than Vi1, the switching means 57 is controlled based on the determination result of the determination means 56 so that the output signal of the amplitude modulation circuit 14 is selected.
[0013]
The signal selected by the switching means 57 is supplied to the gate of the FET 19 of the saturation amplifier 15 and branched, and is subjected to envelope detection by the envelope detector 58. The detected output is supplied to the bias generation circuit 31, and the bias control signal Is generated, and the gate bias of the FET 19 is controlled by the bias control signal. A bias control signal as shown in FIG. 5C is obtained from the bias generation circuit 31.
[0014]
According to this configuration, if the output signal of the amplitude modulation circuit 14 is equal to or smaller than the threshold value Vi1, the output signal is directly supplied to the saturation amplifier 15 and linearly amplified as shown in FIG. 2B. When the output signal of the amplitude modulation circuit 14 exceeds the threshold value Vi1, the output signal is compensated by the inverse distortion characteristic amplifier 51 as shown by the curve 54 in FIG. 2B. Since the output signal of the inverse distortion characteristic amplifier 51 is supplied to the amplifier 15, the output of the amplifier 15 has a substantially linear characteristic as shown by a broken line 53 in FIG. 2B.
[0015]
Further, in this embodiment, the same gate bias control as that described in FIG. 5 is performed by the envelope detector 58 and the bias generation circuit 31 according to the amplitude of the amplified signal, so that the efficiency is improved.
Further, as shown by the broken line in FIG. 2A, the output of the switching means 57 is branched and input to the linear bias generation circuit 41 (same as that in FIG. 1A), and the gate control of the FET 19 is controlled by the bias control signal. . In this case, since the amplified signal and the bias control signal are synchronized in phase, the delay circuit 59 shown by the broken line ensures that the phase is the same regardless of which signal is selected by the switching means 57, and the bias generation signal is not generated. A delay circuit 42 is inserted between the branch point to the circuit 41 and the gate of the FET 19. In this way, the efficiency can be further increased as described with reference to FIG.
[0016]
Note that even if the bias generation circuit 31 or 41 in FIG. 2A is omitted, the occurrence of distortion can be suppressed by using the inverse distortion characteristic amplifier 51, the determination unit 56, and the switching unit 57, and a decrease in efficiency is avoided. be able to.
[0017]
【The invention's effect】
As described above, according to the first aspect of the present invention, since the bias of the saturation amplifier is controlled at the instantaneous level of the amplified signal and in phase with the instantaneous level of the amplified signal, a higher efficiency than the conventional one can be obtained.
According to the second aspect of the present invention, since the nonlinearity is compensated for the input signal close to the saturation of the amplifier by the inverse distortion amplification, the linear characteristic can be obtained up to a large level, and the distortion is accordingly increased. Less generation and higher efficiency.
[0018]
In any of the first and second aspects of the present invention, since a direct current amplifier or a DC-DC converter that uses a large current is not used, it can be configured in a small size.
According to the third and fourth aspects of the present invention, the efficiency can be made higher than that of the second aspect of the present invention.
[Brief description of the drawings]
FIG. 1A is a diagram showing an embodiment of the first aspect of the present invention, and FIGS. 1B and 1C are waveform diagrams used to explain the operation thereof.
2A is a diagram showing an embodiment of the invention of claim 3, and FIG. 2B is a diagram showing input / output characteristics of a saturation amplifier 15 and a reverse distortion amplifier 51. FIG.
FIG. 3 is a block diagram showing a conventional transmission amplifier.
FIG. 4A is a diagram showing a specific example of a saturation amplifier 15, and FIG. 4B is a diagram showing its operation characteristics.
FIG. 5A is a diagram showing a proposed transmission amplifier, and FIGS. 5B and 5C are waveform diagrams for explaining the operation thereof.

Claims (4)

In a transmission amplifier of a wireless communication device,
A saturable amplifier for amplifying the signal to be transmitted;
Generating a bias control signal having a phase amplitude and the signal to be transmitted the corresponding to instantaneous amplitude of the signal to be transmitted above, braking Gosuru bias generating the bias of the saturation type amplifier by the bias control signal A transmission amplifier comprising a circuit. Levels above SL signals to be transmitted, the output of the saturation type amplifier - determination means whether or above the threshold close to the saturation level of the input characteristics,
An inverse distortion characteristic amplifier having a characteristic of compensating for a nonlinear characteristic in a nonlinear portion of an input / output characteristic curve of the saturated amplifier, and receiving the signal to be transmitted ;
When the determination means determines that less than a threshold value, a signal to be the transmitted sheet subjected to the saturated type amplifier without passing through the reverse distortion characteristic amplifier, when said determination means determines that more than the threshold value, the 2. The transmission amplifier according to claim 1 , further comprising switching means for supplying an output of the inverse distortion characteristic amplifier to the saturation amplifier. Transmission amplifier according to claim 2, further comprising a hand stage for amplitude and phase synchronizing signal and the bias control signal to be transmitted above. 3. The transmission amplifier according to claim 2 , wherein the amplification element included in the saturable amplifier is an FET, and the bias control signal of the bias generation circuit bias-controls the gate of the FET .

Images