JP4693326B2 - 組込み型プロセッサにおいてゼロタイムコンテクストスイッチを用いて命令レベルをマルチスレッド化するシステムおよび方法 - Google Patents

組込み型プロセッサにおいてゼロタイムコンテクストスイッチを用いて命令レベルをマルチスレッド化するシステムおよび方法 Download PDF

Info

Publication number
JP4693326B2
JP4693326B2 JP2001547274A JP2001547274A JP4693326B2 JP 4693326 B2 JP4693326 B2 JP 4693326B2 JP 2001547274 A JP2001547274 A JP 2001547274A JP 2001547274 A JP2001547274 A JP 2001547274A JP 4693326 B2 JP4693326 B2 JP 4693326B2
Authority
JP
Japan
Prior art keywords
thread
time
computer
program
hrt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2001547274A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003523561A (ja
Inventor
ケルセイ,ニコラス,ジェイ
ウォーターズ,クリストファー,ジェイ,エフ
ミマログル,チベット
フォトランド,デイビッド,アラン
Original Assignee
ウビコム インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ウビコム インコーポレイテッド filed Critical ウビコム インコーポレイテッド
Publication of JP2003523561A publication Critical patent/JP2003523561A/ja
Application granted granted Critical
Publication of JP4693326B2 publication Critical patent/JP4693326B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/324Power saving characterised by the action undertaken by lowering clock frequency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/461Saving or restoring of program or task context
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
JP2001547274A 1999-12-22 2000-12-21 組込み型プロセッサにおいてゼロタイムコンテクストスイッチを用いて命令レベルをマルチスレッド化するシステムおよび方法 Expired - Lifetime JP4693326B2 (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US17173199P 1999-12-22 1999-12-22
US60/171,731 1999-12-22
US21374500P 2000-06-22 2000-06-22
US60/213,745 2000-06-22
US25078100P 2000-12-01 2000-12-01
US60/250,781 2000-12-01
PCT/US2000/035242 WO2001046827A1 (fr) 1999-12-22 2000-12-21 Systeme et procede de traitement multifiliere au niveau des instructions dans un processeur integre au moyen d'une commutation d'environnement de temps zero

Publications (2)

Publication Number Publication Date
JP2003523561A JP2003523561A (ja) 2003-08-05
JP4693326B2 true JP4693326B2 (ja) 2011-06-01

Family

ID=27390013

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001547274A Expired - Lifetime JP4693326B2 (ja) 1999-12-22 2000-12-21 組込み型プロセッサにおいてゼロタイムコンテクストスイッチを用いて命令レベルをマルチスレッド化するシステムおよび方法

Country Status (5)

Country Link
US (2) US7925869B2 (fr)
EP (1) EP1247195A4 (fr)
JP (1) JP4693326B2 (fr)
AU (1) AU2597401A (fr)
WO (1) WO2001046827A1 (fr)

Families Citing this family (139)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1247195A4 (fr) * 1999-12-22 2005-01-05 Ubicom Inc Systeme et procede de traitement multifiliere au niveau des instructions dans un processeur integre au moyen d'une commutation d'environnement de temps zero
US7120783B2 (en) * 1999-12-22 2006-10-10 Ubicom, Inc. System and method for reading and writing a thread state in a multithreaded central processing unit
US7308686B1 (en) 1999-12-22 2007-12-11 Ubicom Inc. Software input/output using hard real time threads
US6845419B1 (en) * 2000-01-24 2005-01-18 Freescale Semiconductor, Inc. Flexible interrupt controller that includes an interrupt force register
US7162615B1 (en) 2000-06-12 2007-01-09 Mips Technologies, Inc. Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch
US7047396B1 (en) 2000-06-22 2006-05-16 Ubicom, Inc. Fixed length memory to memory arithmetic and architecture for a communications embedded processor system
US7010612B1 (en) 2000-06-22 2006-03-07 Ubicom, Inc. Universal serializer/deserializer
US8762581B2 (en) * 2000-12-22 2014-06-24 Avaya Inc. Multi-thread packet processor
GB2372847B (en) * 2001-02-19 2004-12-29 Imagination Tech Ltd Control of priority and instruction rates on a multithreaded processor
US20030120896A1 (en) * 2001-06-29 2003-06-26 Jason Gosior System on chip architecture
GB2379299B (en) * 2001-09-04 2006-02-08 Imagination Tech Ltd A texturing system
US20030142818A1 (en) * 2001-09-28 2003-07-31 Nec Usa, Inc. Techniques for efficient security processing
JP3813930B2 (ja) 2002-01-09 2006-08-23 松下電器産業株式会社 プロセッサ及びプログラム実行方法
US7117346B2 (en) 2002-05-31 2006-10-03 Freescale Semiconductor, Inc. Data processing system having multiple register contexts and method therefor
US20030225817A1 (en) * 2002-06-04 2003-12-04 Prashanth Ishwar Concurrent execution of kernel work and non-kernel work in operating systems with single-threaded kernel
US20050033889A1 (en) * 2002-10-08 2005-02-10 Hass David T. Advanced processor with interrupt delivery mechanism for multi-threaded multi-CPU system on a chip
US7334086B2 (en) * 2002-10-08 2008-02-19 Rmi Corporation Advanced processor with system on a chip interconnect technology
US9088474B2 (en) 2002-10-08 2015-07-21 Broadcom Corporation Advanced processor with interfacing messaging network to a CPU
US8478811B2 (en) 2002-10-08 2013-07-02 Netlogic Microsystems, Inc. Advanced processor with credit based scheme for optimal packet flow in a multi-processor system on a chip
US8037224B2 (en) 2002-10-08 2011-10-11 Netlogic Microsystems, Inc. Delegating network processor operations to star topology serial bus interfaces
US7627721B2 (en) 2002-10-08 2009-12-01 Rmi Corporation Advanced processor with cache coherency
US8015567B2 (en) 2002-10-08 2011-09-06 Netlogic Microsystems, Inc. Advanced processor with mechanism for packet distribution at high line rate
US7461213B2 (en) 2002-10-08 2008-12-02 Rmi Corporation Advanced processor system using request, data, snoop, and response rings
US7961723B2 (en) 2002-10-08 2011-06-14 Netlogic Microsystems, Inc. Advanced processor with mechanism for enforcing ordering between information sent on two independent networks
US8176298B2 (en) 2002-10-08 2012-05-08 Netlogic Microsystems, Inc. Multi-core multi-threaded processing systems with instruction reordering in an in-order pipeline
US7984268B2 (en) * 2002-10-08 2011-07-19 Netlogic Microsystems, Inc. Advanced processor scheduling in a multithreaded system
US20050044324A1 (en) * 2002-10-08 2005-02-24 Abbas Rashid Advanced processor with mechanism for maximizing resource usage in an in-order pipeline with multiple threads
US7346757B2 (en) 2002-10-08 2008-03-18 Rmi Corporation Advanced processor translation lookaside buffer management in a multithreaded system
US7924828B2 (en) 2002-10-08 2011-04-12 Netlogic Microsystems, Inc. Advanced processor with mechanism for fast packet queuing operations
US6842848B2 (en) * 2002-10-11 2005-01-11 Sandbridge Technologies, Inc. Method and apparatus for token triggered multithreading
US7822950B1 (en) * 2003-01-22 2010-10-26 Ubicom, Inc. Thread cancellation and recirculation in a computer processor for avoiding pipeline stalls
JP4750350B2 (ja) 2003-03-13 2011-08-17 パナソニック株式会社 タスク切換装置、方法及びプログラム
US7401208B2 (en) * 2003-04-25 2008-07-15 International Business Machines Corporation Method and apparatus for randomizing instruction thread interleaving in a multi-thread processor
US7360062B2 (en) * 2003-04-25 2008-04-15 International Business Machines Corporation Method and apparatus for selecting an instruction thread for processing in a multi-thread processor
US7401207B2 (en) * 2003-04-25 2008-07-15 International Business Machines Corporation Apparatus and method for adjusting instruction thread priority in a multi-thread processor
US7653912B2 (en) * 2003-05-30 2010-01-26 Steven Frank Virtual processor methods and apparatus with unified event notification and consumer-producer memory operations
US20070038971A1 (en) * 2003-09-30 2007-02-15 Tatsuo Hiramatsu Processing device with reconfigurable circuit, integrated circuit device and processing method using these devices
US7360064B1 (en) 2003-12-10 2008-04-15 Cisco Technology, Inc. Thread interleaving in a multithreaded embedded processor
US7441101B1 (en) * 2003-12-10 2008-10-21 Cisco Technology, Inc. Thread-aware instruction fetching in a multithreaded embedded processor
US7359902B2 (en) 2004-04-30 2008-04-15 Microsoft Corporation Method and apparatus for maintaining relationships between parts in a package
US7383500B2 (en) 2004-04-30 2008-06-03 Microsoft Corporation Methods and systems for building packages that contain pre-paginated documents
US8661332B2 (en) * 2004-04-30 2014-02-25 Microsoft Corporation Method and apparatus for document processing
US20050246384A1 (en) * 2004-05-03 2005-11-03 Microsoft Corporation Systems and methods for passing data between filters
US8243317B2 (en) * 2004-05-03 2012-08-14 Microsoft Corporation Hierarchical arrangement for spooling job data
US8363232B2 (en) 2004-05-03 2013-01-29 Microsoft Corporation Strategies for simultaneous peripheral operations on-line using hierarchically structured job information
US7634775B2 (en) * 2004-05-03 2009-12-15 Microsoft Corporation Sharing of downloaded resources
US7755786B2 (en) 2004-05-03 2010-07-13 Microsoft Corporation Systems and methods for support of various processing capabilities
US7519899B2 (en) * 2004-05-03 2009-04-14 Microsoft Corporation Planar mapping of graphical elements
US7580948B2 (en) * 2004-05-03 2009-08-25 Microsoft Corporation Spooling strategies using structured job information
US7607141B2 (en) * 2004-05-03 2009-10-20 Microsoft Corporation Systems and methods for support of various processing capabilities
US7457484B2 (en) * 2004-06-23 2008-11-25 Creative Technology Ltd Method and device to process digital media streams
US7565659B2 (en) * 2004-07-15 2009-07-21 International Business Machines Corporation Light weight context switching
US7890735B2 (en) 2004-08-30 2011-02-15 Texas Instruments Incorporated Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture
US20060069848A1 (en) * 2004-09-30 2006-03-30 Nalawadi Rajeev K Flash emulation using hard disk
US7460476B1 (en) * 2004-10-18 2008-12-02 Ubicom, Inc. Automatic adaptive network traffic prioritization and shaping
US7584111B2 (en) * 2004-11-19 2009-09-01 Microsoft Corporation Time polynomial Arrow-Debreu market equilibrium
US8756605B2 (en) * 2004-12-17 2014-06-17 Oracle America, Inc. Method and apparatus for scheduling multiple threads for execution in a shared microprocessor pipeline
US7631130B2 (en) * 2005-02-04 2009-12-08 Mips Technologies, Inc Barrel-incrementer-based round-robin apparatus and instruction dispatch scheduler employing same for use in multithreading microprocessor
DE102005011124B4 (de) * 2005-03-10 2006-12-28 Siemens Ag Verfahren und Vorrichtung zur Übertragung von Bilddaten
US7950012B2 (en) * 2005-03-16 2011-05-24 Oracle America, Inc. Facilitating communication and synchronization between main and scout threads
US20060212853A1 (en) * 2005-03-18 2006-09-21 Marvell World Trade Ltd. Real-time control apparatus having a multi-thread processor
US8195922B2 (en) * 2005-03-18 2012-06-05 Marvell World Trade, Ltd. System for dynamically allocating processing time to multiple threads
JP4580845B2 (ja) * 2005-08-24 2010-11-17 パナソニック株式会社 タスク実行装置
JP2007109057A (ja) * 2005-10-14 2007-04-26 Hitachi Ltd プロセッサ
US7913255B2 (en) * 2005-10-20 2011-03-22 Qualcomm Incorporated Background thread processing in a multithread digital signal processor
US20090313455A1 (en) * 2005-12-15 2009-12-17 David Hennah Mansell Instruction issue control wtihin a multithreaded processor
WO2007143278A2 (fr) 2006-04-12 2007-12-13 Soft Machines, Inc. Appareil et procédé de traitement d'une matrice d'instruction spécifiant des opérations parallèles et dépendantes
US7369450B2 (en) * 2006-05-26 2008-05-06 Freescale Semiconductor, Inc. Nonvolatile memory having latching sense amplifier and method of operation
US20080126754A1 (en) * 2006-07-28 2008-05-29 Padauk Technologies Corporation, R.O.C. Multiple-microcontroller pipeline instruction execution method
WO2008031054A2 (fr) 2006-09-07 2008-03-13 Black Lab Security Systems, Inc. Procédé de sécurisation de procédures de connexion d'un utilisateur de réseau, comprenant la création et l'utilisation d'une id d'utilisateur unique et spécifique pour l'authentification de connexions sécurisées, sur des ordinateurs microsoft 32/64 bit
US20100211955A1 (en) * 2006-09-07 2010-08-19 Cwi Controlling 32/64-bit parallel thread execution within a microsoft operating system utility program
US8537167B1 (en) * 2006-10-17 2013-09-17 Nvidia Corporation Method and system for using bundle decoders in a processing pipeline
US9124767B2 (en) * 2006-10-25 2015-09-01 Microsoft Technology Licensing, Llc Multi-DVR media content arbitration
US7493436B2 (en) * 2006-10-26 2009-02-17 International Business Machines Corporation Interrupt handling using simultaneous multi-threading
JP2008123045A (ja) * 2006-11-08 2008-05-29 Matsushita Electric Ind Co Ltd プロセッサ
EP2122461A4 (fr) 2006-11-14 2010-03-24 Soft Machines Inc Appareil et procédé de traitement de formats d'instructions complexes dans une architecture multifil supportant divers modes de commutation de contexte et schémas de virtualisation
US8285958B1 (en) * 2007-08-10 2012-10-09 Mcafee, Inc. System, method, and computer program product for copying a modified page table entry to a translation look aside buffer
JP2009059310A (ja) * 2007-09-03 2009-03-19 Panasonic Corp プログラム制御装置
DE102007051803A1 (de) * 2007-10-30 2009-05-07 Infineon Technologies Ag Verfahren und Vorrichtung zur Datenverarbeitung
US7941646B2 (en) * 2007-12-31 2011-05-10 Freescale Semicondoctor, Inc. Completion continue on thread switch based on instruction progress metric mechanism for a microprocessor
US9063778B2 (en) * 2008-01-09 2015-06-23 Microsoft Technology Licensing, Llc Fair stateless model checking
US9596324B2 (en) 2008-02-08 2017-03-14 Broadcom Corporation System and method for parsing and allocating a plurality of packets to processor core threads
DE102008010943A1 (de) * 2008-02-25 2009-09-03 Fujitsu Siemens Computers Gmbh Verfahren zur Behandlung von Unterbrechungsaufforderungen bei einem Prozessor
US7559061B1 (en) 2008-03-16 2009-07-07 International Business Machines Corporation Simultaneous multi-threading control monitor
US8102552B2 (en) * 2008-04-03 2012-01-24 Sharp Laboratories Of America, Inc. Performance monitoring and control of a multifunction printer
US8392924B2 (en) * 2008-04-03 2013-03-05 Sharp Laboratories Of America, Inc. Custom scheduling and control of a multifunction printer
US8392932B2 (en) * 2008-06-25 2013-03-05 Panasonic Corporation Information processing device for causing a processor to context switch between threads including storing contexts based on next thread start position
US20120297395A1 (en) * 2008-08-18 2012-11-22 Exludus Inc. Scalable work load management on multi-core computer systems
JP5173714B2 (ja) * 2008-09-30 2013-04-03 ルネサスエレクトロニクス株式会社 マルチスレッドプロセッサ及びその割り込み処理方法
JP5173711B2 (ja) * 2008-09-30 2013-04-03 ルネサスエレクトロニクス株式会社 マルチスレッドプロセッサ及びそのハードウェアスレッドのスケジュール方法
JP5173712B2 (ja) * 2008-09-30 2013-04-03 ルネサスエレクトロニクス株式会社 マルチスレッドプロセッサ
DE102009055752A1 (de) * 2009-11-25 2011-05-26 Robert Bosch Gmbh Verfahren zum Ermöglichen einer sequentiellen, nicht blockierenden Abarbeitung von Anweisungen in nebenläufigen Tasks in einer Steuereinrichtung
US8560814B2 (en) * 2010-05-04 2013-10-15 Oracle International Corporation Thread fairness on a multi-threaded processor with multi-cycle cryptographic operations
US8589942B2 (en) 2010-05-07 2013-11-19 Qualcomm Incorporated Non-real time thread scheduling
US8873637B2 (en) 2010-05-14 2014-10-28 Qualcomm Incorporated Hardware pixel processing pipeline and video processing instructions
EP2616928B1 (fr) 2010-09-17 2016-11-02 Soft Machines, Inc. Prédiction de branchement multiple à cycle unique incluant une mémoire cache miroir pour une prédiction précoce de branchement éloigné
WO2012135041A2 (fr) 2011-03-25 2012-10-04 Soft Machines, Inc. Segments de fichiers de registre pour prise en charge de l'exécution de blocs de code à l'aide de coeurs virtuels instanciés par des machines partitionnables
US9274793B2 (en) 2011-03-25 2016-03-01 Soft Machines, Inc. Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines
EP2689327B1 (fr) 2011-03-25 2021-07-28 Intel Corporation Exécution de blocs de code de séquences d'instruction par l'utilisation de coeurs virtuels instanciés par des machines partitionnables
US8589934B2 (en) * 2011-04-01 2013-11-19 Arm Limited Controlling priority levels of pending threads awaiting processing
KR101639853B1 (ko) 2011-05-20 2016-07-14 소프트 머신즈, 인크. 복수의 엔진에 의해 명령어 시퀀스들의 실행을 지원하기 위한 자원들 및 상호접속 구조들의 비집중 할당
TWI548994B (zh) * 2011-05-20 2016-09-11 軟體機器公司 以複數個引擎支援指令序列的執行之互連結構
CN102495726B (zh) 2011-11-15 2015-05-20 无锡德思普科技有限公司 机会多线程方法及处理器
KR101842550B1 (ko) 2011-11-22 2018-03-28 소프트 머신즈, 인크. 다중 엔진 마이크로프로세서용 가속 코드 최적화기
EP2783281B1 (fr) 2011-11-22 2020-05-13 Intel Corporation Dispositif d'optimisation accélérée de codes pour un microprocesseur
KR101901587B1 (ko) 2011-12-13 2018-10-01 삼성전자주식회사 연성 실시간 운영체제의 실시간성을 확보하는 방법 및 장치
US10140138B2 (en) 2013-03-15 2018-11-27 Intel Corporation Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation
US9471318B2 (en) 2013-03-15 2016-10-18 International Business Machines Corporation System management and instruction counting
WO2014150971A1 (fr) 2013-03-15 2014-09-25 Soft Machines, Inc. Procédé de diffusion de dépendances via une structure de données de vue de sources organisée par blocs
US9569216B2 (en) 2013-03-15 2017-02-14 Soft Machines, Inc. Method for populating a source view data structure by using register template snapshots
US9891924B2 (en) 2013-03-15 2018-02-13 Intel Corporation Method for implementing a reduced size register view data structure in a microprocessor
EP2972845B1 (fr) 2013-03-15 2021-07-07 Intel Corporation Procédé pour exécuter des instructions multi-fils groupées en blocs
WO2014150806A1 (fr) 2013-03-15 2014-09-25 Soft Machines, Inc. Procédé d'alimentation de structure de donnees de vues de registre au moyen d'instantanés de modèle de registre
CN105247484B (zh) 2013-03-15 2021-02-23 英特尔公司 利用本地分布式标志体系架构来仿真访客集中式标志体系架构的方法
US9811342B2 (en) 2013-03-15 2017-11-07 Intel Corporation Method for performing dual dispatch of blocks and half blocks
US9886279B2 (en) 2013-03-15 2018-02-06 Intel Corporation Method for populating and instruction view data structure by using register template snapshots
US9904625B2 (en) 2013-03-15 2018-02-27 Intel Corporation Methods, systems and apparatus for predicting the way of a set associative cache
WO2014150991A1 (fr) 2013-03-15 2014-09-25 Soft Machines, Inc. Procédé de mise en œuvre de structure de données de vue de registre à taille réduite dans un microprocesseur
US10275255B2 (en) 2013-03-15 2019-04-30 Intel Corporation Method for dependency broadcasting through a source organized source view data structure
US9766894B2 (en) 2014-02-06 2017-09-19 Optimum Semiconductor Technologies, Inc. Method and apparatus for enabling a processor to generate pipeline control signals
US9558000B2 (en) 2014-02-06 2017-01-31 Optimum Semiconductor Technologies, Inc. Multithreading using an ordered list of hardware contexts
US9417876B2 (en) 2014-03-27 2016-08-16 International Business Machines Corporation Thread context restoration in a multithreading computer system
US10102004B2 (en) 2014-03-27 2018-10-16 International Business Machines Corporation Hardware counters to track utilization in a multithreading computer system
US9594660B2 (en) 2014-03-27 2017-03-14 International Business Machines Corporation Multithreading computer system and program product for executing a query instruction for idle time accumulation among cores
US9804846B2 (en) 2014-03-27 2017-10-31 International Business Machines Corporation Thread context preservation in a multithreading computer system
US9354883B2 (en) * 2014-03-27 2016-05-31 International Business Machines Corporation Dynamic enablement of multithreading
US9921848B2 (en) 2014-03-27 2018-03-20 International Business Machines Corporation Address expansion and contraction in a multithreading computer system
US20170132003A1 (en) * 2015-11-10 2017-05-11 Futurewei Technologies, Inc. System and Method for Hardware Multithreading to Improve VLIW DSP Performance and Efficiency
US10499066B2 (en) * 2017-04-14 2019-12-03 Nokia Technologies Oy Method and apparatus for improving efficiency of content delivery based on consumption data relative to spatial data
JP6874706B2 (ja) * 2018-02-07 2021-05-19 オムロン株式会社 アプリケーションプログラムを生成する方法、装置、プログラム
US11119782B2 (en) * 2018-05-07 2021-09-14 Micron Technology, Inc. Thread commencement using a work descriptor packet in a self-scheduling processor
US11126587B2 (en) * 2018-05-07 2021-09-21 Micron Technology, Inc. Event messaging in a system having a self-scheduling processor and a hybrid threading fabric
US11119972B2 (en) * 2018-05-07 2021-09-14 Micron Technology, Inc. Multi-threaded, self-scheduling processor
US10866834B2 (en) * 2019-03-29 2020-12-15 Intel Corporation Apparatus, method, and system for ensuring quality of service for multi-threading processor cores
US11687364B2 (en) 2019-07-30 2023-06-27 Samsung Electronics Co., Ltd. Methods and apparatus for cache-aware task scheduling in a symmetric multi-processing (SMP) environment
US11288072B2 (en) * 2019-09-11 2022-03-29 Ceremorphic, Inc. Multi-threaded processor with thread granularity
US20210076248A1 (en) * 2019-09-11 2021-03-11 Silicon Laboratories Inc. Communication Processor Handling Communications Protocols on Separate Threads
DE102020123498A1 (de) * 2019-09-11 2021-03-11 Silicon Laboratories Inc. Drahtloser Multi-Thread-Kommunikations-Prozessor mit granularen Thread-Prozessen
US11983537B1 (en) * 2022-12-21 2024-05-14 Ceremorphic, Inc. Multi-threaded processor with power granularity and thread granularity

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999021081A1 (fr) * 1997-10-23 1999-04-29 International Business Machines Corporation Procede et appareil de selection d'evenements de commutation d'unites d'execution dans un processeur a unites d'execution multiples

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4110831A (en) * 1977-06-29 1978-08-29 International Business Machines Corporation Method and means for tracking digit significance in arithmetic operations executed on decimal computers
JPS61110256A (ja) 1984-11-02 1986-05-28 Hitachi Ltd 複数の演算部を有するプロセツサ
US4777587A (en) * 1985-08-30 1988-10-11 Advanced Micro Devices, Inc. System for processing single-cycle branch instruction in a pipeline having relative, absolute, indirect and trap addresses
JPH0827716B2 (ja) * 1985-10-25 1996-03-21 株式会社日立製作所 データ処理装置及びデータ処理方法
US4939735A (en) * 1988-07-21 1990-07-03 International Business Machines Corporation Information handling system having serial channel to control unit link
US5163146A (en) 1988-10-14 1992-11-10 International Business Machines Corporation System responsive to interrupt levels for changing and restoring clock speed by changing and restoring a register value
GB2234613B (en) * 1989-08-03 1993-07-07 Sun Microsystems Inc Method and apparatus for switching context of state elements in a microprocessor
US5197130A (en) 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
EP0436341B1 (fr) * 1990-01-02 1997-05-07 Motorola, Inc. Méthode de préextraction séquentielle pour instructions à un, deux ou trois mots
US5247636A (en) 1990-05-31 1993-09-21 International Business Machines Corporation Digital processor clock circuit
US5179672A (en) * 1990-06-19 1993-01-12 International Business Machines Corporation Apparatus and method for modeling parallel processing of instructions using sequential execution hardware
JP2507833B2 (ja) 1990-12-25 1996-06-19 三菱電機株式会社 マイクロコンピュ−タ
US5524250A (en) * 1991-08-23 1996-06-04 Silicon Graphics, Inc. Central processing unit for processing a plurality of threads using dedicated general purpose registers and masque register for providing access to the registers
JPH05108341A (ja) 1991-10-16 1993-04-30 Hitachi Ltd マイクロプロセツサ
US5404469A (en) * 1992-02-25 1995-04-04 Industrial Technology Research Institute Multi-threaded microprocessor architecture utilizing static interleaving
US5553305A (en) * 1992-04-14 1996-09-03 International Business Machines Corporation System for synchronizing execution by a processing element of threads within a process using a state indicator
US5515538A (en) * 1992-05-29 1996-05-07 Sun Microsystems, Inc. Apparatus and method for interrupt handling in a multi-threaded operating system kernel
US5260703A (en) * 1992-08-27 1993-11-09 Quantum Corporation Data encoding and decoding within PRML class IV sampling data detection channel of disk drive
DE69429204T2 (de) * 1993-03-26 2002-07-25 Cabletron Systems Inc Ablaufssteuerungsverfahren und -gerät für ein Kommunikationsnetzwerk
EP0739517B1 (fr) * 1994-01-10 2000-08-16 The Dow Chemical Company Ordinateur superscalaire a architecture harvard massivement multiplexee
US5778882A (en) * 1995-02-24 1998-07-14 Brigham And Women's Hospital Health monitoring system
JP2931890B2 (ja) 1995-07-12 1999-08-09 三菱電機株式会社 データ処理装置
US5727211A (en) * 1995-11-09 1998-03-10 Chromatic Research, Inc. System and method for fast context switching between tasks
US5865624A (en) * 1995-11-09 1999-02-02 Hayashigawa; Larry Reactive ride simulator apparatus and method
US5867725A (en) 1996-03-21 1999-02-02 International Business Machines Corporation Concurrent multitasking in a uniprocessor
JP3546980B2 (ja) * 1996-03-29 2004-07-28 松下電器産業株式会社 データ処理装置
US5944816A (en) 1996-05-17 1999-08-31 Advanced Micro Devices, Inc. Microprocessor configured to execute multiple threads including interrupt service routines
US5933627A (en) * 1996-07-01 1999-08-03 Sun Microsystems Thread switch on blocked load or store using instruction thread field
US20030110344A1 (en) * 1996-09-18 2003-06-12 Andre Szczepanek Communications systems, apparatus and methods
US5996066A (en) 1996-10-10 1999-11-30 Sun Microsystems, Inc. Partitioned multiply and add/subtract instruction for CPU with integrated graphics functions
US6009505A (en) 1996-12-02 1999-12-28 Compaq Computer Corp. System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot
US6317774B1 (en) * 1997-01-09 2001-11-13 Microsoft Corporation Providing predictable scheduling of programs using a repeating precomputed schedule
US6766515B1 (en) * 1997-02-18 2004-07-20 Silicon Graphics, Inc. Distributed scheduling of parallel jobs with no kernel-to-kernel communication
US6314511B2 (en) * 1997-04-03 2001-11-06 University Of Washington Mechanism for freeing registers on processors that perform dynamic out-of-order execution of instructions using renaming registers
JPH1165840A (ja) * 1997-08-11 1999-03-09 Sony Corp 演算処理装置およびその方法
US6026503A (en) * 1997-08-12 2000-02-15 Telrad Communication And Electronic Industries Ltd. Device and method for debugging systems controlled by microprocessors
US5933650A (en) 1997-10-09 1999-08-03 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
US6378018B1 (en) 1997-10-10 2002-04-23 Intel Corporation Memory device and system including a low power interface
US6567839B1 (en) * 1997-10-23 2003-05-20 International Business Machines Corporation Thread switch control in a multithreaded processor system
US6076157A (en) * 1997-10-23 2000-06-13 International Business Machines Corporation Method and apparatus to force a thread switch in a multithreaded processor
US6061710A (en) * 1997-10-29 2000-05-09 International Business Machines Corporation Multithreaded processor incorporating a thread latch register for interrupt service new pending threads
US6016542A (en) * 1997-12-31 2000-01-18 Intel Corporation Detecting long latency pipeline stalls for thread switching
US6374286B1 (en) * 1998-04-06 2002-04-16 Rockwell Collins, Inc. Real time processor capable of concurrently running multiple independent JAVA machines
US6134653A (en) 1998-04-22 2000-10-17 Transwitch Corp. RISC processor architecture with high performance context switching in which one context can be loaded by a co-processor while another context is being accessed by an arithmetic logic unit
US6460116B1 (en) * 1998-09-21 2002-10-01 Advanced Micro Devices, Inc. Using separate caches for variable and generated fixed-length instructions
US6163839A (en) * 1998-09-30 2000-12-19 Intel Corporation Non-stalling circular counterflow pipeline processor with reorder buffer
US6366998B1 (en) 1998-10-14 2002-04-02 Conexant Systems, Inc. Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model
US6421701B1 (en) * 1999-01-29 2002-07-16 International Business Machines Corporation Method and system for replication support in a remote method invocation system
US6542991B1 (en) * 1999-05-11 2003-04-01 Sun Microsystems, Inc. Multiple-thread processor with single-thread interface shared among threads
US6493741B1 (en) * 1999-10-01 2002-12-10 Compaq Information Technologies Group, L.P. Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit
EP1247195A4 (fr) * 1999-12-22 2005-01-05 Ubicom Inc Systeme et procede de traitement multifiliere au niveau des instructions dans un processeur integre au moyen d'une commutation d'environnement de temps zero
US6694425B1 (en) * 2000-05-04 2004-02-17 International Business Machines Corporation Selective flush of shared and other pipeline stages in a multithread processor
US6728722B1 (en) * 2000-08-28 2004-04-27 Sun Microsystems, Inc. General data structure for describing logical data spaces

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999021081A1 (fr) * 1997-10-23 1999-04-29 International Business Machines Corporation Procede et appareil de selection d'evenements de commutation d'unites d'execution dans un processeur a unites d'execution multiples

Also Published As

Publication number Publication date
US7082519B2 (en) 2006-07-25
US7925869B2 (en) 2011-04-12
AU2597401A (en) 2001-07-03
EP1247195A4 (fr) 2005-01-05
EP1247195A1 (fr) 2002-10-09
US20020002667A1 (en) 2002-01-03
US20030037228A1 (en) 2003-02-20
WO2001046827A1 (fr) 2001-06-28
JP2003523561A (ja) 2003-08-05

Similar Documents

Publication Publication Date Title
JP4693326B2 (ja) 組込み型プロセッサにおいてゼロタイムコンテクストスイッチを用いて命令レベルをマルチスレッド化するシステムおよび方法
US7120783B2 (en) System and method for reading and writing a thread state in a multithreaded central processing unit
US9779042B2 (en) Resource management in a multicore architecture
EP1131739B1 (fr) Traitement par lots de signaux de job dans un systeme de multitraitement
KR101258502B1 (ko) 멀티코어 아키텍처 내의 리소스 관리
EP1660993B1 (fr) Mecanisme integre destine a suspendre et a liberer des unites d'execution informatiques dans un processeur
US7627770B2 (en) Apparatus and method for automatic low power mode invocation in a multi-threaded processor
US20040172631A1 (en) Concurrent-multitasking processor
JPWO2008023426A1 (ja) タスク処理装置
US8595747B2 (en) Efficient task scheduling by assigning fixed registers to scheduler
WO2008023427A1 (fr) Dispositif de traitement de tâche
CN109426562B (zh) 优先级加权轮转调度器
WO2004061663A2 (fr) Systeme et procede pour realiser un ordonnancement de taches assiste par materiel
WO2002046887A2 (fr) Processeur a fonctionnement multitache
WO1999046679A1 (fr) Appareil, procede, et article manufacture utilises dans un systeme a base de priorite fonctionnant en temps reel

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071121

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071121

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100720

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20101020

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20101027

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110120

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20110215

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110222

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140304

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4693326

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term