JP4675730B2 - Film pattern forming substrate, film pattern forming substrate, thin film transistor forming substrate, liquid crystal display element and manufacturing method thereof - Google Patents

Description

  The present invention relates to a film pattern forming substrate having a bank as a partition member used when a film pattern is formed on a substrate using a liquid coating apparatus such as an ink jet method, a film pattern forming substrate, a thin film transistor forming substrate, and a liquid crystal The present invention relates to a display element and a manufacturing method thereof.

  As a technology that can greatly simplify the conventional film pattern formation process using vapor deposition, photolithography, and etching, and that can form different thin films on the same substrate, a technology that forms a film pattern using inkjet technology is proposed. Has been.

  The conventional processes that do not use an ink jet are a thin film forming process (evaporation, coating), a photolithography process (resist coating, exposure, development), an etching process (Dry or Wet), and a resist stripping process (stripping, cleaning). Each processing content is in parentheses.

  On the other hand, the steps of the conventional example using an inkjet are a bank formation process (application), a photolithography process (resist application, exposure, development), an ink application process (inkjet), an ink drying process (oven), a bank removal process (peeling, Cleaning). Each processing content is in parentheses.

  As a film pattern forming method using an ink jet technique, a bank (convex portion) is formed on a substrate in advance in order to control a discharged droplet to a desired position, and the droplet is applied to a region partitioned by the bank. A method for filling and controlling the droplet position is known (Japanese Patent Laid-Open No. 59-75205).

  A case where the method is applied to a process for forming an etch stop type thin film transistor (hereinafter referred to as TFT) in which a back channel portion is protected by an etch stopper using a conventional method will be described. Here, a case where the bank is formed using a resist will be described.

  The gate wiring 11 is formed and patterned, and then the gate insulating film 12, the a-Si film 13, and the etch stopper film 14 are laminated in this order, and only the etch stopper film 14 is formed in a desired pattern as shown in FIG. . Then, as shown in FIG. 24, a laminated film (n + type a-Si film / a) of an a-Si film (amorphous Si film) 13 and an n + type a-Si film (n + type amorphous Si film) 15 as a semiconductor film. -Si film) is patterned. As shown in FIG. 25, a bank is formed on this substrate with a resist film 17 having a thickness of 2 μm using a photolithography process.

  Subsequently, as shown in FIG. 26, a liquid conductive ink 21 in which Ag fine particles are dispersed in an organic solvent is dropped into the bank using an inkjet method. Thereafter, the conductive ink flows along the bank shape to form a desired pattern, and then the organic components in the conductive ink are evaporated in a baking process to form a wiring film, that is, a source wiring 23 and a drain wiring 24 ( FIG. 27). Thereafter, in a peeling step, the bank formed of the resist is removed to form a source / drain wiring pattern (FIG. 28).

  This method requires a series of photolithography steps such as resist coating, exposure, and development to form a bank, and a resist removal step with a stripping solution to remove the bank. Compared to the method of forming the material by vapor deposition such as sputtering, the effect of reducing the manufacturing cost of the TFT is small. Therefore, a process capable of further reducing manufacturing costs has been demanded.

Another possible method is to form a bank using a photosensitive organic insulating film (photosensitive SOG (Spin-On-Glass), etc.) instead of a resist bank, and then leave the bank without removing the bank. However, the photolithography process, which accounts for a large part of the capital investment cost, cannot be reduced, and a process capable of drastically reducing the manufacturing cost has been demanded.
JP 59-75205 A (published on April 27, 1984)

  As described above, the conventional method requires a series of photolithography processes such as resist coating, exposure, and development to form a bank, and a resist removal process using a stripping solution to remove the bank. Compared to conventional methods that do not, the TFT manufacturing cost reduction effect is small, and therefore a process capable of further reducing the manufacturing cost has been demanded.

  The present invention has been made in view of the above problems, and its purpose is to control the position of conductive ink droplets after landing on a substrate in a process for forming a TFT-attached substrate for a liquid crystal display element or the like. Film pattern formation that can significantly reduce manufacturing costs by forming banks necessary to form a pattern without adding a new process and forming source / drain wiring using an inkjet method or the like It is to realize a substrate for use, a film pattern formation substrate, a thin film transistor formation substrate, a liquid crystal display element and a manufacturing method thereof.

  In order to solve the above problems, a film pattern forming substrate according to the present invention is a substrate on which at least one film member made of a semiconductor or an insulator is laminated, and a liquid film pattern material is formed in a region surrounded by the substrate. In a film pattern forming substrate in which a bank for forming a film pattern on the substrate is formed by filling and drying, at least one of the film members forms the bank. Yes.

  With the above configuration, at least one of the membrane members forms the bank.

  Conventionally, a bank is temporarily created using a resist film, etc., separately from the film member laminated on the substrate, and a film pattern is formed by filling and drying the film pattern material there. Is removed. Therefore, such a process and members dedicated to bank formation are required.

  On the other hand, in the configuration of the present invention, such a bank is formed by the film member laminated on the substrate. Therefore, such processes and members dedicated to bank formation are not required. Therefore, in the process of forming a TFT-attached substrate for liquid crystal display elements, etc., a bank necessary for controlling the position of ink droplets after landing on the substrate and forming a desired pattern can be formed without adding a new process. In addition, by forming the source / drain wiring using an ink jet method or the like, there is an effect that the manufacturing cost can be significantly reduced.

  In the film pattern forming substrate according to the present invention, in addition to the above structure, at least a part of the bank is formed of a laminated film of an n + type a-Si film and an a-Si film as the film member. It is characterized by that.

  With the above configuration, at least a part of the bank is composed of a laminated film of an n + type a-Si film and an a-Si film as the film member. Therefore, in addition to the effect of the above configuration, the bank can be formed with a simple configuration.

  In addition to the above configuration, the film pattern forming substrate according to the present invention includes at least a part of the bank including a laminated film of an n + type microcrystalline Si film and an a-Si film as the film member. It is characterized by that.

  With the above configuration, at least a part of the bank is composed of a laminated film of an n + type microcrystalline Si film and an a-Si film as the film member. Therefore, in addition to the effect of the above configuration, the bank can be formed with a simple configuration.

  In addition to the above-described configuration, the film pattern forming substrate according to the present invention includes at least a part of the bank including a pattern of a laminated film of an n + type microcrystalline Si film and an a-Si film as the film member. It is characterized by comprising a resist film for formation.

  With the above configuration, at least a part of the bank is made of a resist film for forming a pattern of a laminated film of an n + type microcrystalline Si film and an a-Si film as the film member. Therefore, in addition to the effect of the above configuration, the bank can be formed with a simple configuration.

  In addition to the above configuration, the film pattern forming substrate according to the present invention is characterized in that at least a part of the bank is made of a silicon nitride film as the film member.

  With the above configuration, at least a part of the bank is made of the silicon nitride film as the film member. Therefore, in addition to the effect of the above configuration, the bank can be formed with a simple configuration.

  In addition to the above structure, the film pattern forming substrate according to the present invention is characterized in that the silicon nitride film is used as an etch stopper film in an inverted staggered thin film transistor.

  With the above structure, the silicon nitride film is used as an etch stopper film in an inverted staggered thin film transistor. Therefore, one silicon nitride film can serve as both the bank and the etch stopper film. Therefore, in addition to the effect of the above configuration, there is an effect that the manufacture becomes easier.

  A film pattern forming substrate according to the present invention is characterized in that a film pattern is formed by filling a liquid film pattern material between banks of any one of the above film pattern forming substrates.

  With the above configuration, a liquid film pattern material is filled between the banks of the film pattern forming substrate to form a film pattern. Therefore, processes and members dedicated to bank formation are not necessary. Therefore, the manufacturing cost of the film pattern formation substrate suitable for the thin film transistor formation substrate and the like can be greatly reduced.

  The film pattern forming substrate manufacturing method according to the present invention is characterized in that a film pattern is formed by filling a liquid film pattern material between the banks of any of the above film pattern forming substrates.

  With the above configuration, a liquid film pattern material is filled between the banks of the film pattern forming substrate to form a film pattern. Therefore, processes and members dedicated to bank formation are not necessary. Therefore, the manufacturing cost of the film pattern formation substrate suitable for the thin film transistor formation substrate and the like can be greatly reduced.

  In addition to the above configuration, the method for manufacturing a film pattern forming substrate according to the present invention is characterized in that the liquid film pattern material is filled by an ink jet method to form the film pattern.

  With the above structure, the film pattern is formed by filling the liquid film pattern material with an ink jet method. Therefore, in addition to the effect of the above configuration, the bank can be formed with a simple configuration.

  Further, the thin film transistor forming substrate according to the present invention is characterized in that source wiring and drain wiring are formed as the film pattern on any of the film pattern forming substrates.

  With the above configuration, source wiring and drain wiring are formed as the film pattern. Therefore, processes and members dedicated to bank formation are not necessary. Therefore, the manufacturing cost of the thin film transistor forming substrate can be greatly reduced.

  In addition to the above configuration, the thin film transistor formation substrate according to the present invention is characterized in that the liquid film pattern material for forming the source wiring and the drain wiring contains Sn-doped indium oxide particles. Yes.

  With the above configuration, the liquid film pattern material for forming the source wiring and the drain wiring contains Sn-doped indium oxide particles. Therefore, the conductive ink material has a high resistance to plasma during dry etching. Therefore, in addition to the effect of the above configuration, there is an effect that it can be favorably applied to a formation process of a gap etch type TFT without an etch stopper.

  In addition to the above-described configuration, the thin film transistor formation substrate according to the present invention is different in a liquid film pattern material for forming the source wiring and a liquid film pattern material for forming the drain wiring. It is characterized by being a material.

  With the above configuration, the liquid film pattern material for forming the source wiring and the liquid film pattern material for forming the drain wiring are different materials. Therefore, in addition to the effect of the above-described configuration, there is an effect that the present invention can be satisfactorily applied even when various necessary conditions are different between the source wiring and the drain wiring.

  The thin film transistor forming substrate manufacturing method according to the present invention is characterized in that source wiring and drain wiring are formed as the film pattern on any of the film pattern forming substrates.

  With the above configuration, the source wiring and the drain wiring are formed as the film pattern. Therefore, processes and members dedicated to bank formation are not necessary. Therefore, the manufacturing cost of the thin film transistor forming substrate can be greatly reduced.

  A liquid crystal display element according to the present invention is characterized in that a picture element is formed using any one of the above-described thin film transistor formation substrates.

  With the above structure, a picture element is formed using any one of the thin film transistor formation substrates. Therefore, processes and members dedicated to bank formation are not necessary. Therefore, the manufacturing cost of the liquid crystal display element on which the thin film transistor forming substrate is mounted can be greatly reduced.

  Further, in the liquid crystal display element according to the present invention, in addition to the above configuration, the liquid film pattern material for forming the drain wiring and the pixel electrode is transparent, and the liquid film pattern material for forming the source wiring is liquid. The film pattern material is opaque and has a lower resistance than the liquid film pattern material for forming the drain wiring and the pixel electrode.

  With the above configuration, the liquid film pattern material for forming the drain wiring and the pixel electrode is transparent. On the other hand, the liquid film pattern material for forming the source wiring is opaque and has a lower resistance than the liquid film pattern material for forming the drain wiring and the pixel electrode. Therefore, in addition to the effect by the above configuration, there is an effect that it can be well adapted to various conditions required for the source wiring, the drain wiring, and the pixel electrode.

  In addition, a method for manufacturing a liquid crystal display element according to the present invention is characterized in that a picture element is formed using any one of the above-described thin film transistor formation substrates.

  With the above structure, a picture element is formed using any of the thin film transistor formation substrates described above. Therefore, processes and members dedicated to bank formation are not necessary. Therefore, the manufacturing cost of the liquid crystal display element on which the thin film transistor forming substrate is mounted can be greatly reduced.

  As described above, the film pattern forming substrate according to the present invention has a configuration in which at least one of the film members forms the bank.

  The film pattern forming substrate according to the present invention has a configuration in which a film pattern is formed by filling a liquid film pattern material between the banks of any of the above film pattern forming substrates. The film pattern forming substrate manufacturing method according to the present invention has a configuration in which a film pattern is formed by filling a liquid film pattern material between the banks of any one of the above film pattern forming substrates.

  In addition, the thin film transistor forming substrate according to the present invention has a configuration in which source wiring and drain wiring are formed as the film pattern on any of the film pattern forming substrates. In addition, the method for manufacturing a thin film transistor forming substrate according to the present invention has a configuration in which the source wiring and the drain wiring are formed as the film pattern on any of the film pattern forming substrates.

  Further, the liquid crystal display element according to the present invention has a configuration in which a picture element is formed using any one of the above-described thin film transistor formation substrates. Moreover, the manufacturing method of the liquid crystal display element which concerns on this invention is a structure which forms a pixel using one of the said thin-film transistor formation board | substrates.

  This eliminates the need for such processes and members dedicated to bank formation. Therefore, in the process of forming a TFT-attached substrate for liquid crystal display elements, etc., a bank necessary for controlling the position of ink droplets after landing on the substrate and forming a desired pattern can be formed without adding a new process. In addition, by forming the source / drain wiring using an ink jet method or the like, there is an effect that the manufacturing cost can be significantly reduced.

  The present embodiment relates to a film pattern forming method, and in particular, a thin film transistor (hereinafter referred to as TFT) forming substrate including a bank which is a partition member used when a film pattern is formed on the substrate using a liquid coating apparatus such as an ink jet method. And a liquid crystal display element equipped with the same.

  In the case of forming an inverted staggered thin film transistor using an a-Si film as a semiconductor layer, the metal material forming the source / drain wiring does not form an ohmic connection when in direct contact with the semiconductor layer. A method is known in which an n + type a-Si film doped with phosphorus or the like is provided between them to ensure ohmic connection, and this n + type a-Si film has an appropriate pattern in the previous step of forming the source / drain wiring. Generally, it is formed in the above. Therefore, the present inventor uses the ink jet method without adding a new process by forming a bank for controlling the position of the dropped conductive ink using the process of forming the n + type a-Si film. Thus, the present inventors have reached the present invention by conceiving to form source / drain wirings.

  The processes of the present invention are an ink application process (inkjet) and an ink drying process (oven). Each processing content is in parentheses.

  By using the present invention, in the process of forming a substrate with a TFT for a liquid crystal display element, a new process is added to a bank that forms a desired pattern by controlling the position of conductive ink droplets after landing on the substrate. It can be formed without. Therefore, by forming the source / drain wiring using an ink jet method or the like, it is possible to greatly reduce the manufacturing cost of the substrate with TFT and the liquid crystal display element on which the TFT is mounted.

  Specific examples are shown in the following forms. These are all formed on a substrate (not shown) as a gate member 11, a gate insulating film 12, an a-Si film 13, an etch stopper film 14, an n + type a-Si film 15, and an n + type microcrystalline Si film 16. All or part of the resist film 17 is laminated, and all or part of the resist film 17 plays a role of a bank.

  In each of the following embodiments, a liquid crystal display element is finally formed, but an element other than the liquid crystal display element may be used. In each of the following embodiments, a source wiring and a drain wiring are formed as a film pattern to form a thin film transistor formation substrate. However, an element other than the thin film transistor formation substrate may be used.

  In the following embodiments, a liquid conductive material is used as the liquid film pattern material. That is, conductive ink is used as the ink. Therefore, the film pattern has conductivity. However, if insulating ink is used, the film pattern can be made to have no conductivity.

Embodiment 1
The embodiment of the present invention will be described as follows.

  Here, in the formation process of the etch stop type TFT in which the back channel portion is protected by the etch stopper, the metal fine particles are discharged to the bank pattern formed of the n + type a-Si film / a-Si film by using the inkjet method. Shows a method of forming a source / drain wiring pattern.

Corning 1737 glass was used in all configurations. A Ta film is formed in a thickness of 3000 mm by using a sputtering method, and after the photolithography process, the excess film is removed by dry etching using a mixed gas of CF ₄ + O ₂ , and then the resist is removed with a resist stripping solution and the gate is removed. A pattern of the wiring 11 was formed.

  Next, the SiNx film (3500 mm) that is the gate insulating film 12, the a-Si film 13 (500mm) that is the semiconductor film, and the SiNx film that is the etch stopper film 14 by the PE-CVD (Plasma Enhanced Chemical Vapor Deposition) method 1000 Å) in order, and after the photolithography process, only the etch stopper film 14 is formed in a desired pattern as shown in FIG. 1 using BHF (hydrofluoric acid / ammonium fluoride aqueous solution) as an etchant. Thereafter, the resist film (not shown) was removed in a peeling process.

  Subsequently, an n + type a-Si film 15 that is an ohmic contact film that enables ohmic contact by being placed between the wiring material and the semiconductor film is formed by a PE-CVD method, and after the photolithography process, The n + type a-Si film / a-Si film was simultaneously etched using a dry etching method to form a pattern as shown in FIG. Thus, a film pattern forming substrate on which a bank having a width of 10 μm and a height of 2000 mm was formed was obtained.

  Subsequently, as shown in FIG. 3, an Ag ink in which Ag fine particles are dispersed in an organic solvent is used as the conductive ink 21 by using an ink jet apparatus (not shown) that can eject about 1 picoliter of ink per drop. An appropriate amount of (solid content concentration 10% by volume) was dropped into the bank. Here, the ink landing position shown in FIG. 3 shows an image, and the position, size, and number of inks do not mean any limitation on the process.

  Subsequently, after the ink flows along the bank pattern to form a desired wiring pattern, the organic components in the ink are evaporated in the baking process. As a result, the minimum line width as shown in FIG. A substrate with TFT (film pattern formation substrate, thin film transistor formation substrate) provided with 800 Å of source wiring 23 and drain wiring 24 was formed.

  Subsequently, an ITO film serving as a picture element electrode was formed into a film of 1000 mm by sputtering, and after the photolithography process, a desired pattern was formed by wet etching, thereby obtaining a liquid crystal display element having TFTs.

Note that a general n + type a-Si film has a high specific resistance of about 1000 Ω · cm, and in this embodiment, the effective channel width W and the channel length L of the TFT are the pattern accuracy of the conductive ink, that is, as shown in FIG. Depends on the width L _IJ of the etch stopper film 14 and the width W _IJ of the drain wiring 24.

[Embodiment 2]
Another embodiment of the present invention will be described as follows. For convenience of explanation, members having the same functions as those shown in the drawings of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

In the first embodiment, an n + type microcrystalline Si film may be used instead of the n + type a-Si film. As already described, a general n + type a-Si film has a high specific resistance of about 1000 Ω · cm, and in Embodiment 1, the effective channel width W and the channel length L of the TFT are the pattern accuracy of the conductive ink, That is, it depends on the width L _IJ of the etch stopper film 14 and the width W _IJ of the drain wiring 24 as shown in FIG.

  For this reason, in order to suppress variation in performance of individual TFTs, it is necessary to perform ink landing accuracy by inkjet and ink position control by bank pattern with high accuracy.

On the other hand, since the n + type microcrystalline Si film has conductivity with a specific resistance of about 1 to 10 Ω · cm, the effective channel width W and channel length L of the TFT are the pattern accuracy of the n + type microcrystalline Si film, that is, n + It is determined by the distance L _{n +} between the type a-Si films 15 and the width W _{n +} of the n + type a-Si film 15. Since the pattern accuracy of the n + type microcrystalline Si film is determined by the accuracy of photolithography, the variation can be suppressed to the same level as that of a TFT manufactured by a conventional photolithography technique.

  This n + type microcrystalline Si film can be obtained by adjusting the introduction gas flow rate ratio and the discharge power when forming the n + type a-Si film by the PE-CVD method. For example, it can be obtained by discharging with a larger electric power than when forming an n + type a-Si film with a flow ratio of monosilane: phosphine: hydrogen of 1: 1: 100. Therefore, the detailed procedure of the present embodiment is exactly the same as that of the first embodiment except that an n + type microcrystalline Si film is formed instead of the n + type a-Si film. This can be explained by replacing the type a-Si film with an n + type microcrystalline Si film.

  In this embodiment, the treatment for generating lyophilicity and liquid repellency was not performed before the ink was dropped, but the liquid repellent property on the n + type a-Si film and the n + type microcrystalline Si film was as much as possible. It is obvious that it is advantageous in terms of ensuring the film thickness to have a (contact angle is large) and to be as lyophilic (small contact angle) as possible on the insulating film (SiNx film) in the region surrounded by the bank.

[Embodiment 3]
Another embodiment of the present invention will be described as follows. For convenience of explanation, members having the same functions as those shown in the drawings of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

  In the first and second embodiments, the case where the back channel portion is applied to a process for forming an etch stop type TFT in which the back channel portion is protected by an etch stopper has been described. However, the present invention is applicable to a process for forming a gap etch type TFT without an etch stopper. Applicable.

  However, in this case, an n + type a-Si film or an n + type microcrystalline Si film (hereinafter referred to as an n + type a-Si film and an n + type microcrystalline Si film) is formed using a source / drain wiring pattern formed of conductive ink as a mask. The conductive ink material is required to be resistant to the plasma during the dry etching.

  Therefore, in this embodiment, the problem of plasma resistance is sufficiently practically used by using conductive ink in which conductive fine particles including Sn-doped indium oxide fine particles, which are materials of a transparent conductive film, are dispersed in an organic solvent. It has been solved.

  A detailed description of this embodiment is shown below.

  After forming a gate wiring pattern in the same manner as in the first and second embodiments, an SiNx film (3500 mm) as a gate insulating film, an a-Si film 13 (2500 mm) as a semiconductor film, and an ohmic contact film are formed by PE-CVD. As an n + film, for example, an n + type a-Si film 15 (1000 Å) is sequentially formed. As described above, an n + type microcrystalline Si film may be used instead of the n + type a-Si film. Here, the a-Si film 13 is thicker than the first and second embodiments, which are shown to be applied to the formation of an etch stop type TFT, because a part of the a-Si film 13 itself is etched when the n + film is etched. This is because it anticipates being etched.

  Subsequently, the n + type a-Si film 15 / a-Si film 13 was simultaneously etched using a photolithography process and a dry etching method to form a pattern as shown in FIG. As a result, a bank having a width of 10 μm and a height of 3500 mm was formed.

  Subsequently, as shown in FIG. 7, an appropriate amount of conductive ink 21 containing fine particles of Sn-doped indium oxide was dropped into the bank using an ink jet apparatus that can eject about 1 picoliter of ink per drop. Here, the ink landing position shown in FIG. 7 shows an image, and the position, size, and number of inks do not have any meaning in terms of process, as in the first and second embodiments.

  Subsequently, as a result of evaporating and drying the organic solvent in the baking step, a source wiring 23 and a drain wiring 24 having a minimum line width of 10 μm and a maximum film thickness of 1000 mm as shown in FIG. 8 were formed. Thereafter, by using the source wiring 23 and the drain wiring 24 as a mask, the n + film is removed by dry etching, thereby forming a TFT in which the a-Si film as shown in FIG. .

  Subsequently, an ITO (indium tin oxide) film to be a pixel electrode was formed by sputtering. After the photolithography process, a desired pattern was formed by wet etching to form a substrate with TFT for a liquid crystal display element.

Although this embodiment can form a substrate with TFT at a lower cost than Embodiments 1 and 2, as in Embodiment 1, the effective channel width W and channel length L of the TFT are the pattern accuracy of the conductive ink. That is, it depends on the width L _IJ of the etch stopper film 14 and the width W _IJ of the drain wiring 24. For this reason, in order to suppress variation in performance of individual TFTs, it is necessary to perform ink landing accuracy by inkjet and ink position control by bank pattern with high accuracy.

[Embodiment 4]
Another embodiment of the present invention will be described as follows. For convenience of explanation, members having the same functions as those shown in the drawings of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

  In the first to third embodiments, it is possible to simultaneously form not only the source / drain wiring pattern but also the pixel electrode pattern connected to the drain wiring with the bank pattern formed of the n + film. Fill the required source wiring bank part with ink liquid containing metal fine particles, and fill the drain wiring part and transparent and conductive pixel electrode bank parts with ink containing transparent conductive material fine particles. It is also possible to form source / drain wirings and pixel electrodes.

  Further, if an ink jet method capable of simultaneously forming different materials on the same surface is used, the source / drain wiring and the pixel electrode can be simultaneously formed. This will be described below.

  In the same manner as in the first embodiment, only the etch stopper film 14 was formed in a desired pattern as shown in FIG. Then, by forming a bank pattern composed of the n + type a-Si film 15 / a-Si film 13 of the first embodiment as shown in FIG. 11, a pixel electrode for connecting to the source / drain wiring and the drain wiring is formed. Form a bank. That is, of the n + type a-Si films 15, the n + type a-Si film 15a forms a bank for the source wiring portion, and the n + type a-Si film 15b forms a bank for the drain wiring portion and the pixel electrode portion. Is made.

  Subsequently, using the ink jet device, as shown in FIG. 12, the bank of the source wiring portion is filled with the conductive ink 21 containing Ag fine particles used in the first and second embodiments, and the drain wiring portion and the picture element are filled. The bank of the electrode forming portion is filled with a liquid transparent conductive film material ink (solid content concentration 8 volume%) made of Sn-doped indium oxide fine particles or the like. Here, the ink landing position shown in FIG. 12 shows an image, and the position, size, and number of inks have no meaning in terms of the process, as in the first to third embodiments. The ink containing Ag fine particles is opaque and has a lower resistance than the ink containing Sn-doped indium oxide fine particles.

  Subsequently, after the conductive ink 21 flowed along the bank pattern to obtain a desired pattern, the organic components in the ink were evaporated in the baking process. As a result, as shown in FIG. 13, the source wiring 23 is formed in the same shape as in the first and second embodiments, and the drain wiring 24 and the pixel electrode 25 have a maximum film thickness of 700 mm, a transmittance of 80%, and a specific resistance of 500 μΩ. A transparent conductive film of cm was formed.

  In this embodiment, different ink materials are used for the source wiring, drain wiring, and pixel electrode. For example, if the resistance value is acceptable, the same transparent conductive ink as the pixel electrode is used for the source wiring. May be.

  Further, the combination of the third embodiment and this embodiment has the greatest effect of reducing the manufacturing cost.

[Embodiment 5]
Another embodiment of the present invention will be described as follows. For convenience of explanation, members having the same functions as those shown in the drawings of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

  In the case where the present invention is applied to a process for forming an etch stop type TFT in which the back channel portion is protected by an etch stopper, in addition to the laminated film of n + type a-Si film / a-Si film, nitridation which is an etch stopper film It is also possible to increase the bank thickness using a silicon (SiNx) film. By increasing the bank thickness, the amount of conductive material ink that can be filled increases, so that it is possible to increase the thickness of the wiring that can be formed, which is effective in reducing the resistance of the wiring. This will be described below.

  As in the first embodiment, a SiNx film (3500 mm) as a gate insulating film, an a-Si film 13 (500 mm) as a semiconductor film, and a SiNx film (1000 mm) as an etch stopper film 14 are sequentially formed by PE-CVD. Then, only the etch stopper film 14 is formed in a bank pattern as shown in FIG. 14 through a photolithography process, an etching process, and a resist stripping process. That is, of the etch stopper film 14, the etch stopper film 14a forms a bank for the thin film transistor portion, and the etch stopper film 14b forms a bank for the source wiring portion.

  Subsequently, an n + type a-Si film 15 that is an ohmic contact film that enables ohmic contact by being placed between the wiring material and the semiconductor film is formed by a PE-CVD method, and after the photolithography process, The n + type a-Si film 15 / a-Si film 13 is simultaneously etched using a dry etching method and patterned into a shape as shown in FIG. 15, and the n + type a-Si film 15 / etch stopper film 14 / a- A bank of three stacked films of the Si film 13 was formed. As a result, a bank having a width of 10 μm and a height of 3000 mm was formed.

  Subsequently, as shown in FIG. 16, an Ag ink in which Ag fine particles are dispersed in an organic solvent (solid content concentration: 10) is used as the conductive ink 21 by using an ink jet apparatus capable of ejecting about 1 picoliter of ink per drop. Volume%) was dropped into the bank. Here, the ink landing position shown in FIG. 16 shows an image, and the position, size, and number of inks do not have any limitation on the process.

  Subsequently, after the ink flows along the bank pattern to form a desired wiring pattern, the organic components in the ink are evaporated in the baking process. As a result, the minimum line width as shown in FIG. A substrate with TFTs having 1000 Å source wiring 23 and drain wiring 24 was formed.

  Subsequently, an ITO film serving as a picture element electrode was formed into a film of 1000 mm by sputtering, and after the photolithography process, a desired pattern was formed by wet etching, thereby obtaining a liquid crystal display element having TFTs.

  Although not shown in this embodiment, it is obvious that the thickness of the transparent conductive film of the pixel electrode can be increased simultaneously by applying this embodiment to Embodiment 4.

[Embodiment 6]
Another embodiment of the present invention will be described as follows. For convenience of explanation, members having the same functions as those shown in the drawings of the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

  The n + type a-Si film, which is an ohmic contact film that enables ohmic contact, is limited to an n + type microcrystalline Si film, and a conductive ink material that is resistant to a stripping solution that does not dissolve in the stripping solution is used. Under the conditions, it is also possible to increase the film thickness of the wiring formed by making the bank higher than in the fifth embodiment by using a resist. This will be described below.

  As in the first embodiment, a SiNx film (3500 mm) as a gate insulating film, an a-Si film 13 (500 mm) as a semiconductor film, and a SiNx film (1000 mm) as an etch stopper film 14 are sequentially formed by PE-CVD. A film is formed, and only an etch stopper film is formed in a bank pattern as shown in FIG. 18 through a photolithography process, an etching process, and a resist stripping process.

  Subsequently, an n + type microcrystalline Si film is formed by a PE-CVD method as an ohmic contact film that enables ohmic connection by being placed between the wiring material and the semiconductor film, and a resist film is formed thereon by a photolithography process. 17 is patterned as shown in FIG.

  Thereafter, the n + type microcrystalline Si film 16 / a-Si film 13 was simultaneously etched using a dry etching method. With the resist film 17 attached, as shown in FIG. 20, an appropriate amount of Ag ink (solid content concentration 10% by volume) in which Ag fine particles are dispersed in an organic solvent was dropped into the bank using an inkjet apparatus. Here, the ink landing positions shown in FIG. 20 represent images, and the position, size, and number of inks do not have any limitation on the process.

  Subsequently, after the ink flows along the bank pattern to form a desired wiring pattern, the organic component in the ink is evaporated in a baking process, and the source wiring 23 and the drain wiring 24 as shown in FIG. 21 are formed. did.

  Then, as a result of removing the resist in a resist stripping process, a substrate with TFT provided with a source wiring 23 and a drain wiring 24 having a minimum line width of 10 μm and a maximum film thickness of 8000 mm as shown in FIG.

  Subsequently, an ITO film serving as a picture element electrode was formed into a film of 1000 mm by sputtering, and after the photolithography process, a desired pattern was formed by wet etching, thereby obtaining a liquid crystal display element having TFTs.

  By using the n + type microcrystalline Si film 16 as the ohmic contact film, as shown in FIG. 22C, the conductive ink 21 and the n + type microcrystalline Si film 16 are end faces as shown by an arrow A in the figure. Since the ohmic contact is made with the a-Si film 13 which is a semiconductor film through the current path path, the transistor characteristics are not affected at all.

  Although not shown in the present embodiment, it is obvious that the thickness of the transparent conductive film of the pixel electrode can be increased simultaneously by applying to the fourth embodiment.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The thin film pattern forming substrate according to the present invention is a thin film pattern forming substrate in which a bank is provided on the substrate and a liquid conductive material is filled between the banks, and at least a part of the bank is an n + type. You may comprise so that it may consist of a laminated film of a-Si film / amorphous Si film.

  A thin film pattern forming substrate according to the present invention is a thin film pattern forming substrate in which a bank is provided on the substrate and a liquid conductive material is filled between the banks, and at least a part of the bank is an n + type microcrystal. You may comprise so that it may consist of a laminated film of Si film / amorphous Si film.

  The thin film pattern forming substrate according to the present invention is a thin film pattern forming substrate in which a bank is provided on the substrate and a liquid conductive material is filled between the banks, and at least a part of the bank is made of a silicon nitride film. You may comprise so that it may become.

  A thin film pattern forming substrate according to the present invention is a thin film pattern forming substrate in which a bank is provided on the substrate and a liquid conductive material is filled between the banks, and at least a part of the bank is an n + type microcrystal. You may comprise so that it may consist of a resist film for pattern formation of Si film / amorphous Si film.

  The thin film pattern forming substrate according to the present invention may be configured such that, in the above configuration, the silicon nitride film is used as an etching stopper layer in an inverted staggered thin film transistor.

  The thin film pattern forming substrate according to the present invention may be configured to form a thin film pattern by filling a liquid conductive material between the banks of the thin film pattern forming substrate.

  The thin film pattern forming substrate manufacturing method according to the present invention may be configured to form a thin film pattern by filling a liquid conductive material between the banks of the thin film pattern forming substrate.

  The method for manufacturing a thin film pattern forming substrate according to the present invention may be configured so as to form a pattern by filling a liquid conductive material with an ink jet method in the above configuration.

  The thin film transistor forming substrate according to the present invention may be configured such that source / drain wirings or pixel electrodes are formed by a thin film pattern formed on the thin film pattern forming substrate.

  The thin film transistor formation substrate according to the present invention may be configured such that, in the above-described configuration, Sn-doped indium oxide fine particles are included in a liquid conductive material for forming source / drain wirings or pixel electrodes on the thin film transistor formation substrate. .

  The thin film transistor formation substrate according to the present invention may be configured such that in the above structure, the liquid conductive materials for forming the source wiring, the drain wiring, and the pixel electrode are different materials.

  The liquid crystal display element according to the present invention may be configured to be a liquid crystal display element using the thin film transistor formation substrate.

  The present invention can also be applied to applications such as a thin film transistor and a liquid crystal display element mounted with the thin film transistor.

(A) And (b) shows the structure of the board | substrate at the time of patterning of an etch stopper film | membrane completed, (a) is a top view, (b) is an A-A 'sectional view taken on the line. (A) And (b) shows the structure of the board | substrate at the time of patterning of an n + type a-Si film and an a-Si film being completed, (a) is a top view, (b) is AA. FIG. It is a top view which shows the structure of the board | substrate at the time of dripping of electroconductive ink being completed. (A) thru | or (c) show the structure of the board | substrate at the time of making conductive ink flow and dry, (a) is a top view, (b) is an AA 'sectional view taken on the line. (C) is a BB 'line sectional view. It is a top view which shows effective channel width. (A) And (b) shows the structure of the board | substrate at the time of patterning of an n + type a-Si film and an a-Si film being completed, (a) is a top view, (b) is AA. FIG. It is a top view which shows the structure of the board | substrate at the time of dripping of electroconductive ink being completed. (A) And (b) shows the structure of the board | substrate at the time of making conductive ink flow and dry, (a) is a top view, (b) is an AA 'sectional view taken on the line. . (A) And (b) shows the structure of the board | substrate at the time of the etching of n + type a-Si film being completed, (a) is a top view, (b) is an AA 'sectional view taken on the line. is there. (A) And (b) shows the structure of the board | substrate at the time of patterning of an etch stopper film | membrane completed, (a) is a top view, (b) is an A-A 'sectional view taken on the line. It is a top view which shows the structure of the board | substrate at the time of patterning of an n + type a-Si film and an a-Si film being completed. It is a top view which shows the structure of the board | substrate at the time of dripping of electroconductive ink being completed. It is a top view which shows the structure of the board | substrate at the time of making electroconductive ink flow and drying. (A) And (b) shows the structure of the board | substrate at the time of patterning of an etch stopper film | membrane completed, (a) is a top view, (b) is an A-A 'sectional view taken on the line. (A) And (b) shows the structure of the board | substrate at the time of patterning of an n + type a-Si film and an a-Si film being completed, (a) is a top view, (b) is AA. FIG. It is a top view which shows the structure of the board | substrate at the time of dripping of electroconductive ink being completed. (A) thru | or (c) show the structure of the board | substrate at the time of making conductive ink flow and dry, (a) is a top view, (b) is an AA 'sectional view taken on the line. (C) is a BB 'line sectional view. (A) And (b) shows the structure of the board | substrate at the time of patterning of an etch stopper film | membrane completed, (a) is a top view, (b) is an A-A 'sectional view taken on the line. It is a top view which shows the structure of the board | substrate at the time of patterning of a resist film being completed. (A) And (b) shows the structure of the board | substrate at the time of dripping of a conductive ink after the etching of n + type | mold microcrystal Si film and a-Si film was completed, (a) is a top view, ( b) is a sectional view taken along line AA ′. (A) thru | or (c) show the structure of the board | substrate at the time of making conductive ink flow and dry, (a) is a top view, (b) is an AA 'sectional view taken on the line. (C) is a BB 'line sectional view. (A) thru | or (c) show the structure of the board | substrate at the time of removing a resist film, (a) is a top view, (b) is an AA 'sectional view, (c) is It is a BB 'line sectional view. It is a top view which shows the structure of the board | substrate at the time of patterning of an etching stopper film | membrane being completed. (A) And (b) shows the structure of the board | substrate at the time of patterning of an n + type a-Si film and an a-Si film being completed, (a) is a top view, (b) is AA. FIG. (A) And (b) shows the structure of the board | substrate at the time of patterning of a resist bank being completed, (a) is a top view, (b) is A-A 'sectional view taken on the line. It is a top view which shows the structure of the board | substrate at the time of dripping of electroconductive ink being completed. (A) And (b) shows the structure of the board | substrate at the time of baking of conductive ink being completed, (a) is a top view, (b) is A-A 'sectional view taken on the line. It is a top view which shows the structure of the board | substrate at the time of removing a resist bank.

Explanation of symbols

11 gate wiring 12 gate insulating film 13 a-Si films 14, 14a, 14b etch stopper films 15, 15a, 15b n + type a-Si film 16 n + type microcrystalline Si film 17 resist film 21 conductive ink 23 source wiring 24 drain Wiring 25 Picture element electrode

Claims (16)

A substrate in which a semiconductor film and an ohmic contact film are stacked as a film member ,
In a film pattern forming substrate in which a bank for forming a film pattern on the substrate is formed by filling and drying a liquid film pattern material in a region surrounded by the film member ,
A film pattern forming substrate, wherein an ohmic contact film as the film member forms at least a part of the bank. 2. The film pattern formation according to claim 1, wherein at least a part of the bank includes a laminated film of an n + type a-Si film as the ohmic contact film and an a-Si film as the semiconductor film. Substrate. 2. The film pattern formation according to claim 1, wherein at least a part of the bank includes a laminated film of an n + type microcrystalline Si film as the ohmic contact film and an a-Si film as the semiconductor film. Substrate. 2. The bank according to claim 1, wherein at least a part of the bank is formed of a resist film for patterning a laminated film of an n + type microcrystalline Si film as the ohmic contact film and an a-Si film as the semiconductor film. 2. The substrate for forming a film pattern according to 1. In addition to the semiconductor film and the ohmic contact film, a silicon nitride film is laminated as the film member ,
Film patterning substrate according to claim 1, at least a portion of the bank, characterized by comprising the above Ki窒 silicon film.   6. The film pattern forming substrate according to claim 5, wherein the silicon nitride film is used as an etch stopper film in an inverted staggered thin film transistor.   A film pattern forming substrate, wherein a film pattern is formed by filling a liquid film pattern material between banks of the film pattern forming substrate according to claim 1.   7. A method of manufacturing a film pattern forming substrate, comprising forming a film pattern by filling a liquid film pattern material between banks of the film pattern forming substrate according to claim 1.   9. The method of manufacturing a film pattern forming substrate according to claim 8, wherein the film pattern is formed by filling the liquid film pattern material by an ink jet method.   8. A thin film transistor forming substrate according to claim 7, wherein a source wiring and a drain wiring are formed as the film pattern on the film pattern forming substrate according to claim 7.   11. The thin film transistor formation substrate according to claim 10, wherein the liquid film pattern material for forming the source wiring and the drain wiring contains Sn-doped indium oxide particles.   11. The thin film transistor formation substrate according to claim 10, wherein the liquid film pattern material for forming the source wiring and the liquid film pattern material for forming the drain wiring are different materials.   A method for manufacturing a thin film transistor forming substrate, comprising forming a source wiring and a drain wiring as the film pattern on the film pattern forming substrate according to claim 7.   13. A liquid crystal display element, wherein a picture element is formed using the thin film transistor forming substrate according to claim 10. The liquid film pattern material for forming the drain wiring and the pixel electrode is transparent,
15. The liquid film pattern material for forming the source wiring is opaque and has a lower resistance than the liquid film pattern material for forming the drain wiring and the pixel electrode. A liquid crystal display element according to 1.   13. A method of manufacturing a liquid crystal display element, wherein a picture element is formed using the thin film transistor forming substrate according to claim 10.

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