JP4623987B2 - Capacitor and its mounting structure - Google Patents

Capacitor and its mounting structure Download PDF

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JP4623987B2
JP4623987B2 JP2004095959A JP2004095959A JP4623987B2 JP 4623987 B2 JP4623987 B2 JP 4623987B2 JP 2004095959 A JP2004095959 A JP 2004095959A JP 2004095959 A JP2004095959 A JP 2004095959A JP 4623987 B2 JP4623987 B2 JP 4623987B2
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capacitor
internal electrode
electrode
laminate
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恒 佐藤
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Kyocera Corp
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Description

本発明はコンデンサ及びその実装構造に関するものである。   The present invention relates to a capacitor and its mounting structure.

近年、コンデンサの一種である積層セラミックコンデンサにおいて、等価直列抵抗、等価直列インダクタンスを低くするために、内部電極間を貫通導体で接続する構造が提案されている。   In recent years, a structure in which internal electrodes are connected by through conductors has been proposed in a multilayer ceramic capacitor, which is a type of capacitor, in order to reduce equivalent series resistance and equivalent series inductance.

図8は、従来の積層セラミックコンデンサを示す図であり、(a)は平面図、(b)は配線基板上に実装した状態を示す断面図である。   8A and 8B are diagrams showing a conventional multilayer ceramic capacitor, where FIG. 8A is a plan view and FIG. 8B is a cross-sectional view showing a state where the multilayer ceramic capacitor is mounted on a wiring board.

に示す積層セラミックコンデンサ30は、複数個の誘電体層32を間に内部電極33、34を介して積層した積層体31の下面に、複数個の外部端子37、38を設けてなる。また、これらの誘電体層32の厚み方向には内部電極33、34間を夫々接続する複数の貫通導体35、36が、積層体31の一方の最表面に露出し、夫々外部端子37、38に接続されている。さらに、内部電極33、34内に、複数の貫通導体36、35とは夫々接続しない複数の非電極形成領域43、44が形成されている。 The multilayer ceramic capacitor 30 shown in FIG. 8 is provided with a plurality of external terminals 37 and 38 on the lower surface of a multilayer body 31 in which a plurality of dielectric layers 32 are laminated via internal electrodes 33 and 34 therebetween. In the thickness direction of the dielectric layer 32, a plurality of through conductors 35 and 36 that connect the internal electrodes 33 and 34 are exposed on one outermost surface of the multilayer body 31, and external terminals 37 and 38, respectively. It is connected to the. Furthermore, a plurality of non-electrode forming regions 43 and 44 that are not connected to the plurality of through conductors 36 and 35 are formed in the internal electrodes 33 and 34.

また、上記積層セラミックコンデンサ30は、未焼成状態の積層体31を、脱バインダ処理後、焼成を行い、内部に内部電極33、34、貫通導体35、36が形成されるとともに、一方主面に貫通導体35、36が露出した積層体31を得た後、貫通導体35、36と夫々接続するように積層体31の一方主面に外部端子37、38を形成することにより、作製される。   In addition, the multilayer ceramic capacitor 30 is formed by firing the unsintered laminated body 31 after removing the binder and forming the internal electrodes 33 and 34 and the through conductors 35 and 36 inside, and on the one main surface. After obtaining the multilayer body 31 with the through conductors 35 and 36 exposed, the external terminals 37 and 38 are formed on one main surface of the multilayer body 31 so as to be connected to the through conductors 35 and 36, respectively.

さらに、上記積層セラミックコンデンサ30の実装構造は、積層セラミックコンデンサ30を配線基板11上に載置させるとともに、積層セラミックコンデンサ30の外部端子37、38を配線基板11の接続パッド12に導電性接着剤15を介して電気的に接続し、且つ積層セラミックコンデンサ30と配線基板11との間に形成される間隙を樹脂材16で封止している。   Furthermore, the mounting structure of the multilayer ceramic capacitor 30 is such that the multilayer ceramic capacitor 30 is placed on the wiring substrate 11 and the external terminals 37 and 38 of the multilayer ceramic capacitor 30 are connected to the connection pads 12 of the wiring substrate 11 with a conductive adhesive. The gap formed between the multilayer ceramic capacitor 30 and the wiring board 11 is sealed with a resin material 16.

しかしながら、上記積層セラミックコンデンサ30によれば、導電性接着剤15による接続強度は小さいため、積層セラミックコンデンサ30と配線基板11の接続強度を大きくするには限界があった。   However, according to the multilayer ceramic capacitor 30, since the connection strength by the conductive adhesive 15 is small, there is a limit in increasing the connection strength between the multilayer ceramic capacitor 30 and the wiring board 11.

そこで、積層セラミックコンデンサ30の側面に、ヤスリなどの切削工具により凹凸31aを形成するとともに、樹脂材16の一部を凹凸31aが被覆されるようにして積層セラミックコンデンサ30の側面に対し被着させた積層セラミックコンデンサ30の実装構造が、特開平06−268102号公報に開示されている。   Therefore, the unevenness 31a is formed on the side surface of the multilayer ceramic capacitor 30 with a cutting tool such as a file, and a part of the resin material 16 is attached to the side surface of the multilayer ceramic capacitor 30 so that the unevenness 31a is covered. A mounting structure of the multilayer ceramic capacitor 30 is disclosed in Japanese Patent Laid-Open No. 06-268102.

上記刊行物によれば、積層セラミックコンデンサ30の側面と樹脂材16の接触面積が増大するため、積層セラミックコンデンサ30と配線基板11の接続強度を大きくすることができる。
特開平06−268102号公報 (4頁、図1)
According to the above publication, since the contact area between the side surface of the multilayer ceramic capacitor 30 and the resin material 16 is increased, the connection strength between the multilayer ceramic capacitor 30 and the wiring board 11 can be increased.
Japanese Patent Laid-Open No. 06-268102 (page 4, FIG. 1)

しかしながら、上記積層セラミックコンデンサ30によれば、積層セラミックコンデンサ30が小型化した場合、側面に精度良く凹凸31aを形成することが困難であった。   However, according to the multilayer ceramic capacitor 30, when the multilayer ceramic capacitor 30 is downsized, it is difficult to accurately form the unevenness 31 a on the side surface.

また、上記積層セラミックコンデンサ30によれば、内部電極となる導体膜33、34の外周部の一部が積層体31の外周部まで延在していないため、脱バインダが十分に行われず、デラミネーションなどの構造欠陥が生じるという問題点があった。これは、誘電体層となるセラミックグリーンシート32は導体膜33、34に比べて緻密であるため、バインダ樹脂がセラミックグリーンシート32を通って外部に飛ばされにくいことによる。さらに、導体膜33、34間を貫通導体となる導体部35、36で接続する積層セラミックコンデンサ30の場合、特に導体部35、36の間隔が小さい場合、導体部35、36は導体膜33、34に比べて緻密であるため、さらに脱バインダが十分に行われなくなっていた。   Further, according to the multilayer ceramic capacitor 30, since a part of the outer peripheral portion of the conductor films 33 and 34 serving as internal electrodes does not extend to the outer peripheral portion of the multilayer body 31, the binder removal is not sufficiently performed, There was a problem that structural defects such as lamination occurred. This is because the ceramic green sheet 32 serving as a dielectric layer is denser than the conductor films 33 and 34, so that the binder resin is less likely to be blown out through the ceramic green sheet 32. Further, in the case of the multilayer ceramic capacitor 30 in which the conductor films 33 and 34 are connected by the conductor portions 35 and 36 serving as through conductors, particularly when the distance between the conductor portions 35 and 36 is small, the conductor portions 35 and 36 include Since it is denser than 34, the binder removal was not sufficiently performed.

本発明は上述の課題に鑑み案出されたもので、その目的は、配線基板との接続強度を大きくできるとともに、脱バインダ性が良好であり、デラミネーションなどの構造欠陥を防止できるコンデンサ及びその実装構造を提供することにある。   The present invention has been devised in view of the above-mentioned problems, and its purpose is to increase the connection strength with the wiring board, to have good binder removal properties, and to prevent structural defects such as delamination and the capacitor. To provide a mounting structure.

本発明のコンデンサは、複数個の誘電体層が間に第1の内部電極または第2の内部電極をそれぞれ交互に介して積層された積層体の下面に、前記第2の内部電極とは第2の非電極形成領域によって隔てられ、前記第1の内部電極同士を接続している複数の第1の貫通導体と、前記第1の内部電極とは第1の非電極形成領域によって隔てられ、前記第2の内部電極同士を接続している複数の第2の貫通導体とが複数の前記誘電体層を厚み方向に貫通して露出しているとともに、前記第1の貫通導体および前記第2の貫通導体にそれぞれ電気的に接続された複数個の第1の外部端子および第2の外部端子が設けられてなるコンデンサであって、前記第1の内部電極および前記第2の内部電極は外周部のうち少なくとも一部に前記積層体の外周部まで延在している延在部を有するとともに、該延在部に前記積層体の側面より外方に突出する突条が取着されており、該突条は前記積層体の積層方向に並んで複数設けられていることを特徴とするものである。
In the capacitor of the present invention, a plurality of dielectric layers are alternately laminated with a first internal electrode or a second internal electrode interposed therebetween. A plurality of first penetrating conductors that are separated by two non-electrode forming regions and connecting the first internal electrodes, and the first internal electrodes are separated by a first non-electrode forming region; A plurality of second through conductors connecting the second internal electrodes are exposed through the plurality of dielectric layers in the thickness direction, and the first through conductor and the second through conductor are exposed. A capacitor provided with a plurality of first external terminals and second external terminals that are electrically connected to the through conductors, respectively, wherein the first internal electrode and the second internal electrode have outer peripheries. At least part of the outer periphery of the laminate. And has a extending portion extending are attached is ridge projecting outward from a side surface of the laminate to the extending portion, projecting strip is arranged in the stacking direction of the laminate A plurality are provided .

また本発明のコンデンサは、前記突条がメッキにより形成されていることを特徴とするものである。   The capacitor according to the present invention is characterized in that the protrusion is formed by plating.

さらに本発明のコンデンサは、前記積層体が4個の側面を有した直方体状であるとともに、前記積層体の側面には、前記第1の内部電極および前記第2の内部電極のいずれか一方に取着された前記突条のみが設けられていることを特徴とするものである。 Furthermore capacitor of the present invention, the laminate four sides cuboid der Rutotomoni having a on the side surface of the front Symbol laminate, one of the first internal electrode and the second internal electrode on the other hand it is characterized in that only attached to said protrusion is provided.

またさらに本発明のコンデンサは、前記積層体の隣り合う2個の側面のうち一方の側面に前記第1の内部電極に取着された前記突条のみが、他方の側面に前記第2の内部電極に取着された前記突条のみが設けられていることを特徴とするものである。 Internal further capacitor of the present invention is also only the protrusion which is attached to the first internal electrodes on the sides of one of the two side surfaces adjacent the stack, on the other side the second it is characterized in that only the ridges are attached to the electrodes is provided.

さらにまた本発明のコンデンサは、前記第1の内部電極に取着された前記突条と前記第2の内部電極に取着された前記突条は、それらのエッジ部が前記積層体の隣り合う2個の側面間に形成される角部より離間して配置されていることを特徴とするものである。 Furthermore capacitor of the present invention also, wherein the first attached to the inner electrodes has been the ridge and the second of said ribs that are attached to the inner electrode, its those of the edge portion is the laminate It is characterized by being arranged apart from a corner formed between two adjacent side surfaces.

またさらに本発明のコンデンサは、前記積層体を構成している複数個の前記誘電体層は、上下方向に隣り合う前記誘電体層間に前記積層体の外周部に沿って前記第1の内部電極および前記第2の内部電極の存在しない領域が存在し、該領域において前記誘電体層同士が直に接合されていることを特徴とするものである。 Furthermore capacitor of the present invention also includes a plurality of said dielectric layer constituting said laminate along said outer periphery of the laminate in the dielectric layers adjacent in the vertical direction first internal electrode and the second nonexistent areas of internal electrodes exist, is characterized in that said dielectric layer to each other are joined directly at the region.

さらにまた本発明のコンデンサは、複数個の誘電体層が間に第1の内部電極または第2の内部電極をそれぞれ交互に介して積層された積層体の下面に、前記第2の内部電極とは第2の非電極形成領域によって隔てられ、前記第1の内部電極同士を接続している複数の第1の貫通導体と、前記第1の内部電極とは第1の非電極形成領域によって隔てられ、前記第2の内部電極同士を接続している複数の第2の貫通導体とが複数の前記誘電体層の厚み方向に貫通して露出しているとともに、前記第1の貫通導体および前記第2の貫通導体にそれぞれ電気的に接続された複数個の第1の外部端子および第2の外部端子が設けられてなるコンデンサであって、前記誘電体層間に、前記第1の内部電極または前記第2の内部電極とは離間して配置されたダミー電極が介在しているとともに、該ダミー電極は端部が前記積層体の外周部まで延在している延出部を有しており、該延在部に前記積層体の側面より外方に突出する突条が取着されており、該突条は前記積層体の積層方向に並んで複数設けられていることを特徴とするものである。 Furthermore, the capacitor according to the present invention includes the second internal electrode and the second internal electrode on the lower surface of a laminate in which a plurality of dielectric layers are alternately laminated with the first internal electrode or the second internal electrode interposed therebetween. Are separated by a second non-electrode forming region, and the plurality of first through conductors connecting the first inner electrodes and the first inner electrode are separated by a first non-electrode forming region. And a plurality of second through conductors connecting the second internal electrodes are exposed through in the thickness direction of the plurality of dielectric layers, and the first through conductor and the A capacitor provided with a plurality of first external terminals and second external terminals electrically connected to the second through conductor, respectively, between the dielectric layers, the first internal electrode or The second internal electrode is spaced apart While the Mie electrode is interposed, the dummy electrode has an extending portion whose end extends to the outer peripheral portion of the laminate, and the extended portion is located outward from the side surface of the laminate. A plurality of protrusions are provided side by side in the stacking direction of the laminate .

またさらに本発明のコンデンサは、前記突条の幅(w)および突出高さ(h)が前記第1の内部電極および前記第2の内部電極の厚み(t)よりも大であることを特徴とするものである。 Furthermore capacitor of the present invention also provides said ridge width (w) and protruding height (h) is greater than the thickness (t) of said first internal electrode and the second internal electrode It is characterized by.

さらにまた本発明のコンデンサは、前記積層体が直方体状であるとともに、該積層体の隣り合う側面間に形成される角部に曲率半径0.05mm〜0.15mmの丸み加工が施されていることを特徴とするものである。 Furthermore capacitor of the present invention also, the laminate is cuboid der Rutotomoni and rounding processing radius of curvature 0.05mm~0.15mm is applied to the corner portion formed between the side surfaces adjacent the laminate It is characterized by being.

そして本発明のコンデンサの実装構造は、請求項1乃至請求項9のいずれかに記載のコンデンサを配線基板上に載置るとともに、前記コンデンサの前記第1の外部端子および前記第2の外部端子を前記配線基板の接続パッドに導電性接着剤を介して電気的に接続してなるコンデンサの実装構造であって、前記コンデンサと前記配線基板との間に形成される間隙を樹脂材で封止するとともに、該樹脂材の一部を前記突条が被覆されるようにして前記コンデンサの側面に対し被着させたことを特徴とするものである。 The mounting structure of the capacitor of the present invention, according to claim 1 or placing the capacitor according on the wiring board in any of claims 9 to Rutotomoni, the said capacitor first external terminal and the second external A capacitor mounting structure in which a terminal is electrically connected to a connection pad of the wiring board via a conductive adhesive, and a gap formed between the capacitor and the wiring board is sealed with a resin material. And a part of the resin material is attached to the side surface of the capacitor so as to cover the protrusions.

本発明によれば、内部電極もしくはダミー電極の外周部を積層体の外周部まで延在させているため、脱バインダ性が良好であり、デラミネーションなどの構造欠陥を防止できる。   According to the present invention, since the outer peripheral portion of the internal electrode or the dummy electrode extends to the outer peripheral portion of the laminated body, the binder removal property is good, and structural defects such as delamination can be prevented.

また、上記延在部に積層体の側面より外方に突出する突条を取着させるようにしたことから、コンデンサの小型化を図る場合であっても、積層体の側面に精度良く凹凸を形成することができる
さらに、上記突条をメッキにより形成することにより、電解メッキの場合、積層体をメッキ液中に浸漬して外部端子側から通電すること、また無電解メッキの場合、積層体をメッキ液中に浸漬して所定時間放置することにより、第1または第2の内部電極の延材部に選択的に突条を形成することができる。
In addition, since the protrusions protruding outward from the side surface of the multilayer body are attached to the extending portion, even when the capacitor is downsized, the side surface of the multilayer body is accurately uneven. Further, by forming the protrusions by plating, in the case of electrolytic plating, the laminate is immersed in a plating solution and energized from the external terminal side. In the case of electroless plating, the laminate is formed. Is immersed in the plating solution and allowed to stand for a predetermined time, whereby the protrusions can be selectively formed on the extended material portion of the first or second internal electrode.

またさらに、上記積層体が4個の側面を有した直方体状を成しているとともに、内部電極が積層体の積層方向に交互に配されている複数個の第1の内部電極と複数個の第2の内部電極とで構成されており、積層体の各側面には、第1の内部電極、第2の内部電極のいずれか一方に取着された突条のみが設けられているため、誘電体層の厚みが小さい場合、あるいは突条の幅(w)及び突出高さ(h)が大きい場合も、第1の内部電極に取着された突条と第2の内部電極に取着された突条が接続することを防止できる。   Furthermore, the laminated body has a rectangular parallelepiped shape having four side surfaces, and a plurality of first internal electrodes and a plurality of internal electrodes arranged alternately in the lamination direction of the laminated body. It is composed of a second internal electrode, and each side surface of the laminate is provided with only the protrusions attached to either the first internal electrode or the second internal electrode. Even when the thickness of the dielectric layer is small, or when the width (w) and the protrusion height (h) of the protrusion are large, the protrusion is attached to the first internal electrode and the second internal electrode. It is possible to prevent the projected ridges from being connected.

さらにまた、上記積層体の隣り合う2個の側面のうち一方の側面に第1の内部電極に取着された突条のみが、他方の側面に第2の内部電極に取着された突条のみが設けられているため、第1の内部電極に取着された突条と第2の内部電極に取着された突条が接続することをさらに効果的に防止できる。   Furthermore, only the ridge attached to the first internal electrode on one side surface of the two adjacent side surfaces of the laminate is the ridge attached to the second internal electrode on the other side surface. Therefore, it is possible to more effectively prevent the protrusions attached to the first internal electrode and the protrusions attached to the second internal electrode from being connected.

またさらに、第1の内部電極に取着された突条と第2の内部電極に取着された突条は、そのエッジ部が積層体の隣り合う2個の側面間に形成される角部より離間して配置されているため、第1の内部電極に取着された突条と第2の内部電極に取着された突条が角部にまたがるように接続することを防止できる。   Still further, the protrusions attached to the first internal electrode and the protrusions attached to the second internal electrode have corner portions whose edge portions are formed between two adjacent side surfaces of the laminate. Since the protrusions attached to the first internal electrode and the protrusions attached to the second internal electrode can be prevented from being connected so as to cross over the corners because they are arranged more apart from each other.

さらにまた、突条の幅(w)及び突出高さ(h)が内部電極の厚み(t)よりも大となしておくことにより、内部電極やダミー電極中に外部から水分などが浸入するのを有効に防止することができる。   Furthermore, when the width (w) and height (h) of the protrusion are larger than the thickness (t) of the internal electrode, moisture or the like enters the internal electrode or dummy electrode from the outside. Can be effectively prevented.

またさらに、積層体を構成している複数個の誘電体層は、上下方向に隣り合う誘電体層間に積層体の外周部に沿って内部電極の存在しない領域が存在し、この領域において誘電体層同士を直に接合するようにしていることから、誘電体層同士の密着性が誘電体層と内部電極との密着強度よりも大きくなり、積層体内部の層間の剥離を有効に防止することができる。   Furthermore, in the plurality of dielectric layers constituting the multilayer body, there is a region where no internal electrode exists along the outer peripheral portion of the multilayer body between the dielectric layers adjacent in the vertical direction. Since the layers are directly bonded to each other, the adhesion between the dielectric layers is greater than the adhesion strength between the dielectric layers and the internal electrodes, and effectively prevents delamination between the layers inside the laminate. Can do.

さらにまた、上記積層体を直方体状に形成するとともに、積層体の隣り合う側面間に形成される角部に曲率半径0.05mm〜0.15mmの丸み加工を施すことにより、上記突条の形成が容易になる。すなわち、曲率半径0.05mm以上の丸み加工を施すことにより、ハンドリングによるクラックの発生などを防止でき、他方、曲率半径0.15mm以下の丸み加工を施すことにより突条を精度良く形成することができる。   Furthermore, while forming the said laminated body into a rectangular parallelepiped shape, the round part with a curvature radius of 0.05 mm-0.15 mm is given to the corner | angular part formed between adjacent side surfaces of a laminated body, and the said protrusion is formed. Becomes easier. That is, by performing rounding with a radius of curvature of 0.05 mm or more, it is possible to prevent the occurrence of cracks due to handling, and on the other hand, by performing rounding with a radius of curvature of 0.15 mm or less, it is possible to accurately form ridges. it can.

そして、コンデンサの外部端子を配線基板の接続パッドに導電性接着剤を介して電気的に接続する際に、コンデンサと配線基板との間に形成される間隙を樹脂材で封止するとともに、樹脂材の一部を突条が被覆されるようにしてコンデンサの側面に対し被着させることにより、コンデンサと配線基板との接続強度を大きくでき、温度サイクル試験の寿命やたわみ強度が改善される。   When the external terminals of the capacitor are electrically connected to the connection pads of the wiring board via a conductive adhesive, the gap formed between the capacitor and the wiring board is sealed with a resin material, and the resin By attaching a part of the material to the side surface of the capacitor so that the protrusions are covered, the connection strength between the capacitor and the wiring board can be increased, and the life and deflection strength of the temperature cycle test can be improved.

以下、本発明のコンデンサ及びその実装構造を添付図面に基づいて説明する。   Hereinafter, a capacitor of the present invention and a mounting structure thereof will be described with reference to the accompanying drawings.

図1は本発明の第1の実施形態に係る積層セラミックコンデンサを示す図であり、(a)は平面図、(b)は配線基板上に実装した状態を示す断面図である。   1A and 1B are views showing a multilayer ceramic capacitor according to a first embodiment of the present invention, in which FIG. 1A is a plan view and FIG. 1B is a cross-sectional view showing a state mounted on a wiring board.

図において、10は積層セラミックコンデンサ、2は誘電体層、3、4は内部電極、5、6は貫通導体(ビアホール導体)、7、8は外部端子である。   In the figure, 10 is a multilayer ceramic capacitor, 2 is a dielectric layer, 3 and 4 are internal electrodes, 5 and 6 are through conductors (via hole conductors), and 7 and 8 are external terminals.

図1に示す積層セラミックコンデンサ10は、複数個の誘電体層2を間に内部電極3、4を介して積層した積層体1の下面に、複数個の外部端子7、8を設けてなる。また、これらの誘電体層2の厚み方向には内部電極3、4間を夫々接続する複数の貫通導体5、6が、積層体1の一方の最表面に露出し、夫々外部端子7、8に接続されている。さらに、内部電極3、4内に、複数の貫通導体6、5とは夫々接続しない複数の非電極形成領域13、14が形成されている。   A multilayer ceramic capacitor 10 shown in FIG. 1 is provided with a plurality of external terminals 7 and 8 on the lower surface of a multilayer body 1 in which a plurality of dielectric layers 2 are laminated via internal electrodes 3 and 4 therebetween. Further, in the thickness direction of these dielectric layers 2, a plurality of through conductors 5, 6 that connect the internal electrodes 3, 4 are exposed on one outermost surface of the multilayer body 1, and external terminals 7, 8, respectively. It is connected to the. Further, a plurality of non-electrode forming regions 13 and 14 that are not connected to the plurality of through conductors 6 and 5 are formed in the internal electrodes 3 and 4, respectively.

ここで本発明の特徴的な点は、内部電極3、4の外周部のうち少なくとも一部(延材部3a、4aを積層体1の外周部まで延在させるとともに、延在部3a、4aに積層体1の側面より外方に突出する突条17、18を取着させたことにある。   Here, the characteristic point of the present invention is that at least a part of the outer peripheral portions of the internal electrodes 3 and 4 (the extending portions 3a and 4a extend to the outer peripheral portion of the multilayer body 1 and the extending portions 3a and 4a. The protrusions 17 and 18 projecting outward from the side surface of the laminated body 1 are attached.

すなわち、延在部3a、4aに積層体1の側面より外方に突出する突条17、18を取着させたため、積層セラミックコンデンサ10が小型化した場合も、側面に精度良く凹凸を形成することができることから、積層セラミックコンデンサ10の外部端子7、8を配線基板11の接続パッド12に導電性接着剤15を介して電気的に接続する際に、積層セラミックコンデンサ10と配線基板11との間に形成される間隙を樹脂材16で封止するとともに、樹脂材16の一部を突条17、18が被覆されるようにして積層セラミックコンデンサ10の側面に対し被着させることにより、積層セラミックコンデンサ10と配線基板11との接続強度を大きくでき、温度サイクル試験の寿命やたわみ強度が改善される。   That is, since the protrusions 17 and 18 projecting outward from the side surface of the multilayer body 1 are attached to the extending portions 3a and 4a, unevenness is accurately formed on the side surface even when the multilayer ceramic capacitor 10 is downsized. Therefore, when the external terminals 7 and 8 of the multilayer ceramic capacitor 10 are electrically connected to the connection pads 12 of the wiring substrate 11 via the conductive adhesive 15, the multilayer ceramic capacitor 10 and the wiring substrate 11 can be connected to each other. The gap formed therebetween is sealed with the resin material 16, and a part of the resin material 16 is attached to the side surface of the multilayer ceramic capacitor 10 so as to cover the ridges 17 and 18. The connection strength between the ceramic capacitor 10 and the wiring substrate 11 can be increased, and the life and deflection strength of the temperature cycle test can be improved.

なお、ここでいう導電性接着剤15とは、導電性樹脂の他、半田なども含まれる。   The conductive adhesive 15 here includes solder and the like in addition to the conductive resin.

次に、本発明の積層セラミックコンデンサ10の製造方法について、図を用いて説明する。なお、積層体については、全工程において符号を区別しないこととする。   Next, a method for manufacturing the multilayer ceramic capacitor 10 of the present invention will be described with reference to the drawings. In addition, about a laminated body, suppose that a code | symbol is not distinguished in all the processes.

まず、誘電体層となるセラミックグリーンシート2に、内部電極となる導体膜3、4を導電性ペーストの印刷・乾燥により形成する。このとき、非電極形成領域13、14も形成される。また、導体膜3、4の外周部のうち少なくとも一部(延材部3a、4aとなる部分)が切断線をまたがるように延在している。なお、誘電体層2として、有機強誘電体材料を用いても良い。   First, conductor films 3 and 4 serving as internal electrodes are formed on a ceramic green sheet 2 serving as a dielectric layer by printing and drying a conductive paste. At this time, the non-electrode forming regions 13 and 14 are also formed. In addition, at least a part of the outer peripheries of the conductor films 3 and 4 (portions that become the extended material portions 3a and 4a) extends so as to cross the cutting line. Note that an organic ferroelectric material may be used as the dielectric layer 2.

次に、導体膜3、4が形成されたセラミックグリーンシート2を交互に所要枚数を積み重ね、積層体1が抽出される大型積層体を形成する。   Next, the required number of ceramic green sheets 2 on which the conductor films 3 and 4 are formed are alternately stacked to form a large laminate from which the laminate 1 is extracted.

次に、レーザの照射や、マイクロドリル又はパンチングを用いた打ち抜き法などにより、大型積層体の主面に導体膜3、4、セラミックグリーンシート2を貫く貫通孔を形成する。   Next, through holes penetrating the conductor films 3 and 4 and the ceramic green sheet 2 are formed on the main surface of the large-sized laminate by laser irradiation or a punching method using micro drilling or punching.

次に、この貫通孔に導体層3、4に用いる導電性ペーストと同様の導電性ペーストを充填することにより、貫通導体となる導体部5、6が形成される。   Next, by filling the through holes with a conductive paste similar to the conductive paste used for the conductor layers 3 and 4, conductor portions 5 and 6 serving as through conductors are formed.

なお、誘電体層となるセラミックグリーンシート2に、マイクロドリル又はパンチングを用いた打ち抜き法などにより、あらかじめ貫通孔をあけておき、スクリーン印刷法により、セラミックグリーンシート2上に内部電極となる導体膜3、4を印刷すると同時に、貫通孔に導電性ペーストを充填することにより、導体部5、6を形成後、積層するようにしても良い。   In addition, a through hole is made in advance in the ceramic green sheet 2 to be a dielectric layer by a punching method using a micro drill or punching, and a conductive film to be an internal electrode on the ceramic green sheet 2 by a screen printing method. At the same time as printing 3 and 4, the conductive portions 5 and 6 may be formed and then laminated by filling the through holes with a conductive paste.

次に、大型積層体を押し切り刃加工、ダイシング方式などにより切断し、未焼成状態の積層体1を得る。この未焼成状態の積層体1は、内部電極3、4、貫通導体5、6が形成されるとともに、一方主面に貫通導体5、6が露出し、且つ内部電極3、4の外周部のうち少なくとも一部(延材部3a、4a)が外周部に延在している。   Next, the large-sized laminate is cut by a press cutting process, a dicing method, or the like to obtain the unfired laminate 1. In the unfired laminate 1, the internal electrodes 3 and 4 and the through conductors 5 and 6 are formed, the through conductors 5 and 6 are exposed on one main surface, and the outer peripheral portions of the internal electrodes 3 and 4 are exposed. Among these, at least a part (the extended material portions 3a and 4a) extends to the outer peripheral portion.

次に、この未焼成状態の積層体1は、脱バインダ処理後、焼成を行い、内部にた積層体1が得られる。   Next, this unfired laminated body 1 is baked after the binder removal treatment, and the laminated body 1 placed inside is obtained.

このとき、延材部3a、4aを積層体1の外周部まで延在させているため、脱バインダ性が良好であり、デラミネーションなどの構造欠陥を防止できる。   At this time, since the extended material portions 3a and 4a are extended to the outer peripheral portion of the laminated body 1, the binder removal property is good, and structural defects such as delamination can be prevented.

次に、積層体1の一方主面に露出した貫通導体5、6、及び積層体1の外周部に延在した延在部3a、4aは、表面が酸化されているため、表面研磨により、酸化被膜を除去する。   Next, since the surfaces of the through conductors 5 and 6 exposed on one main surface of the multilayer body 1 and the extending portions 3a and 4a extending to the outer peripheral portion of the multilayer body 1 are oxidized, by surface polishing, Remove the oxide film.

続いて、貫通導体5、6の露出部に、Niメッキ、Snメッキなどを形成する。このとき、内部電極3、4が積層体1の外周部に延在した延在部3a、4aに、メッキなどにより突条17、18を形成する。メッキは、無電解メッキ、電解メッキのいずれでも良いが、電解メッキを用いた場合、外部端子7、8となる側から通電することにより、内部電極3、4の延材部3a、4aに選択的に突条17、18を形成することができる。またこのとき、メッキ液への浸漬時間等を制御することにより、内部電極3に取着された突条17と内部電極4に取着された突条18が接続することを防止する必要がある。   Subsequently, Ni plating, Sn plating, or the like is formed on the exposed portions of the through conductors 5 and 6. At this time, the protrusions 17 and 18 are formed on the extending portions 3 a and 4 a where the internal electrodes 3 and 4 extend to the outer peripheral portion of the multilayer body 1 by plating or the like. The plating may be either electroless plating or electrolytic plating. However, when electrolytic plating is used, electrification is selected from the parts 3a and 4a of the internal electrodes 3 and 4 by energizing from the side that becomes the external terminals 7 and 8. Thus, the protrusions 17 and 18 can be formed. Further, at this time, it is necessary to prevent the protrusion 17 attached to the internal electrode 3 and the protrusion 18 attached to the internal electrode 4 from being connected by controlling the immersion time in the plating solution. .

次に、半田ペーストをスクリーン印刷する方法や、フラックスを塗布後半田ボールを搭載する方法により、外部端子7、8となる半田を形成した後、リフロー処理を施すことにより、外部端子7、8が形成される。   Next, by forming a solder to be the external terminals 7 and 8 by a screen printing method of solder paste or by mounting a solder ball after applying a flux, the external terminals 7 and 8 are formed by applying a reflow process. It is formed.

以上のような工程を経て、図1に示すような積層セラミックコンデンサ10が製作される。   Through the above steps, the multilayer ceramic capacitor 10 as shown in FIG. 1 is manufactured.

次に本発明の他の実施形態について図2を用いて説明する。なお、上述した実施形態のコンデンサと同様の構成要素については説明を省略し、異なる点についてのみ説明するものとする。   Next, another embodiment of the present invention will be described with reference to FIG. In addition, description is abbreviate | omitted about the component similar to the capacitor | condenser of embodiment mentioned above, and only a different point shall be demonstrated.

図2は、本発明の他の実施形態に係る積層セラミックコンデンサを示す図であり、(a)は第1の内部電極が形成された誘電体層を示す平面図、(b)は第2の内部電極が形成された誘電体層を示す平面図である。図において、積層体1が4個の側面を有した直方体状を成しているとともに、内部電極3、4が積層体1の積層方向に交互に配されている複数個の第1の内部電極3と複数個の第2の内部電極4とで構成されており、積層体1の各側面には、第1の内部電極3、第2の内部電極4のいずれか一方に取着された突条17、18のみが設けられているため、誘電体層2の厚みが小さい場合、あるいは突条17、18の幅や突出高さが大きい場合も、第1の内部電極3に取着された突条17と第2の内部電極4に取着された突条18が接続することを防止できる。   2A and 2B are views showing a multilayer ceramic capacitor according to another embodiment of the present invention, wherein FIG. 2A is a plan view showing a dielectric layer on which a first internal electrode is formed, and FIG. It is a top view which shows the dielectric material layer in which the internal electrode was formed. In the figure, the laminated body 1 has a rectangular parallelepiped shape having four side surfaces, and a plurality of first internal electrodes in which the internal electrodes 3 and 4 are alternately arranged in the laminating direction of the laminated body 1. 3 and a plurality of second internal electrodes 4, and a protrusion attached to one of the first internal electrode 3 and the second internal electrode 4 on each side surface of the laminate 1. Since only the strips 17 and 18 are provided, the dielectric layer 2 is attached to the first internal electrode 3 even when the thickness of the dielectric layer 2 is small, or when the width and the projection height of the projections 17 and 18 are large. It is possible to prevent the protrusion 17 and the protrusion 18 attached to the second internal electrode 4 from being connected.

さらに、積層体1の隣り合う2個の側面のうち一方の側面に第1の内部電極3に取着された突条17のみが、他方の側面に第2の内部電極4に取着された突条18のみが設けられているため、第1の内部電極3に取着された突条17と第2の内部電極4に取着された突条18が接続することをさらに効果的に防止できる。 Furthermore, only the protrusion 17 attached to the first internal electrode 3 on one side surface of the two adjacent side surfaces of the laminate 1 was attached to the second internal electrode 4 on the other side surface. Since only the protrusion 18 is provided, it is possible to more effectively prevent the protrusion 17 attached to the first internal electrode 3 and the protrusion 18 attached to the second internal electrode 4 from being connected. it can.

また、第1の内部電極3に取着された突条17と第2の内部電極4に取着された突条18は、そのエッジ部が積層体1の隣り合う2個の側面間に形成される角部より離間して配置されているため、第1の内部電極3に取着された突条17と第2の内部電極4に取着された突条18が角部にまたがるように接続することを防止できる。   Further, the ridge 17 attached to the first internal electrode 3 and the ridge 18 attached to the second internal electrode 4 are formed between two adjacent side surfaces of the multilayer body 1 at the edge portion. Since the protrusions 17 attached to the first internal electrode 3 and the protrusions 18 attached to the second internal electrode 4 straddle the corners, the protrusions 17 are arranged away from the corners. Connection can be prevented.

次に本発明のさらに他の実施形態について図3を用いて説明する。なお、上述した実施形態のコンデンサと同様の構成要素については説明を省略し、異なる点についてのみ説明するものとする。   Next, still another embodiment of the present invention will be described with reference to FIG. In addition, description is abbreviate | omitted about the component similar to the capacitor | condenser of embodiment mentioned above, and only a different point shall be demonstrated.

図3は、本発明のさらに他の実施形態に係る積層セラミックコンデンサを示す図であり、第1及び第2の内部電極の重なり状態を示す概略図である。同図によれば、第1の内部電極3に取着された突条17は積層体1の隣り合う2個の側面に形成されるとともに、第2の内部電極4に取着された突条18は積層体1の他の隣り合う2個の側面に形成されている。これにより、中間製造工程(焼成後)で、積層体1の対向する一対の側面に特性測定用端子を形成することにより、電気特性チェックが容易にできる。   FIG. 3 is a view showing a multilayer ceramic capacitor according to still another embodiment of the present invention, and is a schematic view showing an overlapping state of first and second internal electrodes. According to the figure, the ridge 17 attached to the first internal electrode 3 is formed on two adjacent side surfaces of the multilayer body 1, and the ridge attached to the second internal electrode 4. 18 is formed on the two adjacent side surfaces of the laminate 1. Thereby, an electrical property check can be easily performed by forming the characteristic measurement terminals on the pair of opposing side surfaces of the laminate 1 in the intermediate manufacturing process (after firing).

次に本発明のさらに他の実施形態について図4を用いて説明する。なお、上述した実施形態のコンデンサと同様の構成要素については説明を省略し、異なる点についてのみ説明するものとする。   Next, still another embodiment of the present invention will be described with reference to FIG. In addition, description is abbreviate | omitted about the component similar to the capacitor | condenser of embodiment mentioned above, and only a different point shall be demonstrated.

図4は、本発明のさらに他の実施形態に係る積層セラミックコンデンサを示す図であり、積層体の外周部における内部電極の延在部及び突条を示す部分拡大図である。図によれば、突条の幅(w)及び突出高さ(h)が内部電極の厚み(t)よりも大であるため、内部電極3、4内に外部から水分などが浸入することを防止することができる。   FIG. 4 is a view showing a multilayer ceramic capacitor according to still another embodiment of the present invention, and is a partially enlarged view showing an extension portion and a protrusion of an internal electrode in an outer peripheral portion of the multilayer body. According to the figure, the width (w) and the protrusion height (h) of the ridge are larger than the thickness (t) of the internal electrode, so that moisture and the like enter the internal electrodes 3 and 4 from the outside. Can be prevented.

また、上記実施の形態では、積層体1を構成している複数個の誘電体層2は、上下方向に隣り合う誘電体層2間に積層体1の外周部に沿って内部電極3、4の存在しない領域が存在し、この領域において誘電体層2同士が直に接合されているため、誘電体層2同士の密着性が誘電体層2と内部電極3、4との密着強度より大きいことから、積層体1内部の層間剥離を防止できる。一方、内部電極3、4(延在部3a、4a)が積層体1の外周部全体に延在するようにしても良い。   Further, in the above-described embodiment, the plurality of dielectric layers 2 constituting the multilayer body 1 include the internal electrodes 3, 4 along the outer peripheral portion of the multilayer body 1 between the dielectric layers 2 adjacent in the vertical direction. In this region, the dielectric layers 2 are directly bonded to each other, so that the adhesion between the dielectric layers 2 is greater than the adhesion strength between the dielectric layer 2 and the internal electrodes 3 and 4. Therefore, delamination inside the laminate 1 can be prevented. On the other hand, the internal electrodes 3, 4 (extending portions 3 a, 4 a) may extend over the entire outer peripheral portion of the multilayer body 1.

これにより、脱バインダ性がさらに良好になるとともに、積層セラミックコンデンサ10と配線基板11の接続強度をさらに大きくすることができ、且つ内部電極3、4の重なり面積のばらつきを完全になくすことができる。 As a result, the binder removal property is further improved, the connection strength between the multilayer ceramic capacitor 10 and the wiring board 11 can be further increased, and the variation in the overlapping area of the internal electrodes 3 and 4 can be completely eliminated. .

また、積層体1が直方体状を成しているとともに、積層体1の隣り合う側面間に形成される角部に曲率半径0.05mm〜0.15mmの丸み加工が施されていることが望ましい。すなわち、曲率半径0.05mm以上の丸み加工が施されているため、ハンドリングによるクラックの発生などを防止できる。一方、曲率半径0.15mm以下の丸み加工が施されているため、精度良く突条を形成することができる。   Moreover, it is desirable that the laminated body 1 has a rectangular parallelepiped shape, and the corners formed between adjacent side surfaces of the laminated body 1 are rounded with a curvature radius of 0.05 mm to 0.15 mm. . That is, since rounding with a curvature radius of 0.05 mm or more is performed, it is possible to prevent the occurrence of cracks due to handling. On the other hand, since the rounding process with a radius of curvature of 0.15 mm or less is performed, the ridges can be formed with high accuracy.

さらに、積層体1は直方体状以外の形状であっても良い。   Furthermore, the laminated body 1 may have a shape other than a rectangular parallelepiped shape.

また、突条17、18は、金属以外のメッキでもよい。これにより、一方の側面に第1の内部電極3に取着された突条17が、他方の側面に第2の内部電極4に取着された突条18と接続しても、何ら差し支えない。   Further, the protrusions 17 and 18 may be plated other than metal. Thereby, even if the protrusion 17 attached to the first internal electrode 3 on one side is connected to the protrusion 18 attached to the second internal electrode 4 on the other side, there is no problem. .

次に本発明のさらに他の実施形態について図5乃至図7を用いて説明する。なお、上述した実施形態のコンデンサと同様の構成要素については説明を省略し、異なる点についてのみ説明するものとする。   Next, still another embodiment of the present invention will be described with reference to FIGS. In addition, description is abbreviate | omitted about the component similar to the capacitor | condenser of embodiment mentioned above, and only a different point shall be demonstrated.

図5は本発明の他の実施形態に係るコンデンサを示す図であり、(a)は第1及び第2の内部電極の重なり状態を示す概略図、(b)は配線基板上に実装した状態を示す断面図、(c)は積層体の外周部におけるダミー電極の延在部及び突条を示す部分拡大図である。   5A and 5B are diagrams showing a capacitor according to another embodiment of the present invention, in which FIG. 5A is a schematic view showing the overlapping state of the first and second internal electrodes, and FIG. 5B is a state mounted on a wiring board. (C) is the elements on larger scale which show the extension part and protrusion of the dummy electrode in the outer peripheral part of a laminated body.

かかる実施形態のコンデンサにおいては、誘電体層間2−2に、内部電極3、4と離間するダミー電極3bが配置されており、このダミー電極3bの端部を積層体1の外周部まで延在させるとともに、該延在部に積層体1の側面より外方に突出する突条17、18を取着させている。   In the capacitor of this embodiment, a dummy electrode 3b that is separated from the internal electrodes 3 and 4 is disposed between the dielectric layers 2-2, and the end of the dummy electrode 3b extends to the outer peripheral portion of the multilayer body 1. In addition, the protrusions 17 and 18 projecting outward from the side surface of the laminate 1 are attached to the extending portion.

このような実施形態のコンデンサにおいては、先に述べた実施形態と同様の効果を奏することに加え、突条をメッキにより形成する際、メッキ液が誘電体層間の内部電極3、4と接触することは殆どないことから、熱衝撃によってクラックが発生するのを有効に防止することができる利点もある。   In the capacitor of this embodiment, in addition to the same effects as those of the above-described embodiment, the plating solution contacts the internal electrodes 3 and 4 between the dielectric layers when the protrusion is formed by plating. Since there is almost nothing, there is an advantage that it is possible to effectively prevent the occurrence of cracks due to thermal shock.

またこのとき、ダミー電極3b、4bの厚みをt2、突条17、18の突出高さをh2とした場合、h2/t2>0.5の範囲にあることが望ましい。これにより、積層体1の側面に適度な大きさの凹凸を形成することができ、より効果的にコンデンサ10と配線基板11との接続強度を上げることができる。   At this time, when the thickness of the dummy electrodes 3b and 4b is t2, and the protrusion height of the protrusions 17 and 18 is h2, it is desirable that h2 / t2> 0.5. Thereby, the unevenness | corrugation of a moderate magnitude | size can be formed in the side surface of the laminated body 1, and the connection strength of the capacitor | condenser 10 and the wiring board 11 can be raised more effectively.

また図6に示す他の実施形態のコンデンサにおいては、ダミー電極3b、4bを夫々複数個に分割している。この場合、突条17、18の単位体積当たりの表面積は増大するため、積層セラミックコンデンサ10と配線基板11との接続強度をさらに向上させることができる。このとき、ダミー電極3b、4bは、(a)に示すように突条17、18が積層方向に重なるように配置したり、(b)に示すように突条17、18を積層方向にずらして配置したり、或いは、ダミー電極3b、4bの端部を積層体1の角部まで延在させるようにしても良く、これによっても、積層セラミックコンデンサ10と配線基板11との接続強度を向上させることができる。   In the capacitor of another embodiment shown in FIG. 6, the dummy electrodes 3b and 4b are each divided into a plurality of pieces. In this case, since the surface area per unit volume of the ridges 17 and 18 increases, the connection strength between the multilayer ceramic capacitor 10 and the wiring board 11 can be further improved. At this time, the dummy electrodes 3b and 4b are arranged so that the protrusions 17 and 18 overlap in the stacking direction as shown in (a), or the protrusions 17 and 18 are shifted in the stacking direction as shown in (b). Alternatively, the ends of the dummy electrodes 3b and 4b may be extended to the corners of the multilayer body 1, which also improves the connection strength between the multilayer ceramic capacitor 10 and the wiring board 11. Can be made.

更に図に示す他の実施形態のコンデンサにおいては、内部電極3、4の存在しない誘電体層2間にも、ダミー電極9を配置させている。これにより、積層体1の側面において、凹凸の形成領域を広く確保することができるため、積層セラミックコンデンサ10と配線基板11との接続強度をさらに向上させることができる。このとき、ダミー電極9の厚みを内部電極3、4の厚みと異ならせても構わない。 Furthermore, in the capacitor of another embodiment shown in FIG. 7 , dummy electrodes 9 are also arranged between the dielectric layers 2 where the internal electrodes 3 and 4 do not exist. Thereby, since the uneven | corrugated formation area can be ensured widely in the side surface of the laminated body 1, the connection strength of the multilayer ceramic capacitor 10 and the wiring board 11 can further be improved. At this time, the thickness of the dummy electrode 9 may be different from the thickness of the internal electrodes 3 and 4.

なお、本発明は以上の実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更・改良を加えることは何ら差し支えない。   In addition, this invention is not limited to the above embodiment, A various change and improvement can be added in the range which does not deviate from the summary of this invention.

例えば、積層セラミックコンデンサ10は上面が平坦な配線基板11上に搭載しても良いし、配線基板11の上面に設けられる凹部の底面に実装しても構わない。   For example, the multilayer ceramic capacitor 10 may be mounted on the wiring substrate 11 having a flat upper surface, or may be mounted on the bottom surface of a recess provided on the upper surface of the wiring substrate 11.

本発明の一実施形態に係るコンデンサを示す図であり、(a)は第1及び第2の内部電極の重なり状態を示す概略図、(b)は配線基板上に実装した状態を示す断面図である。It is a figure which shows the capacitor | condenser which concerns on one Embodiment of this invention, (a) is schematic which shows the overlapping state of the 1st and 2nd internal electrode, (b) is sectional drawing which shows the state mounted on the wiring board. It is. 本発明の他の実施形態に係るコンデンサを示す図であり、(a)は第1の内部電極が形成された誘電体層を示す平面図、(b)は第2の内部電極が形成された誘電体層を示す平面図である。It is a figure which shows the capacitor | condenser which concerns on other embodiment of this invention, (a) is a top view which shows the dielectric material layer in which the 1st internal electrode was formed, (b) was the 2nd internal electrode formed It is a top view which shows a dielectric material layer. 本発明のさらに他の実施形態に係るコンデンサを示す図であり、第1及び第2の内部電極の重なり状態を示す概略図である。It is a figure which shows the capacitor | condenser which concerns on other embodiment of this invention, and is the schematic which shows the overlapping state of the 1st and 2nd internal electrode. 本発明のさらに他の実施形態に係る積層セラミックコンデンサを示す図であり、積層体の外周部における内部電極の延在部及び突条を示す部分拡大図である。It is a figure which shows the multilayer ceramic capacitor which concerns on other embodiment of this invention, and is the elements on larger scale which show the extension part and protrusion of an internal electrode in the outer peripheral part of a laminated body. 本発明のさらに他の実施形態に係る積層セラミックコンデンサを示す図であり、(a)は第1及び第2の内部電極の重なり状態を示す概略図、(b)は配線基板上に実装した状態を示す断面図、(c)は積層体の外周部におけるダミー導体の延在部及び突条を示す部分拡大図である。It is a figure which shows the multilayer ceramic capacitor which concerns on other embodiment of this invention, (a) is the schematic which shows the overlapping state of the 1st and 2nd internal electrode, (b) is the state mounted on the wiring board. (C) is the elements on larger scale which show the extension part and protrusion of a dummy conductor in the outer peripheral part of a laminated body. 本発明のさらに他の実施形態に係る積層セラミックコンデンサを示す概略図であり、(a)突条が積層方向に重なるように配置した場合、(b)突条を積層方向にずらして配置した場合である。It is the schematic which shows the multilayer ceramic capacitor which concerns on other embodiment of this invention, (a) When arrange | positioning so that a protrusion may overlap in the lamination direction, (b) When arrange | positioning a protrusion shifting in the lamination direction It is. 本発明のさらに他の実施形態に係る積層セラミックコンデンサを示す断面図である。It is sectional drawing which shows the multilayer ceramic capacitor which concerns on other embodiment of this invention. 従来の積層セラミックコンデンサを示す図であり、(a)は平面図、(b)は配線基板上に実装した状態を示す断面図である。It is a figure which shows the conventional multilayer ceramic capacitor, (a) is a top view, (b) is sectional drawing which shows the state mounted on the wiring board.

符号の説明Explanation of symbols

10・・・積層セラミックコンデンサ
1・・・積層体
2・・・誘電体層
3、4・・・内部電極
3a、4a・・・延材部
3b、4b、9・・・ダミー電極
5、6・・・貫通導体
7、8・・・外部端子
13、14・・・非電極形成領域
17、18・・・突条
11・・・配線基板
12・・・接続パッド
15・・・導電性接着剤
16・・・樹脂材
DESCRIPTION OF SYMBOLS 10 ... Multilayer ceramic capacitor 1 ... Laminate body 2 ... Dielectric layer 3, 4 ... Internal electrode 3a, 4a ... Extended material part 3b, 4b, 9 ... Dummy electrode 5, 6 ... Penetration conductors 7, 8 ... External terminals 13, 14 ... Non-electrode forming regions 17, 18 ... Projections 11 ... Wiring substrate 12 ... Connection pads 15 ... Conductive bonding Agent 16 ... resin material

Claims (10)

複数個の誘電体層が間に第1の内部電極または第2の内部電極をそれぞれ交互に介して積層された積層体の下面に、前記第2の内部電極とは第2の非電極形成領域によって隔てられ、前記第1の内部電極同士を接続している複数の第1の貫通導体と、前記第1の内部電極とは第1の非電極形成領域によって隔てられ、前記第2の内部電極同士を接続している複数の第2の貫通導体とが複数の前記誘電体層を厚み方向に貫通して露出しているとともに、前記第1の貫通導体および前記第2の貫通導体にそれぞれ電気的に接続された複数個の第1の外部端子および第2の外部端子が設けられてなるコンデンサであって、
前記第1の内部電極および前記第2の内部電極は外周部のうち少なくとも一部に前記積層体の外周部まで延在している延在部を有するとともに、該延在部に前記積層体の側面より外方に突出する突条が取着されており、該突条は前記積層体の積層方向に並んで複数設けられていることを特徴とするコンデンサ。
A second non-electrode-forming region is formed on the lower surface of the laminate in which a plurality of dielectric layers are alternately laminated with the first internal electrodes or the second internal electrodes interposed therebetween. The plurality of first through conductors that are connected to each other by the first internal electrodes and the first internal electrodes are separated by a first non-electrode forming region, and the second internal electrodes A plurality of second through conductors connected to each other penetrate through the plurality of dielectric layers in the thickness direction and are exposed to the first through conductor and the second through conductor, respectively. A capacitor provided with a plurality of first external terminals and second external terminals connected to each other,
The first internal electrode and the second internal electrode have at least a portion of the outer peripheral portion extending to the outer peripheral portion of the laminate, and the extension portion The capacitor | condenser which protrudes outward from a side surface is attached, and this protrusion is provided with two or more along with the lamination direction of the said laminated body .
前記突条がメッキにより形成されていることを特徴とする請求項1に記載のコンデンサ。   The capacitor according to claim 1, wherein the protrusion is formed by plating. 前記積層体が4個の側面を有した直方体状であるとともに、前記積層体の側面には、前記第1の内部電極および前記第2の内部電極のいずれか一方に取着された前記突条のみが設けられていることを特徴とする請求項2に記載のコンデンサ。   The laminate has a rectangular parallelepiped shape having four side surfaces, and the protrusions attached to either the first internal electrode or the second internal electrode on the side surface of the laminate. The capacitor according to claim 2, wherein only the capacitor is provided. 前記積層体の隣り合う2個の側面のうち一方の側面に前記第1の内部電極に取着された前記突条のみが、他方の側面に前記第2の内部電極に取着された前記突条のみが設けられていることを特徴とする請求項3に記載のコンデンサ。   Only the protrusions attached to the first internal electrode on one side surface of two adjacent side surfaces of the laminated body, and the protrusion attached to the second internal electrode on the other side surface. The capacitor according to claim 3, wherein only a strip is provided. 前記第1の内部電極に取着された前記突条と前記第2の内部電極に取着された前記突条とは、それらのエッジ部が前記積層体の隣り合う2個の側面間に形成される角部より離間して配置されていることを特徴とする請求項4に記載のコンデンサ。   The protrusions attached to the first internal electrode and the protrusions attached to the second internal electrode have their edge portions formed between two adjacent side surfaces of the laminate. The capacitor according to claim 4, wherein the capacitor is arranged so as to be spaced apart from a corner portion. 前記積層体を構成している複数個の前記誘電体層は、上下方向に隣り合う前記誘電体層間に前記積層体の外周部に沿って前記第1の内部電極および前記第2の内部電極の存在しない領域が存在し、該領域において前記誘電体層同士が直に接合されていることを特徴とする請求項1乃至請求項5のいずれかに記載のコンデンサ。   The plurality of dielectric layers constituting the multilayer body are arranged between the first internal electrode and the second internal electrode along the outer periphery of the multilayer body between the dielectric layers adjacent in the vertical direction. 6. The capacitor according to claim 1, wherein a region that does not exist is present, and the dielectric layers are directly bonded to each other in the region. 複数個の誘電体層が間に第1の内部電極または第2の内部電極をそれぞれ交互に介して
積層された積層体の下面に、前記第2の内部電極とは第2の非電極形成領域によって隔てられ、前記第1の内部電極同士を接続している複数の第1の貫通導体と、前記第1の内部電極とは第1の非電極形成領域によって隔てられ、前記第2の内部電極同士を接続している複数の第2の貫通導体とが複数の前記誘電体層の厚み方向に貫通して露出しているとともに、前記第1の貫通導体および前記第2の貫通導体にそれぞれ電気的に接続された複数個の第1の外部端子および第2の外部端子が設けられてなるコンデンサであって、
前記誘電体層間に、前記第1の内部電極または前記第2の内部電極とは離間して配置されたダミー電極が介在しているとともに、該ダミー電極は端部が前記積層体の外周部まで延在している延出部を有しており、該延在部に前記積層体の側面より外方に突出する突条が取着されており、該突条は前記積層体の積層方向に並んで複数設けられていることを特徴とするコンデンサ。
A second non-electrode-forming region is formed on the lower surface of the laminate in which a plurality of dielectric layers are alternately laminated with the first internal electrodes or the second internal electrodes interposed therebetween. The plurality of first through conductors that are connected to each other by the first internal electrodes are separated from the first internal electrodes by a first non-electrode forming region, and the second internal electrodes A plurality of second through conductors connected to each other are exposed through the plurality of dielectric layers in the thickness direction, and are electrically connected to the first through conductor and the second through conductor, respectively. A capacitor provided with a plurality of first external terminals and second external terminals connected to each other,
Between the dielectric layers, a dummy electrode arranged to be spaced apart from the first internal electrode or the second internal electrode is interposed, and the end of the dummy electrode extends to the outer peripheral portion of the multilayer body. And a protrusion that protrudes outward from a side surface of the laminate is attached to the extension, and the protrusion extends in the stacking direction of the laminate. A capacitor characterized in that a plurality of capacitors are provided side by side .
前記突条の幅(w)および突出高さ(h)が前記第1の内部電極および前記第2の内部電極の厚み(t)よりも大であることを特徴とする請求項1乃至請求項7のいずれかに記載のコンデンサ。   The width (w) and the protruding height (h) of the ridge are larger than the thickness (t) of the first internal electrode and the second internal electrode. 8. The capacitor according to any one of 7. 前記積層体が直方体状であるとともに、該積層体の隣り合う側面間に形成される角部に曲率半径0.05mm〜0.15mmの丸み加工が施されていることを特徴とする請求項1乃至請求項8のいずれかに記載のコンデンサ。   The laminated body has a rectangular parallelepiped shape, and a corner portion formed between adjacent side surfaces of the laminated body is rounded with a curvature radius of 0.05 mm to 0.15 mm. The capacitor according to claim 8. 請求項1乃至請求項9のいずれかに記載のコンデンサを配線基板上に載置するとともに、前記コンデンサの前記第1の外部端子および前記第2の外部端子を前記配線基板の接続パッドに導電性接着剤を介して電気的に接続してなるコンデンサの実装構造であって、
前記コンデンサと前記配線基板との間に形成される間隙を樹脂材で封止するとともに、該樹脂材の一部を、前記突条が被覆されるようにして前記コンデンサの側面に対し被着させたことを特徴とするコンデンサの実装構造。
The capacitor according to any one of claims 1 to 9 is placed on a wiring board, and the first external terminal and the second external terminal of the capacitor are electrically connected to a connection pad of the wiring board. A capacitor mounting structure that is electrically connected via an adhesive,
A gap formed between the capacitor and the wiring board is sealed with a resin material, and a part of the resin material is attached to the side surface of the capacitor so that the protrusion is covered. Capacitor mounting structure characterized by that.
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JP2003022932A (en) * 2001-07-10 2003-01-24 Murata Mfg Co Ltd Through-type three-terminal electronic component

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