JP4623074B2 - Game machine - Google Patents

Description

  The present invention relates to gaming machines represented by pachinko machines and slot machines.

  Conventionally, for example, a pachinko machine has a display device capable of variably displaying a plurality of types of symbols, and is configured to start variably displaying based on a ball that has been driven into the game area winning a symbol operating opening. Has been. And in a certain kind of pachinko machine, when this variation display matches a predetermined symbol combination, it becomes a big hit and a predetermined game value is given to the player.

In the above-exemplified gaming machines and the like, there is a risk that fraudulent acts such as generating a big hit with a so-called “hanging board” or the like may be performed.
The present invention has been made to solve the above illustrated problem or the like, and aims to provide a game machine capable of preventing abuse by "hanging board" or the like.

Gaming machine of claim 1, wherein in order to achieve the object, reads the random number counter, and the random number counter updating means for updating the value of the random number counter within a predetermined range, the value of the random number counter by a predetermined trigger And a control means for giving a predetermined game value to the player when the value of the random number counter read by the reading means matches a predetermined value. The value of the random number counter makes one round by being updated a predetermined number of times by the random number counter updating unit, and the random number counter updating unit sets any value within the predetermined range when a predetermined condition is satisfied. An initial value for updating the next round as an initial value for updating, and the control means changes an initial value for updating the random number counter updating means every time the predetermined condition is satisfied. And an initial value generating means for generating the initial value in the same range as the predetermined range, and a holding storage means capable of holding stored contents even after the gaming machine is turned off, and is periodically executed. Periodic processing and non-periodic predetermined processing can be executed, and the initial value generating means uses the initial value in a register included in an arithmetic means that executes an operation without using the holding storage means. The update process of the value is executed with one instruction, and the update process of the initial value is performed in the regular process and the predetermined process, the random number counter update process by the random number counter update unit, and the random number counter by the read unit The reading process of the value is performed in the regular process, and before the reading process of the value of the random number counter by the first reading means after the power-on of the gaming machine is performed, A random number counter updating process is performed by a number counter updating unit, and the control unit writes the initial value stored in the register when the power of the gaming machine is turned off by the holding storage unit Have
A gaming machine according to a second aspect is the gaming machine according to the first aspect, wherein the update process is an addition process.
A gaming machine according to a third aspect is the gaming machine according to the first aspect, wherein the update process is a subtraction process.
A gaming machine according to claim 4 is the gaming machine according to any one of claims 1 to 3, wherein the gaming machine is a pachinko gaming machine.

According to the gaming machine of the present invention, it is possible to prevent an illegal act caused by a “hanging board” or the like.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. In this embodiment, a pachinko machine that is a kind of a ball game machine, in particular, a first type pachinko game machine will be described as an example of the game machine. Note that it is naturally possible to use the present invention for the third kind pachinko gaming machine and other gaming machines.

  FIG. 1 is a front view of a game board of a pachinko machine P according to the present embodiment. Around the game board 1, there are provided a plurality of winning holes 2 through which a predetermined number of balls are paid out when a ball is won. A liquid crystal display (hereinafter simply referred to as “LCD”) 3 for displaying a plurality of types of identification information (special symbols) and the like is provided at the center of the game board 1. The display screen of the LCD 3 is divided into three in the vertical direction. In each of the three divided display areas, a variable display of symbols is performed while scrolling in the vertical direction from top to bottom.

  Above the LCD 3, a normal symbol display device 6 composed of two LEDs 6 a and 6 b with normal symbols “O” and “X” displayed on the surface is disposed. In this normal symbol display device 6, when the ball that has been driven into the game area passes through the gates 7 arranged on both sides of the LCD 3, the fluctuations in which the LEDs 6 a and 6 b of “◯” and “×” are alternately lit. Display is performed. When the change display is terminated with the “◯” LED 6a, the ordinary electric accessory 4 is opened for a predetermined time (for example, 0.5 seconds).

  Also, a symbol operating port (first type starting port, ordinary electric accessory) 4 is provided below the LCD 3, and when the ball is awarded to the symbol operating port 4, the variation display of the LCD 3 is displayed. Be started. Below the symbol operating port 4, a specific winning port (large winning port) 5 is provided. The specific winning a prize opening 5 is a big hit when the display result after the fluctuation of the LCD 3 matches one of the predetermined symbol combinations, and a predetermined time (for example, 30 seconds elapses) so that the ball is easy to win. (Or until 10 balls are won).

  A V zone 5a is provided in the specific winning opening 5, and when the ball passes through the V zone 5a while the specific winning opening 5 is opened, a continuation right is established and the specific winning opening 5 is closed. Thereafter, the specific winning opening 5 is opened again for a predetermined time (or until a predetermined number of balls win the specific winning opening 5). The opening / closing operation of the specific winning opening 5 can be repeated up to 16 times (16 rounds), and the state in which the opening / closing operation can be performed is a state in which a so-called predetermined game value is given (special game state). is there.

  Note that a state in which a predetermined game value is given in the third type pachinko gaming machine (special game state) is specified when the display result after the change of the LCD 3 matches one of the predetermined symbol combinations. It means that the winning opening is opened for a predetermined time. When the ball wins into the specific winning opening while the specific winning opening is opened, a large winning opening provided separately from the specific winning opening is opened a predetermined number of times for a predetermined time.

  FIG. 2 is a block diagram showing an electrical configuration of the pachinko machine P. As shown in FIG. On the main control board C of the pachinko machine P, an MPU 11 as a one-chip microcomputer which is an arithmetic unit is mounted. Details of the MPU 11 will be described later with reference to FIG.

  As shown in FIG. 2, the MPU 11 includes a payout control board H that performs payout control of prize balls and rental balls by the payout motor 17, and a display control board D that controls the above-described variation display of special symbols and normal symbols. The first type start port switch 20 and other input / output devices 21 are connected to the first type start port switch 20. The display control board D is connected to an audio lamp control board S that controls the output of sound effects from the speaker 18 and controls the lighting of LEDs and various lamps 19, and is transmitted from the MPU 11 of the main control board C. The operation of the sound lamp control board S is controlled based on the command.

  The first type start port switch 20 is a switch for detecting a winning ball in the symbol operating port (first type starting port) 4 (see FIG. 1), and is provided in the vicinity of the symbol operating port 4. When a ball is detected by the first type start port switch 20, the payout motor 17 is operated and five prize balls are paid out by a payout device (not shown). If a ball is detected by the first type start port switch 20, the value of the random number counter 54b (see FIG. 3) is acquired, and the acquired value is written in a predetermined area of the user work RAM 54. Remembered.

  The power supply board 30 includes a power supply part 30a for supplying power to each part of the pachinko machine P, a power failure monitoring circuit 30b, and a clear switch 30c. The power failure monitoring circuit 30b is a circuit for outputting a power failure signal 31 to the NMI terminal of the MPU 11 of the main control board C when the power is cut off due to the occurrence of a power failure or the like. The power failure monitoring circuit 30b monitors the voltage of 24 VDC, which is the largest voltage output from the power supply unit 30a, and determines that a power failure (power failure) has occurred when this voltage is less than 22 volts. The power failure signal 31 is output to the main control board C and the payout control board H. Based on the output of the power failure signal 31, the main control board C and the payout control board H recognize the occurrence of the power failure and execute the power failure process (NMI interrupt process in FIG. 4 in the case of the main control board C). The power supply unit 30a normally outputs the output of 5 volts, which is the drive voltage of the control system, for a time sufficient for the execution of the power failure process even after the DC stable voltage of 24 volts becomes less than 22 volts. Since it is configured to maintain the value, the main control board C and the payout control board H can normally execute the power failure process.

  The clear switch 30c is a switch for clearing data backed up in the user work RAM 54 of the main control board C and the RAM (not shown) of the payout control board H, and is configured as a push button type switch. . When the power of the pachinko machine P is turned on while the clear switch 30c is pressed (including power-on due to power failure cancellation), clear signals 32 are output to the main control board C and the payout control board H, respectively. In response to the signal 32, the data in each user work RAM 54 is cleared. In this case, since the value of the random number counter 54b is cleared, the initial value of the update of the random number counter 54b is determined by using the value (unique code) of the unique code memory 64a stored in the ID RAM 64. A different value is set for each.

  Next, the MPU 11 as a one-chip microcomputer mounted on the main control board C will be described with reference to FIG. FIG. 3 is a block diagram showing an electrical configuration of the MPU 11. As shown in the figure, the MPU 11 is provided with a central processing unit (CPU) 51, a program ROM 52, an HW parameter 53, a user work RAM 54, an internal I / O block 55, an I / O port 56, and the like. These are connected to each other by a bus 57. These are connected to the management block 59 via the bus monitor 58. The CPU 51 includes an accumulator (Acc), B, C, D, E, H, and L registers, IX and IY 16-bit index registers, a flag register, and the like (see FIG. 3). , Only the IY register 51a is shown).

  In the present embodiment, the program ROM 52 is constituted by a one-time writing type EPROM, in which a predetermined control program and initial data are stored in advance. The programs of the flowcharts shown in FIGS. 4 to 9 are stored in the program ROM 52 as a part of the control program. The CPU 51 executes various arithmetic processes according to a control program of the program ROM 52 based on various signals input via the I / O port 56. The HW parameter 53 is configured by an EEPROM which is a rewritable nonvolatile memory, and stores various setting items regarding a clock and the like.

  The user work RAM 54 temporarily stores various data such as calculation results by the CPU 51, and includes a backup area 54a, a random number counter 54b, and a current initial value memory 54c. Further, even after the pachinko machine P is powered off, the user work RAM 54 is supplied with a backup voltage from a power supply board 30 to be described later, so that data can be held (backed up). In addition, you may comprise so that the data of the user work RAM 54 may be backed up using a capacitor | condenser, a battery, etc.

  In the backup area 54a, when the power is cut off due to the occurrence of a power failure or the like, the power of the pachinko machine P is restored to the state before the power is turned off when the power is turned on again. This is an area for storing stack pointers, values of registers, I / O, and the like. The value of the IY register 51a is also stored in this backup area when the power is turned off. The writing to the backup area 54a is executed when the power is turned off by the NMI interrupt process (see FIG. 4). Conversely, the restoration of each value written to the backup area 54a is performed when the power is turned on (the power is turned on by eliminating the power failure). The same is performed in the initialization process (see FIG. 5). Note that a power failure signal 31 output from a power failure monitoring circuit 30b, which will be described later, is input to an NMI (Non Maskable Interrupt) terminal (non-maskable interrupt terminal) of the MPU 11 when a power failure occurs due to the occurrence of a power failure or the like. When a power failure occurs, the power failure process (NMI interrupt process) in FIG. 4 is immediately executed.

  The random number counter 54b is a counter for determining the occurrence of a jackpot, and is updated in the addition direction by 1 count every 2 ms in the range of “0” to “629” by a random number update process (see FIG. 9) described later. The The value of the random number counter 54b is acquired when a ball that has been driven into the game board 1 wins the symbol operation port 4 and is detected by a first type start port switch 20 described later (at the time of start winning). When the acquired value of the random number counter 54b is, for example, “7” or “315”, a jackpot is generated. When the jackpot occurs, a jackpot command is transmitted from the main control board C to the display control board D, which will be described later, and the display control board D performs the variable display of the LCD 3 and the control of the sound lamp control board S based on the jackpot command. I do.

  Note that, as described above, the value of the random number counter 54b is held (backed up) even after the power is turned off by the backup voltage supplied from the power supply substrate 30. Therefore, when the power is turned on, the update of the random number counter 54b can be restarted from the backed up value, so that the initial value of the update of the random number counter 54b is prevented from becoming a fixed value, and the randomness of the random number counter 54b is determined. Can be secured.

  On the other hand, when the value of the random number counter 54b is not properly held due to a backup failure or the like, or when the value of the random number counter 54b is cleared by pressing the clear switch 30c, the RAM clear and initialization process shown in FIG. In FIG. 5, a different initial value is generated for each pachinko machine using a value of a unique code memory 64a described later. Therefore, even when the value of the random number counter 54b is cleared, the random value of the random number counter 54b is reduced by avoiding that the initial value of the update of the random number counter 54b becomes a fixed value such as “0”. Can be prevented. For example, for an illegal act that illegally clears the value of the random number counter 54b and unfairly generates a jackpot, the initial value of the update of the random number counter 54b after clearing can be made different for each pachinko machine. Such an illegal act can be suppressed by making it difficult to grasp the initial value.

  Note that the random value (initial value) generated based on the value of the unique code memory 64a is used only as the initial value of the first cycle (first) update after the value of the random number counter 54b is cleared. The value of the IY register 51a is used as the initial value of the update after the second cycle.

  The current initial value memory 54c is a memory for storing the initial value of the random number counter 54b being updated. The IY register 51a of the CPU 51 is a memory (register for storing the initial value of the next update of the random number counter 54b. ). In the current initial value memory 54c and the IY register 51a, the same range of “0” to “629” as the update range of the random number counter 54b is set to a value within the proper update range. The IY register 51a is updated not only in the INT interrupt process (see FIG. 8) but also in the main process (see FIG. 5). In the main process, the count is incremented by 1 without considering an appropriate update range. Since the IY register 51a is corrected to a value within the proper update range in the random number update process (S52, see FIG. 9) of the INT interrupt process, the IY register 51a is set to the initial value of the next update of the random number counter 54b. Used as. The update of the IY register 51a is repeatedly executed in the process of S21 of the main process. Such processing is executed in the remaining time of control of the INT interrupt processing that is periodically executed. Since the remaining time is an indefinite time that changes according to the state of the game, the value of the IY register 51a is updated at random. Therefore, by using the value of the IY register 51a as the initial value for updating the random number counter 54b, the initial value for updating the random number counter 54b can be randomly changed.

  The internal I / O block 55 includes functional blocks such as a counter / timer, an interrupt controller, and a high-speed HW counter. The bus monitor 58 manages input / output of data, and the bus monitor 58 outputs operation data and the like of the CPU 51 to the management block 59, and the contents of the management block 59 (for example, the specific code memory 64a). Value) is output to the user work RAM 54 or the like in response to a request from the CPU 51.

  The management block 59 constitutes an independent storage unit, and includes an inspection port 61, a mirrored RAM 62, a status RAM 63, an ID RAM 64, and the like. The inspection port 61 can detect write errors, sequence abnormalities, and the like, and the mirrored RAM 62 mirrors (copies) data in the user work RAM 54. In addition, the setting items of the HW parameter 53 and the like are written in the status RAM 63.

  The ID RAM 64 is provided with a unique code memory 64a, and a value (unique code) as an identification number (identification information) unique to the MPU 11 (that is, unique to the pachinko machine) is written in the unique code memory 64a. It is. The value of the unique code memory 64a plays a role as security information of the pachinko machine P, and is configured with a unique number that is different for each MPU. A modular jack (not shown) can be connected to the inspection port 61 of the MPU 11, and a checker (not shown) can be connected to the MPU 11 through this modular jack. Therefore, since the value of the unique code memory 64a can be read from the outside to verify the authenticity, the security check of the MPU 11 can be performed. Accordingly, it is possible to suppress an illegal act such as illegally rewriting the value or the like of the unique code memory 64a or replacing the MPU 11 with an illegal MPU.

  The value (unique code) of the unique code memory 64a is read in the RAM clearing and initializing process of FIG. 6, and used when generating an initial value for updating the random number counter 54b. As described above, since the value of the unique code memory 64a is composed of a unique number that is different for each pachinko machine, the initial value of the update of the random number counter 54b generated using the value of the unique code memory 64a. Becomes an indefinite value that differs for each pachinko machine, and as a result, it is possible to suppress fraudulent acts such as unduly reducing the randomness of the random number counter 54b and generating a jackpot. The ID RAM 64 is provided with a memory (not shown) for storing the manufacturer code, model code, etc. of the pachinko machine P in addition to the unique code memory 64a.

  Next, each process executed by the pachinko machine P configured as described above will be described with reference to the flowcharts of FIGS. FIG. 4 is a flowchart showing an NMI interrupt process executed by the main control board C when the power of the pachinko machine P is cut off due to the occurrence of a power failure or the like. By this NMI interruption process, the state of the main control board C when the power is cut off due to the occurrence of a power failure or the like is stored in the backup area 54a.

  When the power of the pachinko machine P is cut off due to the occurrence of a power failure or the like, a power failure signal 31 is output from the power failure monitoring circuit 30b to the NMI (Non Maskable Interrupt) terminal of the MPU 11 of the main control board C. Then, the MPU 11 interrupts the control being executed and starts the NMI interrupt process of FIG. Power is supplied from the power supply unit 30a of the power supply board 30 so that the processing of the main control board C can be executed for a predetermined time after the power failure signal 31 is output, and the NMI interrupt processing is executed within this predetermined time. Is done.

  In the NMI interrupt processing, first, the values of each register and I / O are written to the stack area (S1), and then the value of the stack pointer is written to the backup area 54a and saved (S2). Further, the power failure occurrence information is written in the backup area 54a (S3), and the state when the power is cut off due to the occurrence of a power failure or the like is stored. Thereafter, after other power failure processing is executed (S4), the processing is looped until the power is completely cut off and the processing cannot be executed.

  FIG. 5 is a flowchart of a main process executed on the main control board C when the pachinko machine P is turned on. In the main process, if the backup is valid, each data stored in the backup area 54a is returned to the original state, and the game control is continued from the state before the power is turned off. On the other hand, if the backup is not valid, or if the clear switch 30c is pressed when the power is turned on even if the backup is valid, the RAM clearing and initialization process (S18) is executed, and the pachinko machine P is initialize.

  First, interrupts are prohibited (S11), and a stack pointer is set (S12). It is confirmed whether or not the clear switch 30c is turned on (S13). If it is not turned on (S13: No), it is confirmed whether or not the backup is valid (S14). This confirmation is determined by whether or not the keyword written in the predetermined area of the user work RAM 54 is correctly stored. If the keyword is stored correctly, the backup is valid. On the other hand, if the keyword is not correct, the backup data is destroyed, so the backup is not valid. If the backup is valid (S14: Yes), the process proceeds to S15, and each state of the main control board C is returned to the state before the power is turned off. That is, the value of the stack pointer is read from the backup area 54a and written to the stack pointer to return to the state before the power interruption (before the power failure), that is, the state before the occurrence of the NMI interrupt (S15). Next, data such as each register and I / O saved in the stack area after returning the value of the stack pointer, that is, the backup area 54a is read from the backup area 54a, and each data is read from the original register and I / O. Write to O etc. (S16), and then the interrupt state is stored in the state of FIG. 4 executed at the time of the power failure before the power interruption (before the power failure), that is, the state before the occurrence of the NMI interrupt Return (S17), an NMI interrupt return is executed to return to the place where the process was executed before the power was turned off, and the control is continued from the state before the power was turned off.

  On the other hand, if the clear switch 30c is turned on (S13: Yes) or the backup is not valid (S14: No), RAM clear and initialization processing is executed (S18). After that, each interrupt such as a timer interrupt is set (S19), the interrupt is allowed to be generated, and the interrupt is permitted (S20). After permitting the interrupt, the processes of S21 and S22 are repeatedly executed between executions of the INT interrupt process of FIG. 8 (remaining time of execution of the INT interrupt process).

  The process of S21 is an increment process (S21) of the IY register 51a, and the value of the IY register 51a is incremented by “+1” each time this process is executed. Since the process of S21 is executed by one instruction of the MPU 11, no other interrupt process such as an INT interrupt process is executed during the execution. Therefore, the update of the value (count value) of the IY register 51a by the process of S21 can be completed without being interrupted. In addition, the update is performed by moving the value of the IY register 51a to another register (except for those outside the category of software control such as ALU) or memory, and then updating the value of the IY register 51a. This value is not returned to the IY register 51a to complete the update. In this respect, the value of the IY register 51a is appropriately updated even if the update process of the IY register 51a is performed in parallel. can do. The IY register 51a is a 16-bit register. Therefore, when the process of S21 is executed in a state where the value of the IY register 51a is “0FFFFh”, the value of the IY register 51a becomes “0”.

Here, the IY register 51a is used as a register for storing an initial value for updating the random number counter 54b for determining the jackpot (used as a counter for counting the initial value for updating the random number counter 54b). The other random process (S22) is an update process for imparting randomness to predetermined data in controlling the game. As described above, since these processes are repeatedly executed using an indefinite time during which no interrupt is executed, the data to be subjected to these processes has a random value as a result. Thus, by repeatedly executing the processes of S2 1 and S2 2, the initial value of the update of the random number counter and the like can be a random value.

  Since the random number counter 54b of this embodiment is updated in the range of “0 to 629”, the value of the IY register 51a is updated to “629” which is the maximum value by executing the INT interrupt process. Also, the shortest execution time of the INT interrupt process and the total shortest of S21 and S22 are executed so that the next INT interrupt process is executed before the value of the IY register 51a is updated to “0” by the process of S21. The execution interval of the INT interrupt process is determined based on the execution time. In other words, this implementation is performed so that the next INT interrupt processing is executed at the latest until 64906 times of the processing of S21 and S22 are executed from “629” to “0FFFFh (= 65535)”. In the example, the execution interval of the INT interrupt process is 2 ms. With this configuration, even if the value of the IY register 51a is repeatedly updated by “+1” without checking the update range, the IY register correction process (see FIG. 7) executed in the INT interrupt process is performed. The value can be corrected to a value within an appropriate update range. Therefore, the update of the IY register 51a in the main process can be used effectively without making it meaningless.

  FIG. 6 is a flowchart showing the RAM clear and initialization process (S18) executed in the main process of the main control board C. This process initializes the values of the user work RAM 54 and each I / O, and generates an initial value for updating the random number counter 54b by using the value (unique code) of the unique code memory 64a. This is a process for generating an initial value for updating 54b of a random number counter that is different for each.

  In this RAM clearing and initialization process, first, each value in the user work RAM 54 is cleared to “0”, and initial values such as the user work RAM 54 and each I / O are set (S31). Here, in the conventional pachinko machine, since the update of the random number counter is started with the cleared value of “0” as the initial value, the initial value of the update becomes a fixed value (here, “0”), and the random number The randomness of the counter was reduced. Therefore, in the pachinko machine P according to the present embodiment, an initial value for updating the random number counter 54b is randomly generated by the process described below, and the randomness of the random number counter 54b is prevented from being lowered.

  That is, after the processing of S31, first, the value of the unique code memory 64a of the ID RAM 64 is read (S32), and the read value is written to the IY register 51a (S33). Since the value of the unique code memory 64a is a unique number unique to the MPU 11 as described above, in S33, a different value is written to the IY register 51a for every pachinko machine even in the same model. . When the value of the unique code memory 64a is composed of 2 bytes or more, in this embodiment, the lower 2 bytes of data are written to the IY register 51a, but the value of the unique code memory 64a of 2 bytes or more is 2 bytes. The processed value may be written into the IY register 51a. Further, it may be configured to write 2-byte data other than the lower order to the IY register 51a.

  Next, by the IY register correction process (S34) shown in FIG. 7, the value of the IY register 51a is processed (corrected) into a value within the appropriate update range of the random number counter 54b (in this embodiment, “0 to 629”). This is because the data written to the IY register 51a is not necessarily data within the proper update range of the random number counter 54b.

  As shown in FIG. 7, in the IY register correction process, first, it is confirmed whether or not the value of the IY register 51a is equal to or less than “629” which is the maximum value of the appropriate update range (S41). If the value of the IY register 51a is “630” or more (S41: No), the value exceeds the value of the appropriate update range of the random number counter 54b. In this case, the value is updated from the value of the IY register 51a. “630” which is the maximum value of the range + 1 is subtracted (S42). If the value of the IY register 51a is equal to or less than “629” as a result of the subtraction (S41: Yes), the correction of the value of the IY register 51a is finished, and this IY register correction process is finished. On the other hand, if the value of the IY register 51a is still “630” or more after subtraction (S41: No), the subtraction process of “630” is performed from that value until the value of the IY register 51a becomes “629” or less. repeat. As described above, the value of the IY register 51a is corrected to a value within the appropriate update range of the random number counter 54b (“0 to 629” in this embodiment) by the IY register correction process (S34).

  Returning to FIG. When the value of the IY register 51a becomes within a proper update range by the IY register correction processing, the value of the IY register 51a is written into the random number counter 54b and the current initial value memory 54c (S35, S36), and the random number counter 54b. And an initial value for updating the current initial value memory 54c. The random number counter 54b uses the value set by the process of S35 as an initial value for updating, and starts updating the first period by a random number updating process (S52, see FIG. 9) described later.

  As described above, a random value generated by processing (correcting) the value of the unique code memory 64a (that is, the value written in the IY register 51a) is set as the initial value for updating the random number counter 54b. . When the value of the random number counter 54b is not properly held due to a backup failure or the like, or when the value of the random number counter 54b is cleared by pressing the clear switch 30c, the random number counter 54b is generated from the randomly generated initial value. Thus, the update of the random number counter 54b can be avoided from being started from a fixed value such as “0”, and the decrease in the randomness of the random number counter 54b can be suppressed.

Here, for example, the main control board C and the other substrate (e.g., a power supply substrate 30) between such incorrect substrate (e.g., a so-called "under bra up board" or the like) is attached to, illegally from the substrate An illegal act of outputting the generated signal (for example, the power failure signal 31) to the main control board C can be considered. For example, if the power failure signal generated improperly is continuously output to the main control board C to cause frequent power failure processing, the main control board C (MPU 11) cannot normally execute the power failure processing. The gaming state is initialized (the user work RAM 54 is initialized). By doing so, the update of the random number counter 54b is started from a fixed value such as “0”, and the randomness of the random number counter 54b is unduly lowered.

  However, according to the gaming machine P of the present embodiment, the initial value of the update of the random number counter 54b is generated based on the value (unique code) of the unique code memory 64a, and therefore, a random value that is different for each pachinko machine. is there. Therefore, even if a person who performs a fraud (illegal board) illegally generates the detection signal of the first type start port switch 20 and tries to output the detection signal generated illegally at the jackpot timing, the random number counter 54b Since the value of can not be grasped, the jackpot cannot be generated illegally. Therefore, it is possible to prevent an illegal act such as unreasonably generating a big hit with a so-called “hanging board” or the like.

  It is to be noted that the pachinko machine P is obtained illegally, the value (unique code) of the unique code memory 64a of the MPU 11 provided in the pachinko machine P is decoded, and the control program stored in the program ROM 52 is analyzed to generate a random number. The initial value of the update of the counter 54b can be acquired (understood). However, the initial value of the update of the randomly acquired random number counter 54b is a value generated only in the acquired pachinko machine P itself, and is different from that in other pachinko machines (because the unique code is different for each pachinko machine). An initial value is generated. Therefore, even in the same model of pachinko machines, fraudulent acts cannot be performed unless the unique code is individually decoded for each pachinko machine, and as a result, such illegal acts can be made extremely difficult. is there.

  FIG. 8 is a flowchart of interval interrupt processing (INT interrupt processing) that is executed periodically (for example, every 2 ms) in the main control board C of the pachinko machine P. The main control of the pachinko machine P is executed by this INT interrupt process. In the INT interrupt processing, first, the command and other data created in the previous INT interrupt processing is output to each port by special symbol variation processing (S59) and display / lamp / sound effect data creation processing (S61). The port output process is executed (S51).

  Next, a random number update process (S52, which will be described later with reference to FIG. 9) for updating the value of the random number counter 54b for determining the jackpot by “+1” is executed, and a storage timer subtraction process is executed (S53). . The storage timer subtraction process shortens the time for symbol variation display when there is a predetermined number or more of reserved balls for jackpot determination and the symbol variation display is being performed on the LCD 3. In the switch monitoring process (S54), depending on the state of each read switch, a ball that has been struck into the game area is awarded to the prize winning port 2, the grand prize winning port 5, the symbol operating port 4, the passing to the gate 7, etc. The process regarding is performed. In the symbol counter updating process (S55), a counter updating process for determining a symbol to be stopped and displayed as a result of the variable display performed on the LCD 3 is performed. In the symbol check process (S56), based on the counter value updated in the symbol counter update process (S55), the jackpot symbol, the off symbol, and the reach symbol used in the special symbol variation process (S59). Etc. are determined.

  In the normal symbol variation process (S57), the normal symbol display device 6 composed of the two LEDs 6a and 6b of “◯” and “×” is subjected to variation display. As a result of the variation display, the “6” LED 6a is displayed. When the variable display is finished, a hit process is performed in which the normal electric accessory (symbol operating port) 4 is opened for a predetermined time (for example, 0.5 seconds). After that, the state flag is checked (S58), and if the special symbol variation start or variation display is in progress on the LCD 3 (S58: during symbol variation), the ball passes the symbol operation port 4 by the special symbol variation processing (S59). On the basis of the value of the random number counter 54b read at the timing, a determination is made as to whether or not it is a big hit, and a special symbol variation process is executed in the LCD 3. On the other hand, if the result of checking the status flag is a big hit (S58: big hit), a big hit process (S60) such as opening the big prize opening 5 is executed. Further, as a result of checking the status flag, if the special symbol is not fluctuating or big hit (S58: other), the processing of S59 and S60 is skipped, and the process proceeds to the display / lamp / sound effect data creation processing of S61.

  In the display / lamp / sound effect data creation process (S61), in addition to the special symbol variation display, demo data displayed on the LCD 3, display data of the two LEDs 6a and 6b of the normal symbol display device 6, and a holding ball lamp are included. Various kinds of lamp data, sound effect data according to the game situation, etc. are created. These display data, lamp data, and sound effect data are output to the display control board D as command data by the port output process (S51). In the display control board D, the command data is decoded and used for the display control of the LCD 3 and the normal symbol display device 6, and the command data for the voice lamp control board S is created, and this is used as the voice lamp control board. Output to S to control output control of lamp, LED and sound effect. After the display / lamp / sound effect data creation process (S61) ends, the INT interrupt process ends. Thereafter, the processing returns to immediately after the main processing (FIG. 5) executed immediately before the execution of the INT interrupt processing, and the main processing is continued. Then, when a predetermined time (for example, 2 ms) elapses from the previous execution of the INT interrupt process, the next INT interrupt process is executed.

  Next, the random number update process (S52) executed in the INT interrupt process will be described with reference to FIG. FIG. 9 is a flowchart showing the random number update process (S52) executed in the INT interrupt process of the main control board C. In this process, the value of the IY register 51a is updated by “+1”, and the updated value of the IY register 51a is corrected to a value of “0 to 629” that is a value within an appropriate update range. Further, the value of the random number counter 54b is updated by “+1” within the range of “0” to “629”.

  First, the IY register 51a is incremented (S71), and the value of the IY register 51a is incremented by "+1". As described above, since the value of the IY register 51a is constantly updated by “+1” during the remaining time of the INT interrupt process in the main process, the value of the IY register 51a updated by “+1” in the process of S71 is It may exceed the value “0-629” that is within the appropriate update range. Therefore, after the increment process of the IY register 51a, the IY register correction process (S72) is executed to return the updated value of the IY register 51a to a value within an appropriate update range. The IY register correction process (S72) is the same as the process of FIG.

  Next, the value of the random number counter 54b is incremented by 1 (S73), and whether the value of the random number counter 54b after the addition is “630” or more, that is, exceeds the value of the appropriate update range of the random number counter 54b. It is checked whether or not (S74). If the value of the random number counter 54b after the addition is “630” or more (S74: Yes), the value of the random number counter 54b is cleared to “0” because the value exceeds the appropriate update range (S75). On the other hand, if the value of the added random number counter 54b is equal to or less than “629” (S74: No), the value is within the appropriate update range, so the process of S75 is skipped to maintain the added value. , The process proceeds to S76.

  In the process of S76, the updated value of the random number counter 54b is compared with the value of the current initial value memory 54c. Since the initial value of the update of the currently updated random number counter 54b is stored in the current initial value memory 54c, if the two values are equal (S76: Yes), the update of the random number counter 54b has been completed once. That is. Therefore, in this case, the value of the IY register 51a that stores the initial value of the next update of the random number counter 54b is written to the random number counter 54b and the current initial value memory 54c (S77, S78), and the initial value of the update of the random number counter 54b Change the value.

  In this way, since the random number counter 54b changes the initial value of the update every time one round of update is completed, the randomness uniformity (the same value is not obtained when continuously acquired, It is possible to obtain a random value that all values can be extracted with the same probability. Further, since the value of the IY register 51a, which is the initial value of the update, is updated using an indefinite time that changes according to the state of the game as described above, the initial value of the random number counter 54b is changed randomly. Can be changed.

  On the other hand, when the updated value of the random number counter 54b is not equal to the value of the current initial value memory 54c (S76: No), the update of the random number counter 54b has not been completed yet, so that S77 and S78 By skipping the processing, the values of the random number counter 54b and the current initial value memory 54c are maintained. Thereafter, another random number update process (S79) is executed, and this random number counter update process is terminated.

  As described above, according to the pachinko machine P of the present embodiment, the IY register 51a that counts the initial value of the random number counter 54b that determines the jackpot is periodically updated in the INT interrupt process (see FIG. 8). In addition, the main process (see FIG. 5) is updated using the remaining time of the INT interrupt process. Since the remaining time is a time that changes in accordance with the control state of the game, the value of the IY register 51a can be used as the initial value for updating the random number counter 54b, assuming that the value is reliably updated and given randomness. it can.

  The IY register 51a is updated by two different processes, the main process and the INT interrupt process. Since the update is performed by one instruction, the update is performed regardless of the execution timing of both processes. The results can be used effectively without meaninglessness. Further, since the IY register 51a which is an internal register of the CPU 51 and is relatively infrequently used is used without using the memory on the user work RAM 54, the use efficiency of the memory is increased accordingly. Can also be improved. Moreover, since the IY register 51a can be updated with 16 bits, it is suitable as a counter that counts the initial value of the update of the random number counter 54b having an update range exceeding “256”.

  Further, in the random number update process (see FIG. 9), the value of the IY register 51a is corrected to a value within an appropriate update range and then used as the initial value of the update of the random number counter 54b. Even if the register 51a is updated by “+1” without checking the update range, the value of the IY register 51a can be used accurately. In other words, in the main process, it is impossible to update with one instruction while checking whether the value of the IY register 51a is within the proper update range. In the INT interrupt processing using only the +1 update and using the value of the IY register 51a, the value is corrected to a value within an appropriate update range before using the value of the IY register 51a. Further, the minimum processing time of the INT interrupt processing and the sum of S21 and S22 are set so that the value of the IY register 51a does not become “0” by updating the main processing so that the value of the IY register 51a is corrected accurately. Since the execution interval of the INT interrupt processing is determined by the shortest processing time (in the present embodiment, as a result, the INT interrupt processing is executed every 2 ms), the IY register correction processing (see FIG. 7) Thus, the value of the IY register 51a can be corrected to a value within an appropriate update range without losing the updated count value.

  Next, IY register correction processing according to the second embodiment will be described with reference to FIG. In the IY register correction process of the second embodiment, first, it is confirmed whether or not the value of the IY register 51a is equal to or less than “629” which is the maximum value of the appropriate update range (S81). If the value of the IY register 51a is equal to or less than “629” (S81: Yes), the IY register 51a is a value within an appropriate update range, and thus the IY register correction process is terminated without correcting the value. On the other hand, if the value of the IY register 51a is “630” or more (S81: No), the value exceeds the value of the appropriate update range of the random number counter 54b. In this case, the value of the IY register 51a Is divided by “630” which is the maximum value +1 of the update range (S82). The remainder of the division is written to the IY register 51a (S83), which is set as the value of the IY register 51a, and this IY register correction process is terminated. Note that the process of FIG. 10 may be configured by deleting the process of S81.

In each of the embodiments described above, the control means according to claim 1 corresponds to the main control board C, the predetermined processing corresponds to S21 and S22 of the main processing shown in FIG. 5, and the periodic processing includes This corresponds to the INT interrupt processing shown in FIG. Further, the NMI interrupt processing shown in FIG. 4 corresponds to the writing means.

  The present invention has been described based on the embodiments. However, the present invention is not limited to the above-described embodiments, and various improvements and modifications can be easily made without departing from the spirit of the present invention. It can be guessed.

  For example, in the above embodiment, the IY register 51a is used as a counter, and is not necessarily limited to the IY register 51a. Instead of the IY register 51a, an IX register, BC register, DE register, HL register, or the like is used as a counter. May be used. Further, instead of the register, a memory on a RAM such as the user work RAM 54 may be used as a counter. In such a case, the update of the counter value in the main process is executed with one instruction, or when it cannot be executed with one instruction, the update itself is performed on the memory. Further, the update of the count value (the update of the value of the IY register 51a) in this embodiment is performed in the increment direction of “+1” by the increment instruction (INC). However, instead of the increment instruction, the decrement instruction (DEC) ) May be used in the subtracting direction by “−1”. In such a case, the correction process of the count value is corrected together with the count method.

  The counter according to the present invention is not necessarily used as a counter for counting the initial value of the update of the random number counter 54b. Therefore, for example, the counter of the present invention may be used as the random number counter 54b itself, or may be used as another counter that requires randomness, such as a symbol counter or a reach counter.

  You may implement this invention in the pachinko machine etc. of a different type from the said Example. For example, once a big hit, a pachinko machine that raises the expected value of the big hit until a big hit state occurs (for example, two times or three times) including that (for example, two-time rights, three-time rights May also be implemented. Moreover, after the jackpot symbol is displayed, it may be implemented as a pachinko machine that enters a special game state under the condition that a ball is awarded in a predetermined area. Further, in addition to the pachinko machine, the game machine may be implemented as various game machines such as an alepatchi, a sparrow ball, a slot machine, a game machine in which a so-called pachinko machine and a slot machine are integrated.

  In the slot machine, for example, a symbol is changed by operating a control lever in a state where a symbol effective line is determined by inserting coins, and a symbol is stopped and confirmed by operating a stop button. Is. Accordingly, the basic concept of the slot machine is that “a variable display means for confirming and displaying a symbol after a symbol string composed of a plurality of symbols is displayed in a variable manner, and the symbol resulting from the operation of the starting operation means (for example, an operating lever). The change of the symbol is stopped due to the operation of the stop operation means (for example, the stop button) or after a predetermined time has elapsed, and the fixed symbol at the time of the stop is a specific symbol Is a slot machine provided with special game state generating means for generating a special game state advantageous to the player. In this case, the game medium is typically a coin, a medal or the like.

  In addition, as a specific example of a gaming machine in which a pachinko machine and a slot machine are integrated, a variable display means for displaying a fixed symbol after displaying a variable symbol sequence consisting of a plurality of symbols is provided, and a handle for launching a ball is provided. What is not provided. In this case, after throwing a predetermined amount of spheres based on a predetermined operation (button operation), for example, the change of the symbol is started due to the operation of the operation lever, for example, due to the operation of the stop button, or With the passage of time, the fluctuation of the symbol is stopped, and a jackpot state advantageous to the player is generated on the condition that the confirmed symbol at the time of stoppage is a so-called jackpot symbol. A lot of balls are paid out.

  The modification of this invention is shown below. A counter, first control means for updating the value of the counter, second control means for interrupting execution of the first control means and executing control, and the first and second control means. And a control means for controlling the value of the counter under a predetermined condition, the first control means directly updates the value of the counter, and the second control means In addition to the first control means, the gaming machine 1 further comprises a correcting means for updating the counter value and correcting the counter value to a value within an appropriate update range. Updating the counter value directly refers to updating the counter value directly without using any other register or memory other than the counter. For example, the counter value is temporarily changed to another register (ALU in the CPU). It is not meant to be updated by loading into the memory, updating the register or memory, and writing the updated value back to the counter.

  According to the gaming machine 1, one counter is updated by two control means: a first control means and a second control means executed by interrupting the execution of the first control means. Regardless of the execution timing of the first control means, the second control means interrupts the execution of the first control means and executes the control, and updates the counter in the control. Therefore, when the first control means updates the counter as follows, the counter update is hindered depending on the execution timing of the second control means. That is, the counter value is once loaded into another register or memory (step 1), the count value is updated in the register or memory (step 2), and the updated count value is loaded into the counter (returns). ) (Step 3) When the counter is updated, if the second control means is executed after the execution of Step 1 and before the execution of Step 3, and the count value is updated, the execution of the second control means is performed. Since step 3 of the first control means is executed later, even if the count value is updated by the second control means, the count value is returned to the original value by the first control means. On the other hand, in the gaming machine 1, since the first control means directly updates the counter value, the updated count value is returned to the original value by the second control means regardless of the timing of the second control means. There is no end to it. That is, the first control unit can continuously update the count value updated by the second control unit. Therefore, according to the gaming machine 1, even when the counter of 1 is updated separately by the two control means of the first control means and the second control means, the counter value is continuously updated. Can do. In addition, since the second control means includes a correction means for correcting the counter value to a value within an appropriate update range, the update of the counter value by the first control means exceeds the proper update range of the counter. Even in this case, the value of the counter can be corrected to a value within an appropriate update range by executing the second control means. The updating method of the counter value by the second control means is not necessarily the same as the updating method of the first control means, and may be a different updating method.

  In the gaming machine 1, the first control means directly updates the value of the counter with one command.

  2. The gaming machine or the gaming machine 1 or 2 according to claim 1, wherein the first control means is configured to continue updating the counter value even when the counter value exceeds an appropriate update range. The second control means uses the counter value to control the game after the correction means corrects the counter value to a value within an appropriate update range. 3 Even if the counter value exceeds the appropriate update range, it is updated by the first control means, but the value is corrected to a value within the proper update range by the second control means, and after the correction, The value of the counter is used for game control by the second control means. Therefore, even if the value of the counter is updated beyond the value within the proper update range by the first control means, it can be used as a value within the proper update range for game control.

  2. The gaming machine according to claim 1, wherein the counter is updated by the first and second control means in an increasing direction, and the correction means of the second control means is the counter of the counter. If the value is not within the appropriate update range (exceeds the proper update range), the counter value is subtracted by the number of update ranges until the difference is within the update range. 3. A gaming machine 4 characterized in that the subtraction is repeated and the final difference is used as the value of the counter. The number of update ranges means, for example, “x + 1” when the counter is updated within the range of “0 to x”, and “x” when the counter is updated within the range of “1 to x”. Say.

  2. The gaming machine according to claim 1, wherein the counter is updated by the first and second control means in an increasing direction, and the correction means of the second control means is the counter of the counter. The gaming machine 5 is characterized in that the value is divided by the number of update ranges and the remainder is used as the value of the counter. Note that the division of the counter value is performed when it is determined whether or not the counter value is within the proper update range and then the counter value is not within the proper update range (appropriate update It may be configured so that it is performed only when the value of the range is exceeded. The number of update ranges is, for example, “x + 1” when the counter is updated in the range of “0 to x”, and “x” when the counter is updated in the range of “1 to x”. Say.

  2. The gaming machine according to claim 1, wherein the counter is updated by the first and second control means in a decreasing direction, and the correction means of the second control means is a counter of the counter. If the value is not within the proper update range (exceeds the proper update range), the difference obtained by subtracting the counter value from the maximum update range is the value within the proper update range. If so, the difference obtained by subtracting the difference from the maximum value of the appropriate update range is used as the counter value, while the difference obtained by subtracting the counter value from the maximum update range of the counter is a value within the proper update range. Otherwise, the difference is further subtracted by the number of update ranges, and the difference obtained by repeating the subtraction until the difference becomes a value within the update range is subtracted from the maximum value of the appropriate update range, and the difference is subtracted. The value of the counter Gaming machines 6, wherein the Rukoto. The number of update ranges means, for example, “x + 1” when the counter is updated within the range of “0 to x”, and “x” when the counter is updated within the range of “1 to x”. Say. The maximum update range of the counter means an update range that can be taken by the counter in hardware, and is larger than an appropriate update range used for game control. For example, the maximum update range is 0FFFFh when the counter is configured with 16 bits, and is 0FFh when the counter is configured with 8 bits.

  2. The gaming machine according to claim 1, wherein the second control means updates the value of the counter beyond an appropriate update range of the counter by the first control means. In such a case, the execution of the first control means is interrupted and the counter value is appropriately updated before the counter value reaches a value within the appropriate update range by the update by the first control means. A gaming machine 7 that is corrected to a value within the range. Thus, even when the maximum update range of the counter is not an integral multiple of the number of update ranges, the counter value can be continuously updated by the first control means and the second control means. The maximum update range of the counter means an update range that the counter can take in hardware, and is larger than an appropriate update range used for game control. For example, the maximum update range is 0FFFFh when the counter is configured with 16 bits, and is 0FFh when the counter is configured with 8 bits.

  2. The gaming machine according to claim 1, wherein the second control means updates the value of the counter beyond the maximum update range of the counter by the first control means. The gaming machine 8 is characterized in that the execution of the first control means is interrupted before and the value of the counter is corrected to a value within an appropriate update range. Thus, even when the maximum update range of the counter is not an integral multiple of the number of update ranges, the counter value can be continuously updated by the first control means and the second control means. The maximum update range of the counter means an update range that the counter can take in hardware, and is larger than an appropriate update range used for game control. For example, the maximum update range is 0FFFFh when the counter is configured with 16 bits, and is 0FFh when the counter is configured with 8 bits.

  2. The gaming machine according to claim 1, wherein the second control means is constituted by an interrupt process that is executed periodically, and the first control means is a main process that does not depend on an interrupt. Alternatively, the gaming machine 9 is constituted by an interrupt process having an interrupt priority lower than that of the second control means. According to the gaming machine 9, two control means, that is, the first control means and the second control means can be executed by one control means.

  The gaming machine according to claim 1 or any one of the gaming machines 1 to 9, wherein the second control means is periodically executed, and the execution time thereof is configured to change according to the state of the game, The first control means updates the value of the counter using the remaining time from the execution of the second control means until the next second control means is executed. 10. Since the second control means is periodically executed and its execution time varies depending on the state of the game, by updating the counter by the first control means using the remaining time after the execution of the second control means, Randomness can be added to the updated counter value. In addition, since the counter value is also updated by the second control means, the counter can be updated at least periodically regardless of the state of the game.

  2. The gaming machine 11 according to claim 1, wherein the counter is constituted by a register built in the CPU. Since the register built in the CPU is used for the counter, the amount of memory used can be reduced correspondingly and the memory can be used effectively. As registers used as counters, index registers IX and IY which are generally less frequently used and are composed of 16 bits are suitable.

  The gaming machine according to claim 1 or any one of the gaming machines 1 to 11, wherein a random number counter that is updated by the second control means and determines occurrence of a jackpot, and an initial value for updating the random number counter are stored. An initial value memory, and when the value of the random number counter matches the value of the current initial value memory by updating, the value of the counter is written into the random number counter and the current initial value memory, and A gaming machine comprising: a changing means for changing an initial value of the update. Since the counter is updated at random, by using the counter value as the initial value for updating the random number counter, it is possible to add randomness to the jackpot decision and improve the prevention effect of fraud etc. it can. Note that writing the counter value to the random number counter and the current initial value memory does not necessarily require writing the value read directly from the counter to each of the random number counter and the current initial value memory. And the value written to the random number counter is written to the current initial value memory, or conversely, the value read from the counter is written to the current initial value memory, and the value written to the current initial value memory is written to the random number counter. You may do it.

  The gaming machine according to claim 1, further comprising backup means for holding the value of the counter even after the power is turned off. When the gaming machine 13 is added to the configuration of the gaming machine 12, not only the counter but also the random number counter and the current initial value memory value are held by the backup means even after the power is turned off.

  14. The gaming machine 14 according to claim 1, wherein the gaming machine is a pachinko machine. Above all, the basic configuration of a pachinko machine is equipped with an operation handle, and in response to the operation of the operation handle, a ball is launched into a predetermined game area, and the ball is awarded to an operating port arranged at a predetermined position in the game area. As a necessary condition (or passing through the working port), the identification information variably displayed on the display device is confirmed and stopped after a predetermined time. Further, at the time of outputting the special gaming state, a variable winning device (specific winning opening) disposed at a predetermined position in the gaming area is opened in a predetermined manner so that a ball can be won, and a value corresponding to the number of winnings is obtained. Examples include values to which value (including information written on a magnetic card as well as premium balls) is given.

  14. The gaming machine 15 according to claim 1, wherein the gaming machine is a slot machine. Above all, the basic configuration of the slot machine is “variable display means for confirming and displaying the identification information after variably displaying the identification information string composed of a plurality of identification information, and resulting from the operation of the starting operation means (for example, the operation lever). Then, the variation of the identification is started, and the variation of the identification information is stopped due to the operation of the operation means for stop (for example, the stop button) or after a predetermined time elapses. The game machine is provided with special game state output means for outputting a special game state advantageous to the player on the condition that it is specific identification information. In this case, examples of the game media include coins and medals.

  14. The gaming machine 16 according to claim 1, wherein the gaming machine is a fusion of a pachinko machine and a slot machine. Among them, the basic configuration of the fused gaming machine includes “a variable display means for confirming and displaying identification information after variably displaying an identification information string composed of a plurality of identification information, and a starting operation means (for example, an operation lever). The variation of the identification information is started due to the operation, the variation of the identification information is stopped due to the operation of the operation means for stop (for example, the stop button) or after a predetermined time has passed, and the confirmation at the time of the stop is confirmed. Special game state output means for outputting a special game state advantageous to the player on the condition that the identification information is specific identification information, and using a ball as a game medium, and at the time of starting the variation of the identification information Is a gaming machine that requires a predetermined number of balls and is configured so that a large number of balls are paid out when the special gaming state is output.

It is a front view of the pachinko machine which is one example of the present invention. It is the block diagram which showed the electrical structure of the pachinko machine. It is the block diagram which showed the electrical structure of MPU. It is a flowchart which shows a NMI interruption process. It is a flowchart which shows a main process. It is a flowchart which shows RAM clear and initialization processing. It is a flowchart which shows an IY register correction process. It is a flowchart which shows an INT interruption process. It is a flowchart which shows a random number update process. It is a flowchart which shows the IY register correction process of 2nd Example.

11 MPU (calculation means)
54 User work RAM (holding storage means)
54b Random number counter C Main control board (control means)
P Pachinko machine (game machine)
S21, S71 Part of initial value generation means (update process)
S52 Random number counter update means
S54 Reading means
S72 Part of initial value generation means
S73 Random number counter update process
S77 Initial value changing means

Claims (4)

A random number counter, and the random number counter updating means for updating the value of the random number counter within a predetermined range, and a reading means for reading the value of the random number counter by a predetermined trigger, read out by the read means and the In a gaming machine having a control means for giving a predetermined gaming value to a player when the value of the random number counter matches a predetermined value,
The value of the random number counter goes around by being updated a predetermined number of times by the random number counter updating means,
When the predetermined condition is satisfied, the random number counter updating means updates the next circumference using any value within the predetermined range as an initial value of the update,
The control means includes
Initial value changing means for changing the initial value of the update of the random number counter updating means each time the predetermined condition is satisfied;
Initial value generating means for generating the initial value in the same range as the predetermined range;
And holding storage means capable of holding the stored contents even after the gaming machine is powered off,
Periodic processing that is executed regularly,
It is possible to execute a predetermined process that is executed irregularly,
The initial value generating means executes the update process of the initial value with one instruction in a register included in an arithmetic means that executes an operation without using the holding storage means
The update process of the initial value is performed in the regular process and the predetermined process,
The random number counter update process by the random number counter update unit and the read process of the value of the random number counter by the read unit are performed in the regular process,
Random number counter update processing by the random number counter updating means is performed before the random number counter value reading processing by the first reading means after powering on the gaming machine,
The control means includes
A gaming machine comprising: a writing unit that can hold the initial value stored in the register when the power of the gaming machine is turned off by the holding storage unit. The gaming machine according to claim 1, wherein the update process is an addition process. The gaming machine according to claim 1, wherein the update process is a subtraction process. The gaming machine according to claim 1, wherein the gaming machine is a pachinko gaming machine.

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