JP4607405B2 - ローカルｉ／ｏバスに近接するブリッジでの入出力（ｉ／ｏ）アドレス変換 - Google Patents

ローカルｉ／ｏバスに近接するブリッジでの入出力（ｉ／ｏ）アドレス変換 Download PDF

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JP4607405B2
JP4607405B2 JP2001520657A JP2001520657A JP4607405B2 JP 4607405 B2 JP4607405 B2 JP 4607405B2 JP 2001520657 A JP2001520657 A JP 2001520657A JP 2001520657 A JP2001520657 A JP 2001520657A JP 4607405 B2 JP4607405 B2 JP 4607405B2
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bus
agp
address
graphics
gart
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JP2003508850A (ja
JP2003508850A5 (enExample
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ネイヤー，ラマン
モラン，ダグラス・アール
クロス，レナード・ダブリュ
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2001520657A 1999-08-30 2000-08-18 ローカルｉ／ｏバスに近接するブリッジでの入出力（ｉ／ｏ）アドレス変換 Expired - Fee Related JP4607405B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/385,209 1999-08-30
US09/385,209 US6457068B1 (en) 1999-08-30 1999-08-30 Graphics address relocation table (GART) stored entirely in a local memory of an expansion bridge for address translation
PCT/US2000/022833 WO2001016772A1 (en) 1999-08-30 2000-08-18 Input/output (i/o) address translation in a bridge proximate to a local i/o bus

Publications (3)

Publication Number Publication Date
JP2003508850A JP2003508850A (ja) 2003-03-04
JP2003508850A5 JP2003508850A5 (enExample) 2007-08-16
JP4607405B2 true JP4607405B2 (ja) 2011-01-05

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JP2001520657A Expired - Fee Related JP4607405B2 (ja) 1999-08-30 2000-08-18 ローカルｉ／ｏバスに近接するブリッジでの入出力（ｉ／ｏ）アドレス変換

Country Status (10)

Country Link
US (2) US6457068B1 (enExample)
EP (1) EP1208443B1 (enExample)
JP (1) JP4607405B2 (enExample)
KR (1) KR100432470B1 (enExample)
CN (1) CN1213374C (enExample)
AU (1) AU6789800A (enExample)
DE (1) DE60026539T2 (enExample)
HK (1) HK1043222B (enExample)
TW (1) TW552515B (enExample)
WO (1) WO2001016772A1 (enExample)

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CN101414970B (zh) * 2008-11-26 2011-11-30 中兴通讯股份有限公司 Ioc模块分配方法及io交换器
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JP2011118732A (ja) * 2009-12-04 2011-06-16 Yokogawa Electric Corp Ｉ／ｏノード
US8793439B2 (en) * 2010-03-18 2014-07-29 Oracle International Corporation Accelerating memory operations using virtualization information
US9477634B2 (en) * 2010-06-04 2016-10-25 Intersil Americas LLC I2C address translation
CN102880587B (zh) * 2012-10-09 2014-12-24 无锡江南计算技术研究所 基于嵌入式加速核心的独立显卡架构
CN103092797B (zh) * 2012-12-13 2016-02-03 中国航空无线电电子研究所 离散量接口同步控制装置、离散量采集及输出控制方法
JP6385761B2 (ja) * 2014-09-02 2018-09-05 株式会社メガチップス バスブリッジ及びバスブリッジ群
JP6593222B2 (ja) * 2016-02-23 2019-10-23 富士通株式会社 情報処理装置、演算処理装置及び情報処理装置の制御方法
US10372663B2 (en) * 2017-07-25 2019-08-06 Qualcomm Incorporated Short address mode for communicating waveform
CN109413122B (zh) * 2017-08-16 2022-05-13 深圳市中兴微电子技术有限公司 一种数据处理方法、网络处理器及计算机存储介质
TWI720345B (zh) * 2018-09-20 2021-03-01 威盛電子股份有限公司 多核心系統的內連線結構
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Publication number Publication date
HK1043222A1 (en) 2002-09-06
DE60026539T2 (de) 2006-08-17
US6457068B1 (en) 2002-09-24
DE60026539D1 (de) 2006-05-04
CN1382277A (zh) 2002-11-27
EP1208443A1 (en) 2002-05-29
HK1043222B (en) 2006-06-30
KR20020064280A (ko) 2002-08-07
JP2003508850A (ja) 2003-03-04
WO2001016772A1 (en) 2001-03-08
US6618770B2 (en) 2003-09-09
US20020129187A1 (en) 2002-09-12
CN1213374C (zh) 2005-08-03
KR100432470B1 (ko) 2004-05-20
TW552515B (en) 2003-09-11
EP1208443B1 (en) 2006-03-08
AU6789800A (en) 2001-03-26

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