CN1213374C - 靠近局部输入/输出总线的桥接器中的输入/输出地址转换装置及方法 - Google Patents

靠近局部输入/输出总线的桥接器中的输入/输出地址转换装置及方法 Download PDF

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Publication number
CN1213374C
CN1213374C CNB008147264A CN00814726A CN1213374C CN 1213374 C CN1213374 C CN 1213374C CN B008147264 A CNB008147264 A CN B008147264A CN 00814726 A CN00814726 A CN 00814726A CN 1213374 C CN1213374 C CN 1213374C
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China
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bus
address
bridge
agp
affairs
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Expired - Fee Related
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Chinese (zh)
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CN1382277A (zh
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R·奈亚
D·R·莫兰
L·W·克罗斯
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CNB008147264A 1999-08-30 2000-08-18 靠近局部输入/输出总线的桥接器中的输入/输出地址转换装置及方法 Expired - Fee Related CN1213374C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/385,209 1999-08-30
US09/385,209 US6457068B1 (en) 1999-08-30 1999-08-30 Graphics address relocation table (GART) stored entirely in a local memory of an expansion bridge for address translation

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CN1382277A CN1382277A (zh) 2002-11-27
CN1213374C true CN1213374C (zh) 2005-08-03

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CNB008147264A Expired - Fee Related CN1213374C (zh) 1999-08-30 2000-08-18 靠近局部输入/输出总线的桥接器中的输入/输出地址转换装置及方法

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US (2) US6457068B1 (enExample)
EP (1) EP1208443B1 (enExample)
JP (1) JP4607405B2 (enExample)
KR (1) KR100432470B1 (enExample)
CN (1) CN1213374C (enExample)
AU (1) AU6789800A (enExample)
DE (1) DE60026539T2 (enExample)
HK (1) HK1043222B (enExample)
TW (1) TW552515B (enExample)
WO (1) WO2001016772A1 (enExample)

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US9477634B2 (en) * 2010-06-04 2016-10-25 Intersil Americas LLC I2C address translation
CN102880587B (zh) * 2012-10-09 2014-12-24 无锡江南计算技术研究所 基于嵌入式加速核心的独立显卡架构
CN103092797B (zh) * 2012-12-13 2016-02-03 中国航空无线电电子研究所 离散量接口同步控制装置、离散量采集及输出控制方法
JP6385761B2 (ja) * 2014-09-02 2018-09-05 株式会社メガチップス バスブリッジ及びバスブリッジ群
JP6593222B2 (ja) * 2016-02-23 2019-10-23 富士通株式会社 情報処理装置、演算処理装置及び情報処理装置の制御方法
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Also Published As

Publication number Publication date
WO2001016772A1 (en) 2001-03-08
US6457068B1 (en) 2002-09-24
JP4607405B2 (ja) 2011-01-05
JP2003508850A (ja) 2003-03-04
AU6789800A (en) 2001-03-26
US6618770B2 (en) 2003-09-09
DE60026539T2 (de) 2006-08-17
EP1208443B1 (en) 2006-03-08
HK1043222A1 (en) 2002-09-06
HK1043222B (en) 2006-06-30
DE60026539D1 (de) 2006-05-04
KR100432470B1 (ko) 2004-05-20
KR20020064280A (ko) 2002-08-07
TW552515B (en) 2003-09-11
EP1208443A1 (en) 2002-05-29
CN1382277A (zh) 2002-11-27
US20020129187A1 (en) 2002-09-12

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