JP4588068B2 - プログラム可能論理用のスケーラブル・ノンブロッキング・スイッチング・ネットワーク - Google Patents

プログラム可能論理用のスケーラブル・ノンブロッキング・スイッチング・ネットワーク Download PDF

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JP4588068B2
JP4588068B2 JP2007506180A JP2007506180A JP4588068B2 JP 4588068 B2 JP4588068 B2 JP 4588068B2 JP 2007506180 A JP2007506180 A JP 2007506180A JP 2007506180 A JP2007506180 A JP 2007506180A JP 4588068 B2 JP4588068 B2 JP 4588068B2
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conductors
switches
sets
conductor
pins
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JP2007506180A
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JP2007531461A (ja
JP2007531461A5 (enExample
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パニ，ピーター・エム
ティング，ベンジャミン・エス
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アドヴァンテージ・ロジック・インコーポレーテッド
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/002—Switching arrangements with several input- or output terminals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP2007506180A 2004-03-30 2005-02-28 プログラム可能論理用のスケーラブル・ノンブロッキング・スイッチング・ネットワーク Expired - Fee Related JP4588068B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/814,943 US6975139B2 (en) 2004-03-30 2004-03-30 Scalable non-blocking switching network for programmable logic
PCT/US2005/006583 WO2005104375A1 (en) 2004-03-30 2005-02-28 A scalable non-blocking switching network for programmable logic

Publications (3)

Publication Number Publication Date
JP2007531461A JP2007531461A (ja) 2007-11-01
JP2007531461A5 JP2007531461A5 (enExample) 2008-05-08
JP4588068B2 true JP4588068B2 (ja) 2010-11-24

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JP2007506180A Expired - Fee Related JP4588068B2 (ja) 2004-03-30 2005-02-28 プログラム可能論理用のスケーラブル・ノンブロッキング・スイッチング・ネットワーク

Country Status (6)

Country Link
US (9) US6975139B2 (enExample)
EP (1) EP1730841A4 (enExample)
JP (1) JP4588068B2 (enExample)
KR (1) KR101116943B1 (enExample)
CN (2) CN1938950B (enExample)
WO (1) WO2005104375A1 (enExample)

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US6975139B2 (en) * 2004-03-30 2005-12-13 Advantage Logic, Inc. Scalable non-blocking switching network for programmable logic
US7460529B2 (en) * 2004-07-29 2008-12-02 Advantage Logic, Inc. Interconnection fabric using switching networks in hierarchy
US7423453B1 (en) * 2006-01-20 2008-09-09 Advantage Logic, Inc. Efficient integrated circuit layout scheme to implement a scalable switching network used in interconnection fabric
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US7714611B1 (en) * 2008-12-03 2010-05-11 Advantage Logic, Inc. Permutable switching network with enhanced multicasting signals routing for interconnection fabric
US7705629B1 (en) 2008-12-03 2010-04-27 Advantage Logic, Inc. Permutable switching network with enhanced interconnectivity for multicasting signals
US7999570B2 (en) * 2009-06-24 2011-08-16 Advantage Logic, Inc. Enhanced permutable switching network with multicasting signals for interconnection fabric
US8341580B2 (en) * 2009-09-28 2012-12-25 Advantage Logic, Inc. Modular routing fabric using switching networks
US8098081B1 (en) * 2010-06-21 2012-01-17 Xilinx, Inc. Optimization of interconnection networks
US7982497B1 (en) * 2010-06-21 2011-07-19 Xilinx, Inc. Multiplexer-based interconnection network
US8665727B1 (en) 2010-06-21 2014-03-04 Xilinx, Inc. Placement and routing for a multiplexer-based interconnection network
EP2831882A4 (en) * 2012-03-30 2015-10-28 Intel Corp SPINTRANSFER TORQUE-BASED MEMORY ELEMENTS FOR ARRAYS FROM PROGRAMMABLE DEVICES
US9118325B1 (en) * 2014-08-27 2015-08-25 Quicklogic Corporation Routing network for programmable logic device
CN108287935B (zh) * 2017-12-13 2020-08-04 京微齐力(北京)科技有限公司 一种包含可预分配布线结构的可编程器件
CN111753486B (zh) * 2020-06-30 2021-12-24 无锡中微亿芯有限公司 一种多裸片结构fpga的布局方法
CN115496024B (zh) * 2021-06-18 2025-09-12 易灵思有限公司 现场可编程逻辑门阵列

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Also Published As

Publication number Publication date
US7768302B2 (en) 2010-08-03
US8698519B2 (en) 2014-04-15
CN102571073B (zh) 2015-07-08
WO2005104375A1 (en) 2005-11-03
US7557613B2 (en) 2009-07-07
US20110089972A1 (en) 2011-04-21
KR101116943B1 (ko) 2012-03-16
EP1730841A1 (en) 2006-12-13
JP2007531461A (ja) 2007-11-01
KR20070024520A (ko) 2007-03-02
US20050218928A1 (en) 2005-10-06
US20070268041A1 (en) 2007-11-22
US20090273368A1 (en) 2009-11-05
US7863932B2 (en) 2011-01-04
US6975139B2 (en) 2005-12-13
CN1938950A (zh) 2007-03-28
US7256614B2 (en) 2007-08-14
US8242807B2 (en) 2012-08-14
US7417457B2 (en) 2008-08-26
CN1938950B (zh) 2012-02-29
US20080272806A1 (en) 2008-11-06
US20100244895A1 (en) 2010-09-30
US7986163B2 (en) 2011-07-26
CN102571073A (zh) 2012-07-11
EP1730841A4 (en) 2007-08-29
US20110248744A1 (en) 2011-10-13
US20120280712A1 (en) 2012-11-08
US20060006906A1 (en) 2006-01-12

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