JP4587912B2 - Electronic component storage package and electronic device - Google Patents

Electronic component storage package and electronic device Download PDF

Info

Publication number
JP4587912B2
JP4587912B2 JP2005248113A JP2005248113A JP4587912B2 JP 4587912 B2 JP4587912 B2 JP 4587912B2 JP 2005248113 A JP2005248113 A JP 2005248113A JP 2005248113 A JP2005248113 A JP 2005248113A JP 4587912 B2 JP4587912 B2 JP 4587912B2
Authority
JP
Japan
Prior art keywords
electronic component
conductor layer
substrate
conductor
notch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2005248113A
Other languages
Japanese (ja)
Other versions
JP2007066996A (en
Inventor
昭一 島田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2005248113A priority Critical patent/JP4587912B2/en
Publication of JP2007066996A publication Critical patent/JP2007066996A/en
Application granted granted Critical
Publication of JP4587912B2 publication Critical patent/JP4587912B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Description

本発明は、半導体素子や水晶振動子等の電子部品が収納される電子部品収納用パッケージ、および電子装置に関するものである。   The present invention relates to an electronic component storage package in which an electronic component such as a semiconductor element or a crystal resonator is stored, and an electronic device.

従来、例えば半導体素子や水晶振動子等の電子部品を収容するための電子部品収納用パッケージは、図4に示すように、例えば酸化アルミニウム質焼結体等のセラミックスから成る絶縁層が複数積層されて成り、上面に電子部品の搭載部(図示せず)を有する基板401と、基板401の側面に上面から下面にかけて形成された切り欠き部403と、切り欠き部403の内面に形成された導体層404と、基板401の搭載部の周辺から搭載部の外側に導出された配線導体(図示せず)とを具備している。   2. Description of the Related Art Conventionally, an electronic component storage package for storing an electronic component such as a semiconductor element or a crystal resonator has a plurality of insulating layers made of ceramics such as an aluminum oxide sintered body as shown in FIG. A substrate 401 having an electronic component mounting portion (not shown) on the upper surface, a notch 403 formed on the side surface of the substrate 401 from the upper surface to the lower surface, and a conductor formed on the inner surface of the notch 403 A layer 404 and a wiring conductor (not shown) led out from the periphery of the mounting portion of the substrate 401 to the outside of the mounting portion are provided.

基板401の搭載部に電子部品(図示せず)を搭載するとともに、電子部品の電極を配線導体413にボンディングワイヤや導電性接合材等(図示せず)を介して電気的に接続し、しかる後、基板401の上面に搭載部を塞ぐように蓋体411を接合し、搭載部内に電子部品を気密に収容することによって製品としての電子装置となる。電子部品は、半導体素子や、水晶振動子、弾性表面波素子、コンデンサ、抵抗器、インダクタ等である。   An electronic component (not shown) is mounted on the mounting portion of the substrate 401, and the electrodes of the electronic component are electrically connected to the wiring conductor 413 via a bonding wire or a conductive bonding material (not shown). Thereafter, a lid 411 is joined to the upper surface of the substrate 401 so as to close the mounting portion, and an electronic component is housed in the mounting portion in an airtight manner, so that an electronic device as a product is obtained. The electronic component is a semiconductor element, a crystal resonator, a surface acoustic wave element, a capacitor, a resistor, an inductor, or the like.

電子装置を表面実装用とする場合には、基板401の下面に、外部回路基板に電気的、機械的に接続するための外部接続用電極413が形成される。  When the electronic device is used for surface mounting, an external connection electrode 413 for electrically and mechanically connecting to an external circuit board is formed on the lower surface of the substrate 401.

さらに、搭載されている電子部品の電気的特性を調整したり、データ情報を書き込んだりするための電気チェック端子(側面電極)が形成されているものがある。この電気チェック端子は、例えば、切り欠き部403の内面に形成されている導体層404から成り、導体層404は電子部品と電気的に接続される。   Furthermore, there are some in which electrical check terminals (side electrodes) for adjusting electrical characteristics of mounted electronic components and writing data information are formed. The electrical check terminal includes, for example, a conductor layer 404 formed on the inner surface of the notch 403, and the conductor layer 404 is electrically connected to the electronic component.

導体層404は、例えば、セラミック材料から成る基板401との同時焼成により形成されるメタライズ導体から成る場合であれば、図5に示すようにして形成される。基板401となる基板領域を有する複数のセラミックグリーンシート501a,501bに、基板領域の外縁に跨るようにして切り欠き部403となる貫通孔504を形成し、この貫通孔504の内部にメタライズペーストを流し込むとともに余分なメタライズペーストを吸引除去することにより、貫通孔504の内面にメタライズペーストが塗布される(図5(a))。この複数のセラミックグリーンシートを、貫通孔504が上下に連通するようにして積層する(図5(b))とともに焼成し、その後、基板領域毎に分割することにより、貫通孔504が分割されて形成された切り欠き部403の内面に導体層404が形成される。
特開2004−214799号公報
For example, when the conductor layer 404 is made of a metallized conductor formed by simultaneous firing with a substrate 401 made of a ceramic material, the conductor layer 404 is formed as shown in FIG. A plurality of ceramic green sheets 501a and 501b having a substrate region to be a substrate 401 are formed with a through hole 504 to be a notch 403 so as to straddle the outer edge of the substrate region, and a metallized paste is formed inside the through hole 504. The metallized paste is applied to the inner surface of the through hole 504 by pouring and removing the excess metallized paste by suction (FIG. 5A). The plurality of ceramic green sheets are laminated so that the through-holes 504 communicate with each other vertically (FIG. 5B) and fired, and then divided for each substrate region, whereby the through-holes 504 are divided. A conductor layer 404 is formed on the inner surface of the formed notch 403.
JP 2004-214799 A

しかしながら、上記従来技術においては、導体層の表面に、切り欠き部の内側に突出する部分が生じやすいため、この突出部分に妨げられて、導体層とプローブピン等との電気的な接続が困難となるという問題があった。   However, in the above-described prior art, a portion that protrudes inside the notch portion is likely to be formed on the surface of the conductor layer, so that it is difficult to make an electrical connection between the conductor layer and the probe pin, etc. There was a problem of becoming.

このような突出部分は、導体層を形成する際、重力の影響により、導体層となるメタライズペーストの厚みが、各セラミックグリーンシートにおいて下側ほど厚くなることに起因する。つまり、各絶縁層において下側ほど導体層が厚く形成されることになり、その厚さの分、切り欠き部の内側に導体層が入り込んで切り欠き部の幅が狭くなる。   Such a protruding portion is due to the fact that when the conductor layer is formed, the metallized paste serving as the conductor layer becomes thicker toward the lower side in each ceramic green sheet due to the influence of gravity. That is, the conductor layer is formed thicker toward the lower side in each insulating layer, and the conductor layer enters the inside of the notch by the thickness, so that the width of the notch is reduced.

特に、近年、電子装置の小型化および高密度化に伴い、切り欠き部の幅が非常に小さくなってきており、上記問題が発生しやすくなる傾向にある。   In particular, with the recent miniaturization and higher density of electronic devices, the width of the notch has become very small, and the above-mentioned problems tend to occur.

本発明は、かかる従来の技術における問題点に鑑み案出したものであり、その目的は、基板側面の切り欠き部内に形成された導体層の表面に、生じる突出部を減少させ、導体層とプローブピンとの電気的な接続を容易とした電子部品収納用パッケージおよび電子装置を提供することにある。   The present invention has been devised in view of the problems in the prior art, and its purpose is to reduce the protrusions generated on the surface of the conductor layer formed in the notch on the side surface of the substrate, and An object of the present invention is to provide an electronic component storage package and an electronic device that can be easily electrically connected to a probe pin.

本発明の電子部品収納用パッケージは、複数の絶縁層が積層されて成り、上面に電子部品の搭載部を有するとともに、側面に前記複数の絶縁層にわたって上下面方向に切り欠き部が形成された基板と、該切り欠き部の内面に形成され、前記電子部品に電気的に接続される導体層とを備え、前記切り欠き部は、前記各絶縁層において、上面から下面にかけて漸次幅が広くなるように形成されているとともに、前記導体層は、各絶縁層において上面から下面にかけて漸次厚みが厚くなるように形成されていることを特徴とするものである。 The electronic component storage package of the present invention is formed by laminating a plurality of insulating layers, has an electronic component mounting portion on an upper surface, and has a notch formed in a vertical direction across the plurality of insulating layers on a side surface. A substrate and a conductor layer formed on the inner surface of the notch and electrically connected to the electronic component are provided, and the notch gradually increases in width from the upper surface to the lower surface in each insulating layer. The conductor layer is formed so that the thickness gradually increases from the upper surface to the lower surface in each insulating layer.

本発明の電子装置は、本発明の電子部品収納用パッケージと、該電子部品収納用パッケージの前記搭載部に搭載された電子部品とを備えていることを特徴とするものである。   An electronic device of the present invention includes the electronic component storage package of the present invention and an electronic component mounted on the mounting portion of the electronic component storage package.

本発明の電子部品収納用パッケージは、切り欠き部が、各絶縁層において、上面から下面にかけて漸次幅が広くなるように形成されているとともに、導体層が、各絶縁層において上面から下面にかけて漸次厚みが厚くなるように形成されていることにより、各絶縁層において上面から下面にかけて漸次厚くなる導体層の厚みを、上面から下面にかけて漸次広くなるように形成された切り欠き部により吸収することができ、導体層が切り欠き部の内側に突出することを低減させることが可能となる。   In the electronic component storage package according to the present invention, the notch is formed so that the width gradually increases from the upper surface to the lower surface in each insulating layer, and the conductor layer gradually increases from the upper surface to the lower surface in each insulating layer. By being formed so as to increase in thickness, the thickness of the conductor layer that gradually increases from the upper surface to the lower surface in each insulating layer can be absorbed by the notch formed so as to gradually increase from the upper surface to the lower surface. It is possible to reduce the protrusion of the conductor layer inside the notch.

その結果、切り欠き部の内側に導体層が入り込むことを最小限に抑えることができ、切り欠き部に形成された導体層とプローブピンとの電気的接続を容易なものとすることができる。   As a result, the conductor layer can be kept from entering the inside of the notch, and electrical connection between the conductor layer formed in the notch and the probe pin can be facilitated.

本発明の電子装置は、本発明の電子部品収納用パッケージと、該電子部品収納用パッケージの前記搭載部に搭載された電子部品とを備えていることにより、小型で電気チェック端子となる導体層とプローブピンとの電気的接続性に優れた信頼性の高い電子装置を提供することができる。   An electronic device according to the present invention includes a package for storing an electronic component according to the present invention and an electronic component mounted on the mounting portion of the package for storing the electronic component, thereby providing a conductor layer that is small and serves as an electrical check terminal. It is possible to provide a highly reliable electronic device having excellent electrical connectivity between the probe pin and the probe pin.

以下、本発明の電子部品収納用パッケージおよび電子装置について、添付の図を参照して詳細に説明する。図1(a)は、本発明の電子部品収納用パッケージの実施の形態の一例を示す側面図であり、(b)はその平面図である。図1(a)、(b)において、101は基板、103は基板101の側面に形成された溝状の切り欠き部、104は導体層、113は外部接続導体である。   Hereinafter, an electronic component storage package and an electronic device according to the present invention will be described in detail with reference to the accompanying drawings. Fig.1 (a) is a side view which shows an example of embodiment of the electronic component storage package of this invention, (b) is the top view. In FIGS. 1A and 1B, reference numeral 101 denotes a substrate, 103 denotes a groove-shaped notch formed on the side surface of the substrate 101, 104 denotes a conductor layer, and 113 denotes an external connection conductor.

この例では、基板101は、上面に電子部品107の搭載部102(凹状の部分)を有する平板状の部分の上面に、搭載部102を取り囲む金属製の枠体109を取着して成る。   In this example, the substrate 101 is formed by attaching a metal frame 109 surrounding the mounting portion 102 to the upper surface of a flat plate portion having the mounting portion 102 (concave portion) of the electronic component 107 on the upper surface.

基板101は、電子部品107を収容するための容器であり、搭載部102に電子部品107が搭載される。電子部品107は、半導体素子や、水晶振動子、弾性表面波素子、コンデンサ、抵抗器、インダクタ等である。   The substrate 101 is a container for housing the electronic component 107, and the electronic component 107 is mounted on the mounting portion 102. The electronic component 107 is a semiconductor element, a crystal resonator, a surface acoustic wave element, a capacitor, a resistor, an inductor, or the like.

この基板101は、例えば酸化アルミニウム質焼結体や窒化アルミニウム質焼結体,ムライト質焼結体,ガラスセラミックス焼結体等のセラミックス材料から成る絶縁層112が複数積層されて形成されている。基板101は、平板状や枠状の複数枚(図1に示した例では3枚)のセラミックグリーンシートを積層し、焼成することにより形成される。   The substrate 101 is formed by laminating a plurality of insulating layers 112 made of a ceramic material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, and a glass ceramic sintered body. The substrate 101 is formed by laminating and firing a plurality of plate-like or frame-like ceramic green sheets (three in the example shown in FIG. 1).

この実施形態において、基板101の搭載部102の周辺から基板101の下面や側面等の外面にかけて、タングステン,モリブデン,銅,銀等のメタライズ導体から成る配線導体105が導出されている。   In this embodiment, a wiring conductor 105 made of a metallized conductor such as tungsten, molybdenum, copper, or silver is led out from the periphery of the mounting portion 102 of the substrate 101 to the outer surface such as the lower surface or the side surface of the substrate 101.

この配線導体105は、電子部品107の電極(図示せず)を基板101の外面に導出する機能を有する。配線導体105のうち、搭載部102の周辺に露出した部位に電子部品107の電極がボンディングワイヤ114等を介して接続される。これにより、電子部品107の電極が、例えば基板101の側面や下面に導出され、後述する導体層104や外部端子電極113と電気的に接続される。   The wiring conductor 105 has a function of leading an electrode (not shown) of the electronic component 107 to the outer surface of the substrate 101. In the wiring conductor 105, the electrode of the electronic component 107 is connected to a portion exposed around the mounting portion 102 via a bonding wire 114 or the like. Thereby, the electrode of the electronic component 107 is led out to, for example, the side surface and the lower surface of the substrate 101 and is electrically connected to a conductor layer 104 and an external terminal electrode 113 described later.

また、基板101の側面には、複数の絶縁層112にわたって上下面方向に切り欠き部103が形成されている。切り欠き部103の内面には導体層104が形成されている。この導体層104は、配線導体105の導出された部位と接続されている。   Further, a cutout portion 103 is formed on the side surface of the substrate 101 in the vertical direction across the plurality of insulating layers 112. A conductor layer 104 is formed on the inner surface of the notch 103. The conductor layer 104 is connected to a portion where the wiring conductor 105 is led out.

導体層104は、例えば、搭載部102に搭載される電子部品107と配線導体105を介して電気的に接続され、電子部品107の電気的特性を調整したり、電子部品107にデータ情報を書き込んだりするための端子として機能する。   For example, the conductor layer 104 is electrically connected to the electronic component 107 mounted on the mounting unit 102 via the wiring conductor 105, adjusts the electrical characteristics of the electronic component 107, and writes data information to the electronic component 107. Functions as a terminal for dragging.

導体層104にプローブピン110を当接させて電気的に接続し、プローブピン110から導体層104を介して外部の測定器等を電子部品107と電気的に接続させることにより、電子部品107と外部の測定器等との間で信号の授受が行なわれ、電子部品107に対して測定や情報の書き込み等が行われる。   The probe pin 110 is brought into contact with and electrically connected to the conductor layer 104, and an external measuring instrument or the like is electrically connected to the electronic component 107 from the probe pin 110 via the conductor layer 104. Signals are exchanged with an external measuring instrument or the like, and measurement, information writing, or the like is performed on the electronic component 107.

基板101の下面には、外部端子電極113が配線導体105と電気的に接続されて形成されている。   An external terminal electrode 113 is formed on the lower surface of the substrate 101 so as to be electrically connected to the wiring conductor 105.

この外部端子電極113を外部電気回路基板(図示せず)の回路導体に半田等を介して接続することにより、電子部品107の電極が、配線導体105と外部端子電極113とを介して外部電気回路基板の回路導体と電気的に接続される。   By connecting the external terminal electrode 113 to a circuit conductor of an external electric circuit board (not shown) via solder or the like, the electrode of the electronic component 107 is connected to the external electric conductor via the wiring conductor 105 and the external terminal electrode 113. It is electrically connected to the circuit conductor of the circuit board.

本発明の電子部品収納用パッケージにおいて、切り欠き部103のうち、導体層104が形成された各絶縁層112において、上面から下面にかけて漸次幅が広くなるように形成されるとともに、導体層104は、各絶縁層112において上面から下面にかけて漸次厚みが厚くなるように形成されている。(図2)
切り欠き部103の横断面形状は、例えば楕円状となっており、基板101の側面の上面から下面にかけて、漸次半径が大きな楕円状となることにより、漸次幅が広くなっている。
In the electronic component storage package of the present invention, in each of the insulating layers 112 in which the conductor layer 104 is formed in the notch 103, the conductor layer 104 is formed so that the width gradually increases from the upper surface to the lower surface. Each insulating layer 112 is formed so that the thickness gradually increases from the upper surface to the lower surface. (Figure 2)
The cross-sectional shape of the notch 103 is, for example, an ellipse, and the width gradually increases as the radius increases gradually from the upper surface to the lower surface of the side surface of the substrate 101.

また、導体層104は、広くなる切り欠き部103の幅の漸次広くなる分に応じて、各絶縁層112の上面から下面にかけて漸次その厚みが厚くなるように形成される。   Further, the conductor layer 104 is formed so that its thickness gradually increases from the upper surface to the lower surface of each insulating layer 112 in accordance with the gradually increasing width of the widened notch 103.

このような、切り欠き部103および導体層104の形状としたことから、各絶縁層112において上面から下面にかけて漸次厚くなる導体層104の厚みを、上面から下面にかけて漸次広くなる切り欠き部103の幅で吸収することができる。そのため、導体層104が切り欠き部103の内側に突出することは効果的に防止される。また、この場合、導体層104を、絶縁層112において上面から下面にかけて漸次厚くなるように形成することができるので、重力に従い、導体層112を容易に形成することができる。   Since the shape of the notch 103 and the conductor layer 104 is set as described above, the thickness of the conductor layer 104 that gradually increases from the upper surface to the lower surface in each insulating layer 112 is increased. Can be absorbed in width. Therefore, the conductor layer 104 is effectively prevented from protruding inside the notch 103. In this case, since the conductor layer 104 can be formed so as to gradually increase in thickness from the upper surface to the lower surface in the insulating layer 112, the conductor layer 112 can be easily formed according to gravity.

プローブピン110が当接される部分で切り欠き部103の幅が広く、プローブピン110を導体層104に容易に当接させることができる。よって、プローブピン110から導体層104を介して、電子部品107に繰り返し正しく電気的特性を調整したり、データ情報を書き込んだりすることが可能となる。 The width of the notch 103 is wide at the portion where the probe pin 110 abuts, and the probe pin 110 can be easily abutted on the conductor layer 104. Therefore, it is possible to correctly adjust the electrical characteristics and write data information to the electronic component 107 repeatedly from the probe pin 110 through the conductor layer 104.

例えば、基板101が酸化アルミニウム質焼結体から成り、基板101の大きさが5.0×3.2mm程度である場合は、切り欠き部103の幅が0.5mm程度であり、この切り欠き部103の内面に形成される導体層104の厚みは、10〜40μm程度である。この導体層104の厚みに応じて各絶縁層112の切り欠き部103は、上面から下面にかけて漸次幅が広くなるように形成されている。そして、この各絶縁層112の切り欠き部103の表面に導体層104が上面から下面にかけて漸次厚みが厚くなるように形成されることにより、基板101の上面から下面にかけて連続する各絶縁層112の切り欠き部103の導体層104の表面は、ほぼ同一径となるように形成されることとなる。   For example, when the substrate 101 is made of an aluminum oxide sintered body and the size of the substrate 101 is about 5.0 × 3.2 mm, the width of the notch 103 is about 0.5 mm. The thickness of the conductor layer 104 formed on the inner surface of the portion 103 is about 10 to 40 μm. Depending on the thickness of the conductor layer 104, the notch 103 of each insulating layer 112 is formed so that the width gradually increases from the upper surface to the lower surface. Then, the conductive layer 104 is formed on the surface of the notch 103 of each insulating layer 112 so that the thickness gradually increases from the upper surface to the lower surface, so that each insulating layer 112 continuous from the upper surface to the lower surface of the substrate 101 is formed. The surface of the conductor layer 104 of the notch 103 is formed to have substantially the same diameter.

基板101内部の素子類や半導体素子等の電子部品107の電気的特性を調整したり、データ情報を書き込んだりするために、例えば基板101の側面に形成された導体層104に先端の幅が0.3mmの針状のプローブピン110が電気的に接続できるように当接される。なお、このような電気的接続をおこなうためのプローブピン110は、短時間の当接でも良好な電気的接続性が得られるように、また耐磨耗性を考慮してその表面にロジウム合金等の金属を被着させ、または、バネ等の押圧を作用させる弾性部材により導体層104にプローブピン110を押し付ける構造となっている。   In order to adjust the electrical characteristics of electronic components 107 such as elements and semiconductor elements inside the substrate 101 and to write data information, for example, the width of the tip of the conductor layer 104 formed on the side surface of the substrate 101 is 0. A 3 mm needle-like probe pin 110 is abutted so that it can be electrically connected. In addition, the probe pin 110 for performing such electrical connection has a rhodium alloy or the like on its surface so that good electrical connectivity can be obtained even in a short time contact and in consideration of wear resistance. In this structure, the probe pin 110 is pressed against the conductor layer 104 by an elastic member that adheres the metal or an elastic member such as a spring.

ここで、導体層104の形成方法について図3を参照して説明する。まず、図3(a)に示すように、基板101となるセラミックグリーンシート301aおよび301bに、上面から下面にかけて漸次幅が広くなるように貫通孔304を形成し、続いてその内面に上面から下面にかけて漸次厚みが厚くなるように、導体ペーストを塗布する。その際に、
貫通孔304を形成するための打ち抜き用のポンチ径よりも大きい受け側の金型の孔径を大きくとる事により、上記のような形状となるように貫通孔304を形成することができる。また、導体ペーストが自重によりセラミックグリーンシート301aおよび301bの下面側に垂れてくることを利用すれば、導体ペーストを上記のような形状となるように塗布することができる。
Here, a method of forming the conductor layer 104 will be described with reference to FIG. First, as shown in FIG. 3 (a), through holes 304 are formed in the ceramic green sheets 301a and 301b to be the substrate 101 so that the width gradually increases from the upper surface to the lower surface, and then the upper surface from the upper surface to the lower surface is formed. The conductive paste is applied so that the thickness gradually increases over time. At that time,
By making the hole diameter of the receiving mold larger than the punching diameter for punching for forming the through hole 304, the through hole 304 can be formed to have the above shape. In addition, when the conductor paste hangs down to the lower surface side of the ceramic green sheets 301a and 301b by its own weight, the conductor paste can be applied so as to have the shape as described above.

そして、次に、図3(b)に示すように、中間に積層するセラミックグリーンシート301aを、下側に積層するセラミックグリーンシート301b上に積層する。その後、さらに導体層104が形成されない上側のセラミックグリーンシート(図示せず)をこの2層から成る積層体に積層し、得られた3層から成る積層体を焼成することにより本発明の電子部品収納用パッケージが製造される。   Then, as shown in FIG. 3B, the ceramic green sheet 301a laminated in the middle is laminated on the ceramic green sheet 301b laminated on the lower side. Thereafter, an upper ceramic green sheet (not shown) in which the conductor layer 104 is not further formed is laminated on the two-layer laminate, and the obtained three-layer laminate is fired to thereby obtain the electronic component of the present invention. A storage package is manufactured.

ここで、中間に積層するセラミックグリーンシート301aに形成される導体層104の下面302(a)は、下側に積層するセラミックグリーンシート301bに形成される導体層104の上面302(b)よりも広く形成されていることから、中間に積層するセラミックグリーンシート301aを、下側に積層するセラミックグリーンシート301b上に積層する際の上下導体層間の電気的接続を良好とするための接続用導体(上下層の導体層に形成する別の補助導体)を形成することなく、上下層の導体層間を電気的に良好に接続することが可能となる。   Here, the lower surface 302 (a) of the conductor layer 104 formed on the ceramic green sheet 301a laminated in the middle is higher than the upper surface 302 (b) of the conductor layer 104 formed on the ceramic green sheet 301b laminated on the lower side. Since the ceramic green sheet 301a laminated in the middle is laminated on the ceramic green sheet 301b laminated on the lower side, the connection conductor (for improving the electrical connection between the upper and lower conductor layers) It is possible to connect the upper and lower conductor layers electrically well without forming another auxiliary conductor formed on the upper and lower conductor layers.

また、中間に積層するセラミックグリーンシート301aと下側に積層するセラミックグリーンシート301bとの間に接続用導体を形成する必要がないことから、接続用導体の厚みだけ積層体の厚みが部分的に厚くなってしまうことがなく、密着層におけるデラミネーションの発生を防止する効果もある。   Further, since it is not necessary to form a connecting conductor between the ceramic green sheet 301a laminated in the middle and the ceramic green sheet 301b laminated below, the thickness of the laminated body is partially equal to the thickness of the connecting conductor. There is also an effect of preventing the occurrence of delamination in the adhesion layer without increasing the thickness.

なお、導体層104は、上述したような端子に限らず、電子部品収納用パッケージの外部電気回路基板に対する接続信頼性を向上させる接続用の導体として機能させることもできる。すなわち、導体層104を基板101の下端にまで達するとともに外部端子電極113と連続するようにして形成しておくと、外部端子電極113から導体層104にかけて、外部電気回路基板の回路導体と半田等により強固に接合される。このとき、基板101の側面に形成される導体層104にも半田が這い上がることにより、より強固に基板101と外部電気回路基板の配線導体とが接合される。   The conductor layer 104 is not limited to the terminals as described above, but can also function as a connection conductor that improves the connection reliability of the electronic component storage package to the external electric circuit board. That is, if the conductor layer 104 is formed so as to reach the lower end of the substrate 101 and be continuous with the external terminal electrode 113, the circuit conductor and solder of the external electric circuit board are connected from the external terminal electrode 113 to the conductor layer 104. It is strongly joined by. At this time, the solder also scoops up on the conductor layer 104 formed on the side surface of the substrate 101, so that the substrate 101 and the wiring conductor of the external electric circuit substrate are more firmly bonded.

なお、このような電子部品収納用パッケージにおいては、導体層104,配線導体105,外部端子電極113および封止用のメタライズ層等の露出した金属層が酸化腐食するのを防止するとともに、搭載部102の周辺の配線導体105と電子部品107の電極との電気的な接続や、外部端子電極113と外部電気回路基板の配線導体との電気的な接続を良好なものとするために、導体層104,配線導体105,外部端子電極113および封止用のメタライズ層等の露出した金属層の表面に、例えば厚みが1〜20μm程度のニッケルめっき層と厚みが0.1〜3μm程度の金めっき層とが電解めっき法により順次被着されている。   In such an electronic component storage package, the exposed metal layers such as the conductor layer 104, the wiring conductor 105, the external terminal electrode 113, and the sealing metallization layer are prevented from being oxidatively corroded and mounted. In order to improve the electrical connection between the wiring conductor 105 around the electrode 102 and the electrode of the electronic component 107 and the electrical connection between the external terminal electrode 113 and the wiring conductor of the external electric circuit board, the conductor layer 104, the wiring conductor 105, the external terminal electrode 113, and the exposed metal layer such as a sealing metallized layer, for example, a nickel plating layer having a thickness of about 1 to 20 μm and a gold plating having a thickness of about 0.1 to 3 μm. The layers are sequentially deposited by electrolytic plating.

本発明の電子装置は、上記に記載された電子部品収納用パッケージ(基板101)の搭載部102に電子部品107が搭載されることにより形成される。   The electronic device of the present invention is formed by mounting the electronic component 107 on the mounting portion 102 of the electronic component storage package (substrate 101) described above.

例えば、基板101の搭載部102上に電子部品107を搭載して枠体109の内側に収容するとともに、電子部品107の電極を搭載部102の周辺の配線導体105にボンディングワイヤや導電性接合材等を介して電気的に接続し、しかる後、基板101の枠体111の上面に、例えばあらかじめ封止用のメタライズ層を枠状に形成しておき、この封止用のメタライズ層に金属製の蓋体111を搭載部102を塞ぐようにして溶接やろう付けにより接合し、基板101と蓋体111とから成る容器内に電子部品107を気密に収容することによって電子装置となる。   For example, the electronic component 107 is mounted on the mounting portion 102 of the substrate 101 and accommodated inside the frame 109, and the electrodes of the electronic component 107 are bonded to the wiring conductor 105 around the mounting portion 102 with a bonding wire or a conductive bonding material. After that, for example, a metallization layer for sealing is formed in a frame shape in advance on the upper surface of the frame body 111 of the substrate 101, and the metallization layer for sealing is made of metal. The lid body 111 is joined by welding or brazing so as to close the mounting portion 102, and the electronic component 107 is hermetically accommodated in a container composed of the substrate 101 and the lid body 111, whereby an electronic device is obtained.

この電子装置は、基板101の下面に形成された外部端子電極113を外部電気回路基板の配線導体に半田を介して接続することにより外部電気回路基板に実装されるとともに、収容した電子部品107の電極が外部電気回路に電気的に接続されることとなる。   The electronic device is mounted on the external electric circuit board by connecting the external terminal electrode 113 formed on the lower surface of the substrate 101 to the wiring conductor of the external electric circuit board via solder, and the electronic device 107 accommodated therein The electrode is electrically connected to the external electric circuit.

また、電子部品107と電気的に接続されている導体層104を介して、電子部品に対する電気的特性に調整やデータの書き込み等の操作が施される。   In addition, operations such as adjustment and writing of data are performed on the electrical characteristics of the electronic component through the conductor layer 104 electrically connected to the electronic component 107.

このような電子装置によれば、本発明の電子部品収納用パッケージに電子部品107が搭載されて成ることから、小型で電気チェック端子となる導体層104とプローブピン110との電気的接続性に優れた信頼性の高い電子装置を提供することができる。   According to such an electronic device, since the electronic component 107 is mounted on the electronic component storage package of the present invention, the electrical connection between the probe layer 110 and the conductor layer 104 that is small and serves as an electrical check terminal is improved. An excellent and highly reliable electronic device can be provided.

なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の形態に変形できる。   In addition, this invention is not limited to the example of above-mentioned embodiment, In the range which does not deviate from the summary of this invention, it can deform | transform into various forms.

例えば、上述の例では基板101の側面に上面から下面にかけて形成された溝状の切り欠き部103の横断面形状は楕円状としたが、この断面形状を半円状としたり、四角形状としてもよいことは言うまでもない。   For example, in the above example, the cross-sectional shape of the groove-shaped notch 103 formed on the side surface of the substrate 101 from the upper surface to the lower surface is an ellipse, but this cross-sectional shape may be a semicircular shape or a rectangular shape. Needless to say, it is good.

(a)は本発明の電子部品収納用パッケージの実施の形態の一例を示す側面図であり、(b)はその上面図である。(A) is a side view which shows an example of embodiment of the electronic component storage package of this invention, (b) is the top view. 図1に示した切り欠き部103の拡大図である。It is an enlarged view of the notch part 103 shown in FIG. 本発明の電子部品収納用パッケージの製造方法を示す図である。It is a figure which shows the manufacturing method of the electronic component storage package of this invention. 従来の電子部品収納用パッケージの実施の形態の一例を示す側面図である。It is a side view which shows an example of embodiment of the conventional electronic component storage package. 従来の電子部品収納用パッケージの製造方法を示す図である。It is a figure which shows the manufacturing method of the conventional electronic component storage package.

符号の説明Explanation of symbols

101・・・・・基板
102・・・・・搭載部
103・・・・・切り欠き部
104・・・・・導体層
107・・・・・電子部品
108・・・・・金めっき層
111・・・・・プローブピン
DESCRIPTION OF SYMBOLS 101 ... Board | substrate 102 ... Mounting part 103 ... Notch part 104 ... Conductor layer 107 ... Electronic component 108 ... Gold plating layer 111 ·····Probe pin

Claims (2)

複数の絶縁層が積層されて成り、上面に電子部品の搭載部を有するとともに、側面に前記複数の絶縁層にわたって上下面方向に切り欠き部が形成された基板と、該切り欠き部の内面に形成され、前記電子部品に電気的に接続される導体層とを備え、
前記切り欠き部は、前記各絶縁層において、上面から下面にかけて漸次幅が広くなるように形成されているとともに、前記導体層は、各絶縁層において上面から下面にかけて漸次厚みが厚くなるように形成されていることを特徴とする電子部品収納用パッケージ。
A substrate having a plurality of insulating layers stacked and having an electronic component mounting portion on the upper surface, and a side surface formed with a notch in the vertical direction across the plurality of insulating layers, and an inner surface of the notch A conductor layer formed and electrically connected to the electronic component;
The notch is formed so that the width gradually increases from the upper surface to the lower surface in each insulating layer, and the conductor layer is formed so that the thickness gradually increases from the upper surface to the lower surface in each insulating layer. Electronic component storage package characterized by the above.
請求項1に記載された電子部品収納用パッケージと、該電子部品収納用パッケージの前記搭載部に搭載された電子部品とを備えていることを特徴とする電子装置。 An electronic device comprising: the electronic component storage package according to claim 1; and an electronic component mounted on the mounting portion of the electronic component storage package.
JP2005248113A 2005-08-29 2005-08-29 Electronic component storage package and electronic device Active JP4587912B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005248113A JP4587912B2 (en) 2005-08-29 2005-08-29 Electronic component storage package and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005248113A JP4587912B2 (en) 2005-08-29 2005-08-29 Electronic component storage package and electronic device

Publications (2)

Publication Number Publication Date
JP2007066996A JP2007066996A (en) 2007-03-15
JP4587912B2 true JP4587912B2 (en) 2010-11-24

Family

ID=37928874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005248113A Active JP4587912B2 (en) 2005-08-29 2005-08-29 Electronic component storage package and electronic device

Country Status (1)

Country Link
JP (1) JP4587912B2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004235564A (en) * 2003-01-31 2004-08-19 Tokyo Denpa Co Ltd Ceramic substrate and piezoelectric resonator, and manufacturing method of piezoelectric resonator
JP2004349288A (en) * 2003-05-20 2004-12-09 Murata Mfg Co Ltd Process for producing ceramic multilayer substrate
JP2006210550A (en) * 2005-01-27 2006-08-10 Kyocera Corp Electronic component accommodation package and electronic device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004235564A (en) * 2003-01-31 2004-08-19 Tokyo Denpa Co Ltd Ceramic substrate and piezoelectric resonator, and manufacturing method of piezoelectric resonator
JP2004349288A (en) * 2003-05-20 2004-12-09 Murata Mfg Co Ltd Process for producing ceramic multilayer substrate
JP2006210550A (en) * 2005-01-27 2006-08-10 Kyocera Corp Electronic component accommodation package and electronic device

Also Published As

Publication number Publication date
JP2007066996A (en) 2007-03-15

Similar Documents

Publication Publication Date Title
JP6140834B2 (en) Wiring board and electronic device
CN104412722B (en) Circuit board, electronic device and light-emitting device
JP5188752B2 (en) Piezoelectric oscillator
JP4439289B2 (en) Piezoelectric vibrator storage package and piezoelectric device
JP4587912B2 (en) Electronic component storage package and electronic device
JP5004423B2 (en) Electronic component storage package and electronic device
JP6166194B2 (en) Wiring board, electronic device and electronic module
JP2007173629A (en) Package for housing electronic part and electronic equipment
JP2006278756A (en) Package for piezoelectric vibrator storage and piezoelectric device
JP4991198B2 (en) Electronic component mounting package, manufacturing method thereof, and electronic apparatus
JP2008235451A (en) Package for storing electronic components, electronic device, and method for manufacturing the device
JP2015146383A (en) Wiring board, electronic device, and electronic module
JP2002231845A (en) Electronic part storing package
JP2003198310A (en) Accommodation package for piezoelectric vibrator
JP4439275B2 (en) Piezoelectric vibrator storage package and piezoelectric device
JP2007124223A (en) Package for storing piezoelectric vibrator, and piezoelectric vibration device
JP4974424B2 (en) Package for pressure detection device
JP4331957B2 (en) Piezoelectric vibrator storage package
JP3631664B2 (en) Semiconductor element storage package and semiconductor device
JP3981316B2 (en) Package for storing semiconductor elements
JP2015076584A (en) Package for housing electronic component
JP2021175081A (en) Package for storing electronic component, electronic device, and electronic module
JP2008294733A (en) Microphone element mounting board and microphone device
JP2006237265A (en) Electronic component accommodating package and electronic device
JP2006100497A (en) Package for housing electronic component and electronic apparatus

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080314

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100804

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100810

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100907

R150 Certificate of patent or registration of utility model

Ref document number: 4587912

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130917

Year of fee payment: 3