JP4584095B2 - Motor drive circuit - Google Patents

Description

  The present invention relates to a motor drive circuit having a redundant configuration in a computer unit or the like of an automobile electronic control system.

  2. Description of the Related Art Conventionally, for example, in an electronic control system for automobiles, a motor drive circuit of a computer unit has a redundant configuration, so that even if one motor drive circuit fails, the other motor drive circuit operates normally. The method is known. (For example, refer nonpatent literature 1).

  FIG. 4 is a diagram showing a conventional motor drive circuit employing a fully parallel redundant configuration. In FIG. 4, the motor drive circuit includes an A circuit 100 using the IG1 signal as a primary power supply and a B circuit 200 using the IG2 signal as a primary power supply. The IG1 signal is a signal that becomes High when the driver operates the IG (Ignition) switch and is in the “ON” position, and the IG2 signal is when the engine is in the starting (driving) state. It is a signal that becomes High.

  One A circuit 100 of the completely parallel system performs amplification at an A circuit power source 101 using IG1 as a primary power source, an A circuit CPU (Central Processing Unit) 102 that performs main control in the A circuit, and a stage before the motor driver. The A circuit pre-driver 103, a parallel FET (Field Effect Transistor) 104 that drives the motor 300, and an FET 105 are configured. The other B circuit 200 in the completely parallel system has the same configuration, and the motor 300 is energized by both the A circuit 100 and the B circuit 200.

The A circuit 100 and the B circuit 200 operate independently of each other. However, when the other circuit is diagnosed and it is determined that the other circuit is abnormal, it is necessary to stop the output from the other circuit. Specifically, for example, when the A circuit CPU 102 monitors the B circuit CPU 202 and determines that the arithmetic function of the B circuit CPU is abnormal, the A circuit CPU 102 outputs the output from the B circuit pre-driver 203 to the FETs 204 and 205. Process to stop.
Hiroshi Shiomi, “Revised Third Edition, Introduction to Reliability Engineering”, Maruzen Co., Ltd., November 20, 1982, p. 106-120

  However, since the conventional motor drive circuit has a redundant configuration of a completely parallel system, both circuits need to have a function of diagnosing each other's circuit, and both circuits have all control functions. I was calculating.

For this reason, there has been a problem that a high-performance CPU capable of performing a diagnostic function of a partner circuit and a large number of control operations is required for each redundant circuit.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a motor drive circuit capable of a redundant configuration without requiring a plurality of high-performance CPUs.

To achieve the object according to solve the above problems, a motor driving circuit of the present invention described in claim 1 includes a main driving circuit for outputting a driving signal for driving the motor (e.g., a main CPU2 and in the embodiment A main pre-driver 3), a main monitoring circuit (for example, the monitoring IC 1 in the embodiment) that performs failure diagnosis of the main drive circuit and outputs an abnormality status signal when the failure is diagnosed, and when the abnormality status signal is input A backup drive circuit that outputs a drive signal for driving the motor (for example, backup CPU 4 and backup pre-driver 5 in the embodiment), and selects either the main drive circuit or the backup drive circuit based on the abnormal status signal The drive signal output from the selected drive circuit Switching circuit for outputting to the motor (e.g., switching circuit 7 in the embodiment) has, as the main drive circuit, the operation designating signal for designating the operation of the backup drive circuit (e.g., MOT_req in the embodiment The backup drive circuit receives the operation designation signal and operates based on the inputted operation designation signal.

According to the motor drive circuit having the above-described configuration , the backup drive circuit does not need to execute all the processes performed in the main circuit, only the processes necessary for driving the motor, because of the switching-type redundant configuration by the switching circuit. Can be performed. Further, it is possible to drive the motor with a drive signal from the backup drive circuit according to an instruction from the main drive circuit.

Furthermore, the motor drive circuit of the present invention according to claim 2 includes a main drive circuit (for example, the main CPU 2 and the main pre-driver 3 in the embodiment) that outputs a drive signal for driving the motor, and a failure of the main drive circuit. A main monitoring circuit that performs diagnosis and outputs an abnormal status signal when a failure is diagnosed (for example, the monitoring IC 1 in the embodiment), and a backup drive circuit that outputs a driving signal for driving the motor when the abnormal status signal is input (For example, the backup CPU 4 and the backup pre-driver 5 in the embodiment), the main drive circuit and the backup drive circuit are selected based on the abnormal status signal, and the output from the selected drive circuit Switching circuit that outputs a drive signal to the motor (example) If has a switching circuit 7) in the embodiment, the main power decrease detecting means for detecting a supply voltage drop of the main drive circuit (e.g., VCCA drop detection circuit 14 in the embodiment), wherein the switching circuit , said at power voltage detection at the main power drop detection means is characterized by selecting a forcing said backup drive circuit.

According to the motor drive circuit having the above-described configuration , the backup drive circuit does not need to execute all the processing performed by the main circuit because it is a switching-type redundant configuration by the switching circuit, and only the processing necessary for driving the motor. Can be performed. Further, by detecting a drop in the power supply voltage of the main drive circuit and switching to the backup drive circuit, it is possible to prevent the motor drive by the main drive circuit from continuing in a state where the power supply voltage is lowered.

Further, the motor drive circuit of the present invention according to claim 3 is a main drive circuit (for example, main CPU 2 and main pre-driver 3 in the embodiment) that outputs a drive signal for driving the motor, and a failure of the main drive circuit. A main monitoring circuit that performs diagnosis and outputs an abnormal status signal when a failure is diagnosed (for example, the monitoring IC 1 in the embodiment), and a backup drive circuit that outputs a driving signal for driving the motor when the abnormal status signal is input (For example, the backup CPU 4 and the backup pre-driver 5 in the embodiment), the main drive circuit and the backup drive circuit are selected based on the abnormal status signal, and the output from the selected drive circuit Switching circuit that outputs a drive signal to the motor (example) If has a switching circuit 7) in the embodiment, the backup power drop detection means for detecting a supply voltage drop of the backup drive circuit (e.g., VCCB drop detecting circuit 15 in the embodiment), wherein the switching circuit , upon the power supply voltage drop detection in the backup power drop detection means is characterized by selecting a forcing said main drive circuit.

According to the motor drive circuit having the above-described configuration , the backup drive circuit does not need to execute all the processes performed in the main circuit, only the processes necessary for driving the motor, because of the switching-type redundant configuration by the switching circuit. Can be performed. Further, by detecting the power supply voltage drop of the backup drive circuit and switching to the main drive circuit, it is possible to prevent the motor drive by the backup drive circuit from continuing in a state where the power supply voltage is lowered.

Furthermore, the motor drive circuit of the present invention according to claim 4 is a main drive circuit (for example, main CPU 2 and main pre-driver 3 in the embodiment) that outputs a drive signal for driving the motor, and a failure of the main drive circuit. A main monitoring circuit that performs diagnosis and outputs an abnormal status signal when a failure is diagnosed (for example, the monitoring IC 1 in the embodiment), and a backup drive circuit that outputs a driving signal for driving the motor when the abnormal status signal is input (For example, the backup CPU 4 and the backup pre-driver 5 in the embodiment), the main drive circuit and the backup drive circuit are selected based on the abnormal status signal, and the output from the selected drive circuit Switching circuit that outputs a drive signal to the motor (example) In a switching circuit 7) in the embodiment, has a, the switching circuit, the input anomaly status signal (e.g., signal input to BKUP_ENB_FB terminals in the embodiment) to the main drive circuit output It is characterized by doing.

According to the motor drive circuit having the above-described configuration , the backup drive circuit does not need to execute all the processing performed by the main circuit because it is a switching-type redundant configuration by the switching circuit, and only the processing necessary for driving the motor. Can be performed. Further, it is possible to diagnose whether the abnormal status signal is normal or not by detecting the state of the abnormal status signal input from the main monitoring circuit by the switching circuit in the main drive circuit.

Further, the motor drive circuit according to the present invention described in claim 5 is a main drive circuit that outputs a drive signal for driving the motor (for example, the main CPU 2 and the main pre-driver 3 in the embodiment) and a failure of the main drive circuit. A main monitoring circuit that performs diagnosis and outputs an abnormal status signal when a failure is diagnosed (for example, the monitoring IC 1 in the embodiment), and a backup drive circuit that outputs a driving signal for driving the motor when the abnormal status signal is input (For example, the backup CPU 4 and the backup pre-driver 5 in the embodiment), the main drive circuit and the backup drive circuit are selected based on the abnormal status signal, and the output from the selected drive circuit Switching circuit that outputs a drive signal to the motor (example) In a switching circuit 7) in the embodiment, it has a, a three or more odd number determining means for determining whether there is power to the motor, and the majority of the determination result of each determination means The main drive circuit or the backup drive circuit diagnoses whether the motor is normally driven based on the determination result.

According to the motor drive circuit having the above-described configuration , the backup drive circuit does not need to execute all the processes performed in the main circuit, only the processes necessary for driving the motor, because of the switching-type redundant configuration by the switching circuit. Can be performed. Further, since the determination means has an odd number of three or more, the number of determination means determined to be energized to the motor is compared with the number of determination means determined to be not energized to the motor, and the number of determination means is large. By adopting the method as the determination result, it is possible to perform a determination with higher reliability and to improve the resistance to a system down (motor drive function is stopped) when a determination unit failure occurs. (Even if a failure of the judgment means occurs, the system does not go down immediately). (If the number of judgment means is one, the judgment result itself is normal or abnormal, but it is only possible to believe it. If the number of judgment means is two, when there is a discrepancy between the judgment results, it is not known which judgment result can be trusted, so one judgment result Despite being normal, this also has to bring down the system.)

Furthermore, the motor drive circuit of the present invention according to claim 6 is the motor drive circuit according to any one of claims 1 to 5 , wherein the abnormal status signal is transmitted from the main monitoring circuit to the backup drive circuit. Is provided with a plurality of signal lines (for example, signal lines connected from the inh1 terminal and the inh2 terminal to the backup CPU 4 in the embodiment).

  According to the motor drive circuit having the above-described configuration, a plurality of signal lines for outputting an abnormal status signal are used, so that even if a failure occurs in some of the plurality of signal lines, the main monitoring circuit normally operates in an abnormal status. It is possible to output a signal to the backup drive circuit.

Furthermore, the motor drive circuit of the present invention according to claim 7 is the motor drive circuit according to any one of claims 1 to 5 , wherein the switching circuit includes the main drive circuit and the backup drive circuit. wherein said abnormal status signal one of selected based on the logical sum of the switching signal from the main circuit, and outputs the drive signal outputted from the drive dynamic circuit selected to the motor.

  According to the motor drive circuit having the above configuration, the drive circuit can be switched by the switching circuit in both the abnormal status signal output from the main monitoring circuit and the switching signal output from the main drive circuit.

According to the motor drive circuit of the present invention according to any one of claims 1 to 6 , the backup drive circuit executes all the processes performed in the main circuit because of the switching-type redundant configuration by the switching circuit. Therefore, it is possible to execute only the minimum processing necessary for driving the motor. Therefore, only the main drive circuit requires a high-performance CPU, and a plurality of high-performance CPUs are not required unlike the conventional fully parallel redundant configuration.

Further, according to the motor drive circuit of the present invention described in claim 1 , since the motor can be driven by the drive signal from the backup drive circuit according to the instruction of the main drive circuit, the main drive circuit is the backup drive circuit. Can be diagnosed.

Furthermore, according to the motor drive circuit of the present invention as set forth in claim 2 , by detecting a drop in the power supply voltage of the main drive circuit and switching to the backup drive circuit, the motor drive circuit of the main drive circuit in a state where the power supply voltage is lowered. It is possible to prevent the driving from continuing. Therefore, even if a failure occurs in which the power supply voltage of the main drive circuit decreases, the motor can be driven normally by the backup drive circuit.

Furthermore, according to the motor drive circuit of the present invention as set forth in claim 3 , by detecting the power supply voltage drop of the backup drive circuit and switching to the main drive circuit, the motor drive circuit of the backup drive circuit in a state where the power supply voltage is lowered. It is possible to prevent the driving from continuing. Therefore, the motor can be driven normally by the main drive circuit even if a failure occurs in which the power supply voltage of the backup drive circuit decreases.

Furthermore, according to the motor drive circuit of the present invention as set forth in claim 4 , whether the abnormal status signal is normal by detecting the state of the abnormal status signal input from the main monitoring circuit by the switching circuit in the main drive circuit. Therefore, when a failure of the main drive circuit occurs, an abnormal status signal can be reliably output from the main monitoring circuit.

Furthermore, according to the motor drive circuit of the present invention described in claim 5 , since the determination means has an odd number of three or more, it is determined that the number of determination means determined to energize the motor and that the motor is not energized. Compared with the number of determination means, and adopting the larger determination means as the determination result, it is accurately determined whether the motor is energized even if some of the plurality of determination means fails It is possible to improve resistance to failure.
Furthermore, according to the motor drive circuit of the present invention described in claim 6, even if a failure occurs in some of the plurality of signal lines by using a plurality of signal lines for outputting the abnormal status signal, Since the main monitoring circuit can normally output the abnormal status signal to the backup drive circuit, it is possible to improve the tolerance against the failure of the signal line.
Furthermore, according to the motor drive circuit of the present invention as set forth in claim 7, the drive circuit can be switched both in the abnormal status signal output from the main monitoring circuit and the switching signal output from the main drive circuit. The drive circuit can be switched even during normal operation of the drive circuit.

A motor drive circuit according to an embodiment of the present invention will be described below with reference to FIGS.
1 and 2 are configuration diagrams showing the configuration of a motor drive circuit according to an embodiment of the present invention. 2 is a block diagram showing the configuration of the switching circuit 7 in FIG. 1. The block enclosed by the broken line in FIG. 2 is connected to the terminal of the same name in the frame of the switching circuit 7 shown in FIG.

  In FIG. 1, a monitoring IC 1 is an IC (Integrated Circuit) that diagnoses the main CPU 2 and supplies power to the main CPU 2 and the main pre-driver 3. The main CPU 2 diagnoses the monitoring IC 1 and the backup CPU 4 and instructs the main pre-driver 3 to output a drive signal.

  The main pre-driver 3 inputs an instruction from the main CPU 2 from the DRI2 terminal, and outputs a drive signal from the DRO2a terminal and the DRO2b terminal according to the instruction. The main pre-driver 3 can output drive signals separately from the DRO2a terminal and the DRO2b terminal, or can simultaneously output drive signals from both.

  The drive signal output from the DRO2a terminal is input to the gate of the FET 1 in FIG. 1 via the switch Pri1-1 and the diode D1 in FIG. On the other hand, the drive signal output from the DRO2b terminal is input to the gate of the FET2 via the switch Pri1-2 and the diode D2. The switches Pri1-1 and Pri1-2 are switches that are turned on when the switching signal is at a high level and turned off when the switching signal is at a low level.

  Further, when the main CPU 2 outputs a drive signal from the backup pre-driver 5, the main CPU 2 outputs a MOT_req signal from the MOT_req_out terminal. When the backup CPU 4 inputs the MOT_req signal from the main CPU 2 from the MOT_req_in terminal, the backup CPU 4 instructs the backup pre-driver 5 to output a drive signal from the OUT1 terminal and the OUT2 terminal.

  The backup pre-driver 5 inputs an instruction from the backup CPU 4 at the IN1 terminal and the IN2 terminal, and outputs a drive signal from the VGS1 terminal and the VGS2 terminal according to the instruction.

  The drive signal output from the VGS1 terminal is input to the switching circuit 7, and is input to the gate of the FET 1 in FIG. 1 via the switch Pri2-1 and the diode D3 in FIG. On the other hand, the drive signal output from the VGS2 terminal is input to the gate of the FET 2 via the switch Pri2-2 and the diode D4. The switches Pri2-1 and Pri2-2 are switches that are turned on when the switching signal is at a high level and turned off when the switching signal is at a low level.

  The Pacc sensor 6 is a pressure sensor that generates a trigger for driving the motor 8, and the main CPU 2 and the backup CPU 4 perform arithmetic processing based on the output of the Pacc sensor 6 to drive the motor 8.

  The backup CPU 4 performs an operation as requested by the main CPU 2 based on the MOT_req signal during normal operation of the main CPU 2, and performs arithmetic processing for driving the motor 8 based on the output of the Pacc sensor 6 when there is an abnormality in the main CPU 2. Do it yourself. The backup CPU 4 does not perform arithmetic processing other than the arithmetic processing necessary for driving the motor 8 or diagnosis of the main CPU 2.

  The main CPU 2 monitors the voltage at the point X corresponding to the upstream side of the motor 8 at the three terminals of the MCK terminal, the MOT_COMP1 terminal, and the MOT_COMP2 terminal. When FET1 or FET2 is turned ON by the input of each drive signal described above, the voltage at the point X becomes a high level voltage, and it can be confirmed by the main CPU 2 that the motor 8 is energized. On the other hand, when both FET1 and FET2 are turned OFF, the voltage at the point X becomes Low, and it can be confirmed by the main CPU 2 that the motor 8 is not energized.

  The MCK terminal of the main CPU 2 is a terminal capable of A / D conversion inside, and directly monitors the voltage of the MCK terminal to determine whether it is High or Low. On the other hand, the MOT_COMP1 terminal and the MOT_COMP2 terminal are inputted with signals after High / Low determination by the comparator CMP1 and the comparator CMP2.

  When determining whether the voltage at the point X is High or Low, the main CPU 2 compares the number of terminals determined as High and the number of terminals determined as Low if the determination based on the input to the three terminals does not match. The judgment with the larger number of terminals is adopted.

  For example, when the main CPU 2 determines that the input to the MCK terminal and the MOT_COMP1 terminal is High, and determines that the input to the MOT_COMP2 terminal is Low, the number of terminals determined to be High is larger, so the voltage at the X point is High. It is determined that the motor 8 is energized.

  Thus, by providing three determination means for determining whether the motor 8 is normally energized, it is possible to accurately determine even when one of the determination means fails, Resistance to failure can be improved. The number of determination means is not limited to three, and an equivalent effect can be obtained even with an odd number of three or more.

  In the present embodiment, the relationship between the main CPU 2 and the backup CPU 4 is not a completely parallel redundant configuration but a switching-type redundant configuration by the switching circuit 7, so the backup CPU 4 has all the functions executed by the main CPU 2. It is not necessary to perform only the minimum necessary arithmetic processing for driving the motor 8. Therefore, it is not necessary to use a high-performance CPU as the backup CPU 4.

Next, a procedure for switching to the backup side circuit when an abnormality occurs in the main CPU 2 will be described in detail.
First, when an abnormality occurs in the main CPU 2, the abnormality is detected by the monitoring IC 1. After detecting the abnormality of the main CPU 2, the monitoring IC 1 sets all the inh1 to inh4 terminals to High and outputs them (abnormal status signal). When the main CPU is normal, all the inh1 to inh4 terminals are set to Low.

  Both the inh1 terminal and the inh2 terminal are connected to the backup CPU 4. When the backup CPU 4 detects that either the inh1 terminal or the inh terminal 2 is High, the backup CPU 4 performs arithmetic processing based on the output from the Pacc sensor 6 and instructs the backup predriver 5 to output a drive signal.

  Here, by assigning two terminals, the inh1 terminal and the inh2 terminal, to the notification from the monitoring IC 1 to the backup CPU 4, even if an abnormality occurs in the connection by one of the terminals, the notification is normally performed by the other terminal. It is possible to improve the tolerance to failure. Note that the number of terminals used for notification is not limited to two, and an equivalent effect can be obtained if the number is two or more.

  On the other hand, both the inh3 terminal and the inh4 terminal are connected to one input terminal of the OR circuit 9. The other input terminal of the OR circuit 9 is connected to the inh5 terminal of the main CPU 2. The inh5 terminal diagnoses whether the main CPU 2 can normally drive the motor 8 by the drive signal from the backup pre-driver 5. Used when performing.

  Here, by assigning two terminals of the inh3 terminal and the inh4 terminal to the connection from the monitoring IC 1 to the OR circuit 9, even if an abnormality occurs in the connection by one of the terminals, the signal is normally transmitted by the other terminal. It is possible to improve resistance to failure. Note that the number of terminals used for transmission is not limited to two, and an equivalent effect can be obtained if the number is two or more.

  An output of the OR circuit 9 (hereinafter referred to as an inh signal) is input to the switching circuit 7 and connected to the input terminals of the AND circuit 10 and the OR circuit 12 of FIG. 2 and to the BKUP_ENB_FB terminal of the main CPU 2. Connected.

  The BKUP_ENB_FB terminal is used for checking whether or not the inh signal is normally output when the main CPU 2 is operating normally, for example, in the initial diagnosis at the time of system startup. Hereinafter, an example of processing performed by the monitoring IC 1 and the main CPU 2 during initial diagnosis will be described.

  First, at the time of initial diagnosis, the main CPU 2 transmits a signal indicating that an abnormality has occurred in the main CPU 2 to the monitoring IC 1. When the monitoring IC 1 receives a signal from the main CPU 2, the inh1 terminal to inh4 terminal are set to High and output.

  Since this output is input to the switching circuit 7 via the OR circuit 9 and fed back to the BKUP_ENB_FB terminal, if the inh signal is normally output, the main CPU 2 detects High at the BKUP_ENB_FB terminal. When the inh signal does not become High due to a failure of the switching circuit or the like, the main CPU 2 can detect an abnormality at the BKUP_ENB_FB terminal.

  Returning to FIG. 2, the inh signal is input to one input terminal of the AND circuit 10 and the OR circuit 11, but the output of the VCCA drop detection circuit 14 is input to the other input terminal. The VCCA drop detection circuit 14 outputs Low when the power supply VCCA that is the power supply of the main CPU 2 and the main pre-driver 3 is normal, and outputs High when the power supply VCCA falls.

  The output of the AND circuit 10 is connected to one input terminal of the OR circuit 11, and the output of the VCCB drop detection circuit 15 is input to the other input terminal of the OR circuit 11. The output of the OR circuit 12 is connected to one input terminal of the AND circuit 13, and the output of the VCCB drop detection circuit 15 is input to the other input terminal of the AND circuit 13.

  The VCCB drop detection circuit 15 outputs Low when the power supply VCCB that is the power supply of the backup CPU 4 and the backup pre-driver 5 is normal, and outputs High when the power supply VCCB is lowered.

  When the power supply VCCB is lowered, the output of the OR circuit 11 is High, the output of the AND circuit 13 is Low, regardless of the logic value of the inh signal, the switches Pri1-1 and Pri1-2 are ON, the switch Pri2-1, Pri2-2 is turned OFF. That is, when the power supply VCCB decreases, the drive signal from the main pre-driver 3 is forcibly selected and output to the FET1 and FET2.

  Similarly, when the power supply VCCA is lowered, the output of the AND circuit 10 is Low and the output of the OR circuit 12 is High regardless of the logical value of the inh signal. If the power supply VCCB is normal, the output of the OR circuit 11 is The output of the Low and AND circuit 13 is High, the switches Pri1-1 and Pri1-2 are OFF, and the switches Pri2-1 and Pri2-2 are ON. That is, when the power supply VCCA decreases, the drive signal from the backup pre-driver 3 is forcibly selected and output to the FET1 and FET2.

  FIG. 3 is a diagram showing an example of the circuit configuration of the VCCA drop detection circuit 14 and the VCCB drop detection circuit 15. In FIG. 3, when the power supply VCCA decreases, the transistors Tr2, Tr3, Tr6 are turned on, the transistor Tr5 is turned off, and the voltage at the point Y in FIG. 3 becomes High. The voltage at point Y is the output of VCCA drop detection circuit 14 in FIG.

  On the other hand, when the power supply VCCB is lowered, the transistor Tr5 is turned on, the transistor Tr6 is turned off, and the voltage at the point Z in FIG. 3 becomes High. The voltage at point Z is the output of VCCB drop detection circuit 15 in FIG.

  By detecting the voltage drop of the power supply VCCA and the power supply VCCB and switching the switches Pri1-1, Pri1-2, Pri2-2, Pri2-2 based on the detection result, the power supply voltage is supplied from the main predriver 3 and the backup predriver 5. It is possible to select a normal circuit and always output a normal drive signal to FET1 and FET2.

  As mentioned above, although embodiment of this invention was explained in full detail, the concrete structure is not restricted to this embodiment, The design change etc. of the range which does not deviate from the summary of this invention are included.

  The present invention is suitable for use in a redundant motor drive circuit in a computer unit of an automotive electronic control system.

It is a block diagram which shows the structure of the motor drive circuit concerning one Embodiment of this invention. It is a block diagram which shows the structure of the switching circuit 7 of FIG. FIG. 3 is a diagram illustrating an example of a circuit configuration of a VCCA drop detection circuit 14 and a VCCB drop detection circuit 15 in FIG. 2. It is a block diagram which shows the structure of the redundant structure motor drive circuit of a complete parallel system in a prior art.

Explanation of symbols

1 ... Monitoring IC (Main monitoring circuit)
2 ... Main CPU
3 ... Main pre-driver 4 ... Backup CPU
DESCRIPTION OF SYMBOLS 5 ... Backup pre-driver 7 ... Switching circuit 8 ... Motor 14 ... VCCA fall detection circuit (main power supply fall detection means)
15 ... VCCB drop detection circuit (backup power supply drop detection means)

Claims (7)

A main drive circuit for outputting a drive signal for driving the motor;
A main monitoring circuit that performs a failure diagnosis of the main drive circuit and outputs an abnormal status signal when the failure is diagnosed;
A backup drive circuit that outputs a drive signal for driving the motor when the abnormal status signal is input;
A switching circuit that selects either the main drive circuit or the backup drive circuit based on the abnormality status signal, and outputs the drive signal output from the selected drive circuit to the motor;
Have
The main drive circuit outputs an operation designation signal designating an operation of the backup drive circuit,
It said backup drive circuit inputs the operation designation signal, motors driving circuit, characterized in that it operates based on the input said operating specification signal. A main drive circuit for outputting a drive signal for driving the motor;
A main monitoring circuit that performs a failure diagnosis of the main drive circuit and outputs an abnormal status signal when the failure is diagnosed;
A backup drive circuit that outputs a drive signal for driving the motor when the abnormal status signal is input;
A switching circuit that selects either the main drive circuit or the backup drive circuit based on the abnormality status signal, and outputs the drive signal output from the selected drive circuit to the motor;
Main power supply drop detecting means for detecting a power supply voltage drop of the main drive circuit ;
Have
The switching circuit, the main power supply when the power supply voltage drop detection in the drop detection means, motors drive circuit and selects forcibly said backup drive circuit. A main drive circuit for outputting a drive signal for driving the motor;
A main monitoring circuit that performs a failure diagnosis of the main drive circuit and outputs an abnormal status signal when the failure is diagnosed;
A backup drive circuit that outputs a drive signal for driving the motor when the abnormal status signal is input;
A switching circuit that selects either the main drive circuit or the backup drive circuit based on the abnormal status signal, and outputs the drive signal output from the selected drive circuit to the motor;
Backup power supply lowering detection means for detecting a power supply voltage drop of the backup drive circuit ;
Have
The switching circuit, said backup when the power supply voltage drop detection in the power drop detection means, motors drive circuit and selects forcibly the main drive circuit. A main drive circuit for outputting a drive signal for driving the motor;
A main monitoring circuit that performs a failure diagnosis of the main drive circuit and outputs an abnormal status signal when the failure is diagnosed;
A backup drive circuit that outputs a drive signal for driving the motor when the abnormal status signal is input;
A switching circuit that selects either the main drive circuit or the backup drive circuit based on the abnormality status signal, and outputs the drive signal output from the selected drive circuit to the motor;
Have
The switching circuit, motors drive circuit and outputs an abnormality status signal the input to the main drive circuit. A main drive circuit for outputting a drive signal for driving the motor;
A main monitoring circuit that performs a failure diagnosis of the main drive circuit and outputs an abnormal status signal when the failure is diagnosed;
A backup drive circuit that outputs a drive signal for driving the motor when the abnormal status signal is input;
A switching circuit that selects either the main drive circuit or the backup drive circuit based on the abnormality status signal, and outputs the drive signal output from the selected drive circuit to the motor;
Three or more odd number judging means for judging whether or not the motor is energized ;
Have
Motor drive circuit, characterized in that to diagnose whether the said main driving circuit or the backup drive circuit based on the determination result of the majority of the determination results each determining means is driving the motor normally . 6. The motor drive circuit according to claim 1 , comprising a plurality of signal lines for outputting the abnormal status signal from the main monitoring circuit to the backup drive circuit. The switching circuit, the driving of the selected based main drive circuit and one of said backup drive circuit to the logical sum of the switching signal from the anomaly status signal and said main circuit, is outputted from the drive dynamic circuit selected the motor drive circuit according to any one of claims 1 to 6, characterized in that for outputting a signal to said motor.

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