JP5949576B2 - Load drive circuit - Google Patents

Description

  The present invention relates to a load driving circuit for driving a load.

  2. Description of the Related Art Conventionally, as shown in, for example, Patent Document 1, a vehicle electronic control device that includes at least two microcomputers and in which a first microcomputer that is one of the two microcomputers performs control related to a traveling function of the vehicle has been proposed. Has been. The second microcomputer, which is the other of the two microcomputers, monitors whether or not the first microcomputer is operating normally. The vehicle electronic control device has a first microcomputer separately from the two microcomputers. Monitoring means for monitoring whether or not the device is operating normally is provided. The first microcomputer outputs a monitoring target signal to the second microcomputer and the monitoring means every predetermined time. Each of the second microcomputer and the monitoring means determines that the first microcomputer is unstable and outputs a reset signal to the first microcomputer if the monitoring target signal from the first microcomputer is not input for a predetermined monitoring time or longer. .

JP 2009-184423 A

  As described above, in the vehicle electronic control device disclosed in Patent Document 1, each of the second microcomputer and the monitoring means is configured such that the monitoring target signal from the first microcomputer is not input for a predetermined monitoring time or longer. Is determined to be unstable, and a reset signal is output to the first microcomputer. Therefore, the driving of the element (drive unit) controlled by the first microcomputer (first control unit) is stopped.

  Therefore, in view of the above problems, the present invention has an object to provide a load drive circuit that maintains the drive state of the drive unit controlled by the first control unit even when the first control unit is unstable. To do.

In order to achieve the above-described object, the present invention provides a drive unit (10) for driving a load, a first control unit (20) for outputting a control signal to the drive unit, and a first control unit. A load driving circuit having a first supply unit (30) for supplying a power supply voltage, and a monitoring unit (40) for monitoring the states of the first control unit and the first supply unit. When it is determined that at least one of the first control unit and the first supply unit is in an unstable state, a control signal is output to the drive unit instead of the first control unit, and the state of the first control unit is changed to A second control unit (41) for monitoring and outputting a monitoring signal including the monitored result; and a signal generation unit (42) for outputting a control signal based on the monitoring signal and the first power supply voltage. In the signal generation unit, at least one of the monitoring signal and the first power supply voltage is higher than the Hi signal. Becomes lower Lo signal Belle, a logic gate (43) which outputs a Hi signal, and wherein when the Hi signal is inputted from the logic gate, the output unit for outputting a control signal (44), to have a To do.

  According to this, even if the first control unit (20) or the first supply unit (30) becomes unstable, the drive state of the drive unit (10) is maintained.

Further, when the second control unit (41) and the first supply unit (30) become unstable, it becomes difficult to output a Hi signal having a higher voltage level than the Lo signal. However, even if it falls into such an unstable state, it is easy for the second control unit (41) and the first supply unit (30) to output a Lo signal having a voltage level lower than that of the Hi signal. Therefore, according to the above configuration, unlike the configuration in which the logic gate outputs the Hi signal when at least one of the monitoring signal and the first power supply voltage becomes the Hi signal, the second control unit (41) and the first supply unit Even if (30) becomes unstable, the Hi signal is likely to be output from the logic gate (43). Therefore, it is suppressed that it becomes difficult to determine each state of the 1st control part (20) and the 1st supply part (30).

  Incidentally, the output unit includes a second supply unit (45) that is driven when a Hi signal is output from the logic gate, and a conversion unit (46) that converts the second power supply voltage supplied from the second supply unit into a control signal. ) Can be employed.

  In addition, the structure which has a delay circuit (50) which delays the control signal output from the 1st control part is preferable. According to this, even if the first control unit (20) and the first supply unit (30) become unstable and the control signal output from the first control unit (20) becomes unstable, the instability The time until a control signal is input to the drive unit (10) is delayed. During this delayed time, the monitoring unit (40) determines the states of the first control unit (20) and the first supply unit (30), and determines that at least one of both is unstable, A control signal is output to a drive part (10). Therefore, an unstable control signal is input to the drive unit (10), and the drive state of the drive unit (10) is suppressed from becoming unstable.

It is a block diagram which shows schematic structure of the load drive circuit which concerns on 1st Embodiment. It is a flowchart explaining operation | movement of the load drive circuit when a 1st control part is unstable. It is a timing chart explaining the signal of the load drive circuit when the 1st control part is unstable. It is a flowchart explaining operation | movement of the load drive circuit when a 1st supply part is unstable. It is a timing chart explaining the signal of a load drive circuit when the 1st supply part is unstable.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
A load driving circuit according to the present embodiment will be described with reference to FIGS. As shown in FIG. 1, the load drive circuit 100 includes a drive unit 10, a first control unit 20, a first supply unit 30, and a monitoring unit 40 as main parts. The drive unit 10 drives the load 200, and the first control unit 20 outputs a control signal to the drive unit 10. The first supply unit 30 supplies the first power supply voltage to the first control unit 20, and the monitoring unit 40 monitors the states of the first control unit 20 and the first supply unit 30. When the monitoring unit 40 determines that at least one of the first control unit 20 and the first supply unit 30 is in an unstable state, the monitoring unit 40 outputs a control signal to the drive unit 10 instead of the first control unit 20. The load driving circuit 100 according to the present embodiment includes a delay circuit 50 in addition to the main parts 10 to 40 described above. The delay circuit 50 delays the control signal output from the first control unit 20.

  As shown in FIG. 1, the first control unit 20 and the monitoring unit 40 are electrically connected to each other, and one element of the first control unit 20 and the monitoring unit 40 (a second control unit 41 described later). Is driven by the first power supply voltage supplied from the first supply unit 30. The first control unit 20 and the drive unit 10 are electrically connected via a delay circuit 50, and one element (a second supply unit 45 and a conversion unit 46, which will be described later) is driven by one element of the monitoring unit 40. The unit 10 is electrically connected. Thereby, the control signal output from the first control unit 20 is indirectly input to the driving unit 10 via the delay circuit 50, and the control signal output from the monitoring unit 40 is directly input to the driving unit 10. Is done.

  The monitoring unit 40 includes a second control unit 41 and a signal generation unit 42. The second control unit 41 monitors the state of the first control unit 20 and outputs a monitoring signal including the monitored result to the signal generation unit 42. As shown in FIG. 1, the 1st control part 20 and the 2nd control part 41 are mutually connected electrically, and mutually monitor the state of each other. A first monitoring signal is input from the first control unit 20 to the second control unit 41, and a second monitoring signal is input from the second control unit 41 to the first control unit 20. Each of the first monitoring signal and the second monitoring signal is a watchdog signal.

  The first control unit 20 determines that the second control unit 41 is in an abnormal state if the second monitoring signal is not input from the second control unit 41 even after a predetermined time, and a reset signal is sent to the second control unit 41. Is output. Thereby, the 2nd control part 41 is reset. On the other hand, if the first monitoring signal is not input from the first control unit 20 even after a predetermined time, the second control unit 41 determines that the first control unit 20 is in an abnormal state and performs the first control. A reset signal is output to the unit 20. Thereby, the 1st control part 20 is reset.

  Further, as described above, the second control unit 41 monitors the state of the first control unit 20 and outputs a monitoring signal including the state of the first control unit 20 to the signal generation unit 42. When the first control unit 20 is stable, the second control unit 41 outputs a Hi signal having a high voltage level as a monitoring signal. When the first control unit 20 is unstable, the voltage level is high as the monitoring signal. A Lo signal lower than the signal is output.

  The signal generation unit 42 outputs a control signal to the drive unit 10 based on the monitoring signal and the first power supply voltage. The signal generation unit 42 includes a logic gate 43 and an output unit 44. The logic gate 43 outputs a Hi signal to the output unit 44 when at least one of the monitoring signal and the first power supply voltage becomes a Lo signal having a voltage level lower than that of the Hi signal. The logic gate 43 according to the present embodiment is a NAND gate, and one of the two input terminals is electrically connected to the second control unit 41, and the other of the two input terminals is electrically connected to the first supply unit 30. Connected. The output terminal of the logic gate 43 is connected to the output unit 44. Therefore, when the first control unit 20 becomes unstable and the monitoring signal becomes the Lo signal, and when the first supply unit 30 becomes unstable and the voltage level of the first power supply voltage becomes the Lo level. In at least one of the cases, a Hi signal is output from the logic gate 43 to the output unit 44. In contrast, when the first control unit 20 is stable and the first supply unit 30 is stable, the Lo signal is output from the logic gate 43 to the output unit 44.

  The output unit 44 outputs a control signal to the drive unit 10 when the Hi signal is input from the logic gate 43. The output unit 44 includes a second supply unit 45 and a conversion unit 46. The second supply unit 45 is in the non-driven state when the Lo signal is output from the logic gate 43, but shifts to the driven state when the Hi signal is output from the logic gate 43. In other words, the second supply unit 45 is not driven when the first control unit 20 and the first supply unit 30 are stable, but at least one of the first control unit 20 and the first supply unit 30 is unstable. Then, the driving state is entered.

  The conversion unit 46 converts the second power supply voltage supplied from the second supply unit 45 into a control signal. Specifically, the conversion unit 46 is a resistor. As shown in FIG. 1, the second supply unit 45 is electrically connected to the drive unit 10 via a conversion unit 46. The output terminals of the first control unit 20 and the second supply unit 45 are electrically connected. Therefore, the control signal output from the first control unit 20 may wrap around the second supply unit 45. However, the wraparound of the control signal to the second supply unit 45 is suppressed by the conversion unit 46. On the contrary, there is a possibility that the control signal output from the conversion unit 46 wraps around the first control unit 20. However, the wraparound of the control signal to the first control unit 20 is suppressed by the delay circuit 50 described later. Incidentally, as the conversion unit 46, a diode may be employed instead of the resistor. In this case, the anode terminal of the conversion unit 46 is connected to the second supply unit 45.

  The delay circuit 50 delays the control signal output from the first control unit 20 from being input to the drive unit 10. The delay circuit 50 includes a resistor 51 and a capacitor 52. As shown in FIG. 1, the first control unit 20 is electrically connected to the drive unit 10 via a resistor 51, and a capacitor 52 is provided between the midpoint between the resistor 51 and the drive unit 10 and the ground. Electrically connected. The time for delaying the control signal by the delay circuit 50 (hereinafter referred to as delay time) is determined by a time constant CR that depends on the resistance of the resistor 51 and the capacitance of the capacitor 52.

  The delay time is equal to or longer than the time until the voltage level of the control signal output from the first control unit 20 shifts from the Hi level to the Lo level (hereinafter referred to as the transition time). Set to Of course, the transition time is expected to vary variously depending on the unstable state of the first control unit 20. However, at the design stage of the load driving circuit 100, the transition time can be calculated by simulating various trouble states in which the first control unit 20 shifts from a stable state to an unstable state. Therefore, the above-described delay time can be set by setting the time constant CR based on the calculated transition time.

  Next, the operation of the load driving circuit 100 when the first control unit 20 is unstable will be described with reference to FIGS. In FIG. 3, the control signal output from the first control unit 20 is illustrated such that the time lag is zero and the level falls from the Hi level to the Lo level. However, in reality, there is a slight time lag before falling from the Hi level to the Lo level. Although this time lag corresponds to the above-described transition time, the transition time is shorter than the delay time as described above.

  As shown in FIG. 2, the second control unit 41 always determines whether or not the first control unit 20 is abnormal by monitoring the first monitoring signal (step S10). As shown in FIG. 3, when the first monitoring signal is not input even after the predetermined time T has elapsed, the second control unit 41 outputs the Lo signal as a monitoring signal to the logic gate 43 (step S20). Thereby, the Hi signal is output from the logic gate 43, and the second supply unit 45 is activated (step S30). As a result, the second power supply voltage of the second supply unit 45 is supplied to the conversion unit 46 (step S40). The converter 46 drops the supplied second power supply voltage to generate a control signal, and outputs the generated control signal to the drive unit 10 (step S50). Thereafter, step S50 is repeated until the first control unit 20 returns to the stable state (step S60). As a result, as shown in FIG. 3, the voltage level of the signal (input signal) input to the drive unit 10 is always maintained at the Hi level, and the drive state of the drive unit 10 is maintained. And the drive state of the load 200 is also maintained.

  When the first control unit 20 returns to the stable state, the first monitoring signal is input to the second control unit 41. Then, the second control unit 41 outputs a Hi signal to the logic gate 43 as a monitoring signal. Thereby, the Lo signal is output from the logic gate 43, and the second supply unit 45 shifts to the non-driven state. As a result, the load drive circuit 100 returns to a normal operation in which the drive unit 10 is controlled by the first control unit 20 (step S70).

  Next, the operation of the load driving circuit 100 when the first supply unit 30 is unstable will be described with reference to FIGS. In FIG. 4, the first power supply voltage and the control signal output from the first control unit 20 are illustrated such that the time lag is zero and the level falls from the Hi level to the Lo level. However, in reality, there is a slight time lag before falling from the Hi level to the Lo level. Although this time lag corresponds to the above-described transition time, the transition time is shorter than the delay time as described above.

  As shown in FIG. 4, the logic gate 43 always determines whether or not the first supply unit 30 is abnormal by monitoring the voltage level of the first power supply voltage (step S80). As shown in FIG. 5, when the voltage level of the first power supply voltage drops, the Lo level voltage (Lo signal) is input to the logic gate 43 (step S90). Thereby, the Hi signal is output from the logic gate 43, and the second supply unit 45 is activated (step S100). As a result, the second power supply voltage of the second supply unit 45 is supplied to the conversion unit 46 (step S110). The converter 46 drops the supplied second power supply voltage to generate a control signal, and outputs the generated control signal to the drive unit 10 (step S120). Hereinafter, step S120 is repeated until the first supply unit 30 returns to the stable state (step S130). As a result, as shown in FIG. 5, the voltage level of the signal (input signal) input to the drive unit 10 is always maintained at the Hi level, and the drive state of the drive unit 10 is maintained. And the drive state of the load 200 is also maintained.

  When the first supply unit 30 returns to the stable state, the voltage level of the first power supply voltage is recovered. Thereby, the Lo signal is output from the logic gate 43, and the second supply unit 45 shifts to the non-driven state. As a result, the load drive circuit 100 returns to a normal operation in which the drive unit 10 is controlled by the first control unit 20 (step S140).

  Next, functions and effects of the load driving circuit 100 according to the present embodiment will be described. As described above, when the monitoring unit 40 determines that at least one of the first control unit 20 and the first supply unit 30 is in an unstable state, the monitoring unit 40 controls the driving unit 10 instead of the first control unit 20. Output a signal. According to this, even if the 1st control part 20 and the 1st supply part 30 become unstable, the drive state of drive part 10 is maintained.

  When at least one of the monitoring signal and the first power supply voltage becomes a Lo signal, the signal generation unit 42 outputs a Hi signal, and when the Hi signal is input from the logic gate 43, the signal generation unit 42 outputs a control signal. Part 44.

  When the second control unit 41 and the first supply unit 30 become unstable, it becomes difficult to output a Hi signal having a higher voltage level than the Lo signal. However, even if it falls into such an unstable state, it is easy for the 2nd control part 41 and the 1st supply part 30 to output the Lo signal whose voltage level is lower than a Hi signal. Therefore, according to the above configuration, unlike the configuration in which the logic gate outputs the Hi signal when at least one of the monitoring signal and the first power supply voltage becomes the Hi signal, the second control unit 41 and the first supply unit 30 Even if becomes unstable, the Hi signal is likely to be output from the logic gate 43. Therefore, it is suppressed that it becomes difficult to determine the state of each of the first control unit 20 and the first supply unit 30.

  The load driving circuit 100 includes a delay circuit 50 that delays the control signal output from the first control unit 20. The time (delay time) for delaying the first control signal by the delay circuit 50 is unstable in the first control unit 20, and the voltage level of the control signal output from the first control unit 20 is changed from the Hi level to the Lo level. It is set to be longer than the time until transition to (transition time). According to this, even if the first control unit 20 or the first supply unit 30 becomes unstable and the control signal output from the first control unit 20 becomes unstable, the unstable control signal is not transferred to the drive unit. The time until input to 10 is delayed. During this delayed time, the monitoring unit 40 determines the state of each of the first control unit 20 and the first supply unit 30, and determines that at least one of them is unstable, the control signal is sent to the drive unit 10. Output to. Therefore, an unstable control signal is input to the drive unit 10 and the drive state of the drive unit 10 is prevented from becoming unstable.

  The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

  In this embodiment, the application of the load driving circuit 100 is not particularly mentioned. However, the load drive circuit 100 can also be applied to a vehicle. When the ignition switch of the vehicle is turned on, the first supply unit 30 is supplied with a voltage from a first battery mounted on the vehicle. The second supply unit 45 is supplied with a voltage from the second battery that is always energized in order to store the information stored in the volatile memory of the vehicle. Each of the supply units 30 and 45 converts the voltage supplied from the battery into a voltage suitable for driving the load driving circuit 100. The first supply unit 30 starts voltage conversion when the ignition switch is turned on, but the second supply unit 45 starts voltage conversion when the Hi signal is input from the logic gate 43 and enters the drive state. Incidentally, in the case of this application example, the first control unit 20 corresponds to a main microcomputer, and the second control unit 41 corresponds to a sub-microcomputer. The load 200 corresponds to an engine or the like.

  In the present embodiment, the first control unit 20 monitors the second monitoring signal output from the second control unit 41, and the second control unit 41 monitors the first monitoring signal output from the first control unit 20. This is an example of mutual monitoring. However, it is also possible to employ a configuration in which each of the control units 20 and 41 monitors each other by detecting a serial communication abnormality.

  In the present embodiment, an example in which the logic gate 43 is a NAND gate is shown. However, as the logic gate 43, a configuration having an AND gate and a NOT gate provided at the output terminal of the AND gate can be adopted. Alternatively, an AND gate can be adopted as the logic gate 43 as long as the second supply unit 45 is in a driving state when a Lo signal is input.

DESCRIPTION OF SYMBOLS 10 ... Drive part 20 ... 1st control part 30 ... 1st supply part 40 ... Monitoring part 100 ... Load drive circuit

Claims (3)

A drive unit (10) for driving a load;
A first control unit (20) for outputting a control signal to the drive unit;
A first supply unit (30) for supplying a first power supply voltage to the first control unit;
A load driving circuit having a monitoring unit (40) for monitoring a state of each of the first control unit and the first supply unit,
The monitoring unit
When it is determined that at least one of the first control unit and the first supply unit is in an unstable state, the control signal is output to the driving unit instead of the first control unit ,
The second control unit (41) that monitors the state of the first control unit and outputs a monitoring signal including the monitored result, and outputs the control signal based on the monitoring signal and the first power supply voltage. A signal generator (42) that
The signal generator includes a logic gate (43) that outputs the Hi signal when at least one of the monitoring signal and the first power supply voltage becomes a Lo signal having a voltage level lower than that of the Hi signal. An output section (44) for outputting the control signal when the Hi signal is input, and a load driving circuit. The output unit includes a second supply unit (45) that is driven when a Hi signal is output from the logic gate, and a conversion unit (2) that converts a second power supply voltage supplied from the second supply unit into the control signal. 46) . The load driving circuit according to claim 1, further comprising: Load driving circuit according to claim 1 or 2, characterized in that a delay circuit for delaying a control signal output from said first control unit (50).

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