JP4534488B2 - Data storage device, data storage control device, data storage control method, and data storage control program - Google Patents

Description

  The present invention relates to a data storage device, a data storage control device, a data storage control method, and a data storage control program that store all data in a memory composed of a plurality of memory banks and simultaneously read out a plurality of desired data from the memory.

  As shown in FIG. 24, the semiconductor memory has a structure in which the memory cell MC is accessed by designating the word line WL and the bit line BL, and is located at a position where the activated one word line and the bit line intersect. Data stored in the memory cell MC is read out.

  In the semiconductor memory having such a structure, data of a plurality of word lines share the same bit line. Therefore, when a plurality of word lines WL1 and WL2 are designated as shown in FIG. Since it is broken, data on different word lines cannot be accessed simultaneously.

  Further, data can be read from independent banks at the same time. As shown in FIG. 26, the memory is divided into a plurality of banks BK1 to BKn, and a plurality of word lines are designated by specifying different addresses for each bank. However, data on different word lines in the bank cannot be accessed simultaneously. That is, data stored on the same word line from each bank can be read simultaneously, and data stored on different word lines in the same bank cannot be read simultaneously.

  Here, the bank means a memory unit in which a word address can be controlled independently in a memory composed of a plurality of word lines and a plurality of bit lines.

  Conventionally, processing such as pattern recognition of image data has been performed by recognizing a specific data array included in input data.

  For example, a buffer memory that can store several lines of image data and output in pixel units, a data processor that includes multiple processor elements that can process several bits of width data, and that can process data simultaneously in multiple processor elements, and matching A control information memory for storing reference data and control data, and each processor element of the data processor selects a group of image data in a matrix centered on a target pixel addressed to itself among the image data output from the buffer memory. Then, it is binarized using a threshold value, converted into target data divided into serial array bit widths that can be processed by the processor element, and it is determined whether it matches the reference data in the control information memory in the same format. (For example, refer to Patent Document 1).

JP-A-10-332378

  For example, as shown in FIG. 27, consider a case where there is a pattern to be accessed simultaneously for a certain image, and this is raster scanned from the upper left. If the bank is divided into five, which is the number of simultaneous accesses, and the data is arranged as shown in the figure, it can be accessed simultaneously for the first five times. However, when the simultaneous access pattern comes to the position shown in FIG. Since multiple word lines are accessed, simultaneous access is not possible. In order to access this data simultaneously, it is stored either in another bank or on the same word line. Depending on the pattern, simultaneous access may be possible if the storage location is selected appropriately, but in order to enable simultaneous access to any pattern, the bank is divided so finely that one bank consists of only one word line. There is a need. However, the finer the number of banks, the larger the number of banks. As the number of banks increases, the following problems occur.

  For example, as shown in FIG. 29, if the size of the reference area is 5 pixels × 5 pixels, the required number of memory banks is 25. However, if the number of banks increases, the bank address management becomes difficult. There are problems such as an increase in address lines, an increase in chip area, and an increase in power consumption.

  In other words, since different addresses are assigned to each bank, the address bus becomes enormous.

  In addition, since the number of decoders and selectors required is the same as the number of banks, the chip area increases.

  In addition, power consumption increases because multiple banks operate simultaneously.

  Furthermore, if the number of data for one word line is increased, the word line becomes longer and it takes time to access the data for one word line.

  Thus, in a semiconductor memory, if only one word line is configured per bank, data can be read simultaneously. However, if the amount of data to be stored is enormous, the hardware is burdened, which is not realistic.

  Therefore, in the conventional technique, a buffer or cache for reading data and temporarily storing it is provided, and a plurality of desired data is divided into a plurality of times in time, temporarily stored in the buffer or cache, and read.

  However, when the number of desired plural data increases and the data input / output speeds up, the data read processing is delayed in time. In order to solve this problem, the number of buffers and caches to be temporarily stored has been increased. However, if the area becomes large, a burden is imposed on hardware.

  Therefore, in view of the conventional problems as described above, the object of the present invention is to store all data in a memory composed of a plurality of memory banks without causing a burden on hardware, and to simultaneously read a desired plurality of data. An object of the present invention is to provide a data storage device, a data storage control device, a data storage control method, and a data storage control program that can be performed.

  Other objects of the present invention and specific advantages obtained by the present invention will become more apparent from the description of embodiments described below.

  When accessing multiple pieces of data in a certain pattern simultaneously for a single image, there are some data that cannot be accessed simultaneously due to the memory configuration even if they are divided into multiple banks. Double storage at different addresses enables simultaneous access to multiple data.

  In other words, the data storage device according to the present invention has a memory composed of a plurality of memory banks, and when storing all the data in the memory, one data line is stored for each word line of the memory bank constituting the memory. Data storage control means for sequentially allocating and storing in each memory bank of the memory using a data number range less than the number of data that can be stored on the word line, and an access pattern indicating a plurality of desired data to be read simultaneously Based on the above, the data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory is specified, and the specified data to be read simultaneously is read from the memory bank and simultaneously accessed in the same memory bank. Double-store where possible and read multiple desired data simultaneously from the above memory Characterized in that it comprises a data reading control means for performing control.

  The data storage control device according to the present invention is a data storage control device for storing all data in a memory composed of a plurality of memory banks and simultaneously reading desired data from the memory. When storing all the data in each memory bank of the memory using a range of data number smaller than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory. Data to be read simultaneously on different word lines in the same memory bank that cannot be accessed simultaneously based on the data storage control means for sequentially distributing and storing and the access pattern indicating the desired plurality of data to be read simultaneously The specified data to be read at the same time is read from the memory bank and Simultaneously accessible locations stored double in the bank, characterized in that it comprises a data reading control means for simultaneously reading the control desired multiple data from said memory.

  A data storage control method according to the present invention is a data storage control method for storing all data in a memory composed of a plurality of memory banks and simultaneously reading out a plurality of desired data from the memory. When storing all the data in a memory comprising a memory bank, the memory is used within a range of data number smaller than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory. The data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory based on the access pattern indicating the desired plurality of data to be simultaneously read and stored in each memory bank The specified data to be read at the same time is read from the memory bank and Simultaneously accessible locations stored double in the bank, and wherein the reading a plurality of desired data simultaneously from said memory.

  Furthermore, a data storage control program according to the present invention stores data in a memory composed of a plurality of memory banks, and performs data storage control for simultaneously executing data storage control for reading out a plurality of desired data from the memory by the computer. When all data is stored in a memory composed of a plurality of memory banks, the total data is more than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory. The same memory bank that cannot be accessed at the same time based on an access pattern that indicates a desired plurality of data to be simultaneously read and allocated to each memory bank of the memory using a small data range Identify the data to be read simultaneously on different word lines in the The data to be read out is read from the memory banks to store double simultaneously accessible locations in the same memory bank, and wherein the reading a plurality of desired data simultaneously from said memory.

  In the present invention, it is possible to simultaneously access a plurality of data in a certain pattern for one image. In addition, simultaneous access is possible without increasing the number of banks than the number of data to be accessed simultaneously.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Needless to say, the present invention is not limited to the following examples, and can be arbitrarily changed without departing from the gist of the present invention.

  In the present invention, due to the configuration of the memory, data that cannot be accessed simultaneously is double-stored at different addresses, thereby enabling simultaneous access to a plurality of data.

  First, a method for double storing data that cannot be accessed simultaneously at different addresses will be described.

  Here, as shown in FIG. 1, a case is considered in which there is a pattern corresponding to the pixels 1 to 5 to be simultaneously accessed, and raster scanning is performed in the horizontal direction from the upper left with this pattern.

  As shown in FIG. 2, when data is stored so that a vertical line is stored in one word line, and vertical lines stored in the same bank appear periodically, they are separated by that period in the horizontal direction. Since the pixels are accessed to different word lines in the same bank, they cannot be accessed simultaneously.

  In FIG. 2, numerals represent bank addresses, and thick frames indicate patterns that are desired to be accessed simultaneously. In this example, five banks are used, and vertical lines stored in the same bank appear periodically in five cycles.

  The part to be accessed moves in the horizontal direction by the raster scan, but the pattern itself does not change. Therefore, when the horizontal pixel interval of the part to be accessed is calculated as shown in FIG. 3, the bank of the data storage as shown in FIG. It can be seen which pixels and which pixels cannot be accessed at the same time among the patterns to be accessed simultaneously from the period.

In other words, in this example, when calculating the horizontal pixel interval of the location you want to access,
The horizontal pixel interval D [1-2] between the pixel 1 and the pixel 2 is “3”.
The horizontal pixel interval D [1-3] between the pixels 1 and 3 is “1”.
The horizontal pixel interval D [1-4] between the pixel 1 and the pixel 4 is “5”.
The horizontal pixel interval D [1-5] between the pixel 1 and the pixel 5 is “0”.
The horizontal pixel interval D [2-3] between the pixel 2 and the pixel 3 is “2”.
The horizontal pixel interval D [2-4] between the pixel 2 and the pixel 4 is “2”.
The horizontal pixel interval D [2-5] between the pixel 2 and the pixel 5 is “3”.
The horizontal pixel interval D [3-4] between the pixel 3 and the pixel 4 is “4”.
The horizontal pixel interval D [3-5] between the pixel 3 and the pixel 5 is “1”.
The horizontal pixel interval D [4-5] between the pixel 4 and the pixel 5 is “5”.
Thus, since the bank cycle is “5”, it is understood that the pixels that cannot be accessed simultaneously are the pixels 1 and 4 and the pixels 4 and 5 that have a horizontal pixel interval of “5”.

  If a pixel that cannot be accessed at the same time is found, it is accessed when the pixel can be accessed while being accessed by raster scanning, and is double-stored in another address.

  Pixels that cannot be accessed at the same time are read in advance and written to other addresses, so as shown in FIG. 5 with double circles, spatially left pixels 1 and 5 cannot be accessed simultaneously. Make a pixel.

  In this way, it is possible to read in advance the pixel to be stored twice and write it to another address. That is, when the pattern to be accessed simultaneously is at the position shown in FIG. 6, the pixel to be stored twice can be read out and written to another address.

  Since the pixel to be stored twice can be read when it can be read and written to another address, it is not necessary to match the pixel at the right end of the pattern.

  The address to be written is set to H + 1 for the word line where the readout overlaps with the number of pixels in the vertical direction of the image.

  When there are N pixels to be stored twice, an area for storing the pixels from H + 1 to H + Nth is required.

  For example, as shown in FIG. 7, when the number of pixels in the vertical direction is 10 and the number of pixels to be double-stored is 2, double-storage is performed for the 11th to 12th word lines. In the example of FIG. 12, the first word line of bank 0, the first and fourth are double-stored in the second word line of bank 0, 11th to 12th.

  In this way, if pixels that cannot be accessed simultaneously are double-stored at different addresses in the pattern that is desired to be accessed simultaneously, the data at the double storage destination can be accessed as shown in FIG. 8 so that simultaneous access is possible. Become. Since the pattern moves in the horizontal direction by raster scanning, if pixels that cannot be accessed simultaneously are stored twice while performing simultaneous access, the pixels of a certain horizontal line are stored twice as shown in FIG. It will be.

  Here, the double storage of pixels that cannot be accessed simultaneously is performed according to the procedure shown in the flowchart of FIG.

  That is, in the double storage process, first, the horizontal pixel interval of the pattern is calculated. (Step S1).

  Next, pixels that cannot be accessed simultaneously are determined from the bank period (step S2).

  Next, a pixel to be stored twice is determined (step S3).

  Next, the pixel to be double-stored with the pattern is read (step S4).

  Next, the pixel to be double-stored is double-stored (step S5).

  Then, it is determined whether or not all have been read (step S6). If the determination result is NO, that is, if there is data to be read, the process returns to step S4 and repeats the processing of steps S4 to S6, and the above step S6. If the determination result in is YES, the process is terminated.

  Next, management of the area for double storage will be described. There are two types of management methods, as shown in FIG. 11, where the area for double storage is fixed, and where the original data was located as shown in FIG. 12, for the next double storage. It may be in the area.

  When the area for double storage is fixed, pixels that cannot be accessed simultaneously are always written to and read from the area, so the area for double storage is frequently accessed. When the place where the original data of the double saved data is used as an area for the next double saving, the double saving destination is rotated, so that the access is almost uniform. However, in this case, in order to maintain the relationship with the position where other data is stored, it is necessary to return the data to the original word line after accessing the double stored data as shown in FIG. .

  The bank period for storing data may be fixed or variable.

  In the fixed case, depending on the pattern, there may be many pixels that cannot be accessed simultaneously. In that case, a large area for double storage is required.

  In the case of variable, it is possible to obtain a cycle in which the number of pixels that cannot be accessed simultaneously from the horizontal pixel interval of the pattern is the smallest and store it in the bank at that cycle. Whether the bank period is fixed or variable, how much space is required for double storage can be considered depending on the application.

  Next, simultaneous access to a plurality of data is executed by the data storage device 100 configured as shown in FIG. 14, for example.

  The data storage device 100 includes a plurality of banks of memory 10, a data storage control unit 20 that writes data to the memory 10, a read control unit 30 that reads data from the memory 10, and the memory 10. It consists of a data movement control unit 40 that controls the movement of the above data, the data to be stored is supplied to the memory 10 and the data storage control unit 20, and the access pattern indicating the simultaneous reading of a plurality of data is supplied to the data read control unit 30 It has come to be.

  The data storage control unit 20 in the data storage device 100 includes a counter 21 that counts supplied data and a write address generation unit 22 that generates a write address according to the count output of the counter 21 as shown in FIG. Become.

  As shown in FIG. 16, the write address generator 22 includes a bank address counter 22A incremented by the output of the counter 21, a word line address counter 22B incremented by the output of the bank address counter 22A, and the word The bit line address counter 22C is incremented by the output of the line address counter 22B, and the address generator 22D generates a write address based on the outputs of the counters 22A, 22B, and 22C.

  In the data storage device 100, the data storage control unit 20 having the above configuration causes one word for each word line of the memory bank constituting the memory 10 according to the procedure shown in the flowchart of FIG. Using the range of the number of data smaller than the number of data that can be stored on the line, the data is sequentially sorted and stored in each memory bank of the memory 10.

  That is, in this data storage device 100, when a control signal instructing data storage is given, the data storage control unit 20 starts operation, and first initializes the counter 21 and the write address generation unit 22 (step S11) When data input is accepted (step S12), the counter 21 is incremented (step S13), and the data is stored in the memory 10 by the write address given by the address generator 22 (step S14). Then, the bank address counter 22A of the address generator 22 is incremented (step S15).

  Then, it is determined whether or not the bank address having the number of banks obtained by the bank address counter 22A as one cycle has been restored (step S16). If the determination result in this step S16 is NO, the process proceeds to step S20. If the determination result in step S16 is YES, that is, if the bank address returns, the word line address counter 22B is incremented (step S17).

  Next, it is determined whether or not the word line address having the number of word lines obtained by the word line address counter 22B as one cycle has been restored (step S18). If the determination result in step S18 is NO The process proceeds to step S20, and if the determination result in step S18 is YES, that is, the word line address is restored, the bit line address counter 22C is incremented (step S19).

  In step S20, it is determined whether or not the count value of the counter 21 has reached the total number of data to be stored in the memory 10, and if the determination result is NO, the process returns to step S12 and step is performed. The processing of S12 to S20 is repeated to store data in the memory 10, and when the determination result in S20 is YES, the data storage processing is terminated.

  As shown in FIG. 18, the data read control unit 30 in the data storage device 100 includes a simultaneous access impossible position detection unit 31, a double storage data determination unit 32, and a read address generation unit 33. The data is supplied to the inaccessible position detection unit 31 and the read address generation unit 33, and the destination address is supplied from the data movement control unit 40.

  As shown in FIG. 19, the simultaneous inaccessible position detecting unit 31 includes a horizontal position difference calculating unit 31A to which the access pattern is supplied and a simultaneous inaccessible position extracting unit 31B, and is accessed by the horizontal position difference calculating unit 31A. The horizontal position difference is calculated from the pattern, and the simultaneous access impossible position extracting unit 31B extracts the simultaneous access impossible position in the access pattern based on the horizontal position difference value.

  In addition, as shown in FIG. 20, the double storage data determination unit 32 includes a horizontal position comparison unit 32A to which the simultaneous access impossible position detected by the simultaneous access impossible position detection unit 31 is supplied and a double storage data position. A determination unit 32B is provided, and based on the comparison output from the horizontal position comparison unit 32A, the dual storage data position determination unit 32B sets the simultaneous access impossible position spatially left to the double storage data position. ing.

  Further, as shown in FIG. 21, the read address generation unit 33 includes a counter 33A, an offset calculation unit 33B to which the double storage data position obtained by the double storage data determination unit 32 is supplied, an offset addition unit 33C, The address calculation unit 33D includes an address offset processing unit 33E to which a destination address is supplied from the data movement control unit 34. The access pattern is supplied to the offset calculation unit 33B and the address calculation unit 33D, and the address calculation unit 33D. Thus, the read address generated based on the access pattern, the double storage data position, and the output of the offset adding unit 33C is output from the output of the counter 33A via the address offset processing unit 33E. .

  Further, as shown in FIG. 22, the data movement control unit 40 in the data storage device 100 includes a movement data selection unit 41, a movement destination address generation unit 42, and a movement destination address management unit 43, and is read from the memory 10. The read data is supplied to the movement data selection unit 41, and the read address generated by the read address generation unit 33 is supplied to the movement data selection unit 41 and the movement destination address generation unit 42. Yes.

  The movement data sorting unit 41 outputs the data read from the memory 10 and sorts data to be stored twice from the data as movement data and supplies it to the memory 10.

  The destination address generator 42 generates a destination address for storing the movement data based on the read address generated by the read address generator 33 and supplies the generated destination address to the memory. The destination address generated by the destination address generator 42 is managed by the destination address manager 43 to which the destination address is supplied.

  In the data storage device 100, the data read control unit 30 and the data movement control unit 40 configured as described above read data from the memory 10 according to the procedure shown in the flowchart of FIG. Is done.

  That is, in the data storage device 100, when a control signal instructing data reading is given, the data reading control unit 30 and the data movement control unit 40 start operation, and the data reading control unit 30 sets the access pattern. When accepted (step S31), the simultaneous access impossible position detection unit 31 calculates the horizontal position difference value (step S32), detects the simultaneous access impossible position (step S33), and the double storage data determination unit 32 detects the two. The duplicate storage data position is determined (step S34).

  The data read control unit 30 initializes the counter 33A of the read address generation unit 33 (step S35), increments the counter 33A (step S36), and generates a data read address (step S37). Data is read from the memory 10 by the data read address (step S38).

  Next, the data movement control unit 40 selects the movement data (step S39) and stores it at the movement destination address of the memory 10 (step S40).

  Then, the data read control unit 30 determines whether or not all accesses have been completed (step S41). If the determination result is NO, the destination address is updated (step S42). Returning to S36, the processing from step S36 to step S41 is repeated, and when the determination result in step S41 is YES, the data reading and double storage processing is terminated.

  In the data storage device 100, the data storage control unit 20, the data read / read control unit 30 and the data movement control unit 40 are configured by, for example, a microprocessor, and are in accordance with a data storage control program stored in a program memory (not shown). Data storage, simultaneous reading and double storage can also be performed.

It is a figure which shows typically the example of the pattern corresponding to the pixel which wants to access simultaneously. FIG. 4 is a diagram schematically showing a data storage state in which data is stored so that vertical lines are stored in one word line and stored so that vertical lines stored in the same bank appear periodically. It is a figure which shows typically the horizontal pixel space | interval of the location to access. It is a figure which shows typically the pixel which cannot be accessed simultaneously. It is a figure which shows typically the pixel preserve | saved twice determined by the calculation of a horizontal pixel space | interval. It is a figure which shows typically the state which reads the pixel which wants to carry out double preservation | save. It is a figure which shows the specific example of double preservation | save typically. It is a figure which shows typically the pixel which enabled simultaneous access by double preservation | save. It is a figure which shows typically the state which preserve | saved the pixel of the horizontal line twice. It is a flowchart which shows the procedure of carrying out double preservation | save of the pixel which cannot be accessed simultaneously. It is a figure which shows typically the management method which fixed the area | region for double preservation | save. It is a figure which shows typically the management method which makes the place where the original data of the data preserve | saved twice was the area | region for the next double preservation | save. It is a figure which shows typically the state which returned the data to the original word line after accessing the data preserve | saved twice in order to maintain the relationship with the position where the other data is stored. It is a block diagram which shows the structure of the data storage apparatus which concerns on this invention. It is a block diagram which shows the structure of the data storage control part in the said data storage apparatus. It is a block diagram which shows the structure of the write address production | generation part in the said data storage control part. It is a flowchart which shows the procedure of the storage process of the data performed by the said data storage control part. It is a block diagram which shows the structure of the data reading control part in the said data storage apparatus. It is a block diagram which shows the structure of the simultaneous access impossible position detection part in the said data read-out control part. It is a block diagram which shows the structure of the double storage data determination part in the said data read-out control part. It is a block diagram which shows the structure of the read address production | generation part in the said data read control part. It is a block diagram which shows the structure of the data movement control part in the said data storage apparatus. 5 is a flowchart showing a data read and double storage processing procedure executed by the data read control unit and the data movement control unit in the data storage device. It is a figure which shows typically the structure of a general semiconductor memory. It is a figure which shows typically the state which cannot access simultaneously in the said semiconductor memory. It is a figure which shows the memory structure of a several memory bank. It is a figure which shows typically the case where there exists a pattern which wants to access simultaneously with respect to a certain image, and it is raster-scanned from the upper left. It is a figure which shows typically the state which became impossible to access simultaneously. It is a figure which shows typically the state which increased the number of memory banks and enabled simultaneous access so that the inside of a reference area could be accessed.

Explanation of symbols

  10 memory, 20 data storage control unit, 21 counter, 22 write address generation unit, 22A bank address counter, 22B word line address counter, 22C bit line address counter, 22D address generation unit, 30 data read control unit, 31 simultaneous access impossibility Position detection unit, 32 double storage data determination unit, 33 read address generation unit, 31A horizontal position difference calculation unit, 31B simultaneous access impossible position extraction unit, 32A horizontal position comparison unit, 32B double storage data position determination unit, 33A counter , 33B offset calculation unit, 33C offset addition unit, 33D address calculation unit, 33E address offset processing unit, 40 data movement control unit, 41 movement data selection unit, 42 destination address generation unit, 43 destination address management unit, 00 data storage device

Claims (14)

A memory consisting of a plurality of memory banks;
When all the data is stored in the memory, the memory is used within a range of the number of data smaller than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory. Data storage control means for sequentially allocating and storing each memory bank,
Based on an access pattern indicating a plurality of desired data to be simultaneously read, the data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory is specified, and the specified data to be read simultaneously Data read control means for performing a control to read out a plurality of desired data simultaneously from the memory and to store the same in the same memory bank in a place where simultaneous access is possible apparatus.   The data read control means specifies data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory based on an access pattern indicating a plurality of desired data to be read simultaneously. Double storage data determination means for dual storage data, and data to be read simultaneously specified by the double storage data determination means are read from the memory bank and stored in a location where simultaneous access is possible within the same memory bank. 2. The data storage device according to claim 1, further comprising data movement control means for performing control. The data movement control means, the data storage apparatus according to claim 2, characterized in that a specific fixed area in the control to store the data dual memory banks constituting the memory. The data movement control means uses the place where the original data of the double-saved data is located as an area for the next double-storing, and controls to return to the original word line after accessing the double-saved data. 3. The data storage device according to claim 2 , wherein the data storage device is performed. A data storage control device that stores all data in a memory composed of a plurality of memory banks and simultaneously reads a desired plurality of data from the memory,
When all the data is stored in the memory, the memory is used within a range of the number of data smaller than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory. Data storage control means for sequentially allocating and storing each memory bank,
Based on an access pattern indicating a plurality of desired data to be simultaneously read, the data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory is specified, and the specified data to be read simultaneously Data read control means for performing a control to read out a plurality of desired data simultaneously from the memory and to store the same in the same memory bank in a place where simultaneous access is possible Control device.   The data read control means specifies data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory based on an access pattern indicating a plurality of desired data to be read simultaneously. Double storage data determination means for dual storage data, and data to be read simultaneously specified by the double storage data determination means are read from the memory bank and stored in a location where simultaneous access is possible within the same memory bank. 6. The data storage control device according to claim 5, further comprising data movement control means for performing control.   7. The data storage control device according to claim 6, wherein the data movement control means performs control to double-store the data in a specific fixed area of a memory bank constituting the memory.   The data movement control means uses the place where the original data of the double-saved data is located as an area for the next double-storing, and controls to return to the original word line after accessing the double-saved data. 7. The data storage control apparatus according to claim 6, wherein the data storage control apparatus performs the data storage control apparatus. A data storage control method for storing all data in a memory composed of a plurality of memory banks and simultaneously reading desired plural data from the memory,
When storing all data in a memory composed of a plurality of memory banks, the range of the number of data smaller than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory Use the inside to sequentially distribute and store each memory bank of the above memory,
Based on an access pattern indicating a plurality of desired data to be simultaneously read, the data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory is specified,
Read the specified data to be read out simultaneously from the above memory bank and store it in the same memory bank where it can be accessed simultaneously,
A data storage control method comprising simultaneously reading a plurality of desired data from the memory.   10. The data storage control method according to claim 9, wherein the double storage area is a specific fixed area of a memory bank constituting the memory.   10. The place where the original data of the double stored data is used as an area for the next double storage, and the double stored data is accessed and then returned to the original word line. Data storage control method. A data storage control program for executing, by a computer, data storage control for storing all data in a memory composed of a plurality of memory banks and simultaneously reading desired multiple data from the memory,
When storing all data in a memory composed of a plurality of memory banks, the range of the number of data smaller than the number of data that can be stored on one word line for each word line of the memory bank constituting the memory Use the inside to sequentially distribute and store each memory bank of the above memory,
Based on an access pattern indicating a plurality of desired data to be simultaneously read, the data to be read simultaneously on different word lines in the same memory bank that cannot simultaneously access the memory is specified,
Read the specified data to be read out simultaneously from the above memory bank and store it in the same memory bank where it can be accessed simultaneously,
A data storage control program for simultaneously reading a plurality of desired data from the memory.   13. The data storage control program according to claim 12, wherein the double storage area is a specific fixed area of a memory bank constituting the memory.   13. The place where the original data of the double stored data is used as an area for the next double storage, and the double stored data is accessed and then returned to the original word line. Data storage control program.

Images