JP4453612B2 - Lead-free solder alloy - Google Patents

Lead-free solder alloy Download PDF

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JP4453612B2
JP4453612B2 JP2005182429A JP2005182429A JP4453612B2 JP 4453612 B2 JP4453612 B2 JP 4453612B2 JP 2005182429 A JP2005182429 A JP 2005182429A JP 2005182429 A JP2005182429 A JP 2005182429A JP 4453612 B2 JP4453612 B2 JP 4453612B2
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JP2006035310A (en
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浩章 永田
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Sumitomo Metal Mining Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
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    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
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    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
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    • H01L2924/181Encapsulation

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Description

本発明は、鉛を含まないはんだ合金、特に、電子部品内部の接合に好適な無鉛はんだ合金に関する。   The present invention relates to a lead-free solder alloy, and particularly to a lead-free solder alloy suitable for joining inside an electronic component.

電子部品の接続用材料として、従来よりPbおよびSnを主成分としたはんだが用いられてきた。電子部品を基板に実装するために使用されるはんだとしては、融点が低い共晶はんだ、例えば、Snに37質量%のPbを含有させた共晶はんだ(以下、「Sn/37質量%Pb共晶はんだ」と記す。また、他の組成のはんだについても、以下同様に簡略した記載を用いる。)が使用されることが多い。該Sn/37質量%Pb共晶はんだの融点は183℃と低い。   Conventionally, solder mainly composed of Pb and Sn has been used as a material for connecting electronic components. As a solder used for mounting an electronic component on a substrate, a eutectic solder having a low melting point, for example, a eutectic solder containing 37 mass% Pb in Sn (hereinafter referred to as “Sn / 37 mass% Pb In the following, a simplified description is often used for solders having other compositions as well. The melting point of the Sn / 37 mass% Pb eutectic solder is as low as 183 ° C.

一方、電子部品内部における接続、例えば、リ−ドフレ−ムとチップの接続には、融点の高い高温はんだが使用されることが多い。基板に電子部品を実装する際に220〜230℃でリフローを行うので、電子部品内部の高温はんだの固相線が該リフロー温度以下であると、接合信頼性が低下するためである。   On the other hand, high-temperature solder having a high melting point is often used for connection inside an electronic component, for example, connection between a lead frame and a chip. This is because when the electronic component is mounted on the substrate, reflow is performed at 220 to 230 ° C., so that the reliability of the joint is lowered when the solidus line of the high-temperature solder inside the electronic component is equal to or lower than the reflow temperature.

このため、電子部品内部の接合には、基板実装時のリフロ−温度以上の固相線を有するはんだを使用する必要があり、Pb/5質量%Sn(固相線温度305℃)、Pb/3質量%Sn(固相線温度315℃)といったPb、Snを主成分とする高温はんだが用いられている。高温はんだに要求される特性としては、融点以外に、熱放散性、応力緩和性、耐熱疲労特性,電気伝導性等が要求される。大きな電流の負荷が加わり大量の発熱が起こるためである。   For this reason, it is necessary to use a solder having a solidus temperature higher than the reflow temperature at the time of mounting on the board for joining inside the electronic component. Pb / 5 mass% Sn (solidus temperature 305 ° C.), Pb / A high-temperature solder mainly composed of Pb and Sn such as 3 mass% Sn (solidus temperature 315 ° C.) is used. In addition to the melting point, characteristics required for high-temperature solder include heat dissipation, stress relaxation, thermal fatigue resistance, electrical conductivity, and the like. This is because a large current load is applied and a large amount of heat is generated.

しかしながら、電子部品の接合用はんだとして鉛入りはんだが多く用いられる一方で、廃棄処分された製品から鉛が流出して土壌に浸透し、鉛が農作物等に蓄積して人間に害を及ぼす危険性が指摘されている。さらに、廃棄処分された製品からの鉛の流出は酸性雨によってより加速されており、鉛による人間の健康被害の危険性が増していることも指摘されている。   However, while solder containing lead is often used as a solder for joining electronic components, there is a risk that lead will flow out from discarded products and penetrate into the soil, and lead may accumulate in agricultural products and harm humans. Has been pointed out. Furthermore, it has been pointed out that lead spillage from discarded products has been accelerated by acid rain, increasing the risk of human health damage from lead.

そのため、電子部品を基板に実装する際に用いられる融点の低い共晶はんだの代替品として、Sn−Ag−Cu等のPbを含まない無鉛はんだが使用され始めている。しかしながら、Sn−Ag−Cu等の無鉛はんだの融点は、従来の共晶はんだより高く約220℃前後であり、このはんだを用いてリフローを行うためには、実装時のリフロー温度を250〜260℃付近にまで上昇させることが必要となってしまう。特許文献1には、このような実装時に要求される条件が記載されている。   For this reason, lead-free solder containing no Pb such as Sn—Ag—Cu has begun to be used as a substitute for a eutectic solder having a low melting point used when mounting electronic components on a substrate. However, the melting point of lead-free solder such as Sn—Ag—Cu is higher than that of a conventional eutectic solder and is about 220 ° C. In order to perform reflow using this solder, the reflow temperature during mounting is 250 to 260. It will be necessary to raise it to around ℃. Patent Document 1 describes conditions required for such mounting.

一方、電子部品内部の接合であるダイボンディングに使用されている無鉛はんだの一つとしてSn−Sbはんだがあり、主にSbが10質量%以下のものが使用されている。Sbが10質量%以下のSn−Sbはんだは、固相線温度・液相線温度は246℃以下である。   On the other hand, there is Sn—Sb solder as one of lead-free solders used for die bonding, which is a bonding inside an electronic component, and one having Sb of 10% by mass or less is mainly used. The Sn—Sb solder with Sb of 10% by mass or less has a solidus temperature / liquidus temperature of 246 ° C. or less.

このため、Sbが10質量%以下のSn−Sbはんだでダイボンディングを行った電子部品を基板に実装するために前記Sn−Ag−Cu等の無鉛はんだを使用すると、リフローの際にSn−Sbはんだが完全に溶融する可能性があり、電子部品内部の接合性が損なわれ、電子部品としての機能を果たさなくなる危険性がある。   For this reason, when lead-free solder such as Sn-Ag-Cu is used to mount an electronic component die-bonded with Sn-Sb solder with Sb of 10% by mass or less on a substrate, Sn-Sb is used during reflow. There is a possibility that the solder may be completely melted, the jointability inside the electronic component is impaired, and the function as the electronic component may not be performed.

また、260℃〜320℃の固相線を持つPbを含まない合金系は、Au−Sn合金、Bi−Ag合金等があるが、Au−Sn合金は高価でコスト上実用的でなく、また特許文献2(特開2002−160089号公報)等で提案されているBi−Ag合金は、Pb合金やSn合金と比較して熱伝導性が低いBiを主元素としているため、熱放散性に問題がある。   In addition, there are Au—Sn alloy, Bi—Ag alloy, etc. as the alloy system not containing Pb having a solidus of 260 ° C. to 320 ° C., but the Au—Sn alloy is expensive and not practical in terms of cost. The Bi—Ag alloy proposed in Patent Document 2 (Japanese Patent Laid-Open No. 2002-160089) and the like is mainly composed of Bi, which has a lower thermal conductivity than Pb alloy and Sn alloy, and therefore has a heat dissipation property. There's a problem.

特開2002−321084号公報JP 2002-321084 A 特開2002−160089号公報JP 2002-160089 A

本発明は、かかる問題点に鑑みてなされたものであって、融点が高く、耐熱性が良好で、かつ、濡れ性や熱疲労強度の特性が改善されており、電子部品の基板実装用のはんだとして融点の比較的高い無鉛はんだを使用する場合であっても、リフロー時の熱による悪影響が生じず、電子部品内部の接合であるダイボンディング等に好適に用いることができる無鉛はんだ合金を提供することを目的とする。   The present invention has been made in view of such problems, and has a high melting point, good heat resistance, improved wettability and thermal fatigue strength characteristics, and is used for mounting electronic components on a board. Providing lead-free solder alloys that can be suitably used for die bonding, which is an internal joint of electronic components, without the adverse effects of heat during reflow even when lead-free solder with a relatively high melting point is used as the solder The purpose is to do.

本発明に係る無鉛はんだ合金の第1の態様は、Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   The first aspect of the lead-free solder alloy according to the present invention includes Cu in excess of 10% by mass and 24.9% by mass or less, Sb in an amount of 5% by mass or more, the balance being Sn, and the Sn content. Is more than 70% by mass.

本発明に係る無鉛はんだ合金の第2の態様は、Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上、Teを0.01質量%以上5質量%以下含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   The second embodiment of the lead-free solder alloy according to the present invention contains Cu in excess of 10% by mass and 24.9% by mass or less, Sb in an amount of 5% by mass or more, and Te in a range of 0.01% by mass to 5% by mass. The remainder is made of Sn, and the Sn content exceeds 70% by mass.

本発明に係る無鉛はんだ合金の第3の態様は、Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上、PおよびGeからなる群から選択された1種以上の元素を合計で0.001質量%以上0.5質量%以下含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   A third aspect of the lead-free solder alloy according to the present invention includes at least one selected from the group consisting of more than 10% by weight of Cu and 24.9% by weight or less, Sb of 5% by weight or more, and P and Ge. It is characterized by containing 0.001 mass% or more and 0.5 mass% or less of elements in total, the remainder consists of Sn, and content of Sn exceeds 70 mass%.

本発明に係る無鉛はんだ合金の第4の態様は、Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上、Teを0.01質量%以上5質量%以下、PおよびGeからなる群から選択された1種以上の元素を合計で0.001質量%以上0.5質量%以下含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   In a fourth embodiment of the lead-free solder alloy according to the present invention, Cu exceeds 10% by weight and is 24.9% by weight or less, Sb is 5% by weight or more, Te is 0.01% by weight or more and 5% by weight or less, P And at least one element selected from the group consisting of Ge and 0.001% by mass or more and 0.5% by mass or less, the balance being Sn, and the Sn content exceeding 70% by mass It is characterized by that.

本発明に係る無鉛はんだ合金の第5の態様は、Sbを5質量%以上、Cuを5質量%以上、Ag、AuおよびPdからなる群から選択された1種以上の元素を合計で0.1質量%以上含有し、Cu、Ag、AuおよびPdの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   According to a fifth aspect of the lead-free solder alloy of the present invention, Sb is 5% by mass or more, Cu is 5% by mass or more, and one or more elements selected from the group consisting of Ag, Au, and Pd are added in a total amount of 0.0. 1% by mass or more, the total content of Cu, Ag, Au and Pd is more than 10% by mass and 24.9% by mass or less, the balance is Sn, and the Sn content is 70% by mass It is characterized by exceeding.

本発明に係る無鉛はんだ合金の第6の態様は、Sbを5質量%以上、Cuを5質量%以上、Teを0.01質量%以上5質量%以下、Ag、AuおよびPdからなる群から選択された1種以上の元素を合計で0.1質量%以上含有し、Cu、Ag、AuおよびPdの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   A sixth aspect of the lead-free solder alloy according to the present invention is a group consisting of Sb of 5 mass% or more, Cu of 5 mass% or more, Te of 0.01 mass% or more and 5 mass% or less, Ag, Au, and Pd. The total content of one or more selected elements is 0.1% by mass or more, the total content of Cu, Ag, Au and Pd is more than 10% by mass and 24.9% by mass or less, and the balance is Sn And the Sn content exceeds 70% by mass.

本発明に係る無鉛はんだ合金の第7の態様は、Sbを5質量%以上、Cuを5質量%以上、PおよびGeからなる群から選択された1種以上の元素を合計で0.001質量%以上0.5質量%以下、Ag、AuおよびPdからなる群から選択された1種以上の元素を合計で0.1質量%以上含有し、Cu、Ag、AuおよびPdの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   In a seventh embodiment of the lead-free solder alloy according to the present invention, Sb is 5% by mass or more, Cu is 5% by mass or more, and at least one element selected from the group consisting of P and Ge is 0.001 in total. % Or more and 0.5% by mass or less, containing at least 0.1% by mass in total of one or more elements selected from the group consisting of Ag, Au and Pd, and the total content of Cu, Ag, Au and Pd is More than 10 mass% and 24.9 mass% or less, the remainder consists of Sn, and Sn content exceeds 70 mass%.

本発明に係る無鉛はんだ合金の第8の態様は、Sbを5質量%以上、Cuを5質量%以上、Teを0.01質量%以上5質量%以下、PおよびGeからなる群から選択された1種以上の元素を合計で0.001質量%以上0.5質量%以下、Ag、AuおよびPdからなる群から選択された1種以上の元素を合計で0.1質量%以上含有し、Cu、Ag、AuおよびPdの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする。   An eighth aspect of the lead-free solder alloy according to the present invention is selected from the group consisting of Sb of 5 mass% or more, Cu of 5 mass% or more, Te of 0.01 mass% or more and 5 mass% or less, P and Ge. In addition, 0.001% by mass or more and 0.5% by mass or less of one or more elements in total, and one or more elements selected from the group consisting of Ag, Au and Pd in total containing 0.1% by mass or more. , Cu, Ag, Au, and Pd have a total content of more than 10% by mass and 24.9% by mass or less, the remainder is made of Sn, and the Sn content is more than 70% by mass To do.

本発明による無鉛はんだ合金は、Pbを含んでいないにもかかわらず、融点が高く、耐熱性が良好で、かつ、濡れ性や熱疲労強度の特性が改善されているので、電子部品の基板実装用のはんだとして融点の比較的高い無鉛はんだを使用しても、リフロー時の熱による悪影響が生じず、電子部品内部の接合であるダイボンディング等に用いることができる。なお、所定量のTe、P、Geを添加することで、濡れ性や熱疲労強度をより良好にできる。   Since the lead-free solder alloy according to the present invention does not contain Pb, it has a high melting point, good heat resistance, and improved wettability and thermal fatigue strength characteristics. Even if a lead-free solder having a relatively high melting point is used as the solder for use, there is no adverse effect due to heat during reflow, and it can be used for die bonding or the like, which is a joint inside an electronic component. In addition, wettability and thermal fatigue strength can be improved by adding predetermined amounts of Te, P, and Ge.

電子部品を基板に実装する際に用いる無鉛はんだより高い固相線を有し、かつ、鉛を含まない電子部品内部の接合用の無鉛はんだとしては、Sn−Sbはんだがある。Sn−Sbはんだは包晶型合金である。包晶型合金は、共晶型合金と異なり合金化による融点低下がない合金系である。このため、Sn−Sbはんだは、Snの融点(232℃)より高い融点を持ち、Sbを10質量%以上含むと、固相線温度が246℃となり、Snベ−ス合金としてははんだとして実用可能な最高固相線を持つ合金系である。   There is Sn-Sb solder as a lead-free solder for joining inside an electronic component that has a higher solidus line than the lead-free solder used when mounting the electronic component on a substrate and does not contain lead. Sn—Sb solder is a peritectic alloy. A peritectic alloy is an alloy system that does not lower a melting point due to alloying unlike a eutectic alloy. Therefore, Sn—Sb solder has a melting point higher than that of Sn (232 ° C.), and when Sb is contained in an amount of 10% by mass or more, the solidus temperature becomes 246 ° C., and it is practical as a solder as an Sn-base alloy. It is an alloy system with the highest possible solidus.

本発明者は、Sn−Sbはんだをベースとし、さらに他の所定の元素を10質量%を超えて添加して液相線を上昇させることで、260℃(実装用の無鉛はんだを用いてリフローを行うときに想定されるリフロー温度)における接合用の無鉛はんだの溶融割合を減少させ、実装後も電子部品内部のはんだの初期形状を保つことができることを見出した。   The present inventor made Sn-Sb solder as a base and added another predetermined element in excess of 10% by mass to raise the liquidus, so that 260 ° C. (reflow using lead-free solder for mounting) It has been found that the melting rate of the lead-free solder for bonding at the reflow temperature (which is assumed when performing soldering) can be reduced, and the initial shape of the solder inside the electronic component can be maintained even after mounting.

本発明者は、添加することで液相線を上昇させる効果のある元素として、Cu、Ag、Au、Pdに着目した。これらの元素は、Sn系合金に添加した場合、添加量が多くなるほど液相線も上昇する元素である。そして、本発明者は、Cu、Ag、Au、Pdを、Sn−Sbはんだ合金に添加すると、液相線温度がさらに上昇し、固相線での溶融割合が大幅に減少し、260℃でのはんだの溶融割合も減少させることができることを見出した。   The present inventor has focused on Cu, Ag, Au, and Pd as elements that have the effect of increasing the liquidus when added. When these elements are added to the Sn-based alloy, the liquidus increases as the addition amount increases. And when this inventor adds Cu, Ag, Au, and Pd to a Sn-Sb solder alloy, liquidus temperature rises further, the fusion rate in a solidus line reduces significantly, and it is 260 degreeC. It has been found that the melting rate of the solder can be reduced.

また、Sbの含有量を増加させることでも液相線の上昇は起きるが、SnとSbとの硬く脆い金属間化合物(以下、β’相と記す。)の割合が多くなる。また、β’相の増加および添加元素により発生する金属間化合物の増加によって、Sn−Sb系はんだ合金は硬く脆い合金となるため、接合後にチップクラック等が生じるようになる。そこで、本発明者は、この現象を抑えるため、鋭意研究開発を行い、Snを70質量%を超えて含有させ、Sn単相を残留させることで、機械的特性と接合後の信頼性を両立させることができることを見出した。   Further, an increase in the Sb content also raises the liquidus, but the ratio of the hard and brittle intermetallic compound of Sn and Sb (hereinafter referred to as β ′ phase) increases. In addition, the increase in the β ′ phase and the increase in intermetallic compounds generated by the additive elements make the Sn—Sb solder alloy hard and brittle, so that chip cracks and the like occur after bonding. Therefore, in order to suppress this phenomenon, the present inventor has conducted intensive research and development, contains Sn in excess of 70% by mass, and leaves the Sn single phase, thereby achieving both mechanical properties and reliability after bonding. I found out that I can make it.

また、Sn−Sb合金において、Sbの含有量が10質量%以上になると、凝固時に初晶としてβ’相が晶出してくる。このため、はんだ中にβ’相が粗大な形で存在することがあり、この場合には使用時に濡れ不良を起こしてしまう可能性がある。さらに、ダイボンディング後の凝固組織に粗大なβ’相が存在することがあり、この場合には、チップクラック発生の原因になる。これに対しては、本発明者は、Sn−Sb合金の液相線温度より高い温度で晶出する元素であるTeを添加することで、凝固組織の微細化ができ、これにより対応することができることを見出した。   Further, in the Sn—Sb alloy, when the Sb content is 10% by mass or more, a β ′ phase is crystallized as an initial crystal during solidification. For this reason, the β ′ phase may be present in a coarse form in the solder, and in this case, there is a possibility that poor wetting may occur during use. Furthermore, a coarse β ′ phase may be present in the solidified structure after die bonding, and in this case, chip cracks are caused. In response to this, the present inventor can refine the solidification structure by adding Te, which is an element that crystallizes at a temperature higher than the liquidus temperature of the Sn—Sb alloy. I found out that I can.

さらに、本発明者は、はんだの濡れ性を改善し、接合時のボイド発生を低減させるためには、PまたはGeを添加することが効果的であることを見出した。   Furthermore, the present inventor has found that it is effective to add P or Ge in order to improve the wettability of the solder and reduce the generation of voids during bonding.

本発明に係るはんだ合金は、以上の知見に基づき完成されたものである。以下、本発明に係るはんだ合金について詳細に説明する。   The solder alloy according to the present invention has been completed based on the above findings. Hereinafter, the solder alloy according to the present invention will be described in detail.

「Sn」
必要なSnの含有量は、70質量%を超える量である。前述したように、Snの含有量が70質量%以下になると、Sn−SbやSn−Cu等の硬くてもろい金属間化合物の割合が多くなり、はんだとしての応力緩和性がなくなり、接合後にチップクラック等が生じる。なお、必要なSnの含有量の上限値は、本発明において必要な他の必須添加元素であるSb、Cu、および添加することが好ましい元素であるTe、P、Ge、Ag、Au、Pdの必要最低添加量に応じて決まる。
"Sn"
The necessary Sn content is an amount exceeding 70% by mass. As described above, when the Sn content is 70% by mass or less, the ratio of hard and brittle intermetallic compounds such as Sn—Sb and Sn—Cu increases, the stress relaxation property as solder disappears, and the chip after bonding Cracks occur. The upper limit of the required Sn content is Sb, Cu, which are other essential additive elements necessary in the present invention, and Te, P, Ge, Ag, Au, Pd, which are elements that are preferably added. It depends on the minimum amount required.

「Sb」
必要なSbの含有量は、5質量%以上である。5質量%未満であると、固相線低下による耐熱性の低下が発生し、はんだ接合後の初期の形状が変化してしまう。なお、必要なSbの含有量の上限値は、本発明において必要な他の必須添加元素であるSn、Cu、および添加することが好ましい元素であるTe、P、Ag、Au、Pdの必要最低添加量に応じて決まる。
"Sb"
The required Sb content is 5% by mass or more. If it is less than 5% by mass, a decrease in heat resistance due to a decrease in solidus will occur, and the initial shape after soldering will change. The upper limit value of the necessary Sb content is the minimum necessary amount of Sn, Cu, which are other essential additive elements necessary in the present invention, and Te, P, Ag, Au, Pd, which are elements preferably added. It depends on the amount added.

「Cu、Ag、Au、Pd」
Cu、Ag、Au、Pdは、液相線温度を上昇させることに効果がある。本発明に係る第1の態様の合金に必要なCuの含有量は、10質量%を超えて24.9質量%以下である。Cuの含有量が10質量%以下であると、はんだ接合後のリフロー時(260℃)にはんだの溶融が起こった場合、溶融量が多くなりすぎ、はんだ接合後の初期の形状が変化してしまい、接合材としての役割が果たせなくなる。また、Cuの含有量が24.9質量%を超えると、硬くて脆い特性になってしまうため、接合後にチップクラック等の不良が発生する場合が多くなる。
"Cu, Ag, Au, Pd"
Cu, Ag, Au, and Pd are effective in increasing the liquidus temperature. The Cu content necessary for the alloy of the first aspect according to the present invention is more than 10% by mass and 24.9% by mass or less. When the content of Cu is 10% by mass or less, when the solder melts during reflow (260 ° C.) after the solder joint, the melt amount becomes too large, and the initial shape after the solder joint is changed. Therefore, the role as a bonding material cannot be fulfilled. Further, if the Cu content exceeds 24.9% by mass, it becomes hard and brittle, so that defects such as chip cracks often occur after bonding.

Cuに加えて、Cuと同様に液相線を上げる効果のあるAg、Au、Pdを添加する本発明に係る第5の態様の合金は、5質量%以上のCuを添加した上で、Ag、AuおよびPdからなる群から選択された1種以上の元素を合計で0.1質量%以上添加し、CuとAg、Au、Pdの合計含有量を10質量%を超えて24.9質量%以下としている。これにより、耐熱性において、Cuの含有量を10質量%を超えて24.9質量%以下にした場合(本発明に係る第1の態様の合金)と同様な効果が得られる。   In addition to Cu, the alloy of the fifth aspect according to the present invention, which adds Ag, Au, and Pd, which has the effect of raising the liquidus like Cu, is obtained by adding 5% by mass or more of Cu. One or more elements selected from the group consisting of Au and Pd are added in a total amount of 0.1% by mass or more, and the total content of Cu, Ag, Au and Pd exceeds 10% by mass and 24.9% by mass % Or less. Thereby, in heat resistance, the same effect as when Cu content exceeds 10 mass% and is 24.9 mass% or less (the alloy of the first aspect according to the present invention) is obtained.

また、Ag、AuおよびPdの添加は、耐熱性の他に、熱疲労強度を向上させる上で効果がある。Ag、AuおよびPdからなる群から選択された1種以上の元素の合計添加量が0.1質量%を下回ると、この効果がほとんど得られない。一方、CuとAg、Au、Pdの合計含有量が24.9質量%を超えると、硬くて脆い特性になってしまうため、接合後にチップクラック等の不良が発生する場合が多くなる。   Addition of Ag, Au and Pd is effective in improving thermal fatigue strength in addition to heat resistance. If the total addition amount of one or more elements selected from the group consisting of Ag, Au and Pd is less than 0.1% by mass, this effect is hardly obtained. On the other hand, if the total content of Cu, Ag, Au, and Pd exceeds 24.9% by mass, it becomes hard and brittle, and defects such as chip cracks often occur after bonding.

「Te」
Teは凝固組織を微細化することに効果がある。Teを添加することによりこのような効果が得られる理由は、TeはSn−Sb合金の液相線温度より高い温度で晶出する元素であり、添加したTeがSn−Sb合金の液相線温度より高い温度で晶出して、包晶合金の初晶生成の核となり、凝固組織の微細化に寄与するためと考えられる。初晶生成の核を多く存在させることにより、β’相の微細化を実現することができると考えられる。
"Te"
Te is effective in reducing the solidification structure. The reason why such an effect is obtained by adding Te is that Te is an element that crystallizes at a temperature higher than the liquidus temperature of the Sn—Sb alloy, and the added Te is the liquidus line of the Sn—Sb alloy. This is presumably because it crystallizes at a temperature higher than the temperature and becomes the nucleus of primary crystal formation of the peritectic alloy and contributes to the refinement of the solidified structure. It is considered that the β ′ phase can be refined by making many primary crystal nuclei exist.

必要なTeの添加量は0.01〜5質量%である。Teの添加量が5質量%を超えると、β’相を微細化する効果が低減する。また、Teの添加量が0.01質量%を下回ると、包晶合金の初晶生成の核が少なくなり、凝固組織の微細化に十分に寄与しなくなる。   The necessary amount of Te added is 0.01 to 5% by mass. When the added amount of Te exceeds 5% by mass, the effect of refining the β ′ phase is reduced. On the other hand, when the amount of Te added is less than 0.01% by mass, the number of primary crystal formation nuclei in the peritectic alloy is reduced, and it does not sufficiently contribute to the refinement of the solidified structure.

「P、Ge」
PおよびGeは、はんだの濡れ性を改善し、接合時のボイド発生を低減させることに効果がある。Pおよび/またはGeを添加することによりこのような効果が得られる理由は、P、Geが優先的に酸化され、はんだの表面の酸化が抑制されるためであると考えられる。必要なPおよび/またはGeの合計添加量は0.001〜0.5質量%である。合計添加量が0.5質量%を超えると、Pおよび/またはGeが多くの酸化物を形成することになり、濡れ性が悪くなる。また、合計添加量が0.001質量%を下回ると、Pおよび/またはGeを添加する効果が不十分になる。
"P, Ge"
P and Ge are effective in improving the wettability of the solder and reducing the generation of voids during bonding. The reason why such an effect can be obtained by adding P and / or Ge is presumably because P and Ge are preferentially oxidized and oxidation of the solder surface is suppressed. The required total addition amount of P and / or Ge is 0.001 to 0.5 mass%. If the total addition amount exceeds 0.5% by mass, P and / or Ge will form many oxides, resulting in poor wettability. Moreover, when the total addition amount is less than 0.001% by mass, the effect of adding P and / or Ge becomes insufficient.

(実施例1、2、実施例5〜9、比較例3、4、10、11)
純度99.99質量%のSn、Sb、Cuを用いて、表1に示す組成のSn合金を大気溶解炉を用いて溶製し、1mmφに押し出し加工を行い、ワイヤー形状のはんだ合金を作製した。
(Examples 1 and 2, Examples 5 to 9, Comparative Examples 3, 4, 10, and 11)
Using Sn, Sb, and Cu with a purity of 99.99 mass%, an Sn alloy having the composition shown in Table 1 was melted using an air melting furnace, extruded to 1 mmφ, and a wire-shaped solder alloy was produced. .

得られたはんだ合金の濡れ性を評価するため、窒素雰囲気中で、400℃に加熱されたリードフレームアイランド部で前記ワイヤーの溶融試験を実施し、溶融後徐冷した。組成毎に各200個のサンプルについて溶融試験を実施したが、濡れ不良は確認されず、濡れ性は良好であった。   In order to evaluate the wettability of the obtained solder alloy, the wire was subjected to a melting test in a lead frame island heated to 400 ° C. in a nitrogen atmosphere, and gradually cooled after melting. Although a melting test was performed on 200 samples for each composition, no wetting failure was confirmed, and the wettability was good.

次に、得られた各サンプルを用いてダイボンディングを行い、その接合部の信頼性の評価を行った。評価方法を具体的に以下に記す。前記1mmφのサンプルとダイボンダーを用い、シリコンチップのダイボンディング面にAuを蒸着して作製したダミーチップを銅製のリードフレームにダイボンディングした。次に、これをエポキシ樹脂でモールドした。モールドしたものを用いて−50℃/150℃の温度サイクル試験を500サイクル実施した。その後に樹脂を開封してダイボンディングによる接合部の観察を行い、チップおよび接合部に割れの発生がない場合を「良」、割れが発生した場合を「不良」と評価した。以上の結果を表1に示す。   Next, die bonding was performed using each of the obtained samples, and the reliability of the bonded portion was evaluated. The evaluation method is specifically described below. Using the 1 mmφ sample and a die bonder, a dummy chip produced by vapor-depositing Au on the die bonding surface of a silicon chip was die-bonded to a copper lead frame. Next, this was molded with an epoxy resin. 500 cycles of a temperature cycle test at −50 ° C./150° C. were performed using the molded product. Thereafter, the resin was opened and the bonded portion was observed by die bonding, and the case where no crack occurred in the chip and the bonded portion was evaluated as “good”, and the case where a crack occurred was evaluated as “bad”. The results are shown in Table 1.

表1に示すように、比較例3は、Cuの含有量が10質量%以下であり、またSbの含有量が5質量%未満であり、本発明の範囲に入っていない。比較例4、10、11は、Snの含有量が70質量%を超えておらず、本発明の範囲に入っていない。   As shown in Table 1, in Comparative Example 3, the content of Cu is 10% by mass or less, and the content of Sb is less than 5% by mass, which is not within the scope of the present invention. In Comparative Examples 4, 10, and 11, the Sn content does not exceed 70% by mass and does not fall within the scope of the present invention.

このため、上記の温度サイクル試験により、比較例3ではチップまたは接合部にわれは発生しなかったものの、比較例4、10、11においてはチップまたは接合部に割れが発生し、接合信頼性の評価結果は、「不良」となった。   For this reason, although cracks did not occur in the chips or joints in Comparative Example 3 by the above temperature cycle test, cracks occurred in the chips or joints in Comparative Examples 4, 10, and 11, and the reliability of the joints was improved. The evaluation result was “bad”.

本発明の範囲内である実施例1、2、実施例5〜9については、上記の温度サイクル試験によっても、チップおよび接合部に割れが発生せず、接合信頼性の評価結果は、「良」となった。   For Examples 1 and 2 and Examples 5 to 9 that are within the scope of the present invention, even in the above temperature cycle test, the chip and the joint were not cracked, and the evaluation result of the joint reliability was “good”. "

次いで、モールドしたものの一部を、リフロー温度:260℃で基板に実装し、実装後のチップおよび接合部の異常の有無を調べた。その結果、比較例3は実装時の熱の影響ではんだ部が溶融し、はんだが流れ出し、はんだの初期形状が変化しており、耐熱性は「不良」となった。その他はいずれも異常は見られず、目立ったボイドも確認できなかった。   Next, a part of the molded product was mounted on a substrate at a reflow temperature of 260 ° C., and the presence or absence of abnormality in the chip and the joint after mounting was examined. As a result, in Comparative Example 3, the solder part melted due to the influence of heat during mounting, the solder flowed out, the initial shape of the solder was changed, and the heat resistance was “bad”. In all other cases, no abnormality was observed, and no conspicuous voids could be confirmed.

また、本発明に係るはんだ合金(実施例1、2、実施例5〜9)で接合された部位の耐熱性の評価は、リフロー温度である260℃に10秒間保持することで実施したが、いずれの接合部においても溶融するのは一部のみで、全体は溶融することなく保たれていることを確認した。したがって、本発明に係るはんだ合金(実施例1、2、実施例5〜9)で接合された部位は、電子部品を基板に実装するためのリフローの際においても剥離やボイド等は発生せず、電子部品の特性に問題は生じないと考えられる。   Moreover, although the heat resistance evaluation of the site | part joined with the solder alloy which concerns on this invention (Example 1, 2, Examples 5-9) was implemented by hold | maintaining for 10 second at 260 degreeC which is reflow temperature, It was confirmed that only a part of the melted portion was melted in any joint, and the whole was kept without melting. Therefore, the part joined by the solder alloy according to the present invention (Examples 1 and 2 and Examples 5 to 9) does not cause peeling or void even during reflow for mounting the electronic component on the substrate. Therefore, it is considered that no problem occurs in the characteristics of the electronic component.

Figure 0004453612
Figure 0004453612

(実施例12〜21)
純度99.99質量%のSn、Sb、Cu、Te、Pを用いて、表2に示す組成のSn合金を大気溶解炉を用いて溶製し、1mmφに押し出し加工を行い、ワイヤー形状のはんだ合金を作製した。
(Examples 12 to 21)
Using Sn, Sb, Cu, Te, P with a purity of 99.99 mass%, an Sn alloy having the composition shown in Table 2 is melted using an air melting furnace, extruded to 1 mmφ, and wire-shaped solder An alloy was made.

得られたはんだ合金の濡れ性を評価するため、窒素雰囲気中で、400℃に加熱されたリードフレームアイランド部で前記ワイヤーの溶融試験を実施し、溶融後徐冷した。組成毎に各200個のサンプルについて溶融試験を実施したが、濡れ不良は確認されず、実施例1、2、実施例5〜9、比較例3、4、10、11よりも、濡れ広がりが良好になっており、濡れ性が向上した。   In order to evaluate the wettability of the obtained solder alloy, the wire was subjected to a melting test in a lead frame island heated to 400 ° C. in a nitrogen atmosphere, and gradually cooled after melting. Although a melting test was performed on each of the 200 samples for each composition, no wetting failure was confirmed, and the wetting spread was greater than in Examples 1, 2, Examples 5-9, and Comparative Examples 3, 4, 10, and 11. It became favorable and wettability improved.

次に、得られた各サンプルを用いてダイボンディングを行い、その接合部の信頼性の評価を行った。評価方法を具体的に以下に記す。前記1mmφのサンプルとダイボンダーを用い、シリコンチップのダイボンディング面にAuを蒸着して作製したダミーチップを銅製のリードフレームにダイボンディングした。次に、これをエポキシ樹脂でモールドした。モールドしたものを用いて、−50℃/150℃の温度サイクル試験を1000サイクルに増やして実施した。その後に樹脂を開封してダイボンディングによる接合部の観察を行い、チップおよび接合部に割れの発生がない場合を「良」、割れが発生した場合を「不良」と評価した。以上の結果を表2に示す。   Next, die bonding was performed using each of the obtained samples, and the reliability of the bonded portion was evaluated. The evaluation method is specifically described below. Using the 1 mmφ sample and a die bonder, a dummy chip produced by vapor-depositing Au on the die bonding surface of a silicon chip was die-bonded to a copper lead frame. Next, this was molded with an epoxy resin. Using the molded product, the temperature cycle test of −50 ° C./150° C. was increased to 1000 cycles. Thereafter, the resin was opened and the bonded portion was observed by die bonding, and the case where no crack occurred in the chip and the bonded portion was evaluated as “good”, and the case where a crack occurred was evaluated as “bad”. The results are shown in Table 2.

表2に示すように、本発明の範囲内である実施例12〜21については、上記の温度サイクル試験によっても、チップおよび接合部に割れが発生せず、接合信頼性の評価結果は、「良」となった。   As shown in Table 2, for Examples 12 to 21 within the scope of the present invention, the chip and the joint did not crack even by the above temperature cycle test. It was good.

次いで、モールドしたものの一部を、リフロー温度:260℃で基板に実装し、実装後のチップおよび接合部の異常の有無を調べた。その結果、いずれも異常は見られず、目立ったボイドも確認できなかった。   Next, a part of the molded product was mounted on a substrate at a reflow temperature of 260 ° C., and the presence or absence of abnormality in the chip and the joint after mounting was examined. As a result, no abnormality was observed, and no conspicuous voids could be confirmed.

また、本発明に係るはんだ合金(実施例12〜21)で接合された部位の耐熱性の評価は、リフロー温度である260℃に10秒間保持することで実施したが、いずれの接合部においても溶融するのは一部のみで、全体は溶融することなく保たれていることを確認した。したがって、本発明に係るはんだ合金(実施例12〜21)で接合された部位は、電子部品を基板に実装するためのリフローの際においても剥離やボイド等は発生せず、電子部品の特性に問題は生じないと考えられる。   Moreover, although the heat resistance evaluation of the site | part joined with the solder alloy which concerns on this invention (Examples 12-21) was implemented by hold | maintaining at 260 degreeC which is a reflow temperature for 10 second, in any junction part It was confirmed that only a part melted and the whole was kept without melting. Therefore, the part joined by the solder alloy according to the present invention (Examples 12 to 21) does not cause peeling or void even during reflow for mounting the electronic component on the substrate, and the characteristics of the electronic component are not affected. The problem is not expected to occur.

Figure 0004453612
Figure 0004453612

(実施例22〜26)
純度99.99質量%のSn、Sb、Cu、Agを用いて、表3に示す組成のSn合金を大気溶解炉を用いて溶製し、1mmφに押し出し加工を行いワイヤー形状のはんだ合金を作製した。
(Examples 22 to 26)
Using Sn, Sb, Cu, and Ag with a purity of 99.99 mass%, an Sn alloy having the composition shown in Table 3 is melted using an air melting furnace and extruded to 1 mmφ to produce a wire-shaped solder alloy. did.

得られたはんだ合金の濡れ性を評価するため、窒素雰囲気中で、400℃に加熱されたリードフレームアイランド部で前記ワイヤーの溶融試験を実施し、溶融後徐冷した。組成毎に各200個のサンプルについて溶融試験を実施したが、濡れ不良は確認されなかった。   In order to evaluate the wettability of the obtained solder alloy, the wire was subjected to a melting test in a lead frame island heated to 400 ° C. in a nitrogen atmosphere, and gradually cooled after melting. A melting test was conducted on 200 samples for each composition, but no wetting defect was confirmed.

次に、得られた各サンプルを用いてダイボンディングを行い、その接合部の信頼性の評価を行った。評価方法を具体的に以下に記す。前記1mmφのサンプルとダイボンダーを用い、シリコンチップのダイボンディング面にAuを蒸着して作製したダミーチップを銅製のリードフレームにダイボンディングした。次に、これをエポキシ樹脂でモールドした。モールドしたものを用いて−50℃/150℃の温度サイクル試験を800サイクル実施した。その後に樹脂を開封してダイボンディングによる接合部の観察を行い、チップおよび接合部に割れの発生がない場合を「良」、割れが発生した場合を「不良」と評価した。以上の結果を表3に示す。   Next, die bonding was performed using each of the obtained samples, and the reliability of the bonded portion was evaluated. The evaluation method is specifically described below. Using the 1 mmφ sample and a die bonder, a dummy chip produced by vapor-depositing Au on the die bonding surface of a silicon chip was die-bonded to a copper lead frame. Next, this was molded with an epoxy resin. Using the molded product, a temperature cycle test of −50 ° C./150° C. was performed 800 cycles. Thereafter, the resin was opened and the bonded portion was observed by die bonding, and the case where no crack occurred in the chip and the bonded portion was evaluated as “good”, and the case where a crack occurred was evaluated as “bad”. The above results are shown in Table 3.

表3に示すように、本発明の範囲内である実施例22〜26については、上記の温度サイクル試験によっても、チップまたは接合部に割れが発生せず、接合信頼性の評価結果は、「良」となった。   As shown in Table 3, for Examples 22 to 26 that are within the scope of the present invention, cracks did not occur in the chip or the joint even by the above-described temperature cycle test, and the evaluation result of the joint reliability was “ It was good.

次いで、モールドしたものの一部を、リフロー温度:260℃で基板に実装し、実装後のチップおよび接合部の異常の有無を調べた。その結果、いずれも異常は見られず、目立ったボイドも確認できなかった。   Next, a part of the molded product was mounted on a substrate at a reflow temperature of 260 ° C., and the presence or absence of abnormality in the chip and the joint after mounting was examined. As a result, no abnormality was observed, and no conspicuous voids could be confirmed.

また、本発明に係るはんだ合金(実施例22〜26)で接合された部位の耐熱性の評価は、リフロー温度である260℃に10秒間保持することで実施したが、いずれの接合部においても溶融するのは一部のみで、全体は溶融することなく保たれていることを確認した。したがって、本発明に係るはんだ合金(実施例22〜26)で接合された部位は、電子部品を基板に実装するためのリフローの際においても剥離やボイド等は発生せず、電子部品の特性に問題は生じないと考えられる。   Moreover, although evaluation of the heat resistance of the site | part joined with the solder alloy which concerns on this invention (Examples 22-26) was implemented by hold | maintaining at 260 degreeC which is a reflow temperature for 10 second, in any joined part. It was confirmed that only a part melted and the whole was kept without melting. Therefore, the part joined by the solder alloy according to the present invention (Examples 22 to 26) does not cause peeling or void even during reflow for mounting the electronic component on the substrate, and the characteristics of the electronic component are not affected. The problem is not expected to occur.

Figure 0004453612
Figure 0004453612

(実施例27〜36)
純度99.99質量%のSn、Sb、Cu、Ag、Te、Pを用いて、表4に示す組成のSn合金を大気溶解炉を用いて溶製し、1mmφに押し出し加工を行い、ワイヤー形状のはんだ合金を作製した。
(Examples 27 to 36)
Using Sn, Sb, Cu, Ag, Te, P with a purity of 99.99% by mass, an Sn alloy having the composition shown in Table 4 is melted using an air melting furnace, extruded to 1 mmφ, and wire shape A solder alloy was prepared.

得られたはんだ合金の濡れ性を評価するため、窒素雰囲気中で、400℃に加熱されたリードフレームアイランド部で前記ワイヤーの溶融試験を実施し、溶融後徐冷した。組成毎に各200個のサンプルについて溶融試験を実施したが、濡れ不良は確認されず、実施例22〜26より、濡れ広がりが良好になっており、濡れ性が向上した。   In order to evaluate the wettability of the obtained solder alloy, the wire was subjected to a melting test in a lead frame island heated to 400 ° C. in a nitrogen atmosphere, and gradually cooled after melting. Although a melting test was performed on each of the 200 samples for each composition, no wetting defect was confirmed, and the wetting spread was improved and the wettability was improved from Examples 22 to 26.

次に、得られた各サンプルを用いてダイボンディングを行い、その接合部の信頼性の評価を行った。評価方法を具体的に以下に記す。前記1mmφのサンプルとダイボンダーを用い、シリコンチップのダイボンディング面にAuを蒸着して作製したダミーチップを銅製のリードフレームにダイボンディングした。次に、これをエポキシ樹脂でモールドした。モールドしたものを用いて−50℃/150℃の温度サイクル試験を1000サイクルに増やして実施した。その後に樹脂を開封してダイボンディングによる接合部の観察を行い、チップおよび接合部に割れの発生がない場合を「良」、割れが発生した場合を「不良」と評価した。以上の結果を表4に示す。   Next, die bonding was performed using each of the obtained samples, and the reliability of the bonded portion was evaluated. The evaluation method is specifically described below. Using the 1 mmφ sample and a die bonder, a dummy chip produced by vapor-depositing Au on the die bonding surface of a silicon chip was die-bonded to a copper lead frame. Next, this was molded with an epoxy resin. Using the molded product, the temperature cycle test of −50 ° C./150° C. was increased to 1000 cycles. Thereafter, the resin was opened and the bonded portion was observed by die bonding, and the case where no crack occurred in the chip and the bonded portion was evaluated as “good”, and the case where a crack occurred was evaluated as “bad”. The results are shown in Table 4.

表4に示すように、本発明の範囲内である実施例27〜36については、上記の温度サイクル試験により、チップおよび接合部に割れが発生せず、接合信頼性の評価結果は、「良」となった。   As shown in Table 4, with respect to Examples 27 to 36 that are within the scope of the present invention, the chip and the joint were not cracked by the above temperature cycle test, and the evaluation result of the joint reliability was “good”. "

次いで、モールドしたものの一部を、リフロー温度:260℃で基板に実装し、実装後のチップおよび接合部の異常の有無を調べた。その結果、いずれも異常は見られず、目立ったボイドも確認できなかった。   Next, a part of the molded product was mounted on a substrate at a reflow temperature of 260 ° C., and the presence or absence of abnormality in the chip and the joint after mounting was examined. As a result, no abnormality was observed, and no conspicuous voids could be confirmed.

また、本発明に係るはんだ合金(実施例27〜36)で接合された部位の耐熱性の評価は、各実施例ごとに5個の接合部について、リフロー温度である260℃に10秒間保持することで実施したが、いずれの接合部においても溶融するのは一部のみで、全体は溶融することなく保たれていることを確認した。したがって、本発明に係るはんだ合金(実施例27〜36)で接合された部位は、電子部品を基板に実装するためのリフローの際においても剥離やボイド等は発生せず、電子部品の特性に問題は生じないと考えられる。   Moreover, evaluation of the heat resistance of the site | part joined with the solder alloy which concerns on this invention (Examples 27-36) is hold | maintained at 260 degreeC which is a reflow temperature for 10 second about 5 joined parts for each Example. However, it was confirmed that only a part was melted at any joint, and the whole was maintained without being melted. Therefore, the part joined by the solder alloy according to the present invention (Examples 27 to 36) does not cause peeling or voids even during reflow for mounting the electronic component on the substrate, and the characteristics of the electronic component are reduced. The problem is not expected to occur.

Figure 0004453612
Figure 0004453612

(半導体パッケージ)
図1は、本発明に係るはんだ合金を用いた半導体パッケージの一例を示す断面図である。本発明に係るはんだ合金3を用いて、半導体チップ1がリードフレームアイランド部4にはんだ付けされている。半導体チップ1上の電極2は、ボンディングワイヤ6を介してリードフレーム5に接続されている。そして、それらの全体がリードフレーム5の外周部を除きモールド樹脂7で覆われている。
(Semiconductor package)
FIG. 1 is a cross-sectional view showing an example of a semiconductor package using a solder alloy according to the present invention. The semiconductor chip 1 is soldered to the lead frame island part 4 using the solder alloy 3 according to the present invention. The electrodes 2 on the semiconductor chip 1 are connected to the lead frame 5 via bonding wires 6. All of them are covered with the mold resin 7 except for the outer periphery of the lead frame 5.

半導体パッケージの一例を示す断面図である。It is sectional drawing which shows an example of a semiconductor package.

符号の説明Explanation of symbols

1 チップ
2 電極
3 はんだ合金
4 リードフレームアイランド部
5 リードフレーム
6 ボンディングワイヤ
7 モールド樹脂
1 Chip 2 Electrode 3 Solder Alloy 4 Lead Frame Island 5 Lead Frame 6 Bonding Wire 7 Mold Resin

Claims (6)

Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする無鉛はんだ合金。   Lead-free solder alloy characterized by containing Cu in excess of 10% by mass and 24.9% by mass or less, Sb in an amount of 5% by mass or more, the balance being Sn, and Sn content exceeding 70% by mass . Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上、Teを0.01質量%以上5質量%以下含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする無鉛はんだ合金。  Cu exceeds 10% by mass and is 24.9% by mass or less, Sb is 5% by mass or more, Te is 0.01% by mass or more and 5% by mass or less, the balance is Sn, and the content of Sn is Lead-free solder alloy characterized by exceeding 70% by mass. Cuを10質量%を超えて24.9質量%以下、Sbを5質量%以上、Teを0.01質量%以上5質量%以下、Pを0.001質量%以上0.5質量%以下含有し、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする無鉛はんだ合金。 Cu exceeds 10% by mass and is 24.9% by mass or less, Sb is 5% by mass or more, Te is 0.01% by mass to 5% by mass, and P is 0.001% by mass to 0.5% by mass. And the balance is Sn, and the Sn content exceeds 70% by mass. Sbを5質量%以上、Cuを5質量%以上、Agを0.1質量%以上含有し、CuおよびAgの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする無鉛はんだ合金。 5% by mass or more of Sb, 5% by mass or more of Cu, 0.1% by mass or more of Ag , the total content of Cu and Ag is more than 10% by mass and 24.9% by mass or less, and the balance is A lead-free solder alloy comprising Sn and having a Sn content exceeding 70% by mass. Sbを5質量%以上、Cuを5質量%以上、Teを0.01質量%以上5質量%以下、Agを0.1質量%以上含有し、CuおよびAgの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする無鉛はんだ合金。 Sb is 5% by mass or more, Cu is 5% by mass or more, Te is 0.01% by mass to 5% by mass, Ag is 0.1% by mass or more, and the total content of Cu and Ag is 10% by mass. A lead-free solder alloy characterized by exceeding 24.9% by mass, the balance being Sn, and the Sn content exceeding 70% by mass. Sbを5質量%以上、Cuを5質量%以上、Teを0.01質量%以上5質量%以下、Pを0.001質量%以上0.5質量%以下、Agを0.1質量%以上含有し、CuおよびAgの合計含有量が10質量%を超えて24.9質量%以下であり、残部がSnからなり、かつ、Snの含有量が70質量%を超えることを特徴とする無鉛はんだ合金。 Sb 5 mass% or more, Cu 5 mass% or more, Te 0.01 mass% or more and 5 mass% or less, P 0.001 mass% or more and 0.5 mass% or less, Ag 0.1 mass% or more Lead-free, characterized in that the total content of Cu and Ag exceeds 10% by mass and is 24.9% by mass or less, the balance is Sn, and the Sn content exceeds 70% by mass Solder alloy.
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