JP4439775B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having a circuit formed of a thin film transistor (hereinafter referred to as TFT) using a crystalline semiconductor film formed over a substrate having an insulating surface. In particular, the present invention relates to a liquid crystal display device in which a pixel portion and a drive circuit provided around the pixel portion are provided over the same substrate, and an electric appliance (also referred to as an electronic device) using the liquid crystal display device for the display portion.
[0002]
[Prior art]
With the rapid development of the information society, information appliances such as personal computers (PCs) are rapidly spreading not only to companies but also to individuals. A liquid crystal display device (liquid crystal display) has long been regarded as promising in terms of space saving of portable information devices and PC displays. However, the manufacturing process of the liquid crystal display device is complicated and has a low yield, so that the manufacturing cost is high.
[0003]
In recent years, an amorphous semiconductor (for example, silicon) film (for example, silicon) film formed on an insulating surface provided on a substrate (for example, a glass substrate, a quartz substrate, a stainless steel substrate, etc.) due to the problem of field effect mobility Technology development of a thin film transistor (hereinafter referred to as TFT) using a polycrystalline semiconductor film (hereinafter referred to as polysilicon film or crystalline silicon film) which has been crystallized by crystallizing an amorphous silicon film) Progressing. In particular, a polycrystalline silicon film formed by performing heat treatment for crystallization at a low temperature (600 ° C. or lower) is called a low-temperature polysilicon film.
[0004]
In recent years, it has been studied to form a semiconductor circuit by forming TFTs on a glass substrate or the like. As an electric appliance using such a semiconductor circuit, an electro-optical device such as an active matrix liquid crystal display device is typical.
[0005]
An active matrix liquid crystal display device is a monolithic display device in which a pixel matrix circuit and a driver circuit are provided on the same substrate. Furthermore, the development of a system-on-panel that incorporates logic circuits such as a memory circuit and a clock generation circuit is underway.
[0006]
Since such driver circuits and logic circuits need to operate at high speed, it is inappropriate to use an amorphous silicon film (amorphous silicon film) as an active layer. Therefore, TFTs using a crystalline silicon film (polysilicon film) as an active layer are becoming mainstream at present.
[0007]
Research and development are actively conducted on a process for forming a crystalline silicon film over a large area on a substrate having a lower heat resistance than a quartz substrate such as a glass substrate, that is, a so-called low temperature process.
[0008]
As a method for forming a low-temperature polysilicon film, a laser annealing method, an ion doping method, or the like is mainly used. As a method for obtaining a high-quality low-temperature polysilicon film, a technique used as a catalyst element for promoting crystallization of a metal element is disclosed in Japanese Patent Application Laid-Open No. 7-183540. As the metal element, nickel (Ni), palladium (Pd), lead (Pb), tin (Sn), or the like is used. These catalytic elements are added to the semiconductor (silicon) film by a method such as a solution coating method, a sputtering method, an ion implantation method, a vapor deposition method, or a plasma treatment method, and heat treatment for crystallization is performed. However, these treatments have a problem that the treatment time is long instead of being treated at a low temperature.
[0009]
The present inventors have disclosed a technique for obtaining a crystalline silicon film on a glass substrate in Japanese Patent Application Laid-Open No. 7-130652. The technique described in this publication is that a catalyst element for promoting crystallization is added to an amorphous silicon film, heat treatment is performed, and the amorphous silicon film is crystallized.
[0010]
With this crystallization technique, the crystallization temperature of the amorphous silicon film can be lowered by 50 to 100 ° C., and the time required for crystallization can be reduced to 1/5 to 1/10. became. As a result, a crystallized silicon film can be formed over a large area even on a glass substrate with low heat resistance. It has been experimentally confirmed that the crystalline silicon film obtained by such a low temperature process has excellent crystallinity.
[0011]
In addition, environmental problems have become serious, and it is necessary to take energy-saving measures for household electrical appliances worldwide. Therefore, in order to solve the problems such as high efficiency of the manufacturing process for mass production of liquid crystal cells and reduction of manufacturing cost, it is required to increase the size of the substrate in the manufacturing process. From a large glass substrate to a plurality of TFT substrates. Technology development is underway.
[0012]
Note that in this specification, a liquid crystal cell refers to a display device in which liquid crystal is sandwiched between a substrate on which a pixel TFT is formed and a counter substrate.
[0013]
[Problems to be solved by the invention]
In Japanese Patent Application Laid-Open No. 7-130652, the present applicant performs heat treatment by adding a metal element (hereinafter referred to as catalyst element) having an action of promoting crystallization to an amorphous semiconductor film in a crystallization process. Discloses a method for manufacturing a crystalline semiconductor film having high crystallinity.
[0014]
However, the method described in the above publication is a heat treatment using a furnace, and the time required for the heat treatment is ˜14 hours to form a crystalline semiconductor film.
[0015]
In the manufacturing process for actually producing a large number of semiconductor devices, shortening the processing time is an important issue.
[0016]
Further, as another technique for improving the efficiency of the manufacturing process, a technique for manufacturing a plurality of liquid crystal cells, for example, six 12.1 type liquid crystal cells from one large glass substrate, for example, a 550 mm × 650 mm substrate. Is also being established. In the future, it is required to introduce technology and manufacturing equipment for manufacturing more liquid crystal cells from a larger glass substrate. With the increase in size of the base material (glass substrate) before processing, the apparatus used in the manufacturing process also needs to be increased in size, and the furnace for performing the heat treatment has problems related to an increase in the installation area and the above-described problem. However, there is a problem that energy for heating a large furnace for processing a large substrate uniformly and sufficiently is necessary, and that energy becomes enormous power consumption.
[0017]
Therefore, in view of improvement in production efficiency and productivity, it is considered that a rapid thermal annealing (RTA) method is suitable as a heating method. However, the RTA method is a method in which a heat treatment is performed at a high temperature for a short time for the purpose of suppressing diffusion of impurities in the semiconductor layer. Elements such as a crystallization process and a gettering process using a catalytic element are used. In the heat treatment process of the semiconductor film that requires diffusion, the glass substrate may be distorted before obtaining a desired effect. For example, in a gettering process in a furnace, it has been confirmed that the glass substrate is bent and deformed by its own weight only after being treated at 800 ° C. for 60 seconds.
[0018]
An object of the present invention is to provide a method for efficiently producing a good crystalline semiconductor film on a large glass substrate in order to solve the above problems and enable mass production using a large substrate.
[0019]
Further, it is known that when heat treatment is performed at a high temperature exceeding 600 ° C., a high-speed growth of an oxide semiconductor film due to a catalytic element occurs and the formed semiconductor element is destroyed. Further, it is known that when heat treatment is performed at a high temperature exceeding 900 ° C., an oxide semiconductor film grows at high speed even in a region where there is no catalyst element.
[0020]
Therefore, an object of the present invention is to reduce the time required for the process by irradiating pulsed light by controlling the light source for the heat treatment for crystallization.
[0021]
Another object is to reduce hydrogen in the film and improve crystallinity by performing heat treatment for crystallization in a reduced-pressure atmosphere. It is another object of the present invention to reduce the oxygen concentration in the atmosphere by performing heat treatment in a reduced pressure atmosphere and to suppress oxide formation of a catalyst element that promotes crystallization. Another object is to accelerate the crystallization and shorten the crystallization time by performing heat treatment for crystallization under vacuum. Another object is to reduce hydrogen in the film and improve crystallinity by performing heat treatment for crystallization under vacuum. It is another object of the present invention to reduce the oxygen concentration in the atmosphere by performing heat treatment under vacuum and to suppress formation of an oxide of a catalyst element that promotes crystallization.
[0022]
As another problem, after a good crystalline semiconductor film is formed on a glass substrate by a low temperature process, if the catalytic element remains in a high concentration in the semiconductor film, the catalytic element is converted into a semiconductor film (silicon film). Since a deep energy level is formed inside and carriers are captured and recombined, it is expected that the TFT formed using the crystalline silicon film will adversely affect the electrical characteristics and reliability of the TFT. Is done.
[0023]
It has been confirmed that catalyst elements remaining in the crystalline semiconductor film are segregated irregularly, particularly concentrated at the grain boundaries, and the segregation is a region (in particular, a channel forming region and a channel). If it exists in the junction between the formation region and the source region or the drain region), a weak current escape path (leakage path) occurs, causing a sudden increase in off-current (current when the TFT is in an off state). It is considered that.
[0024]
Therefore, it is an object to provide a method in which a gettering step for quickly reducing the concentration of a catalytic element remaining in a crystalline semiconductor film after a crystallization step using a catalytic element is also performed by a low temperature process.
[0025]
[Means for Solving the Problems]
As described above, by using the RTA apparatus, the throughput of the heat treatment can be improved. Further, by irradiating the light source in a pulsed manner, the treatment temperature can be lowered before the heat is transmitted to the glass, so that the semiconductor film formed over the glass substrate can be heat-treated.
[0026]
Further, the heat transfer by turning on the light source controlled in a pulsed manner is controlled by a temperature sensor, and in accordance with this control, a cooling means is used so that the heat above the glass transition temperature is not transmitted to the glass substrate. Since heating and cooling are simultaneously performed, the time during which the glass transition temperature is not exceeded or exceeded during the heat treatment can be shortened. In addition, by repeating this heat treatment, the glass substrate is not distorted while maintaining the temperature at which the catalyst element that promotes crystallization of the semiconductor film diffuses in the semiconductor, and it can be efficiently performed in a relatively short time. Heat treatment of the semiconductor film for crystallization of the semiconductor film and gettering of the catalytic element can be performed. This method is referred to herein as Plural Pulse Thermal Annealing (hereinafter PPTA).
[0027]
In the PPTA (Plural Pulse Thermal Anneal) device, rapid heating is possible by heating only the semiconductor film instantaneously and stopping the heating before it is transmitted to the glass substrate by emitting light in a pulsed form and irradiating it. Since it is a heating method capable of rapid cooling, the glass substrate is not deformed or damaged by heat. Further, the heat transfer by turning on the light source controlled in a pulsed manner is controlled by a temperature sensor, and in accordance with this control, a cooling means is used so that the heat above the glass transition temperature is not transmitted to the glass substrate. In addition, by repeating this heat treatment, the glass substrate is not distorted while maintaining the temperature at which the catalyst element that promotes crystallization of the semiconductor film diffuses in the semiconductor, and it can be efficiently performed in a relatively short time. Heat treatment of the semiconductor film for crystallization of the semiconductor film and gettering of the catalytic element can be performed.
[0028]
FIG. 20 shows an example of a PPTA (Plural Pulse Thermal Anneal) apparatus. In FIG. 20, a first heat treatment chamber 751, a second heat treatment chamber 752, and a third heat treatment chamber 753 are connected around a first transfer chamber 750 through gates 772d to 772f. The structure of these heat treatment chambers is the same as that shown in FIG. The refrigerant is introduced into each heat treatment chamber from the cylinder 766 via the flow rate control means 767. Exhaust means for reducing the pressure in the processing chamber includes turbo molecular pumps 768a to 768c and dry pumps 769a to 769c. Further, circulators 771a to 771c for circulating the refrigerant and purifiers 770a to 770c for purifying the refrigerant are provided. Although not shown, the blinking of the light source and the supply of the refrigerant are controlled by a computer. In each processing chamber, light sources 762a to 762c and substrate stages 763a to 76c are provided.
[0029]
The second transfer chamber 754 is provided with a transfer unit 760, and transfers the substrate to be processed to the first process chamber 750, the surface treatment chamber 755, and the cooling chamber 756. The surface treatment chamber 755 is provided with a spinner 764. The cooling chamber 756 is provided with a substrate stage 765. In the configuration of the load chamber 757 and the unload chamber 758, the substrate to be processed is moved by the transfer means 761. Note that reference numeral 759 denotes a processing substrate transfer means.
[0030]
The present invention is a method for manufacturing a semiconductor device using the heat treatment apparatus as described above, and includes a first step of adding a catalytic element for promoting crystallization to an amorphous semiconductor film formed over an insulating surface; And a second step of forming a crystalline semiconductor film by controlling the light source and irradiating the amorphous semiconductor film with pulsed light to crystallize the amorphous semiconductor film.
[0031]
In addition, the present invention is a method for manufacturing a semiconductor device using the heat treatment apparatus as described above, and includes a first method of adding a catalytic element for promoting crystallization to an amorphous semiconductor film formed over an insulating surface. And a second step of controlling the light source to form a crystalline semiconductor film by irradiating the amorphous semiconductor film with pulsed light to crystallize, and the light emission time of the light source is It is characterized by including a step of 1 to 60 seconds.
[0032]
The above invention is characterized in that, after the second step, a step of irradiating the crystalline semiconductor film with laser light to improve crystallinity is included.
[0033]
In the above invention, the second step is characterized in that the inside of the processing chamber has a reduced pressure atmosphere.
[0034]
In the above invention, the second step is characterized in that the atmosphere in the processing chamber has an oxygen concentration of 5 ppm or less.
[0035]
In addition, the present invention is a method for manufacturing a semiconductor device using the above-described heat treatment apparatus, in which a catalytic element is added to an amorphous semiconductor film, and the crystalline semiconductor film formed by heat treatment is used. A first step of adding an impurity element; and a second step of irradiating the crystalline semiconductor film to which the impurity element is added with a pulsed light by controlling a light source. The catalyst element is gettered by the light irradiation treatment.
[0036]
The present invention is also a method for manufacturing a semiconductor device using the heat treatment apparatus as described above, in which an impurity is added to a crystalline semiconductor film formed by adding a catalytic element to an amorphous semiconductor film and performing heat treatment. A first step of adding an element; and a step of controlling the light source to irradiate the crystalline semiconductor film to which the impurity element is added with pulsed light to getter the catalytic element. And the light emission time of the light source includes a step of 1 to 40 seconds.
[0037]
In the above invention, the impurity element is an element belonging to Group 15 of the periodic table.
[0038]
In the above invention, the impurity element is an element belonging to Group 15 of the periodic table and an element belonging to Group 13 of the periodic table.
[0039]
In the above invention, the impurity element is an element belonging to Group 18 of the periodic table, an element belonging to Group 15 of the periodic table, or an element belonging to Group 13 of the periodic table.
[0040]
In the above-described invention, the concentration of the impurity element belonging to Group 13 is set to be 1/100 or more and 100 times or less than the concentration of the impurity element belonging to Group 15.
[0041]
The present invention is also a method for manufacturing a semiconductor device using the heat treatment apparatus as described above, wherein a catalytic element is added to an amorphous semiconductor film, and the heat treatment is performed on the crystalline semiconductor film. A first step of forming an amorphous semiconductor film and adding an impurity element to the amorphous semiconductor film; and irradiating the crystalline semiconductor film with pulsed light by controlling a light source; And a second step of gettering the element.
[0042]
In the above invention, the impurity element is an element belonging to Group 18 of the periodic table.
[0043]
In the above invention, the impurity element is an impurity element belonging to Group 18 of the periodic table, an impurity element belonging to Group 15 of the periodic table, or an impurity element belonging to Group 13 of the periodic table.
[0044]
In the above invention, the second step is characterized in that the processing chamber is evacuated and the pressure is 26.6 Pa or less.
[0045]
In the above invention, the second step is characterized in that the oxygen concentration in the processing chamber, particularly in the vicinity of the crystalline semiconductor film, is 2 ppm or less.
[0046]
In the above invention, the impurity element belonging to Group 15 of the periodic table is an element selected from N, P, As, Sb, and Bi.
[0047]
In the above invention, the impurity element belonging to Group 13 of the periodic table is an element selected from B, Al, Ga, In, and Tl.
[0048]
In the above invention, the impurity element belonging to Group 18 of the periodic table is an element selected from Ar, Kr, and Xe.
[0049]
In the above invention, the second step is characterized in that the continuous holding time at a temperature exceeding the glass strain point is 20 seconds or less.
[0050]
In the above invention, the maximum intensity holding time of the light source in the second step is 1 to 5 seconds.
[0051]
In the above invention, the second step is characterized in that cooling using nitrogen gas, inert gas or liquid as a refrigerant is performed at the same time.
[0052]
In the above invention, in the second step, the vicinity of the crystalline semiconductor film is nitrogen (N ₂ ) Atmosphere, inert gas atmosphere, or hydrogen (H ₂ ) It is characterized by an atmosphere and a reducing gas atmosphere.
[0053]
In the above invention, the light source is a light source that emits infrared light or ultraviolet light.
[0054]
In the above invention, the light source is a halogen lamp, a metal halide lamp, a xenon arc lamp, or a low-pressure mercury lamp.
[0055]
In the above invention, the light source is irradiated from above the substrate, from below the substrate, or from below and above the substrate.
[0056]
In the above invention, the catalyst element is one or more selected from Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.
[0057]
The present invention is also a method for manufacturing a semiconductor device using the heat treatment apparatus as described above, and includes a first step of forming an amorphous semiconductor film on an insulating surface, and a surface of the amorphous semiconductor film. A second step of adding a catalytic element for promoting crystallization; and irradiating the amorphous semiconductor film to which the catalytic element is added with a light source by controlling a light source to crystallize the amorphous semiconductor film A third step of forming a crystalline semiconductor film, a fourth step of adding an impurity element to the crystalline semiconductor film, and a pulsed light source controlled to the crystalline semiconductor film to which the impurity element is added. And a fifth step of gettering the catalyst element.
[0058]
The present invention is also a method for manufacturing a semiconductor device using the heat treatment apparatus as described above, and includes a first step of forming an amorphous semiconductor film on an insulating surface, and a surface of the amorphous semiconductor film. A second step of applying a catalytic element for promoting crystallization to form a catalytic element-containing region; and irradiating pulsed light by controlling a light source on an amorphous semiconductor film having the catalytic element applied to the surface. A third step of crystallizing the amorphous semiconductor film to form a crystalline semiconductor film, a fourth step of adding an impurity element to the crystalline semiconductor film, and a crystalline semiconductor to which the impurity element is added A fifth step of irradiating the film with a light source to irradiate pulsed light to getter the catalytic element, and a crystalline semiconductor film gettered with the catalytic element in the fifth step in a semiconductor having a desired shape A sixth step of forming a layer; A seventh step of forming a gate insulating film covering the body layer; an eighth step of forming a gate electrode on the gate insulating film; a ninth step of adding an n-type impurity element to the semiconductor layer; A tenth step of adding a p-type impurity element to a semiconductor layer to be an active layer of a later p-channel TFT, and irradiating pulsed light by controlling a light source, and removing the impurity element added to the semiconductor layer And an eleventh step of activation.
[0059]
In the above invention, the step of crystallizing the semiconductor layer and the step of activating the impurity element added to the semiconductor layer are performed in a reduced pressure atmosphere in which oxygen concentration is reduced by exhausting with a rotary pump and a mechanical booster pump. It is characterized by.
[0060]
In the above invention, the impurity element added in the fourth step is an impurity element belonging to Group 15 of the periodic table, and the impurity elements belonging to Group 15 of the periodic table are N, P, As, Sb. , Bi is an element selected from Bi.
[0061]
In the above invention, the impurity element added in the fourth step is an element belonging to Group 15 of the periodic table and an element belonging to Group 13 of the periodic table, and the element belonging to Group 15 of the periodic table is: The element selected from N, P, As, Sb, and Bi, and the element belonging to Group 13 of the periodic table is an element selected from B, Al, Ga, In, and Tl.
[0062]
In the above invention, in the third step and the fifth step, the vicinity of the crystalline semiconductor film is nitrogen (N ₂ ) Atmosphere, inert gas atmosphere, or hydrogen (H ₂ ) It is characterized by being performed in an atmosphere or a reducing gas atmosphere.
[0063]
In the above invention, the catalyst element is one or more selected from Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.
[0064]
By applying the apparatus as described above to the crystallization process of the semiconductor film and the transfer (gettering) process of the catalytic element present in the semiconductor film, the time required for the crystallization process of the semiconductor film and the addition to the semiconductor film It is possible to reduce the time required for the gettering step of the catalyst element.
[0065]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
A crystallization method and a gettering method using the PPTA apparatus disclosed in the present invention will be described with reference to FIG.
[0066]
First, the base insulating film 11 is formed on the insulating surface of the glass substrate 10 that transmits light. As the base insulating film, any one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film may be used, or these films may be stacked.
[0067]
Next, an amorphous semiconductor film 12 is formed over the base insulating film 11. In this embodiment, an amorphous silicon film is formed to 55 nm. Subsequently, nickel (Ni) is applied to the surface of the amorphous silicon film 12 as a catalytic element that promotes crystallization by a known method to form the catalytic element-containing layer 13.
[0068]
The substrate is moved to the processing chamber 14 and heat treatment is performed. Heat treatment is performed for 1 to 60 seconds (preferably 30 to 60 seconds), 1 to 10 times (preferably 2 to 2) of halogen lamps (infrared light) 15 installed on the lower side of the substrate and 10 on the upper side. (6 times) Turn it on. 4A shows the intensity of the light source during the heat treatment, the solid line graph in FIG. 4B shows the temperature in the vicinity of the substrate measured with a thermocouple embedded in a silicon wafer (508b in FIG. 3), and FIG. The broken line graph of B) is the temperature measured from the back side of the center of the substrate with a radiation thermometer (508a in FIG. 3) outside the processing chamber. From this graph, it is considered that the heat supplied by the halogen lamp (measured with a thermocouple embedded in a silicon wafer) is 700 to 1300 ° C. In this embodiment, a halogen lamp is used as the light source, but it is also preferable to use an ultraviolet lamp as the light source, such as a xenon lamp.
[0069]
As shown in FIG. 3, the PPTA apparatus disclosed in this specification is provided with a cooling means for cooling the reaction chamber and the reaction chamber, and the semiconductor film is irradiated by controlling the light source in pulses. At the same time as the heat treatment of the semiconductor film, cooling is performed using a refrigerant so that the glass substrate is not distorted. An inert gas such as nitrogen gas or helium may be used as the refrigerant in the reaction chamber, and an inert gas or liquid such as nitrogen gas or helium may be used as the refrigerant for cooling the reaction chamber itself. In the present embodiment, 2 to 10 (slm) of nitrogen gas is introduced.
[0070]
As shown in the graph of FIG. 4B, the lamp used as the light source can be a lamp that emits not only infrared light but also ultraviolet light, a general metal halide lamp, and xenon as long as the temperature can be controlled in a pulsed manner. Either an arc lamp or a low-pressure mercury lamp may be used.
[0071]
Further, it is more effective if the heat treatment for crystallization is performed in a reduced pressure atmosphere in which oxygen concentration is reduced by exhausting using a rotary pump or a mechanical booster pump. The pressure in the processing chamber is 1.33 × 10 ^Four What is necessary is just to make it become Pa or less. Or, 26.7 Pa to 1.33 × 10 ^Four Pa may be used. Furthermore, it may be 13.3 Pa or less.
[0072]
FIG. 5A shows a state where the crystalline silicon film 16 obtained by crystallization with a PPTA apparatus is observed with an optical microscope. Further, FIG. 5B shows the result of observing the grain boundary of the semiconductor film processed by the Secco etching method with an SEM. FIG. 5A is observed in a transmission mode of an optical microscope. From the difference in transmittance between crystalline silicon and amorphous silicon, the blackened portion is considered to be an amorphous silicon region. There are few regions that appear to remain amorphous silicon. Here, in order to observe the state of crystallization, image processing was further performed to measure the crystallization rate.
[0073]
A photograph taken by observation with an optical microscope is converted into two gradations by image processing. Since green can separate amorphous silicon and crystalline silicon, the photograph is made into a green image, and this image is divided into two gradations to separate the amorphous silicon region and the crystalline silicon region, and image processing software ( NIH-Image). According to this measuring method, the crystallization rate was 99.8%.
[0074]
Next, gettering processing using a PPTA apparatus will be described with reference to FIGS. In order to add an impurity element (typically phosphorus) belonging to Group 15 of the periodic table having a gettering action to the crystalline silicon film 16, a mask insulating film 17 is formed, phosphorus (P) is added, and the getter is added. A ring region 18 is formed. The gettering region 18 has 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three Of phosphorus has been added. Note that as the impurity element belonging to Group 15 of the periodic table, an element selected from N, P, As, Sb, and Bi may be used.
[0075]
The catalytic element is applied to the entire surface of the semiconductor film, and 1 × 10 6 is also formed in a region that becomes a channel formation region later. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three The catalytic element remains. Lamp light is irradiated in a pulsed form from the lower surface and the upper surface of the substrate (hereinafter, the lamp light irradiated in a pulsed form is referred to as pulsed light), and the gettering region 18 is gettered with the catalytic element. The pulsed light is heated to 1220 ° C. using a halogen lamp in the same manner as the heat treatment for crystallization, and the temperature is maintained for 40 seconds. Subsequently, it cools to 300-400 degreeC. Although the effect of gettering can be confirmed only by performing this process once, it is more preferable to perform the process 2 to 20 times. By this heat treatment, the catalyst element in the semiconductor film is removed by 1 × 10. ¹⁷ atoms / cm ^Three The following can be reduced. During the heat treatment, nitrogen gas 2 to 10 (slm) is allowed to flow as a refrigerant into the reaction chamber in order to prevent heat from being transmitted to the glass substrate. In addition, the heat treatment for gettering is performed in a reduced-pressure atmosphere with an atmospheric pressure or lower by exhausting with a rotary pump or a mechanical booster pump in the same manner as the heat treatment for crystallization. Get better.
[0076]
In the above heat treatment, the semiconductor film is irradiated with lamp light in a pulsed manner to perform crystallization or gettering, but the heating is performed in a pulsed manner (for example, the light source itself is moved or the substrate itself is moved). The light source (lamp) is not required to be controlled in a pulse shape.
[0077]
Here, an example of the PPTA apparatus used in the present invention will be briefly described with reference to FIG. The single chamber processing chamber 500 is made of quartz. A water cooling type cooling device 501 is provided around the processing chamber 500 for cooling. As the light source 502, rod-shaped halogen lamps are provided on the lower side and the upper side of the substrate, and light sources on both sides are used in the embodiment. However, the light source may be used only on one side and the user may determine as appropriate. The light source 502 is controlled by the light source control device 503 and is turned on as pulsed light (for example, including a wavelength of 0.5 μm to 3 μm).
[0078]
Nitrogen gas is supplied to the processing chamber 500 from the refrigerant supply source 504 as the refrigerant (gas) 520 via the flow rate control device 505. Note that, based on the results measured by the temperature sensors 508a and 508b connected to the temperature detector 507, the control unit 506 controls the supply amount of the refrigerant and the intensity of the light source. The refrigerant supplied to the processing chamber 500 is discharged from the exhaust port 509 to the outside, and the processing chamber 500 is always filled with clean gas.
[0079]
The substrate 514 is placed on the substrate holder in the loader / unloader chamber 513 and is transferred to the processing chamber 500 by the transfer means 511 in the transfer chamber 512. A gate valve 510 is provided between the transfer chamber 512 and the processing chamber 500. Further, the processing chamber 500 is exhausted by a rotary pump 515 and a mechanical booster pump 516.
[0080]
(Embodiment 2)
In the crystallization process of the amorphous semiconductor described in Embodiment Mode 1, heat treatment for crystallization of the amorphous semiconductor film may be performed in a vacuum atmosphere of 0.1 Pa or less. In this case, a heat treatment may be performed by controlling the light source after making the inside of the treatment chamber high vacuum using a pump capable of realizing high vacuum such as a turbo molecular pump.
[0081]
(Embodiment 3)
In the present embodiment, an example different from the first embodiment of the gettering method using the PPTA device will be described. Note that the impurity element added to the gettering region is different from that shown in FIG.
[0082]
According to the first embodiment, the base insulating film 11 is formed on the insulating surface of the glass substrate 10 that transmits light. Next, an amorphous semiconductor film 12 is formed over the base insulating film 11. In this embodiment, an amorphous silicon film having a thickness of 55 nm is formed (FIG. 1A).
[0083]
Subsequently, nickel (Ni) is applied to the surface of the amorphous silicon film 12 as a catalytic element for promoting crystallization by a known method to form the catalytic element-containing layer 13, and then the amorphous is formed by heat treatment in the processing chamber 14. The crystalline silicon film 16 is formed by crystallizing the silicon film 12. Crystallinity may be improved by irradiating the crystalline silicon film 16 with laser light after this heat treatment (FIGS. 1B and 1C).
[0084]
The concentration of the catalytic element remaining in the crystalline silicon film 16 formed as described above is reduced. A gettering process using a PPTA apparatus will be described with reference to FIGS. A mask insulating film 17 is formed to add an impurity element belonging to Group 15 of the periodic table (typically phosphorus) having a gettering action and an impurity element belonging to Group 13 to the crystalline silicon film 16, and phosphorus (P ) And boron (B) are added to form the gettering region 18. In the gettering region 18, the concentration of the impurity element belonging to Group 13 is 1/100 to 100 times the concentration of the impurity element belonging to Group 15 (in this embodiment, 1 × 10 ¹⁹ ~ 1x10 ^{twenty one} atoms / cm ^Three Of phosphorus and 1 × 10 ¹⁹ ~ 1x10 ^{twenty one} atoms / cm ^Three Of boron). As an addition method, a gas phase method such as an ion-dop pink method or a plasma doping method, or a method of forming a layer containing a group 13 element and / or a group 15 element by a solid phase method or a liquid phase method using a solution. Is used. As the impurity element belonging to Group 15 of the periodic table, an element selected from N, P, As, Sb, and Bi may be used, and as the impurity element belonging to Group 13 of the periodic table, B, Al, Ga An element selected from In, Tl and Tl may be used.
[0085]
The substrate is moved again to the processing chamber 14 and heat treatment is performed. Heat treatment is performed for 1 to 180 seconds (preferably 30 to 60 seconds), 1 to 30 times (preferably 2 to 2) of halogen lamps (infrared light) 15 installed 11 on the lower side and 10 on the upper side. 10 times). Processing is performed at a temperature at which the glass substrate does not greatly warp or warp. In this embodiment, the substrate temperature at this time is controlled to 700 ° C. or lower by measurement from the back surface of the substrate with a radiation thermometer, and the glass strain point of 667 ° C. or higher is continuously maintained within 20 seconds. Hold it down. In this embodiment, a halogen lamp is used as the light source, but it is also preferable to use an ultraviolet lamp as the light source, such as a xenon lamp.
[0086]
As shown in FIG. 3, the PPTA apparatus disclosed in this specification is provided with a cooling means for cooling the reaction chamber and the reaction chamber, and the semiconductor film is irradiated by controlling the light source in pulses. At the same time as the heat treatment of the semiconductor film, the glass substrate is cooled using a refrigerant so that the glass substrate is not distorted. As the refrigerant in the reaction chamber, an inert gas such as nitrogen gas or helium, and as the refrigerant for cooling the reaction chamber itself, an inert gas or liquid such as nitrogen gas or helium, or both may be used. In the present embodiment, 2 to 10 (slm) of nitrogen gas is introduced.
[0087]
The lamp used as the light source can control not only infrared light but also ultraviolet light, general metal halide lamps, xenon arc lamps, carbon arc lamps, low-pressure mercury lamps as long as the illuminance can be controlled sharply in a pulsed manner. Any of the lamps may be used.
[0088]
Further, in the processing chamber 14, the gettering effect is enhanced by exhausting with a rotary pump or a mechanical booster pump in a reduced-pressure atmosphere having an atmospheric pressure or lower. In this embodiment, high purity (CH contained in nitrogen) _Four , CO, CO ₂ , H ₂ , H ₂ O and O ₂ At a flow rate of 5 l / min to maintain the pressure at 2.67 Pa or less, and create a nitrogen atmosphere with an oxygen concentration of 5 ppm or less (in this embodiment, 2 ppm or less). In this nitrogen atmosphere, a heat treatment process is performed at 450 ° C. to 950 ° C. for 4 to 24 hours. In this embodiment, the nitrogen atmosphere is used. However, if the oxygen concentration can be reduced to 5 ppm or less, the atmosphere may be an oxygen-free gas, for example, an inert gas such as helium (He), neon (Ne), or argon (Ar). Good. In addition, a gas that does not accumulate by thermal decomposition or react with the semiconductor film, such as hydrogen (H ₂ )
[0089]
The catalytic element is applied to the entire surface of the semiconductor film 21, and 1 × 10 6 is also formed in a region that becomes a channel forming region later. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three The catalytic element remains. Lamp light is irradiated in a pulsed form from the lower surface and the upper surface of the substrate (hereinafter, the lamp light irradiated in a pulsed form is referred to as pulsed light 20), and the gettering region 18 is gettered with the catalytic element. The pulsed light 20 uses a halogen lamp, which is heated to 700 ° C. and immediately cooled to a temperature of 600 ° C. (preferably 450 ° C. or less). Although the effect of gettering can be confirmed by performing this process once, it is more preferable to perform the process 2 to 30 times.
[0090]
As shown in FIG. 1F by this heat treatment, nickel in the crystalline silicon film moves in the direction of the arrow by this heat treatment step and is captured in the gettering region 18 by the gettering action of phosphorus. That is, nickel is removed from the crystalline silicon film, and the concentration of nickel contained in the crystalline silicon film is 1 × 10. ¹⁷ atoms / cm ^Three Or less, preferably 1 × 10 ¹⁶ atoms / cm ^Three It can be reduced to the following. During the heat treatment, nitrogen gas 2 to 10 (slm) is allowed to flow as a refrigerant into the reaction chamber in order to prevent heat from being transmitted to the glass substrate.
[0091]
In the above heat treatment, a semiconductor film is irradiated with lamp light in a pulsed manner to perform crystallization or gettering. However, the heating is performed in a pulsed manner (for example, the light source itself is moved or the substrate itself is moved). The light source (lamp) is not required to be controlled in a pulse shape. The crystalline silicon film thus obtained is patterned to obtain a region 22 to be a semiconductor layer of a later TFT.
[0092]
(Embodiment 4)
In the present embodiment, an example different from the third embodiment of the gettering method using the PPTA device will be described.
[0093]
In accordance with Embodiment 1, a crystalline semiconductor film is formed using a catalytic element. Note that crystallinity may be improved by irradiating a crystalline semiconductor film (crystalline silicon film) obtained by heat treatment with laser light.
[0094]
The crystalline silicon film formed as described above uses a catalytic element that promotes crystallization, and after crystallization, the catalytic element is removed by the gettering action of phosphorus. An even better crystalline silicon film can be obtained by reducing the concentration of the catalyst element remaining in the film.
[0095]
Here, the gettering process using the PPTA apparatus will be described. An impurity element belonging to Group 15 of the periodic table (typically phosphorus) having a gettering action, an impurity element belonging to Group 13 of the periodic table (typically boron), and an impurity element belonging to Group 18 of the periodic table (representative) Specifically, in order to add argon) to the crystalline silicon film 16, a mask insulating film 17 is formed, and phosphorus (P) and argon (Ar) are added to form a gettering region 18. At this time, phosphorus (P) and boron (B) may be added to form the gettering region 18. In this case, the concentration of the impurity element belonging to group 13 is 15 in this gettering region 18. 1 to 100 times the concentration of the impurity element belonging to the group (in this embodiment, 1 × 10 ¹⁹ ~ 1x10 ^{twenty one} atoms / cm ^Three Of phosphorus and 1 × 10 ¹⁹ ~ 1x10 ^{twenty one} atoms / cm ^Three Of boron). As an addition method, a gas phase method such as an ion-dop pink method or a plasma doping method, or a method of forming a layer containing a group 13 element and / or a group 15 element by a solid phase method or a liquid phase method using a solution. Is used. Argon (Ar) may be mixed into the film when the semiconductor film is deposited by sputtering. Further, as a gettering method, an amorphous semiconductor film may be formed adjacent to the gettering region.
In addition to Ar, Kr, Xe, or the like may be used as the impurity element belonging to Group 18 of the periodic table.
[0096]
Further, after adding a catalytic element as shown in FIGS. 1C and 1D and performing heat treatment to form the crystalline silicon film 16, the crystalline silicon film 16 is formed on the crystalline silicon film 16 as shown in FIG. By forming an amorphous silicon film 31 containing an impurity element belonging to Group 18 of the periodic table and performing a heat treatment, the amorphous silicon film 31 functions as the gettering region 16 and the crystalline silicon film The catalyst element remaining in 16 can be moved. Note that since the amorphous silicon film functioning as a gettering region is removed by etching or the like after the gettering step, a barrier layer 30 for protecting the crystalline silicon film from the etchant during the etching process is used as the crystalline silicon film. The amorphous silicon film 31 is preferably formed after being formed on the film 16. The barrier layer 30 may be a chemical oxide film formed by treatment with ozone water, or a chemical oxide film formed by treatment with an aqueous solution in which sulfuric acid, hydrochloric acid, nitric acid or the like is mixed with hydrogen peroxide. That's fine. These films can be removed by hydrofluoric acid treatment.
[0097]
The substrate is moved again to the processing chamber 14 and heat treatment is performed. Heat treatment is performed for 1 to 180 seconds (preferably 30 to 60 seconds), 1 to 30 times (preferably 2 to 2) of halogen lamps (infrared light) 15 installed 11 on the lower side and 10 on the upper side. 10 times). Processing is performed at a temperature at which the glass substrate does not greatly warp or warp. In this embodiment, the substrate temperature at this time is controlled to be 700 ° C. or lower by measurement from the back surface of the substrate with a radiation thermometer, and the glass strain point of 667 ° C. or higher is continuously maintained within 20 seconds. Hold it down. Further, in order to improve throughput and reduce power consumption, light irradiation may be performed for several minutes to maintain a temperature of 600 ° C. to 700 ° C. In this embodiment, a halogen lamp is used as the light source, but it is also preferable to use an ultraviolet lamp as the light source, such as a xenon lamp.
[0098]
As shown in FIG. 3, the PPTA apparatus disclosed in this specification is provided with a cooling means for cooling the reaction chamber and the reaction chamber, and the semiconductor film is irradiated by controlling the light source in pulses. At the same time as the heat treatment of the semiconductor film, the glass substrate is cooled using a refrigerant so that the glass substrate is not distorted. As the refrigerant in the reaction chamber, an inert gas such as nitrogen gas or helium, and as the refrigerant for cooling the reaction chamber itself, an inert gas or liquid such as nitrogen gas or helium, or both may be used. In the present embodiment, 2 to 10 (slm) of nitrogen gas is introduced.
[0099]
The lamp used as the light source can control not only infrared light but also ultraviolet light, general halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, low-pressure lamps, as long as the illuminance can be controlled sharply in a pulse shape. Any of mercury lamps and the like may be used.
[0100]
Further, in the processing chamber 14, the gettering effect is enhanced by exhausting with a rotary pump or a mechanical booster pump in a reduced-pressure atmosphere having an atmospheric pressure or lower. In this embodiment, high purity (CH contained in nitrogen) _Four , CO, CO ₂ , H ₂ , H ₂ O and O ₂ At a flow rate of 5 l / min to maintain a pressure of 26.7 Pa or less, and a nitrogen atmosphere having an oxygen concentration of 5 ppm or less (in this embodiment, 2 ppm or less) is created. In this nitrogen atmosphere, a heat treatment process is performed at 450 ° C. to 950 ° C. for 4 to 24 hours. In this embodiment, the nitrogen atmosphere is used. However, if the oxygen concentration can be reduced to 5 ppm or less, the atmosphere may be an oxygen-free gas, for example, an inert gas such as helium (He), neon (Ne), or argon (Ar). Good. In addition, a gas that does not accumulate by thermal decomposition or react with the semiconductor film, such as hydrogen (H ₂ )
[0101]
The catalytic element is applied to the entire surface of the semiconductor film, and 1 × 10 6 is also formed in a region that becomes a channel formation region later. ¹⁷ ~ 1x10 ¹⁹ atoms / cm ^Three The catalytic element remains. Lamp light is irradiated in a pulsed form from the lower surface and the upper surface of the substrate (hereinafter, the lamp light irradiated in a pulsed form is referred to as pulsed light), and the gettering region 18 is gettered with the catalytic element. The pulsed light uses a halogen lamp, which is heated to 700 ° C. and immediately cooled to a temperature of 600 ° C. (preferably 450 ° C. or less). Although the effect of gettering can be confirmed by performing this process once, it is more preferable to perform the process 2 to 30 times. Further, in order to improve throughput and reduce power consumption, light irradiation may be performed for several minutes to maintain a temperature of 600 ° C. to 700 ° C.
[0102]
By this heat treatment, as shown in FIG. 1F, nickel in the crystalline silicon film moves in the direction of the arrow in this heat treatment step and is captured in the gettering region 18 by the gettering action of phosphorus. That is, nickel is removed from the crystalline silicon film, and the concentration of nickel contained in the crystalline silicon film is 1 × 10. ¹⁷ atoms / cm ^Three Or less, preferably 1 × 10 ¹⁶ atoms / cm ^Three It can be reduced to the following. During the heat treatment, nitrogen gas 2 to 10 (slm) is allowed to flow as a refrigerant into the reaction chamber in order to prevent heat from being transmitted to the glass substrate.
[0103]
In the above heat treatment, the semiconductor film is irradiated with lamp light in a pulsed manner to perform crystallization or gettering, but the heating is performed in a pulsed manner (for example, the light source itself is moved or the substrate itself is moved). The light source (lamp) is not required to be controlled in a pulse shape.
[0104]
【Example】
Example 1
An example of a method for manufacturing a TFT substrate using the present invention will be described in this embodiment with reference to FIGS.
[0105]
First, in this embodiment, a glass substrate made of aluminoborosilicate glass or barium borosilicate glass that transmits light, or a specific gravity of 2.5 g / cm. ^Three Hereinafter, the thermal expansion coefficient is 35.0 × 10 ^-7 A glass substrate of / ° C. or lower is used. A base insulating film 101 is formed over the glass substrate 100. The base insulating film 101 is made of SiH with a CVD apparatus. _Four And N ₂ A silicon oxynitride (SiNO) film 101a is formed using O, and then a silicon oxynitride (SiON) film 101b is formed in the same chamber. The SiNO film and the SiON film are formed so as to have a thickness of 50 to 200 nm.
[0106]
Next, an amorphous silicon film 102 is formed as an amorphous semiconductor film. Next, a mask insulating film (not shown) is formed on the amorphous silicon film 102. It is used in a step of adding an impurity element imparting p-type (hereinafter referred to as p-type impurity element) to the amorphous silicon film 102 through the mask insulating film. As the p-type impurity element, typically, an element belonging to Group 13, typically boron or gallium can be used. This step (referred to as channel doping step) is a step for controlling the threshold voltage of the TFT. Here, diborane (B ₂ H ₆ Boron is added by ion doping that is plasma-excited without mass separation. Of course, an ion implantation method for performing mass separation may be used.
[0107]
Next, the amorphous silicon film 102 is crystallized. First, a catalytic element containing layer 103 is formed by applying a nickel acetate salt solution containing 10 ppm of nickel in terms of weight to the surface of the amorphous silicon film 102. The application method may be a known method such as application using a spinner or sputtering (FIG. 6A). Subsequently, as shown by the solid line graph in FIG. 4B, by controlling the light source for heating and performing irradiation in a pulsed manner (hereinafter, the light irradiated in a pulsed manner by controlling the light source is pulsed). The operation of turning off the pulsed light 104 for 5 seconds after holding 1220 ° C. (measurement by the temperature sensor indicated by 508b in FIG. 3) for 40 seconds is one cycle, and this is repeated three times, and the fourth pulse is 1220 ° C. ( The measurement of the temperature sensor indicated by 508b in FIG. 3) was held for 60 seconds. In addition, the time for which the pulsed light 104 maintains the maximum intensity is about 1 to 5 seconds. In this embodiment, the pulsed light is irradiated four times, but may be performed two to ten times. Thereby, the crystalline silicon film 105 is formed. Note that laser irradiation may be performed on the crystalline silicon film 105 in order to further increase the crystallization rate and repair defects in the crystal grains (FIG. 6B). Further, heat treatment for reducing the amount of hydrogen contained in the amorphous silicon film may be performed before the crystallization treatment.
[0108]
Subsequently, in order to getter the catalytic element used for the crystallization process from the crystalline silicon film 105, an impurity element belonging to Group 15 of the periodic table having a gettering action (typically phosphorus) is added, A gettering region 107 is formed. A mask insulating film 170 is formed, and phosphorus is added to a region where the crystalline silicon film is exposed. In addition to phosphorus, boron may be added to the gettering region 107. Thereafter, pulsed light 106 is irradiated. The pulse light to be irradiated is heated to 1220 ° C. at a rate of 100 to 200 ° C./second, held for 40 seconds, and the cooling temperature is 50 to 150 ° C./second, and the pulse light to be cooled to 300 to 400 ° C. is suitable. Yes. Further, 2 to 10 (slm) of nitrogen gas is introduced as a refrigerant so that the glass substrate does not exceed the glass transition temperature. By irradiating such pulsed light once, the catalytic element is gettered to the gettering region 107. In order to obtain a sufficient gettering effect, the pulsed light irradiation may be performed 2 to 20 times. In addition, the heat treatment process for crystallization of the semiconductor film and gettering of the catalytic element is preferably performed in a reduced pressure atmosphere in which oxygen concentration is reduced by exhausting with a rotary pump or a mechanical booster pump (FIG. 6C )).
[0109]
The high-quality crystalline silicon film 105 obtained in this way is patterned into an island shape to form semiconductor layers 108 to 112 that will become active layers of the subsequent TFT (FIG. 6D). Next, a gate insulating film 113 is formed to a thickness of 50 to 150 nm on the island-shaped semiconductor layers 108 to 112 by a plasma CVD method. Next, a conductive film (A) 114 having a thickness of 20 to 100 nm and a conductive film (B) 115 having a thickness of 100 to 400 nm are formed as a conductive film for forming a gate electrode. In this embodiment, the conductive film (A) 114 is formed using TaN and the conductive film (B) 115 is formed using W. However, an element selected from Ta, W, Ti, Mo, Al, and Cu, or these elements are mainly used. What is necessary is just to form with either the alloy material or compound material which is a component (FIG. 7 (A)).
[0110]
Next, resist masks 116a to 116g are formed, and the conductive film (A) 114 and the conductive film (B) 115 are etched, so that the gate electrodes 117 to 115 formed of a stack of the conductive film (A) and the conductive film (B) are formed. 120 is formed. An etching method is not limited, but an ICP (Inductively Coupled Plasma) etching method may be used. CF for etching gas _Four And Cl ₂ And are used. In the same process, the capacitor wiring 121 and the wirings 122 and 123 to be the upper electrode of the storage capacitor are formed.
[0111]
When the gate electrodes 117 to 120 and the wirings 121 to 123 are formed, an impurity element that imparts n-type to the semiconductor layers 108 to 112 by ion doping through the gate insulating film 113 using the gate electrode as a mask (hereinafter referred to as n-type). Impurity element) is added. By this step, the impurity concentration is 1 × 10. ¹⁶ ~ 1x10 ¹⁸ atoms / cm ^Three N-type impurity regions 124a to 124e are formed (FIG. 7B).
[0112]
Next, a second etching process is performed while the resist mask is used as it is to form second-shaped gate electrodes and wirings 125 to 131. Subsequently, an n-type impurity element is further added using the second shape gate electrode and the wirings 125 to 131 as a mask. As a result, the n-type impurity concentration that later becomes the source region or the drain region becomes 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three N-type impurity region (n +), and an n-type impurity element concentration that becomes a low-concentration impurity region (hereinafter referred to as an LDD region) later to the channel formation region side than the n-type impurity region (n +) is 1 × 10 ¹⁸ ~ 1x10 ¹⁹ atoms / cm ^Three N-type impurity regions (n −) 132a to 132e are formed (FIG. 7C).
[0113]
Then, masks 133 and 134 made of resist are formed in a region to be a later n-channel TFT, and a p-type impurity element is added to form p-type impurity regions 135a and 135b. The impurity concentration of the p-type impurity region 135 is 2 × 10, which is 1.5 to 3 times the maximum value of the n-type impurity concentration added in the previous step. ²⁰ ~ 2x10 ^{twenty one} atoms / cm ^Three (FIG. 8A).
[0114]
Next, the n-channel TFT 201 and the second p-channel TFT 203 of the later drive circuit 206 are covered with a resist mask 136, 137 and an etching process is performed, and the first p-channel TFT 202, A third shape gate electrode and wirings 138 to 142 were formed in the pixel TFT 204 and the wiring.
[0115]
Next, heat treatment for activating the impurity element added to the semiconductor film is performed. This heat treatment is activated by irradiating a pulsed light a plurality of times using the PPTA apparatus shown in FIG. The pulsed light is irradiated from the back side of the substrate (in this specification, the surface on which the TFT is formed is the substrate surface). Impurities can be reliably activated by this heat treatment. In this embodiment, an example of irradiation only from the back side of the substrate is shown, but pulse light may be irradiated from both sides of the front and back surfaces of the substrate.
[0116]
After the activation process, a first interlayer insulating film 143 made of a silicon nitride film or a silicon oxynitride film is formed by a plasma CVD method. Then, hydrogen is released from the first interlayer insulating film 143 and heat treatment is performed to hydrogenate the semiconductor film. This heat treatment may be performed in a clean oven at 350 to 450 ° C. (preferably 410 ° C.). Alternatively, hydrogenation treatment may be performed in an atmosphere containing hydrogen generated by being converted to plasma (FIG. 8C).
[0117]
Next, planarization is performed using an organic insulating material such as acrylic or polyimide as the second interlayer insulating film 144. Then, contact holes reaching the semiconductor films 108 to 112 to be active layers of the later TFTs are formed in the first interlayer insulating film 143 and the second interlayer insulating film 144, and a thickness of 100 to 200 nm is formed there. A Ti film, an alloy film having a thickness of 250 to 350 nm (alloy film of Al and Ti), and a Ti film having a thickness of 50 to 150 nm are laminated and patterned into a desired shape to form connection wirings 145 to 152. Each TFT is electrically connected.
[0118]
In the pixel portion 207, a pixel electrode 153 is formed. The pixel electrode 153 is electrically connected to the drain region 124d of the pixel TFT 204 and the lower electrode (semiconductor film to which impurities are added) 135c of the storage capacitor 205.
[0119]
The n-channel TFT 201 has a channel formation region 161, a source region and drain region 124a, and an LDD region 132a in an active layer.
[0120]
The first p-channel TFT 202 has a channel formation region 162, a source region and a drain region 135 in the active layer.
[0121]
The second p-channel TFT 203 has a channel formation region 163, a source and drain region 135b, and an LDD region 135e in the active layer. Note that the gate electrode 127 has a region overlapping with the LDD region 135e.
[0122]
The pixel TFT 204 includes a channel formation region 164, a source region and drain region 124d, and an LDD region 132d in an active layer.
[0123]
The storage capacitor 205 includes a lower electrode (a semiconductor film to which an impurity element is added) 112, a dielectric (an insulating film formed continuously from the gate insulating film 113), and an upper electrode (a conductive film (A) forming a gate electrode). And 129 (consisting of a stack of conductive films (B)).
[0124]
As described above, an active matrix substrate including the driving circuit 206 including the CMOS structure 208 including the n-channel TFT 201 and the p-channel TFT 202 and the pixel portion 207 including the pixel TFT 204 and the storage capacitor 205 is manufactured (FIG. 9).
[0125]
When the present invention is used as disclosed in this embodiment, heat treatment can be performed in a short time using a PPTA apparatus, throughput can be improved, and a highly reliable TFT can be manufactured efficiently.
[0126]
(Example 2)
The bottom gate type TFT substrate can be applied to the crystallization process and the gettering process shown in the present invention. This will be described with reference to FIGS.
[0127]
An insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on the substrate 50 (not shown), a conductive film is formed to form a gate electrode, and is patterned into a desired shape. A gate electrode 51 is obtained. For the conductive film, an element selected from Ta, Ti, W, Mo, Cr, or Al or a conductive film containing any element as a main component may be used (FIG. 10A).
[0128]
Next, the gate insulating film 52 is formed. The gate insulating film may be a single layer of a silicon oxide film, a silicon nitride film, or a silicon oxynitride film, or a stacked structure of any of the films.
[0129]
Next, an amorphous silicon film 53 is formed as an amorphous semiconductor film to a thickness of 10 to 1150 nm by a thermal CVD method, a plasma CVD method, a low pressure CVD method, a vapor deposition method or a sputtering method. Note that since the gate insulating film 52 and the amorphous silicon film 53 can be formed by the same film formation method, both may be continuously formed. By continuous formation, exposure to the atmosphere is no longer required, contamination of the surface can be prevented, and variations in characteristics of TFTs to be manufactured and variations in threshold voltage can be reduced (FIG. 10B).
[0130]
Next, the amorphous silicon film is crystallized. A catalytic element is added to the amorphous silicon film to form the catalytic element-containing layer 54. Subsequently, a crystalline semiconductor film (crystalline silicon film) 56 is formed by irradiating the amorphous silicon film using a pulsed light source (pulse light 55).
[0131]
Subsequently, a gettering process of the catalyst element for moving the catalyst element from the region to be the semiconductor layer of the TFT is performed. A mask 57 is formed over the crystalline semiconductor film 56, and an impurity element having gettering action is added to a selected region of the semiconductor film to form a gettering region 58. As an impurity element to be added, an impurity element belonging to Group 15 of the periodic table, an impurity element belonging to Group 15 of the periodic table, an impurity element belonging to Group 13 of the periodic table, an impurity element belonging to Group 15 of the periodic table, or a period An impurity element belonging to Group 13 of the table and an impurity element belonging to Group 18 of the periodic table may be added. Thereafter, the catalytic element is moved to the gettering region 58 by using a light source (pulse light 59) controlled in a pulse shape (FIG. 10D).
[0132]
Next, the protective insulating film 60 is formed with a thickness of 100 to 400 nm. Subsequently, using a resist mask (not shown), an impurity element for imparting n-type to the crystalline silicon film to be an active layer of the later n-channel TFT 70, an active layer of the later p-channel TFT 71, and A p-type impurity element is added to the resulting crystalline silicon film to form a source region, a drain region, and an LDD region (FIG. 11A).
[0133]
Next, treatment for activating the impurity element added to the crystalline silicon film is performed. The activation treatment may be performed by heat treatment using the pulsed light disclosed in the embodiment or Example 1. Subsequently, after the activation treatment, a hydrogenation treatment may be performed in an atmosphere containing hydrogen generated by being converted into a known plasma.
[0134]
Next, the insulating film 60 on the crystalline silicon film is removed and the crystalline silicon film is formed in a semiconductor layer having a desired shape, and then an interlayer insulating film 61 is formed. The interlayer insulating film is formed so as to have a thickness of 500 to 1500 nm in any one of insulating films containing silicon such as a silicon oxide film, a silicon nitride film, and a silicon oxynitride film (see FIG. 11B). ).
[0135]
Thereafter, a contact hole reaching the source region or drain region 74 of each TFT is formed, and a wiring 62 for electrically connecting each TFT is formed. Note that 72 is an LDD region to which an impurity element is added at a low concentration, and 73 and 75 are channel formation regions (FIG. 11C).
[0136]
As described above, the present invention can be applied regardless of the shape of the TFT.
[0137]
(Example 3)
In the TFT manufacturing process shown in Embodiment 1, the crystallization process of the amorphous semiconductor film may be performed as follows.
[0138]
First, a catalytic element-containing layer 103 is formed by applying a nickel acetate salt solution containing 100 ppm of nickel in terms of weight to the surface of the amorphous silicon film 102. The application method may be a known method such as application using a spinner or sputtering. Subsequently, vacuuming is performed with a rotary pump and a mechanical booster pump, and high purity (CH contained in nitrogen) _Four ), CO, CO ₂ , H ₂ , H ₂ O and O ₂ The nitrogen concentration is 1 ppb or less) at a flow rate of 2 l / min to maintain a pressure of 26.7 Pa and create a nitrogen atmosphere. In this nitrogen atmosphere, heating was performed only once at 1220 ° C. for 60 seconds. In addition, the time for which the pulsed light maintains the maximum intensity is about 1 to 5 seconds. Thereby, the crystalline silicon film 105 is formed. Note that laser irradiation may be performed on the crystalline silicon film 105 in order to further increase the crystallization rate and repair defects in the crystal grains.
Further, heat treatment for reducing the amount of hydrogen contained in the amorphous silicon film may be performed before the crystallization treatment.
[0139]
Example 4
In this embodiment, a process of manufacturing an active matrix liquid crystal display device from a TFT substrate manufactured by applying Embodiments 1 to 3 will be described. FIG. 12 shows a state where the TFT substrate and the counter substrate 180 are bonded together with a sealing material. A columnar spacer 183 is formed on the TFT substrate. The columnar spacer 183 is preferably formed in accordance with a recess of a contact portion formed on the pixel electrode. The columnar spacer 183 is formed with a height of 3 to 10 μm, depending on the liquid crystal material used. Since the concave portion corresponding to the contact hole is formed in the contact portion, disorder of the alignment of the liquid crystal can be prevented by forming a spacer in accordance with this portion. Thereafter, an alignment film 182 is formed and a rubbing process is performed. A transparent conductive film 184 and an alignment film 181 are formed on the counter substrate 180. Thereafter, the TFT substrate and the counter substrate 180 are bonded together with a sealing material, and liquid crystal is injected to form a liquid crystal layer 185. An active matrix liquid crystal display device manufactured as described above can be completed.
[0140]
(Example 5)
Another method for manufacturing an active matrix substrate using a PPTA apparatus will be described with reference to FIGS. 17 and 18 illustrate a method of forming the pixel TFT 320 and the storage capacitor 321 in the pixel portion.
[0141]
A base insulating film 301 is formed on the surface of the substrate 300. The base insulating film 301 may be a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a stacked structure of any of the films. In this example, the plasma CVD method is used to form SiH. _Four And N ₂ A silicon oxynitride film is formed to a thickness of 50 to 200 nm using O.
[0142]
Next, a very thin Ni film (hereinafter referred to as a thin film for convenience) 302 is formed. A substrate 300 on which a base insulating film 301 is formed is placed in a film formation chamber of a parallel plate type or positive column type plasma CVD apparatus using an electrode made of Ni, and nitrogen, hydrogen, or an inert gas is placed. Plasma is generated under the atmosphere of In this embodiment, the amount of Ni is 1 × 10 5 by plasma treatment under conditions of a substrate temperature of 300 ° C., a pressure of 6.65 Pa, argon of 100 (sccm), and RF power of 50 W. ^Ten atoms / cm ² ~ 1x10 ¹³ atoms / cm ² The Ni thin film 302 is formed. The Ni thin film 302 acts as a catalyst element for promoting crystallization in the subsequent step of crystallizing the semiconductor layer (FIG. 17A). In this embodiment, the Ni thin film is formed. However, as long as it is an element having an action of promoting the crystallization of the semiconductor film (referred to as a catalytic element in this specification), it is possible to use Fe, Co, other than nickel (Ni). A thin film containing one or more elements selected from Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au may be formed.
[0143]
Next, an amorphous silicon film is formed on the Ni thin film 302. Patterning into a desired shape forms a semiconductor layer 304 to be an active layer of a later TFT and a semiconductor layer 305 to be a lower electrode of a later storage capacitor (FIG. 17B).
[0144]
Subsequently, a mask insulating film 306 is formed over the semiconductor layers 304 and 305. As the mask insulating film, a silicon oxide film is formed by a plasma CVD method. After that, a p-type impurity element (typically boron or gallium) is added to the semiconductor layer through the mask insulating film 306. This step (referred to as channel doping step) is performed to control the threshold voltage of the TFT. By this process, the semiconductor layer has a size of 1 × 10 ¹⁵ ~ 1x10 ¹⁸ atoms / cm ^Three A p-type impurity element (boron in this embodiment) is added at a concentration of (FIG. 17C).
[0145]
Next, the mask insulating film 306 is removed, and a gate insulating film 307 is formed (FIG. 17D). The gate insulating film is formed using a plasma CVD method or a sputtering method. Subsequently, in order to form a gate electrode, a conductive film (A) 308 and a conductive film (B) 309 are formed. In this embodiment, the conductive film (A) 308 is tantalum nitride (TaN) and is formed to a thickness of 50 to 100 nm. The conductive film (B) 309 is formed using a refractory metal such as tungsten (W) or molybdenum (Mo) to a thickness of 100 to 300 nm. The conductive film (A) and the conductive film (B) are etched to form the gate electrode 310 and the capacitor wiring 311 that becomes the upper electrode of the storage capacitor later. Although there is no limitation on the etching method, it is preferable to use an ICP (Inductively Coupled Plasma) etching method. At this time, the etching gas is CF _Four And Cl ₂ The mixed gas is used.
[0146]
Using the gate electrode and the capacitor wiring as a mask, an n-type impurity element is added to the semiconductor layer so that the n-type impurity element is 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three The n-type impurity region 312 to be the source region or drain region of the active layer of the TFT after the concentration of 1% is contained, and the n-type impurity element is 1 × 10 ¹⁸ ~ 1x10 ¹⁹ atoms / cm ^Three Thus, an n-type impurity region 313 and a channel formation region 314 are formed to be the LDD region of the TFT active layer after the concentration of. (Fig. 17 (E))
[0147]
Next, a region to be a later n-channel TFT is covered with a mask, and a p-type impurity element is added to a region to be a later p-channel TFT (not shown). In this step, the p-type impurity element is 2 × 10. ²⁰ ~ 3x10 ^{twenty one} atoms / cm ^Three A p-type impurity region added at a concentration of (not shown) is formed. Note that reference numerals 315 and 316 denote impurity regions formed in the semiconductor layer 305 serving as a lower electrode of the storage capacitor 321, and reference numeral 317 denotes a region to which no impurities are added.
[0148]
Subsequently, a process of crystallizing the amorphous semiconductor layer is performed while cooling with a refrigerant in a PPTA apparatus. The light source 318 is controlled in a pulse shape to irradiate the substrate. When measured with a thermocouple embedded in a silicon wafer (508b in FIG. 3), the light source is controlled to be 800 to 1100 ° C., and this temperature is maintained for 1 to 30 seconds. 5 times is enough. Since the gate insulating film 307 and the gate electrodes 310 and 311 are formed over the semiconductor layer, it is difficult for heat to escape from the semiconductor layer, and the semiconductor layer can be efficiently crystallized in a short time. In this step, the oxygen concentration in the atmosphere is reduced by exhausting with a rotary pump or a mechanical booster pump, and the pressure in the processing chamber is reduced to about 0.001 to 26.7 Pa in an atmosphere of reduced nitrogen or inert gas. In this case, heat treatment is preferably performed (FIG. 18A).
[0149]
Next, a first interlayer insulating film 319 is formed over the gate electrode. As the first interlayer insulating film, an insulating film such as a silicon nitride film containing silicon, a silicon oxide film, or a silicon nitride oxide film, or a stacked film combining them may be formed with a thickness of about 100 to 400 nm. (Fig. 18B)
[0150]
Subsequently, the impurity element added to the semiconductor layer is activated by irradiating the light source controlled in a pulse shape a plurality of times using a PPTA apparatus. In this step, Ni element that acts as a catalytic element during crystallization and then diffuses in the semiconductor layer moves to a region 312 to which an impurity element (phosphorus) having a gettering action is added at a high concentration. (Arrow in FIG. 18C), the concentration of the catalytic element (Ni) in the region that will become the channel formation region 314 of the active layer later is set to 1 × 10. ¹⁷ atoms / cm ^Three The following (preferably 1 × 10 ¹⁶ atoms / cm ^Three Or less). In this step, it is preferable to perform heat treatment in a reduced pressure atmosphere by exhausting with a rotary pump or a mechanical booster pump to reduce the oxygen concentration in the atmosphere.
[0151]
Hereinafter, if the semiconductor device is manufactured according to the steps after the hydrogenation treatment in Example 1, a semiconductor device can be efficiently manufactured in a short time without using an electric furnace.
[0152]
(Example 6)
Another method for manufacturing an active matrix substrate having a pixel TFT 410 and a storage capacitor 411 using a PPTA device will be described with reference to FIGS.
[0153]
This embodiment may be manufactured according to Embodiment 5 up to the step of forming the conductive film (A) 308 and the conductive film (B) 309. In the same step, the same symbol is used.
[0154]
After the conductive film (A) 308 and the conductive film (B) 309 are formed, the semiconductor layer in an amorphous state is crystallized by cooling with a refrigerant with a PPTA apparatus and irradiating a light source controlled in a pulse shape (FIG. 19 ( A)). This irradiation is repeated 1 to 5 times by measuring with a thermocouple embedded in a silicon wafer (508b in FIG. 3) and controlling the light source so as to hold heat at 800 to 1100 ° C. for 1 to 30 seconds.
[0155]
As shown in this embodiment, when crystallization is performed in a state where the gate insulating film and the gate electrode are formed on the semiconductor layer, heat is difficult to escape, and the semiconductor layer can be crystallized more effectively in a short time. it can. Note that in this step, it is preferable to perform heat treatment in a reduced pressure atmosphere by exhausting with a rotary pump or a mechanical booster pump to reduce the oxygen concentration in the atmosphere.
[0156]
Next, the conductive film (A) 308 and the conductive film (B) 309 are patterned into a desired shape, so that the gate electrode 401 and a capacitor wiring 402 to be an upper electrode of a storage capacitor later are formed. Although there is no limitation on the method for forming the gate electrode and the storage capacitor, the IPC etching method may be used as in the first embodiment.
[0157]
An n-type impurity element and a p-type impurity element are added in accordance with the steps of Example 5 to form impurity regions 403, 404, 406, and 407 and regions 405 and 408 to which no impurity element is added (FIG. 19B). Subsequently, an insulating film such as a silicon nitride film containing silicon, a silicon oxide film, and a silicon nitride oxide film, or a laminated film formed by combining them is formed to a thickness of 100 to 400 nm to form a first interlayer insulating film 409 ( FIG. 19 (C)).
[0158]
Next, heat treatment for activation of the impurity element is performed by the PPTA apparatus. In the heat treatment step for activation, the catalytic element in the semiconductor layer can be gettered to the region 403 to which phosphorus is added at a high concentration (FIG. 19D).
[0159]
By using this embodiment, a semiconductor device having a semiconductor layer with good crystallinity can be efficiently manufactured without using an electric furnace. This embodiment can be combined with Embodiment 3 to complete an active matrix liquid crystal display device.
[0160]
(Example 7)
In this embodiment, a process of manufacturing an active matrix driving light-emitting device using the TFT substrate (active matrix substrate) obtained in Embodiment 1 will be described with reference to FIGS.
[0161]
A glass substrate is used as the substrate 1601. On the glass substrate 1601, an n-channel TFT 1652 and a p-channel TFT 1653 are formed in the driving circuit 1650, and a switching TFT 1654 and a current control TFT 1655 are formed in the pixel portion 1651. These TFTs are formed using semiconductor layers 1603 to 1606, a second insulating film 1607 as a gate insulating film, gate electrodes 1608 to 1611, and the like.
[0162]
A first insulating film 1602 formed over the substrate 1601 is made of silicon oxynitride (SiO _x N _y A silicon nitride film or the like is formed to a thickness of 50 to 200 nm. The interlayer insulating film includes an inorganic insulating film 1618 formed of silicon nitride, silicon oxynitride, or the like, and an organic insulating film 1619 formed of acrylic or polyimide.
[0163]
The circuit configuration of the drive circuit 1650 differs between the gate signal side drive circuit and the data signal side drive circuit, but is omitted here. Wirings 1612 and 1613 are connected to the n-channel TFT 1652 and the p-channel TFT 1653, and a shift register, a latch circuit, a buffer circuit, or the like is formed using these TFTs.
[0164]
In the pixel portion 1651, the data wiring 1614 is connected to the source side of the switching TFT 1654, and the drain side wiring 1615 is connected to the gate electrode 1611 of the current control TFT 1655. The source side of the current control TFT 1655 is connected to the power supply wiring 1617, and the drain side electrode 1616 is connected to the anode of the EL element.
[0165]
An EL element having an anode, a cathode, and a layer containing an organic compound (hereinafter collectively referred to as an EL layer) from which electroluminescence is obtained is formed on the TFT of the pixel portion. Minescence in an organic compound includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state, and includes both.
[0166]
The EL element is provided after the banks 1620 and 1621 are formed using an organic resin such as acrylic or polyimide, preferably a photosensitive organic resin so as to cover the wiring. In this embodiment, the EL element 1656 includes an anode 1622 formed of ITO (indium tin oxide), an EL layer 1623, and a cathode formed using a material such as an alkali metal or alkaline earth metal such as MgAg or LiF. It consists of 1624. The banks 1620 and 1621 are formed so as to cover the end portion of the anode 1622 and are provided to prevent the cathode and the anode from being short-circuited at this portion.
[0167]
On the EL layer 1623, a cathode 1624 of an EL element is provided. As the cathode 1624, a material containing magnesium (Mg), lithium (Li), or calcium (Ca) having a low work function is used. An electrode made of MgAg (a material in which Mg and Ag are mixed at Mg: Ag = 10: 1) is preferably used. Other examples include MgAgAl electrodes, LiAl electrodes, and LiFAl electrodes.
[0168]
A stacked body including the EL layer 1623 and the cathode 1624 needs to be formed individually for each pixel. However, since the EL layer 1623 is extremely weak against moisture, a normal photolithography technique cannot be used. Further, the cathode 1624 manufactured using an alkali metal is easily oxidized. Accordingly, it is preferable to use a physical mask material such as a metal mask and selectively form the film by a vapor phase method such as a vacuum deposition method, a sputtering method, or a plasma CVD method. Further, a protective electrode for protecting from external moisture or the like may be stacked over the cathode 1624. As the protective electrode, it is preferable to use a low-resistance material containing aluminum (Al), copper (Cu), or silver (Ag).
[0169]
In order to obtain high luminance with low power consumption, an organic compound that emits light by triplet excitons (triplet compound) is used as a material for forming the EL layer. The singlet compound refers to a compound that emits light only through singlet excitation, and the triplet compound refers to a compound that emits light via triplet excitation.
[0170]
As the triplet compound, organic compounds described in the following papers can be cited as typical materials. (1) T. Tsutsui, C. Adachi, S. Saito, Photochemical Processes in Organized Molecular Systems, ed. K. Honda, (Elsevier Sci. Pub., Tokyo, 1991) p.437. (2) MABaldo, DFO ' Brien, Y.You, A.Shoustikov, S.Sibley, METhompson, SRForrest, Nature 395 (1998) p.151. (3) MABaldo, S.Lamansky, PEBurrrows, METhompson, SRForrest, Appl.Phys.Lett., 75 (1999) p.4. (4) T. Tsutsui, M.-J. Yang, M. Yahiro, K. Nakamura, T. Watanabe, T. Tsuji, Y. Fukuda, T. Wakimoto, S. Mayaguchi, Jpn .Appl.Phys., 38 (12B) (1999) L1502.
[0171]
The triplet compound has higher luminous efficiency than the singlet compound, and the operating voltage (voltage required for causing the EL element to emit light) can be lowered to obtain the same light emission luminance.
[0172]
In FIG. 16, the switching TFT 1654 has a multi-gate structure, and the current control TFT 1655 is provided with an LDD overlapping with the gate electrode. Since TFTs using polycrystalline silicon exhibit a high operating speed, deterioration such as hot carrier injection is likely to occur. Therefore, as shown in FIG. 16, it is highly reliable to form TFTs having different structures (switching TFTs with sufficiently low off-state current and TFTs for current control resistant to hot carrier injection) having different structures depending on functions in the pixel. And is very effective in manufacturing a display device capable of good image display (high operation performance). An active matrix light-emitting device manufactured as described above can be completed.
[0173]
(Example 8)
The CMOS circuit and the pixel portion formed by implementing the present invention can be used as an active matrix type liquid crystal display device, and the present invention can be implemented in all electric appliances incorporating the liquid crystal display device in the display portion.
[0174]
Such electric appliances include video cameras, digital cameras, projectors (rear type or front type), head mounted displays (goggles type displays), personal computers, personal digital assistants (mobile computers, mobile phones, electronic books, etc.), etc. Is mentioned. Examples of these are shown in FIGS. 13, 14 and 15. FIG.
[0175]
FIG. 13A illustrates a personal computer, which includes a main body 2001, an image input portion 2002, a display portion 2003, a keyboard 2004, and the like.
[0176]
FIG. 13B illustrates a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, an image receiving portion 2106, and the like.
[0177]
FIG. 13C illustrates a mobile computer, which includes a main body 2201, a camera unit 2202, an image receiving unit 2203, operation switches 2204, a display unit 2205, and the like.
[0178]
FIG. 13D shows a goggle type display, which includes a main body 2301, a display portion 2302, an arm portion 2303, and the like.
[0179]
FIG. 13E shows a player using a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display portion 2402, a speaker portion 2403, a recording medium 2404, operation switches 2405, and the like. This player uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet.
[0180]
FIG. 13F illustrates a digital camera, which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, an operation switch 2504, an image receiving portion (not shown), and the like.
[0181]
FIG. 14A illustrates a front type projector, which includes a projection device 2601, a screen 2602, and the like.
[0182]
FIG. 14B shows a rear projector, which includes a main body 2701, a projection device 2702, a mirror 2703, a screen 2704, and the like.
[0183]
Note that FIG. 14C is a diagram illustrating an example of the structure of the projection devices 2601 and 2702 in FIGS. 14A and 14B. The projection devices 2601 and 2702 include a light source optical system 2801, mirrors 2802, 2804 to 2806, a dichroic mirror 2803, a prism 2807, a liquid crystal display device 2808, a phase difference plate 2809, and a projection optical system 2810. Projection optical system 2810 includes an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. Further, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.
[0184]
FIG. 14D shows an example of the structure of the light source optical system 2801 in FIG. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, lens arrays 2813 and 2814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system illustrated in FIG. 14D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0185]
However, the projector shown in FIG. 14 shows a case where a transmissive liquid crystal display device is used, and an application example of the reflective liquid crystal display device is not shown.
[0186]
FIG. 15A shows a mobile phone, 3001 is a display panel, and 3002 is an operation panel. The display panel 3001 and the operation panel 3002 are connected at a connection portion 3003. An angle θ between the surface of the connection unit 3003 on which the display unit 3004 of the display panel 3001 is provided and the surface of the operation panel 3002 on which the operation keys 3006 are provided can be arbitrarily changed.
Further, it has an audio output unit 3005, operation keys 3006, a power switch 3007, and an audio input unit 3008.
[0187]
FIG. 15B illustrates a portable book (electronic book) which includes a main body 3101, display portions 3102 and 3103, a storage medium 3104, operation switches 3105, an antenna 3106, and the like.
[0188]
FIG. 15C illustrates a display, which includes a main body 3201, a support base 3202, a display portion 3203, and the like.
[0189]
As described above, the scope of application of the present invention is extremely wide and can be applied to electric appliances in various fields. Moreover, the electric appliance of a present Example can be implement | achieved combining embodiment and Example 1-6.
[0190]
【The invention's effect】
By using the present invention, a plurality of TFT substrates can be efficiently manufactured from a large glass substrate without using an electric furnace with high power consumption. After adding the catalyst element, a good crystalline semiconductor film having a large crystal grain size can be obtained by heat treatment using a PPTA apparatus. Further, the catalyst element remaining in the obtained crystalline semiconductor film can be gettered by the PPTA apparatus.
In addition, since a high-quality crystalline semiconductor film manufactured using a PPTA device as described above can be used for an active layer of a TFT, a highly reliable TFT and a semiconductor device using the TFT can be obtained. .
[0191]
[Brief description of the drawings]
FIGS. 1A and 1B illustrate heat treatment (crystallization, gettering) disclosed in the present invention.
FIG. 2 is a view for explaining heat treatment (gettering) disclosed in the present invention.
FIG. 3 is a diagram showing an example of a heat treatment apparatus used in the present invention.
FIG. 4 is a diagram showing a measurement result of an intensity change of a light source, and a diagram showing a measurement result of a temperature change of a semiconductor film and a substrate.
FIGS. 5A and 5B are diagrams showing results of observing a crystalline semiconductor film manufactured using the present invention. FIGS.
6A and 6B illustrate a manufacturing process of a TFT.
FIGS. 7A and 7B are diagrams illustrating a manufacturing process of a TFT.
FIGS. 8A and 8B are diagrams illustrating a manufacturing process of a TFT. FIGS.
FIG. 9 shows an active matrix substrate manufactured using the present invention.
FIG. 10 is a diagram showing an example of implementation of the invention.
FIG. 11 shows an example of the implementation of the invention.
FIG. 12 shows an example of the implementation of the invention.
FIG. 13 shows an example of an electric appliance.
FIG. 14 illustrates an example of an electric appliance.
FIG. 15 is a diagram showing an example of an electric appliance.
FIG. 16 shows a light-emitting device manufactured using the present invention.
FIG. 17 shows an example of implementation of the present invention.
FIG. 18 is a diagram showing an example of implementation of the present invention.
FIG. 19 is a diagram showing an example of implementation of the present invention.
FIG. 20 is a diagram showing an example of a heat treatment apparatus used in the present invention.
FIG. 21 is a diagram showing an example of implementation of the present invention.

Claims (3)

Adding a catalytic element to the first amorphous semiconductor film;
Heating the first amorphous semiconductor film to form a crystalline semiconductor film;
Adding an element belonging to Group 15, Group 13 and Group 18 of the periodic table to the crystalline semiconductor film using a mask;
Forming a second amorphous semiconductor film containing an element belonging to Group 18 of the periodic table on the crystalline semiconductor film;
Heat-treating the crystalline semiconductor film to getter the catalytic element to the second amorphous semiconductor film;
Removing the second amorphous semiconductor film;
The crystalline semiconductor film is irradiated with pulsed light by controlling a light source, and the catalytic element remaining in the crystalline semiconductor film is gettered to a region of the crystalline semiconductor film to which the element is added. And a method for manufacturing a semiconductor device. Adding a catalytic element to the first amorphous semiconductor film;
Heating the first amorphous semiconductor film to form a crystalline semiconductor film;
Adding an element belonging to Group 15, Group 13 and Group 18 of the periodic table to the crystalline semiconductor film using a mask;
Forming a barrier layer on the crystalline semiconductor film;
Forming a second amorphous semiconductor film containing an element belonging to Group 18 of the periodic table on the barrier layer;
Heat-treating the crystalline semiconductor film to getter the catalytic element to the second amorphous semiconductor film;
Removing the second amorphous semiconductor film and the barrier layer;
The crystalline semiconductor film is irradiated with pulsed light by controlling a light source, and the catalytic element remaining in the crystalline semiconductor film is gettered to a region of the crystalline semiconductor film to which the element is added. And a method for manufacturing a semiconductor device. In claim 1 or claim 2 ,
Simultaneously with the light irradiation, cooling using nitrogen gas, inert gas, or liquid as a coolant is performed.

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