JP4434013B2 - 適合接触マスクめっきを用いてめっき工程を行っている際に堆積の品質を測定する方法および装置 - Google Patents
適合接触マスクめっきを用いてめっき工程を行っている際に堆積の品質を測定する方法および装置 Download PDFInfo
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D1/00—Electroforming
- C25D1/003—3D structures, e.g. superposed patterned layers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B33—ADDITIVE MANUFACTURING TECHNOLOGY
- B33Y—ADDITIVE MANUFACTURING, i.e. MANUFACTURING OF THREE-DIMENSIONAL [3-D] OBJECTS BY ADDITIVE DEPOSITION, ADDITIVE AGGLOMERATION OR ADDITIVE LAYERING, e.g. BY 3-D PRINTING, STEREOLITHOGRAPHY OR SELECTIVE LASER SINTERING
- B33Y10/00—Processes of additive manufacturing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
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- Organic Chemistry (AREA)
- Electroplating Methods And Accessories (AREA)
Description
本出願は、この特許出願に組み込まれた、2002年5月7日に出願された米国仮特許出願第60/379,182号と、2002年12月2日に出願された米国仮特許出願第60/430,809号の利益を要求するものである。
上記2つの機能のうち、1つはパターン形成された絶縁体10用の支持材料としての機能であって、その完全な状態および直線状態を維持する。何故なら、パターンは位相幾何学的に複雑であるからである(例えば、絶縁体の分離した「島」を含む)。もう1つの機能は、図1(b)に示されているように、電気めっき工程における陽極として働くことである。適合接触マスクめっきにおいては、堆積材料22を、単に絶縁体を基板に押しつけ、その後、絶縁体の開口26aおよび26bを通じて上記堆積材料22を電着するだけで基板6に選択的に堆積する。材料を基板に堆積した後、図1(c)に示されているように、適合接触マスクは壊さないように基板6と分離するのが好ましい。適合接触マスクめっきの工程は、「貫通マスク」めっき工程とは区別される。何故ならば、貫通マスクめっき工程では、マスキング材料の基板からの分離は破壊を伴うからである。貫通マスクめっきの場合のように適合接触マスクめっき工程においては層全体の上に材料を選択的に、または、同時に堆積させる。めっきされた領域は1または複数の孤立しためっき領域からなり、これらの領域は、形成中の単一の構造に属するか、または、同時に形成されつつある多くの構造に属するかである。適合接触マスクのめっきにおいては、個々のマスクは除去過程において意図的には壊されないので、マスクは多くのめっき工程において使用可能である。
CCマスクめっきはそれ自身の特徴を有し、従来のめっきプロセスと関連した従来の知識は、商業的に実行できるCCマスクめっきプロセスおよびシステムを開発する上において役立つと言うよりもむしろ障害になるであろう。下記の表には、2つの従来のめっき(即ち、非選択的めっきおよび貫通マスクめっき)および微細めっきプロセスの種々の態様の詳細な比較が示されている。
上記式で、V(陽極)およびV(陰極)は、電流を浴に流す場合の電極の分極に起因する陽極と陰極における電圧降下であり、V(浴)は、電流が浴において陽極と陰極との間を流れる場合の浴の電圧降下である。V(浴)は下記の式から計算する事が出来る。
上記の式において、Iは総電流を表し、Rは浴の実効オーム抵抗である。陽極と陰極との間の間隙は非常に狭く(約25μm〜100μm)、幾つかの公知のめっき浴の固有導電率は10−1であるので、20mA/cm2の電流の電圧降下は数十ミリボルトから数ミリボルトである。其れゆえ、良好な浴の電圧降下は、陽極(V(陽極))および陰極(V(陰極))に関連した電圧降下に比べて、無視できる。V(陽極)およびV(陰極)に対する分極曲線の値を用いればセルの電圧の概略値は見積もりする事が出来る。めっき浴で測定された陽極と陰極の分極は、異なる電流密度における陽極と陰極のポテンシャルを示す。図5は、攪拌しないで20℃および50℃での銅めっき浴(即ち、Technic of Cranston RIのCu−P浴)において測定された陽極と陰極の分極の例を示す。図5に示されている陽極と陰極の両ポテンシャルは、飽和した塩化第1水銀からなる電極に対して測定され、電流密度に対してプロットされたものである。この図から20mA/cm2におけるセルの電圧は、20℃〜50℃の範囲の浴の温度に対して1.9Vと1.3Vとの間であると判断することができる。
i.堆積は止めるか又は
ii.暫く続ける
(3)1つ又はそれ以上の追加的な堆積を行う(例えば、堆積された構造の充分な横方向の支持体の確保)
(4)トリミングプロセス(例えば、機械的な磨き又はCMPによる平坦化プロセス)が実施され、問題の堆積のすべて又は一部を除去する。
ii.1つ又はそれ以上の次の試みにおいて異なるマスクを使う。
Claims (8)
- 複数の付着された層から三次元構造体を製造するための電気化学的製造方法であって、
(A)基板上に第1の層を形成する工程であって、
(i)前記第1の層の一部を形成するために第1の材料を選択的に堆積させる工程と、
(ii)前記第1の層の他の部分を形成するために第2の材料を基板上に堆積させる工程と、
(iii)前記第1の層の高さを揃えるために前記第1と第2の材料を平坦化する工程とを備える第1の工程と、
(B)予め形成された層に隣接して付着させて連続する層を形成するように複数の層を形成する工程であって、複数回の工程(A)の繰り返しを含んでおり、
少なくとも複数回の選択的に堆積させる工程は、
(1)マスクを、前記基板上または前回形成された層の上に配置する工程と、
(2)選択された堆積原料が前記基板または前記前回形成された層に堆積し、少なくとも層の一部を形成するように、めっき液の存在下で前記マスク内の少なくとも1つの開口部を介して陽極と前記基板または前記前回形成された層との間に電流を流す工程と、
(3)前記マスクを前記基板から除去する工程とを備え、
所定の層を形成する工程において、前記第1の層の堆積が許容できるか否かを決定するために、前記陽極と前記基板または前記前回形成された層との間の電圧を測定し、許容できないと決定された場合には、平坦化によって少なくとも1つの層の少なくとも一部を除去するとともに、当該少なくとも1つの層の形成を繰り返し行い、
前記第1と第2の材料の一方は犠牲材料であり、前記第1と第2の材料の他方は構造材料である第2の工程と、
(C)前記複数の層を形成する前記第2の工程の後で、前記三次元構造体を得るために、少なくとも2つの層上の前記構造材料から前記犠牲材料の少なくとも一部を除去する第3の工程とを備える電気化学的製造方法。 - さらに、(C)複数の形成されたマスクを供給する工程を備え、この工程において、各マスクは、所定の層の少なくとも一部を形成中に堆積が生じる少なくとも1つの開口部を含む、パターン形成された誘電体を含んでおり、前記各マスクは、前記パターン形成された誘電体を支持する支持構造を有し、
前記マスクを前記基板上または前記前回形成された層の上に配置する工程は、前記基板と選択された予め形成されたマスクの前記誘電体とを接触させる工程を含んでいる請求項1に記載の電気化学的製造方法。 - 前記マスクを前記基板上または前記前回形成された層の上に配置する工程は、パターン形成されたマスクを形成する工程と、前記パターン形成されたマスクを前記基板に接着する工程とを含んでいる請求項1に記載の電気化学的製造方法。
- 前記決定は、前記所定の層上に生じた堆積に対する視覚的な検査にも基づいている請求項1に記載の電気化学的製造方法。
- 少なくとも1つの層に対して測定された電圧特性は、ばりの発生を表している請求項1に記載の電気化学的製造方法。
- 測定された電圧特性と予測された電圧特性との比較によってばりの発生を推定することが可能である請求項1に記載の電気化学的製造方法。
- 測定された電圧特性は、短絡の発生を推定させる請求項1に記載の電気化学的製造方法。
- 測定された電圧特性と予測された電圧特性との比較によって短絡の発生を推定することが可能である請求項1に記載の電気化学的製造方法。
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Application Number | Priority Date | Filing Date | Title |
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US37913202P | 2002-05-07 | 2002-05-07 | |
PCT/US2003/014859 WO2003095715A1 (en) | 2002-05-07 | 2003-05-07 | Methods and apparatus for monitoring deposition quality during conformable contact mask plasting operations |
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US (2) | US20040000489A1 (ja) |
EP (1) | EP1506329A1 (ja) |
JP (2) | JP4434013B2 (ja) |
KR (1) | KR100994887B1 (ja) |
CN (2) | CN100582318C (ja) |
AU (1) | AU2003229025A1 (ja) |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2010059550A (ja) * | 2002-05-07 | 2010-03-18 | Univ Of Southern California | 適合接触マスクめっきを用いてめっき工程を行っている際に堆積の品質を測定する方法 |
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US20070181431A1 (en) | 2007-08-09 |
CN101724875A (zh) | 2010-06-09 |
CN1659317A (zh) | 2005-08-24 |
JP2010059550A (ja) | 2010-03-18 |
KR20050012738A (ko) | 2005-02-02 |
EP1506329A1 (en) | 2005-02-16 |
WO2003095715A1 (en) | 2003-11-20 |
AU2003229025A1 (en) | 2003-11-11 |
CN100582318C (zh) | 2010-01-20 |
JP5198413B2 (ja) | 2013-05-15 |
JP2005524775A (ja) | 2005-08-18 |
KR100994887B1 (ko) | 2010-11-16 |
US20040000489A1 (en) | 2004-01-01 |
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