JP4389696B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP4389696B2 JP4389696B2 JP2004196390A JP2004196390A JP4389696B2 JP 4389696 B2 JP4389696 B2 JP 4389696B2 JP 2004196390 A JP2004196390 A JP 2004196390A JP 2004196390 A JP2004196390 A JP 2004196390A JP 4389696 B2 JP4389696 B2 JP 4389696B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- lid
- filler
- filler material
- conductive resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
Claims (2)
- 配線基板と、当該配線基板上にフリップチップ実装された半導体チップと、前記配線基板上の前記半導体チップを覆う断面逆凹状のリッドとを備え、前記リッドの凹部底面と前記半導体チップの上面とが熱伝導性樹脂を介して接合され、前記リッドの凹部頂面と前記配線基板の上面とが接着剤を介して接合された半導体装置であって、
前記熱伝導性樹脂は、樹脂材に熱伝導性フィラーが混入されてなり、
前記熱伝導性フィラーは、粒径の異なる複数のフィラー材からなり、
前記複数のフィラー材のうちの最大粒径のフィラー材は、前記半導体チップと前記リッドとの間に介在する前記熱伝導性樹脂の厚さを定めるスペーサとしての機能を有し、
前記複数のフィラー材のうちの前記最大粒径のフィラー材以外のフィラー材は、当該最大粒径のフィラー材よりも高い熱伝導効率で、前記半導体チップと前記リッドとの間の熱伝導を媒介する機能を有し、
前記最大粒径のフィラー材と当該フィラー材以外のフィラー材とに対して役割分担を与えて構成されている
ことを特徴とする半導体装置。 - 配線基板と、当該配線基板上にフリップチップ実装された半導体チップと、前記配線基板上の前記半導体チップを覆う断面逆凹状のリッドとを備え、前記リッドの凹部底面と前記半導体チップの上面とが熱伝導性樹脂を介して接合され、前記リッドの凹部頂面と前記配線基板の上面とが接着剤を介して接合されてなる半導体装置の製造方法であって、
粒径の異なる複数のフィラー材からなる熱伝導性フィラーが混入されてなる樹脂材を前記熱伝導性樹脂として用い、
前記複数のフィラー材のうちの最大粒径のフィラー材を、前記半導体チップと前記リッドとの間に介在する前記熱伝導性樹脂の厚さを定めるスペーサとして機能させ、
前記複数のフィラー材のうちの前記最大粒径のフィラー材以外のフィラー材に、当該最大粒径のフィラー材よりも高い熱伝導効率を有したものを用い、前記半導体チップと前記リッドとの間の熱伝導を媒介するように機能させ、
前記最大粒径のフィラー材と当該フィラー材以外のフィラー材とに対して役割分担を与える
ことを特徴とする半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004196390A JP4389696B2 (ja) | 2004-07-02 | 2004-07-02 | 半導体装置およびその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004196390A JP4389696B2 (ja) | 2004-07-02 | 2004-07-02 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006019547A JP2006019547A (ja) | 2006-01-19 |
JP4389696B2 true JP4389696B2 (ja) | 2009-12-24 |
Family
ID=35793513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004196390A Expired - Fee Related JP4389696B2 (ja) | 2004-07-02 | 2004-07-02 | 半導体装置およびその製造方法 |
Country Status (1)
Country | Link |
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JP (1) | JP4389696B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024089817A1 (ja) * | 2022-10-26 | 2024-05-02 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06310564A (ja) * | 1993-04-20 | 1994-11-04 | Hitachi Ltd | 半導体装置 |
JPH07221125A (ja) * | 1994-01-27 | 1995-08-18 | Toyota Autom Loom Works Ltd | 半導体部品の実装構造及び絶縁性接着剤 |
JPH10303340A (ja) * | 1997-04-25 | 1998-11-13 | Toshiba Corp | 半導体装置及びその製造方法 |
DE10018043A1 (de) * | 2000-04-07 | 2001-10-11 | Jenoptik Jena Gmbh | Verfahren zur Kontaktierung eines Hochleistungsdiodenlaserbarrens und eine Hochleistungsdiodenlaserbarren-Kontakt-Anordnung von elektrischen Kontakten thermisch untergeordneter Funktion |
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2004
- 2004-07-02 JP JP2004196390A patent/JP4389696B2/ja not_active Expired - Fee Related
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JP2006019547A (ja) | 2006-01-19 |
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