JP4380511B2 - リードフレーム - Google Patents
リードフレーム Download PDFInfo
- Publication number
- JP4380511B2 JP4380511B2 JP2004344422A JP2004344422A JP4380511B2 JP 4380511 B2 JP4380511 B2 JP 4380511B2 JP 2004344422 A JP2004344422 A JP 2004344422A JP 2004344422 A JP2004344422 A JP 2004344422A JP 4380511 B2 JP4380511 B2 JP 4380511B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- lead
- lead frame
- region
- lead terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
次に、図3〜図7を参照して、本実施形態のリードフレーム30の各種の変形例を示しておく。
なお、半導体素子としては、上記ダイオード60に限定されるものではなく、上述したように、その上にワイヤボンディングが可能であるものであればよく、コンデンサなどであってもよい。
34a…半導体素子が搭載可能なリード端子、35…ワイヤ接続領域、
36…溝部、37…導電性のプレート、60…半導体素子、
70…ボンディングワイヤ。
Claims (6)
- 半導体素子(60)が搭載可能な領域であってAgメッキが施された素子搭載領域(32)と、ボンディングワイヤ(70)が接続されるワイヤ接続領域(35)とを表面に有するリードフレームにおいて、
このリードフレームのうち前記半導体素子(60)が搭載可能なリード端子(34a)には、前記素子搭載領域(32)と前記ワイヤ接続領域(35)との両方が設けられており、
前記半導体素子(60)が搭載可能なリード端子(34a)において、前記素子搭載領域(32)の中に前記ワイヤ接続領域(35)が設けられていることを特徴とするリードフレーム。 - 前記ワイヤ接続領域(35)は、格子状に配置された複数個の領域が前記素子搭載領域(32)内に分散して設けられたものであることを特徴とする請求項1に記載のリードフレーム。
- 前記ワイヤ接続領域(35)は、ストライプ状に配置された複数個の領域が前記素子搭載領域(32)内に分散して設けられたものであることを特徴とする請求項1に記載のリードフレーム。
- 前記ワイヤ接続領域(35)は、前記素子搭載領域(32)の上に設けられた導電性のプレート(37)により構成されたものであることを特徴とする請求項1に記載のリードフレーム。
- 前記半導体素子(60)が搭載可能なリード端子(34a)のうち前記素子搭載領域(32)の外側の部位は、溝形状となっていることを特徴とする請求項1ないし4のいずれか1つに記載のリードフレーム。
- 前記半導体素子(60)が搭載可能なリード端子(34a)に、前記半導体素子(60)
を搭載したときに、当該リード端子(34a)の周囲に位置する他のリード端子(34)と前記半導体素子(60)とがワイヤボンディングできるように、前記他のリード端子(34)には、前記ワイヤ接続領域(35)が設けられていることを特徴とする請求項1ないし5のいずれか1つに記載のリードフレーム。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004344422A JP4380511B2 (ja) | 2004-11-29 | 2004-11-29 | リードフレーム |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004344422A JP4380511B2 (ja) | 2004-11-29 | 2004-11-29 | リードフレーム |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006156660A JP2006156660A (ja) | 2006-06-15 |
JP4380511B2 true JP4380511B2 (ja) | 2009-12-09 |
Family
ID=36634565
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004344422A Expired - Fee Related JP4380511B2 (ja) | 2004-11-29 | 2004-11-29 | リードフレーム |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4380511B2 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013239658A (ja) * | 2012-05-17 | 2013-11-28 | Sumitomo Electric Ind Ltd | 半導体デバイス |
WO2019216159A1 (ja) * | 2018-05-09 | 2019-11-14 | 三菱電機株式会社 | パワー半導体モジュール及び電力変換装置 |
WO2019216161A1 (ja) * | 2018-05-09 | 2019-11-14 | 三菱電機株式会社 | パワー半導体モジュール及びその製造方法並びに電力変換装置 |
-
2004
- 2004-11-29 JP JP2004344422A patent/JP4380511B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2006156660A (ja) | 2006-06-15 |
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