JP4360577B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP4360577B2
JP4360577B2 JP2000091039A JP2000091039A JP4360577B2 JP 4360577 B2 JP4360577 B2 JP 4360577B2 JP 2000091039 A JP2000091039 A JP 2000091039A JP 2000091039 A JP2000091039 A JP 2000091039A JP 4360577 B2 JP4360577 B2 JP 4360577B2
Authority
JP
Japan
Prior art keywords
semiconductor element
hole
semiconductor device
heat
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000091039A
Other languages
Japanese (ja)
Other versions
JP2001284503A (en
Inventor
貴紀 生田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000091039A priority Critical patent/JP4360577B2/en
Publication of JP2001284503A publication Critical patent/JP2001284503A/en
Application granted granted Critical
Publication of JP4360577B2 publication Critical patent/JP4360577B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は各種の電子機器・電子装置等の電子回路モジュール等として使用される、半導体素子が配線基板に搭載されて成る半導体装置に関し、特に、半導体素子による発熱に対する放熱性を改善した半導体装置に関するものである。
【０００２】
【従来の技術】
近年における各種の電子機器や電子装置に対しては小型化や薄型化・高機能化・低コスト化等の要求が絶えることがなく、それらの要求を実現するために、電子機器や電子装置に用いられる半導体装置に対しても同様に小型化・薄型化・高機能化・低コスト化の検討が急速に押し進められている。
【０００３】
このような半導体装置において半導体素子を搭載するための基板となる配線基板には、例えば、酸化アルミニウム質焼結体を主成分とするセラミックス材料や窒化アルミニウム質焼結体を主成分とする高熱伝導性のセラミックス材料、あるいはガラス材料と有機材料とから成るガラスエポキシ、またはセラミック材料に比べて低温焼成が可能なガラスセラミックス等が用いられている。
【０００４】
酸化アルミニウム質焼結体を主成分とするセラミックス材料は、安定性や信頼性の高い絶縁材料であるが、約1400〜1650℃程度の高温で焼成しなければならないために配線導体の材料に高融点金属であるタングステンやモリブデン等を用いる必要があり、これら高融点金属が高比抵抗金属材料であることから、高速信号処理を行なう半導体装置には適用が困難である。
【０００５】
また、窒化アルミニウム質焼結体を主成分とする高熱伝導性のセラミックス材料は、良好な放熱性を有する点では有効であるが、一般的な民生分野の半導体装置に対しては高価であり、低コスト化を図ることが困難である。
【０００６】
また、ガラス材料と有機材料とから成るガラスエポキシは、安価であるが耐熱性が不十分であり、熱的な安定性も要求される半導体装置には不向きである。
【０００７】
これに対し、セラミックス材料に比べて低温でかつ短時間で焼成可能であるガラスセラミックスは、低コストで作製することができ、さらに配線導体の材料に低融点金属材料であるＡｕやＡｇ・Ｃｕ等の低比抵抗金属材料を使用できるため、高速信号処理を行なう半導体装置に有利である。
【０００８】
また、これらの基板は、用途によって使い分けられ、近年の高機能化に対応するために半導体素子を導体バンプを介して基板上に直接搭載実装する、いわゆるフリップチップ実装により半導体装置の小型化を実現するに際して、半導体素子の小型化・高密度化・高電力化に伴う半導体素子の発熱をいかに効率よく放熱させ、半導体素子の熱的破壊や特性劣化を防止するかが、半導体素子の信頼性を確保する上において重要な課題となっている。
【０００９】
このための対策としては、例えば、高熱伝導率材料からなる基板に導体バンプを介して直接に半導体素子を搭載実装する手法や、半導体素子直下の基板に多数のサーマルビアホールと呼ばれる放熱部材を形成する手法等が挙げられる。
【００１０】
【発明が解決しようとする課題】
このように、発熱量が増加する傾向にある半導体素子の信頼性を確保するためには従来以上の良好な放熱性が必要とされ、さらに、小型化と低コスト化とを両立させることも必要とされることから、これに対応するために、半導体素子の実装形態として従来のワイヤーボンディングに代わって半導体素子を導体バンプを用いて配線基板に直接に搭載実装するフェースダウン実装技術（いわゆるフリップチップ実装法）が採用されている。
【００１１】
しかしながら、この場合には、半導体素子からの発熱の伝達は熱伝導率の観点からは導体バンプが支配的となり、導体バンプ数によって放熱の能力が左右されることとなる。つまり、半導体素子に多数の導体バンプを形成することで放熱効率を向上させることができるが、形成可能な導体バンプ数はバンプ形状やバンプのピッチ、ならびにバンプ形成装置の能力により決定されることから、半導体素子の発熱を有効に放散させることが困難となる。そのため、さらに半導体素子の熱放散性を高めた半導体装置の要求が強まっている。
【００１２】
そのようなフェースダウン実装技術を用いた半導体装置における熱放散性の改善の例として、例えば特開平４−346250号には、配線基板に設けたキャビティ内に半導体素子をフェースダウンで導体バンプを介して配線基板に搭載し、熱伝導率の高い樹脂で半導体素子裏面およびキャビティ内壁を封止することにより配線基板全体に放熱させることが開示されている。また、さらに放熱フィンをこの封止した上部に取り付けることで半導体素子の放熱性を高めている。
【００１３】
しかしながら、このような構成においては、樹脂では金属製の放熱部材に比べ十分な放熱効果を得ることが困難であるという問題点があった。また、半導体素子の発熱の大部分は半導体素子表面近傍のチャネル部で発生するため、上記のような構成では半導体素子を構成する半導体基板を介して樹脂に放熱させることとなり、結果的に放熱効率が悪くなってしまうという問題点もあった。また、半導体素子の発熱を回路基板全体へ放熱させることは、配線基板の小型化に伴って半導体装置の放熱容量が小さくなる傾向にあるため、逆に半導体装置内に熱を閉じ込めてしまうことになり、良好な放熱効果を得ることが困難であるという問題点もあった。さらには、配線基板自身が高温にさらされるため、この配線基板に搭載された他の電子部品等に電気特性の劣化や接続信頼性に悪影響を及ぼすこととなるという問題点もあった。さらに、放熱フィンを取り付けることにより半導体装置そのものが大型化してしまい、半導体装置に対する重要な要求特性である低背化・薄型化に応えることが困難となってしまうという問題点があった。
【００１４】
本発明は上記従来技術における問題点に鑑みてなされたものであり、その目的は、半導体素子による発熱を良好に放散させ、半導体素子の発熱による半導体素子自身の信頼性や電気特性を劣化させることがなく、高信頼性・高性能であり、さらに低背で薄型・小型な半導体装置を提供することにある。
【００１５】
【課題を解決するための手段】
本発明の半導体装置は、配線基板の主面上に導体バンプを介して搭載実装され、前記主面に対して略垂直方向に貫通孔が形成された半導体素子と、この半導体素子の前記配線基板と反対側に配置され、前記半導体素子側に設けた凸部が前記貫通孔に挿入された放熱部材と、前記配線基板が搭載され、前記放熱部材が高熱伝導性接合材を介して接合される外部電気回路基板と、を具備し、前記貫通孔は前記半導体素子のチャネル部近傍に配置されていることを特徴とするものである。
【００１６】
また、本発明の半導体装置は、上記構成において、前記配線基板に前記貫通孔に対向させて基板貫通孔が形成され、この基板貫通孔にも前記凸部が挿入されていることを特徴とするものである。
【００１７】
【発明の実施の形態】
本発明の半導体装置によれば、配線基板の主面上に導体バンプを介して搭載実装され、前記主面に対して略垂直方向に貫通孔が形成された半導体素子と、この半導体素子の配線基板と反対側に配置され、半導体素子側に設けた凸部が貫通孔に挿入された放熱部材とを具備することから、半導体素子表面近傍のチャネル部による発熱を半導体素子の貫通孔に挿入された放熱部材に、この貫通孔および凸部によって効率よく伝達させることができる。
【００１８】
さらに、このような凸部を有する放熱部材を、この凸部を半導体素子の貫通孔に挿入するとともに平板状部を半導体素子の裏面（配線基板と反対側の面）側に配置して取着することにより、従来のように平板状部のみが熱伝導率の高い樹脂等を介して半導体素子に取着される場合と比較して、半導体素子の発熱をより効率良く良好に放熱させることができる。その結果、半導体素子の温度をそのジャンクション破壊温度以下に安定に維持することができ、半導体素子の発熱により半導体素子自身の信頼性や電気特性を劣化させることがない、高信頼性・高性能な半導体装置となる。
【００１９】
また、本発明の半導体装置によれば、上記構成において、配線基板に半導体素子の貫通孔に対向させた基板貫通孔が形成され、この基板貫通孔にも凸部が挿入されていることから、半導体素子の発熱を配線基板にも良好に放熱させることができ、半導体素子をより安定して動作させることができる半導体装置となる。
【００２０】
これにより、放熱フィンを特に必要とせず低背化が可能であり、その結果、半導体素子をそのジャンクション破壊温度以下に維持することができ、半導体素子の発熱により半導体素子自身の信頼性や電気特性を劣化させることがなく、高信頼性・高性能で、さらに低背で小型な半導体装置を提供することができる。
【００２１】
以下、図面に基づいて本発明の半導体装置を詳細に説明する。
【００２２】
図１は本発明の半導体装置の実施の形態の一例を示す断面図である。図１において、半導体装置１は半導体素子４を搭載実装していわゆるキャビティダウンの形態でマザーボード９に搭載されている。半導体装置１を構成する配線基板２はその主面上、図１においては下面に半導体素子４が搭載される凹部７を有しており、半導体素子４は、配線基板２の凹部７の底面に形成された配線導体や電極パッド等で形成された電極部（図示せず）に、金属等から成る導体バンプ３を介して電気的に接続されて搭載実装される。また、半導体素子４の配線基板２と反対側、図１においては下面側には、放熱部材５が、例えばその平板状部５ｂで凹部７を塞いで凹部７内に半導体素子４を気密に封止するように配置されて、ろう材６等により半導体素子４および配線基板２に取着されている。そして、半導体装置１は配線基板２の例えば下面側の外周部に形成された電極部（図示せず）が導体バンプ８を介してマザーボード９の配線に電気的に接続されるとともに、放熱部材５が半田等の金属ろう材のような高熱伝導性接合材11を介してマザーボード９に接合されて半導体素子４の発熱に対する放熱経路が形成されている。
【００２３】
ここで、導体バンプ３には金や半田、あるいは熱硬化型Ａｇペースト等を用いることができ、例えば金を用いる場合であれば、超音波熱圧着法により半導体素子４の端子電極および配線基板２の電極部に電気的に接続させる。
【００２４】
なお、半導体素子４を搭載した後に、配線基板２との接続部や半導体素子４の素子面を保護する目的で、通常はアンダーフィル10が注入される。このアンダーフィル10には、エポキシ樹脂やシリコーン樹脂等の熱硬化性樹脂を用いることができる。また、アンダーフィル10の樹脂中には、熱膨張係数の調整や熱伝導性の向上を目的として各種のフィラーが添加される。
【００２５】
そして、本発明の半導体装置１においては、半導体素子４には、配線基板２の主面に対して略垂直に、すなわち半導体素子４の主面間を上下に貫通するように、貫通孔４ａが形成されている。そして、この貫通孔４ａには、放熱部材５の半導体素子４側に設けた凸部５ａが挿入されている。
【００２６】
この半導体素子４の貫通孔４ａは、半導体素子４の機能に影響を与えず、かつ半導体素子４内の発熱部にできるだけ近い部位に形成される。また、半導体素子４の貫通孔４ａの内壁および貫通孔４ａに連なる半導体素子４の裏面および表面に接地電極（図示せず）を設け、これを放熱部材５の凸部５ａを介して電気的に接地することにより、半導体素子４の電気的安定性も確保することができる。なお、貫通孔４ａとしては通常は加工しやすい円形状断面のものが形成されるが、矩形状断面等の他の形状に加工しても構わない。
【００２７】
また、放熱部材５には、半導体装置の放熱部材として一般に用いられる材料、例えば銅やアルミ等の熱伝導率の高い金属または合金等を用いることができる。放熱部材５は、半導体素子４に対して配線基板２と反対側に配置され、ろう材６等により取着される平板状部５ｂと、半導体素子４の貫通孔４ａ中に挿入されて半導体素子４の発熱を効率よく平板状部５ｂに伝達させ放熱させるための凸部５ａとから成る。このような放熱部材５によれば、半導体素子４の発熱部からの発熱はその近傍の貫通孔４ａに挿入された凸部５ａから、また半導体素子４の表面近傍のチャネル部による発熱は平板状部５ｂから効率よく伝達・放散させて極めて高効率に放熱させることが可能となる。この凹部５ａおよび平板状部５ｂの寸法や形状等は、半導体素子４による発熱量に見合った放熱部材５の断面積を確保するために断面熱流速を算出して設定するとよく、これにより極めて効率の良い放熱が可能となる。
【００２８】
放熱部材５の平版状部５ｂは、半導体素子４裏面（配線基板２と反対側の面）の一部または全部を覆うようなものとして形成される。また、配線基板２の凹部７の開口を塞ぐような平板状部５ｂとすることで、放熱部材５により半導体素子４の気密封止も行なうことができ、一層の信頼性の向上を図ることが可能となる。
【００２９】
なお、半導体素子４の貫通孔４ａおよび放熱部材５の凸部５ａは、図３に分解斜視図で示すようにそれぞれ１個ずつ用いて組み合わせるだけでなく、図４に同じく分解斜視図で示すように貫通孔４ａおよび放熱部材５ａをそれぞれ複数個用いてもよい。このようにして、半導体素子４の発熱部に対応させて所望の位置および大きさに形成することで、更なる放熱性の向上を図ることができる。
【００３０】
さらに、放熱部材５の平板状部５ｂを、本発明の半導体装置１が搭載される外部電気回路基板としてのマザーボード９の電極部（図示せず）に半田等のろう材11あるいは伝熱性接着剤等を用いて接合させることにより、半導体素子４の発熱を放熱部材５の平板状部５ｂからマザーボード９へと極めて効率良く伝達させることができるものになる。これにより、半導体素子４の発熱は、凸部５ａおよび平板状部５ｂから成る熱伝導率の高い放熱部材５を介してマザーボード９へと効率良く伝えられるため、発熱により半導体素子４自身の信頼性や電気特性を劣化させることなく、また配線基板２自身が高温となることにより、他の電子部品等が搭載された場合にそれらに電気特性の劣化を生じさせたり接続信頼性への悪影響を及ぼすことなく、高信頼性でしかもより一層の小型化が可能な半導体装置１を提供することができる。
【００３１】
次に、図２に本発明の半導体装置の実施の形態の他の例の断面図を示す。図２において図１と同様の箇所には同じ符号を付してあり、この例においては、半導体装置１は配線基板２の上面に半導体素子４が搭載実装され、その上側に放熱部材５が配置されており、これらがマザーボード９の上面に搭載されている。半導体装置１を構成する基板となる配線基板２には半導体素子４が導体バンプ３を介して配線基板２に形成された電極部（図示せず）に電気的に接続される。また、半導体素子４が搭載された後に、接続部や半導体素子４の素子面を保護する目的でアンダーフィル10が注入される。
【００３２】
半導体素子４には貫通孔４ａが形成されており放熱部材５の凸部５ａが挿入される。この例では、さらに配線基板２に半導体素子４の貫通孔４ａに対向させて基板貫通孔２ａが形成され、放熱部材５の凸部５ａは半導体素子４の貫通孔４ａを貫いてこの基板貫通孔２ａにも挿入されている。ここでは、放熱部材５の凸部５ａの端面が配線基板２の裏面（下面）と同一平面に露出するように取り付けられており、この端面がマザーボード９の表面に形成された電極部（図示せず）に半田等のろう材11あるいは伝熱性接着剤等を用いて接合させている。これにより、半導体素子４の発熱部および表面近傍のチャネル部による発熱をいずれも放熱部材５の平板状部５ｂおよび凸部５ａから凸部５ａの先端を介して効率良くマザーボード９へと伝達させ放熱させることが可能となる。
【００３３】
このような本発明の半導体装置１によっても、半導体素子４による発熱は、熱伝導率の高い放熱部材５を介してマザーボード９へと効率良く放熱させることができるため、発熱により半導体素子４自身の信頼性や電気特性を劣化させることなく、また配線基板２自身が高温となることにより、他の電子部品等が搭載された場合にそれらに電気特性の劣化を生じさせたり接続信頼性への悪影響を及ぼすことなく、高信頼性でしかもより一層の小型化が可能な半導体装置１を提供することができる。
【００３４】
なお、以上はあくまで本発明の実施の形態の例示であって、本発明はこれらに限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更や改良を加えることは何ら差し支えない。例えば、図１に示した例において、放熱部材５の凸部５ａの先端は、これに対向させて配線基板２に形成した穴部内に挿入して強固に取着させるようにしてもよく、配線基板２に形成した貫通孔に挿入して配線基板２の裏面（上面）側でさらに他の放熱部材に接続させるようにしてもよい。また、図２に示す例においても、配線基板２の貫通孔２ａを基板２の途中までの穴部としてそこからいわゆるサーマルビアホールや他の放熱経路を設けておき、この穴部内に放熱部材５の凸部５ａの先端を挿入して強固に取着させるとともにその放熱経路に接続させるようにしてもよい。
【００３５】
【発明の効果】
以上のように、本発明の半導体装置によれば、配線基板の主面上に導体バンプを介して搭載実装され、前記主面に対して略垂直方向に貫通孔が形成された半導体素子と、この半導体素子の配線基板と反対側に配置され、半導体素子側に設けた凸部が貫通孔に挿入された放熱部材とを具備することから、半導体素子表面近傍のチャネル部による発熱を半導体素子の貫通孔に挿入された放熱部材に、この貫通孔および凸部によって効率よく伝達させることができる。
【００３６】
このような凸部を有する放熱部材の凸部を半導体素子の貫通孔に挿入するとともに平板状部を半導体素子の裏面側に配置して取着することにより、半導体素子の発熱をより効率良く良好に放熱させることができるため、半導体素子の温度をそのジャンクション破壊温度以下に安定に維持することができ、半導体素子の発熱により半導体素子自身の信頼性や電気特性を劣化させることがない、高信頼性・高性能な半導体装置となる。
【００３７】
また、本発明の半導体装置によれば、配線基板に半導体素子の貫通孔に対向させた基板貫通孔が形成され、この基板貫通孔にも凸部が挿入されていることから、半導体素子の発熱を配線基板にも良好に放熱させることができ、半導体素子をより安定して動作させることができる半導体装置となる。
【００３８】
これにより、本発明によれば、半導体素子による発熱を良好に放散させ、半導体素子の発熱による半導体素子自身の信頼性や電気特性を劣化させることがなく、高信頼性・高性能であり、さらに放熱フィンを特に必要とせず低背化が可能で薄型・小型な半導体装置を提供することができた。
【図面の簡単な説明】
【図１】本発明の半導体装置の実施の形態の一例を示す断面図である。
【図２】本発明の半導体装置の実施の形態の他の例を示す断面図である。
【図３】本発明の半導体装置に用いられる放熱部材および半導体素子の一例を示す分解斜視図である。
【図４】本発明の半導体装置に用いられる放熱部材および半導体素子の他の例を示す分解斜視図である。
【符号の説明】
１・・・・半導体装置
２・・・・配線基板
２ａ・・・基板貫通孔
３・・・・導体バンプ
４・・・・半導体素子
４ａ・・・貫通孔
５・・・・放熱部材
５ａ・・・凸部
５ｂ・・・平板状部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor element is mounted on a wiring board, used as an electronic circuit module or the like of various electronic devices / electronic devices, and more particularly to a semiconductor device having improved heat dissipation against heat generated by the semiconductor element. Is.
[0002]
[Prior art]
In recent years, various electronic devices and electronic devices have been constantly demanded for downsizing, thinning, high functionality, and cost reduction. Similarly, studies on miniaturization, thinning, high functionality, and low cost are being rapidly promoted for the semiconductor devices used.
[0003]
In such a semiconductor device, for example, a ceramic substrate having an aluminum oxide sintered body as a main component or a high thermal conductivity having an aluminum nitride sintered body as a main component is used as a wiring substrate that is a substrate for mounting a semiconductor element. Glass ceramics, glass epoxy composed of a glass material and an organic material, or glass ceramics that can be fired at a lower temperature than ceramic materials are used.
[0004]
A ceramic material mainly composed of an aluminum oxide sintered body is an insulating material with high stability and reliability, but it must be fired at a high temperature of about 1400 to 1650 ° C. It is necessary to use tungsten, molybdenum, or the like, which is a melting point metal, and since these refractory metals are high resistivity metal materials, it is difficult to apply to semiconductor devices that perform high-speed signal processing.
[0005]
In addition, a high thermal conductive ceramic material mainly composed of an aluminum nitride sintered body is effective in terms of having good heat dissipation, but is expensive for general consumer semiconductor devices, It is difficult to reduce the cost.
[0006]
Further, a glass epoxy made of a glass material and an organic material is inexpensive but has insufficient heat resistance, and is not suitable for a semiconductor device that requires thermal stability.
[0007]
In contrast, glass ceramics that can be fired at a low temperature and in a short time compared to ceramic materials can be produced at a low cost, and Au, Ag, Cu, and the like, which are low melting point metal materials, can be used for the material of the wiring conductor. Therefore, it is advantageous for a semiconductor device that performs high-speed signal processing.
[0008]
In addition, these substrates can be used depending on the application, and in order to respond to the recent high functionality, semiconductor devices can be miniaturized by so-called flip chip mounting, in which semiconductor elements are mounted and mounted directly on the substrate via conductor bumps. The reliability of the semiconductor element depends on how efficiently the heat generated by the semiconductor element accompanying the downsizing, higher density, and higher power of the semiconductor element can be dissipated to prevent thermal destruction and deterioration of characteristics of the semiconductor element. It is an important issue in securing.
[0009]
As countermeasures for this, for example, a method of mounting and mounting a semiconductor element directly on a substrate made of a high thermal conductivity material via a conductor bump, or forming a large number of heat radiation members called thermal via holes on a substrate immediately below the semiconductor element The method etc. are mentioned.
[0010]
[Problems to be solved by the invention]
Thus, in order to ensure the reliability of semiconductor elements that tend to increase the amount of heat generation, better heat dissipation than before is required, and it is also necessary to achieve both downsizing and cost reduction Therefore, in order to cope with this, a face-down mounting technique (so-called flip chip) in which a semiconductor element is mounted and mounted directly on a wiring board using a conductor bump instead of conventional wire bonding as a mounting form of the semiconductor element. Implementation method) is adopted.
[0011]
However, in this case, the transmission of heat generated from the semiconductor element is dominated by the conductor bumps from the viewpoint of thermal conductivity, and the ability to dissipate heat depends on the number of conductor bumps. In other words, heat dissipation efficiency can be improved by forming a large number of conductor bumps on the semiconductor element, but the number of conductor bumps that can be formed is determined by the bump shape, bump pitch, and the ability of the bump forming device. Therefore, it becomes difficult to effectively dissipate heat generated by the semiconductor element. For this reason, there is an increasing demand for semiconductor devices that further improve the heat dissipation of the semiconductor elements.
[0012]
As an example of improving heat dissipation in a semiconductor device using such a face-down mounting technique, for example, in Japanese Patent Laid-Open No. 4-346250, a semiconductor element is placed face down through a conductor bump in a cavity provided in a wiring board. It is disclosed that the semiconductor substrate is mounted on a wiring board and the entire back surface of the wiring board is radiated by sealing the back surface of the semiconductor element and the inner wall of the cavity with a resin having high thermal conductivity. Further, the heat dissipation of the semiconductor element is enhanced by attaching a heat radiation fin to the sealed upper portion.
[0013]
However, in such a configuration, there is a problem that it is difficult to obtain a sufficient heat dissipation effect with a resin as compared with a metal heat dissipation member. In addition, since most of the heat generated in the semiconductor element is generated in the channel portion near the surface of the semiconductor element, in the above configuration, the heat is radiated to the resin through the semiconductor substrate constituting the semiconductor element, resulting in the heat dissipation efficiency. There was also a problem that would get worse. In addition, the heat dissipation of the semiconductor element to the entire circuit board tends to reduce the heat dissipation capacity of the semiconductor device as the wiring board is downsized, and conversely confine heat inside the semiconductor device. Therefore, there is a problem that it is difficult to obtain a good heat dissipation effect. Furthermore, since the wiring board itself is exposed to a high temperature, other electronic components mounted on the wiring board have a problem of deteriorating electrical characteristics and connection reliability. Furthermore, there is a problem in that the semiconductor device itself is increased in size by attaching the radiation fins, and it is difficult to meet the reduction in height and thickness which are important required characteristics for the semiconductor device.
[0014]
The present invention has been made in view of the above problems in the prior art, and its purpose is to dissipate the heat generated by the semiconductor element satisfactorily and to deteriorate the reliability and electrical characteristics of the semiconductor element itself due to the heat generated by the semiconductor element. Therefore, an object of the present invention is to provide a semiconductor device that has high reliability, high performance, low profile, low profile, and small size.
[0015]
[Means for Solving the Problems]
A semiconductor device according to the present invention is mounted and mounted on a main surface of a wiring board via conductor bumps, and a through hole is formed in a direction substantially perpendicular to the main surface, and the wiring board of the semiconductor element The heat dissipating member disposed on the opposite side of the semiconductor element and having the convex portion provided on the semiconductor element side inserted in the through-hole and the wiring board are mounted, and the heat dissipating member is bonded via a high thermal conductive bonding material. comprising an external electric circuit board, wherein the through hole is one which is characterized that you have placed near the channel portion of the semiconductor device.
[0016]
The semiconductor device according to the present invention is characterized in that, in the above configuration, a substrate through hole is formed in the wiring substrate so as to face the through hole, and the convex portion is inserted into the substrate through hole. Is.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
According to the semiconductor device of the present invention, the semiconductor element mounted and mounted on the main surface of the wiring board via the conductor bumps, and the through hole is formed in a direction substantially perpendicular to the main surface, and the wiring of the semiconductor element Since the convex portion provided on the semiconductor element side is disposed on the side opposite to the substrate and the heat radiating member is inserted into the through hole, heat generated by the channel near the surface of the semiconductor element is inserted into the through hole of the semiconductor element. The heat radiating member can be efficiently transmitted by the through hole and the convex portion.
[0018]
Furthermore, the heat radiating member having such a convex portion is attached by inserting the convex portion into the through hole of the semiconductor element and arranging the flat plate portion on the back surface (surface opposite to the wiring board) side of the semiconductor element. As a result, the heat generation of the semiconductor element can be radiated more efficiently and satisfactorily compared to the case where only the flat part is attached to the semiconductor element via a resin having a high thermal conductivity as in the prior art. it can. As a result, the temperature of the semiconductor element can be stably maintained below its junction breakdown temperature, and the reliability and electrical characteristics of the semiconductor element itself are not deteriorated due to the heat generated by the semiconductor element. It becomes a semiconductor device.
[0019]
Further, according to the semiconductor device of the present invention, in the above configuration, since the substrate through hole is formed in the wiring substrate so as to face the through hole of the semiconductor element, and the convex portion is also inserted into the substrate through hole. The semiconductor device is capable of dissipating the heat generated by the semiconductor element well to the wiring board, and can operate the semiconductor element more stably.
[0020]
As a result, it is possible to reduce the height without particularly requiring a heat radiating fin, and as a result, the semiconductor element can be maintained below its junction breakdown temperature. Thus, it is possible to provide a small-sized semiconductor device with high reliability, high performance, and low profile.
[0021]
Hereinafter, a semiconductor device of the present invention will be described in detail with reference to the drawings.
[0022]
FIG. 1 is a sectional view showing an example of an embodiment of a semiconductor device of the present invention. In FIG. 1, a semiconductor device 1 is mounted on a mother board 9 in a so-called cavity-down form by mounting and mounting a semiconductor element 4. The wiring substrate 2 constituting the semiconductor device 1 has a recess 7 on the main surface, and in FIG. 1 on the lower surface, on which the semiconductor element 4 is mounted. It is mounted and mounted on an electrode portion (not shown) formed by the formed wiring conductor, electrode pad, etc. via a conductor bump 3 made of metal or the like. Further, on the side opposite to the wiring substrate 2 of the semiconductor element 4, that is, on the lower surface side in FIG. 1, the heat radiating member 5 seals the semiconductor element 4 in the recess 7 by closing the recess 7 with, for example, the flat plate-like part 5 b. It arrange | positions so that it may stop, and is attached to the semiconductor element 4 and the wiring board 2 with the brazing material 6 grade | etc.,. In the semiconductor device 1, an electrode portion (not shown) formed on the outer peripheral portion on the lower surface side of the wiring substrate 2 is electrically connected to the wiring of the mother board 9 through the conductor bumps 8, and the heat radiating member 5. Is bonded to the mother board 9 via a high thermal conductive bonding material 11 such as a soldering metal such as solder to form a heat dissipation path for heat generation of the semiconductor element 4.
[0023]
Here, gold, solder, thermosetting Ag paste, or the like can be used for the conductor bump 3. For example, when gold is used, the terminal electrode of the semiconductor element 4 and the wiring substrate 2 are formed by ultrasonic thermocompression bonding. The electrode part is electrically connected.
[0024]
Note that after the semiconductor element 4 is mounted, underfill 10 is usually injected for the purpose of protecting the connection portion with the wiring substrate 2 and the element surface of the semiconductor element 4. For the underfill 10, a thermosetting resin such as an epoxy resin or a silicone resin can be used. Various fillers are added to the resin of the underfill 10 for the purpose of adjusting the thermal expansion coefficient and improving the thermal conductivity.
[0025]
In the semiconductor device 1 of the present invention, the semiconductor element 4 has a through hole 4 a that is substantially perpendicular to the main surface of the wiring substrate 2, that is, vertically penetrates between the main surfaces of the semiconductor element 4. Is formed. And the convex part 5a provided in the semiconductor element 4 side of the thermal radiation member 5 is inserted in this through-hole 4a.
[0026]
The through hole 4 a of the semiconductor element 4 is formed in a portion that does not affect the function of the semiconductor element 4 and is as close as possible to the heat generating portion in the semiconductor element 4. Further, a ground electrode (not shown) is provided on the inner wall of the through hole 4 a of the semiconductor element 4 and the back surface and the front surface of the semiconductor element 4 connected to the through hole 4 a, and this is electrically connected via the convex portion 5 a of the heat radiating member 5. By grounding, the electrical stability of the semiconductor element 4 can also be ensured. The through-hole 4a is usually formed with a circular cross section that is easy to process, but may be processed into other shapes such as a rectangular cross section.
[0027]
The heat radiating member 5 can be made of a material generally used as a heat radiating member of a semiconductor device, for example, a metal or alloy having high thermal conductivity such as copper or aluminum. The heat radiating member 5 is disposed on the opposite side of the wiring substrate 2 with respect to the semiconductor element 4, and is inserted into the flat plate-like portion 5 b attached by the brazing material 6 and the like, and the through hole 4 a of the semiconductor element 4. 4 is formed with a convex portion 5a for efficiently transmitting heat to the flat plate portion 5b to dissipate heat. According to the heat radiating member 5, the heat generated from the heat generating portion of the semiconductor element 4 is generated from the convex portion 5 a inserted into the through hole 4 a in the vicinity thereof, and the heat generated by the channel portion near the surface of the semiconductor element 4 is flat. It is possible to efficiently transmit and dissipate from the portion 5b to dissipate heat with extremely high efficiency. The size, shape, etc. of the recess 5a and the flat plate-like portion 5b may be set by calculating the cross-sectional heat flow rate in order to ensure the cross-sectional area of the heat radiating member 5 corresponding to the amount of heat generated by the semiconductor element 4, and thereby extremely efficient. Good heat dissipation.
[0028]
The lithographic part 5b of the heat radiating member 5 is formed so as to cover part or all of the back surface of the semiconductor element 4 (surface opposite to the wiring board 2). In addition, by using the flat plate-like portion 5b that closes the opening of the recess 7 of the wiring board 2, the semiconductor element 4 can be hermetically sealed by the heat radiating member 5, thereby further improving the reliability. It becomes possible.
[0029]
The through holes 4a of the semiconductor element 4 and the protrusions 5a of the heat dissipation member 5 are not only combined and used one by one as shown in the exploded perspective view in FIG. 3, but also as shown in the exploded perspective view in FIG. A plurality of through holes 4a and a plurality of heat dissipating members 5a may be used. In this way, the heat radiation performance can be further improved by forming the semiconductor element 4 in a desired position and size corresponding to the heat generating portion of the semiconductor element 4.
[0030]
Further, the flat plate portion 5b of the heat radiating member 5 is connected to a brazing material 11 such as solder or a heat conductive adhesive on an electrode portion (not shown) of a mother board 9 as an external electric circuit board on which the semiconductor device 1 of the present invention is mounted. For example, the heat generated by the semiconductor element 4 can be transmitted from the flat plate portion 5b of the heat radiating member 5 to the mother board 9 very efficiently. Thereby, the heat generated by the semiconductor element 4 is efficiently transmitted to the mother board 9 through the heat radiating member 5 having a high thermal conductivity composed of the convex portion 5a and the flat plate-like portion 5b. In addition, when the wiring board 2 itself is at a high temperature without deteriorating the electrical characteristics, and when other electronic components are mounted, the electrical characteristics are degraded or the connection reliability is adversely affected. Therefore, it is possible to provide the semiconductor device 1 that is highly reliable and can be further miniaturized.
[0031]
Next, FIG. 2 shows a cross-sectional view of another example of the embodiment of the semiconductor device of the present invention. 2, the same reference numerals are given to the same parts as in FIG. 1. In this example, the semiconductor device 1 has the semiconductor element 4 mounted and mounted on the upper surface of the wiring board 2, and the heat dissipation member 5 is disposed on the upper side. These are mounted on the upper surface of the mother board 9. A semiconductor element 4 is electrically connected to an electrode portion (not shown) formed on the wiring board 2 via a conductor bump 3 on a wiring board 2 which is a board constituting the semiconductor device 1. Further, after the semiconductor element 4 is mounted, the underfill 10 is injected for the purpose of protecting the connection portion and the element surface of the semiconductor element 4.
[0032]
A through hole 4 a is formed in the semiconductor element 4, and the convex portion 5 a of the heat radiating member 5 is inserted. In this example, the substrate through-hole 2a is further formed in the wiring board 2 so as to oppose the through-hole 4a of the semiconductor element 4, and the convex portion 5a of the heat dissipation member 5 penetrates the through-hole 4a of the semiconductor element 4 and this substrate through-hole. It is also inserted in 2a. Here, the end surface of the convex portion 5 a of the heat radiating member 5 is attached so as to be exposed on the same plane as the back surface (lower surface) of the wiring board 2, and this end surface is an electrode portion (not shown) formed on the surface of the mother board 9. 2) are joined using a brazing material 11 such as solder or a heat transfer adhesive. As a result, heat generated by the heat generating portion of the semiconductor element 4 and the channel portion near the surface is efficiently transferred from the flat plate-like portion 5b and the convex portion 5a of the heat radiating member 5 to the mother board 9 via the tip of the convex portion 5a. It becomes possible to make it.
[0033]
Also with such a semiconductor device 1 of the present invention, the heat generated by the semiconductor element 4 can be efficiently radiated to the mother board 9 through the heat radiating member 5 having high thermal conductivity. Without deteriorating reliability and electrical characteristics, and when the wiring board 2 itself is at a high temperature, when other electronic components are mounted, the electrical characteristics are deteriorated or the connection reliability is adversely affected. Thus, it is possible to provide the semiconductor device 1 that is highly reliable and can be further reduced in size.
[0034]
Note that the above are merely examples of the embodiments of the present invention, and the present invention is not limited to these embodiments, and various modifications and improvements may be added without departing from the scope of the present invention. . For example, in the example shown in FIG. 1, the tip of the convex portion 5a of the heat radiating member 5 may be inserted into a hole formed in the wiring board 2 so as to oppose this, and firmly attached. You may make it insert in the through-hole formed in the board | substrate 2, and make it connect with another heat radiating member in the back surface (upper surface) side of the wiring board 2. FIG. Also, in the example shown in FIG. 2, the through hole 2a of the wiring board 2 is a hole part up to the middle of the substrate 2, and a so-called thermal via hole or other heat dissipation path is provided from there, and the heat dissipation member 5 is placed in this hole part. You may make it connect with the heat dissipation path | route while inserting the front-end | tip of the convex part 5a and attaching firmly.
[0035]
【The invention's effect】
As described above, according to the semiconductor device of the present invention, the semiconductor element is mounted and mounted on the main surface of the wiring board via the conductor bumps, and the through hole is formed in a direction substantially perpendicular to the main surface; The semiconductor element has a heat dissipating member disposed on the side opposite to the wiring board of the semiconductor element and having a convex portion provided on the semiconductor element side inserted into the through hole. The heat radiating member inserted into the through hole can be efficiently transmitted by the through hole and the convex portion.
[0036]
By inserting the convex part of the heat dissipation member having such a convex part into the through hole of the semiconductor element and mounting the flat part on the back side of the semiconductor element, the heat generation of the semiconductor element can be improved more efficiently. The semiconductor element temperature can be stably maintained below its junction breakdown temperature, and the reliability and electrical characteristics of the semiconductor element itself are not degraded by the heat generated by the semiconductor element. And high performance semiconductor device.
[0037]
Further, according to the semiconductor device of the present invention, since the substrate through hole is formed in the wiring substrate so as to oppose the through hole of the semiconductor element, and the convex portion is also inserted into the substrate through hole, the heat generation of the semiconductor element Can be radiated well to the wiring board, and the semiconductor device can be operated more stably.
[0038]
Thereby, according to the present invention, the heat generated by the semiconductor element is dissipated well, the reliability and electrical characteristics of the semiconductor element itself are not deteriorated due to the heat generated by the semiconductor element, and are highly reliable and high performance. A thin and small semiconductor device that can be reduced in height without requiring a heat radiating fin has been provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an example of an embodiment of a semiconductor device of the present invention.
FIG. 2 is a cross-sectional view showing another example of the embodiment of the semiconductor device of the present invention.
FIG. 3 is an exploded perspective view showing an example of a heat radiating member and a semiconductor element used in the semiconductor device of the present invention.
FIG. 4 is an exploded perspective view showing another example of a heat dissipation member and a semiconductor element used in the semiconductor device of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Semiconductor device 2 ... Wiring board 2a ... Substrate through-hole 3 ... Conductor bump 4 ... Semiconductor element 4a ... Through-hole 5 ... Heat dissipation member 5a ..Convex part 5b ... Flat part

Claims (2)

配線基板の主面上に導体バンプを介して搭載実装され、前記主面に対して略垂直方向に貫通孔が形成された半導体素子と、該半導体素子の前記配線基板と反対側に配置され、前記半導体素子側に設けた凸部が前記貫通孔に挿入された放熱部材と、前記配線基板が搭載され、前記放熱部材が高熱伝導性接合材を介して接合される外部電気回路基板と、を具備し、前記貫通孔は前記半導体素子のチャネル部近傍に配置されていることを特徴とする半導体装置。Mounted and mounted on the main surface of the wiring board via conductor bumps, a semiconductor element in which a through hole is formed in a direction substantially perpendicular to the main surface, and disposed on the opposite side of the wiring board of the semiconductor element, A heat dissipating member in which a convex portion provided on the semiconductor element side is inserted into the through hole; and an external electric circuit substrate on which the wiring board is mounted and the heat dissipating member is bonded via a high thermal conductive bonding material. provided, and the through hole is a semiconductor device which is characterized that you have placed near the channel portion of the semiconductor device. 前記配線基板に前記貫通孔に対向させて基板貫通孔が形成され、該基板貫通孔にも前記凸部が挿入されていることを特徴とする請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein a substrate through hole is formed in the wiring substrate so as to face the through hole, and the convex portion is inserted into the substrate through hole.
JP2000091039A 2000-03-29 2000-03-29 Semiconductor device Expired - Fee Related JP4360577B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000091039A JP4360577B2 (en) 2000-03-29 2000-03-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000091039A JP4360577B2 (en) 2000-03-29 2000-03-29 Semiconductor device

Publications (2)

Publication Number Publication Date
JP2001284503A JP2001284503A (en) 2001-10-12
JP4360577B2 true JP4360577B2 (en) 2009-11-11

Family

ID=18606555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000091039A Expired - Fee Related JP4360577B2 (en) 2000-03-29 2000-03-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JP4360577B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098070B2 (en) * 2004-11-16 2006-08-29 International Business Machines Corporation Device and method for fabricating double-sided SOI wafer scale package with through via connections
JPWO2007138771A1 (en) 2006-05-26 2009-10-01 株式会社村田製作所 Semiconductor device, electronic component module, and method of manufacturing semiconductor device
US20200404806A1 (en) 2019-06-19 2020-12-24 International Business Machines Corporation Cryogenic packaging for thermalization of low temperature devices

Also Published As

Publication number Publication date
JP2001284503A (en) 2001-10-12

Similar Documents

Publication Publication Date Title
JP5558714B2 (en) Semiconductor package
US7217998B2 (en) Semiconductor device having a heat-dissipation member
US6404048B2 (en) Heat dissipating microelectronic package
JPH0964099A (en) Semiconductor device and its mounting structure
US11133271B2 (en) Semiconductor device
AU657774B2 (en) Semiconductor chip module and method for manufacturing the same
US6396699B1 (en) Heat sink with chip die EMC ground interconnect
JP2004071977A (en) Semiconductor device
US20060220188A1 (en) Package structure having mixed circuit and composite substrate
EP1065719A2 (en) Power semiconductor mounting package containing ball grid array
JP2000058741A (en) Hybrid module
US20070200223A1 (en) Semiconductor device and semiconductor module therewith
JP4360577B2 (en) Semiconductor device
JP2021082714A (en) Semiconductor device
US20040173898A1 (en) Semiconductor apparatus having system-in-package arrangement with improved heat dissipation
JP4544724B2 (en) Semiconductor device
JP4349728B2 (en) Semiconductor device
JP3660817B2 (en) Electronic circuit module
JPH09213847A (en) Semiconductor integrated circuit device, manufacture thereof, and electronic device equipped therewith
JPH11251497A (en) Electronic circuit module
JP3842887B2 (en) Hybrid module
JP2003229521A (en) Semiconductor module and manufacturing method therefor
JP7018965B2 (en) Electronic module
JP3995661B2 (en) Method for manufacturing power MOSFET
JP3614386B2 (en) Power MOSFET

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070213

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090415

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090421

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090622

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090714

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090807

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120821

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130821

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees