JP4331973B2 - Method for manufacturing electronic circuit device - Google Patents

Method for manufacturing electronic circuit device Download PDF

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Publication number
JP4331973B2
JP4331973B2 JP2003137514A JP2003137514A JP4331973B2 JP 4331973 B2 JP4331973 B2 JP 4331973B2 JP 2003137514 A JP2003137514 A JP 2003137514A JP 2003137514 A JP2003137514 A JP 2003137514A JP 4331973 B2 JP4331973 B2 JP 4331973B2
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Japan
Prior art keywords
circuit device
electronic circuit
insulating material
film
insulating
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JP2003137514A
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Japanese (ja)
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JP2004342839A (en
Inventor
義克 石月
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Fujitsu Ltd
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Fujitsu Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は、LSIなどの電子デバイスやその電子デバイスを実装するプリント基板の層間絶縁膜を形成するための技術に関する。
【0002】
【従来の技術】
近時では、LSIなどの電子デバイスにおける回路構成の微細化が進行しており、それに伴い層間絶縁膜の材料として低誘電材料が用いられつつある。低誘電材料として好適なものに、ポリフェニルエーテル(PPE)樹脂、テフロン(R)系樹脂、及びビスマレイド系樹脂などがあるが、これらの低誘電材料は強度が脆弱であり、これのみ単独で絶縁膜として成膜することが困難であるため、ポリテレフタル酸エチレン(PET)フィルムやガラスクロスなどの支持体に予め形成され、絶縁基体とされる。そして、これらの低誘電材料を絶縁膜として用いる場合には、支持体を含む絶縁基体の状態で絶縁膜として供される。
【0003】
【特許文献1】
特開平7−115274号公報
【0004】
【発明が解決しようとする課題】
上述のように、PPE樹脂などの低誘電材料を支持体に形成した絶縁基体の状態で、低誘電材料を絶縁膜として用いる場合、その支持体自体の特性も絶縁膜の特性に含まれ、支持体の存在により低誘電材料そのものの特性を100%生かすことができない。仮に、支持体等の不要部を除去しようとしても、従来のように薬品等を用いたのでは膨大な時間を要し現実的でない。
【0005】
また、低誘電材料を支持体に形成しないで絶縁基体の状態で絶縁膜として供される場合、PPE樹脂などの低誘電材料は脆弱であるために、その低誘電材料部分の膜厚に限界があり、例えば20μm以上であれば取り扱いが可能であるが、それ以下の膜厚の薄膜である場合には取り扱いが極めて困難となり、製造上使用できない。
【0006】
その他、低誘電材料を液体の状態で(配線又はビアが形成された)基板上に塗付した場合には、液状であるため、2μm〜3μm以上の膜厚に形成することが困難である。このように、PPE樹脂などの低誘電材料は、回路微細化への多大な寄与が期待されている反面、所する膜厚(例えば10μm)を形成しようとした場合、実際の製造が困難であるという問題を抱えている。
【0007】
本発明は、上記の課題に鑑みてなされたものであり、絶縁材料、特にPPE樹脂などの低誘電材料に代表される単独の成膜が困難な絶縁材料を用い、所望の膜厚の絶縁膜を形成することを可能とする電子回路装置の製造方法を提供することを目的とする。
【0008】
また、本発明は、絶縁材料としての特性を十分に生かすことができ、低誘電材料を半導体部品、プリント基板、パッケージ基板などに適用して、伝送信号の伝送速度の更なる高速化を実現する電子回路装置の製造方法を提供することを目的とする。
【0009】
【課題を解決するための手段】
本発明の電子回路装置の製造方法は、基板の表面に導電体が設けられてなる電子回路装置を製造するに際して、支持体上に絶縁材料が形成されてなる絶縁基体を用い、前記導電体が前記絶縁材料内に覆われるように前記基板の表面に前記絶縁基体を張り合わせる工程と、バイトを用いた切削加工により、前記支持体の全て、前記絶縁材料の表層、及び前記導電体の表層を同時に切削し、前記導電体の表面及び前記絶縁材料の表面が連続して平坦となるように平坦化処理する工程とを含む。
【0010】
本発明の電子回路装置は、基板上に設けられた導電体を覆い、単独の成膜が困難である性質を有する絶縁材料からなる絶縁膜を備えた電子回路装置であって、前記導電体の表面及び前記絶縁膜の表面が連続して平坦となるように平坦化されてなるものである。
【0011】
【発明の実施の形態】
−本発明の基本骨子−
初めに、本発明の基本骨子について説明する。
本発明者は、基板上に形成された配線やビア部などの導電体を覆う層間絶縁膜として、PPE樹脂などの低誘電材料に代表される単独の成膜が困難な絶縁材料(以下、成膜困難性絶縁材料と称する。)を支持体に形成してなる絶縁基体を用いるも、正確な成膜制御を行い望ましくは低誘電率の絶縁材料のみの層間絶縁膜を形成すべく、好適な手法を模索した。
【0012】
その結果、CMP法に替わり、基板上に形成された多数の微細な導電体の表面を安価に高速で一斉に平坦化する手法として注目されつつある、バイトを用いた切削加工を適用することに想到した。この切削加工によれば、基板上で絶縁膜内に導電体が埋め込み形成されているような場合でも、CMP法のように金属と絶縁物の研磨速度等に依存することなく、基板上で一斉に導電物と絶縁物を連続して切削し、ディッシング等を発生せしめることなく全体的に両者を均一に平坦化することができる。銅、アルミニウム、ニッケル等の金属やポリイミド等の絶縁材料は、容易にバイトで切削可能な材料である。導電材料及び絶縁材料としては、前者が例えば延性金属であり、後者が例えば200GPa以上の剛性率を有する樹脂等であれば、より好適である。
【0013】
本発明では、成膜困難性絶縁材料を用いる際に、これを支持体に形成した絶縁基体の状態で用いるため、基板上に絶縁基体を貼り付けた時には成膜困難性絶縁材料内に導電体が安定に埋め込まれた状態となる。そして、上述の切削加工技術により、絶縁基体の貼り付け後には言わば不要となる支持体の全て及び成膜困難性絶縁材料の表層を一斉に切削除去する。このとき、例えばビア部である導電体の表面が露出するまで切削することにより、ビア部を覆うとともに、その上面を露出させ、表面が均一に平坦化されてなる成膜困難性絶縁材料のみからなる層間絶縁膜が形成される。この層間絶縁膜を膜厚20μm以下の薄膜に形成することが可能である。このとき、絶縁基体と共に導電体の表層も切削し、導電体の表面及び成膜困難性絶縁材料の表面が連続して平坦となるように平坦化処理しても好適である。
【0014】
更に、本発明の手法を多層配線技術に応用し、配線及びビア部などの導電体の形成、絶縁基体の貼り付け、及び切削加工の一連工程を複数回実行し、成膜困難性絶縁材料内に導電体が設けられ表面平坦化されてなる層を、ビア部で配線間が接続されるように複数積層形成することも好適である。
【0015】
−具体的な諸実施形態−
以下、上述した基本骨子を踏まえ、本発明の具体的な諸実施形態について図面を用いて詳細に説明する。
【0016】
[第1の実施形態]
ここでは、半導体部品(半導体基板又は半導体チップ)、プリント基板、パッケージ基板等の基板に形成される電子回路装置に本発明を適用した場合を開示する。
図1は、本実施形態による電子回路装置の製造方法を工程順に示す概略断面図である。
【0017】
先ず、図1(a)に示すように、半導体基板やプリント基板、パッケージ基板等である基板1上に、各種電子回路(不図示)及びその配線2及び当該配線2上にこれと電気的に接続されてなるビア部3をパターン形成する。
【0018】
続いて、配線2及びビア部3を覆う層間絶縁膜を形成する。
具体的には、図1(b)に示すように、支持体となるガラスクロス11の両面にPPE樹脂が含浸されてPPEフィルム12が形成されてなる絶縁基体13を用いる。そして、この絶縁基体13をその一方のPPEフィルム12で基板1上に張り合わせ、加熱処理する。このとき、図1(c)に示すように、絶縁基体13は一方のPPEフィルム12で配線2及びビア部3を埋め込んだ状態となる。
【0019】
続いて、図1(d)に示すように、ダイヤモンドなどの硬質材料からなるバイト10を用い、絶縁基体13を切削する。ここでは、ガラスクロス11の全て及びPPEフィルム12の表層を、ビア部3の上面が露出するまで一斉に切削除去する。
【0020】
この切削加工により、図1(e)に示すように、配線2とビア部3とを(ビア部3については上面を露出するように)覆い、表面が均一に平坦化されてなるPPEフィルム12のみからなる層間絶縁膜4が形成される。このとき、基板1上では、層間絶縁膜4内に配線2及びビア部3(ビア部3については上面が露出される)を覆い、表面平坦化されてなる例えば膜厚20μm以下の薄い配線層5が形成されることになる。
【0021】
なお、上述の切削加工を行うに際して、絶縁基体13と共にビア部3の表層も切削し、ビア部3の表面及びPPEフィルム12の表面が連続して平坦となるように平坦化処理しても好適である。
【0022】
以上説明したように、本実施形態によれば、強度が脆弱な低誘電絶縁材料であり、単独の成膜が困難なPPEフィルム12を用い、正確な成膜制御を行って層間絶縁膜4を形成することが可能であり、これにより、伝送信号の伝送速度の更なる高速化を実現する電子回路装置が実現する。
【0023】
(変形例)
ここで、第1の実施形態の変形例について説明する。この場合、第1の実施形態と同様に、各種基板に形成される電子回路装置の製造方法を開示するが、絶縁基体の構成が異なる点で相違する。
図2は、本変形例による電子回路装置の製造方法を工程順に示す概略断面図である。なお、図1と対応する部材等については同一の符号を記す。
【0024】
先ず、図2(a)に示すように、半導体基板やプリント基板、パッケージ基板等である基板1上に、各種電子回路(不図示)及びその配線2及び当該配線2上にこれと電気的に接続されてなるビア部3をパターン形成する。
【0025】
続いて、配線2及びビア部3を覆う層間絶縁膜を形成する。
具体的には、図2(b)に示すように、支持体となるPETフィルム21の片面にPPEフィルム22が形成されてなる絶縁基体23を用いる。そして、この絶縁基体23をPPEフィルム22で基板1上に張り合わせ、加熱処理する。このとき、図2(c)に示すように、絶縁基体23はPPEフィルム22で配線2及びビア部3を埋め込んだ状態となる。
【0026】
続いて、図2(d)に示すように、ダイヤモンドなどの硬質材料からなるバイト10を用い、絶縁基体23を切削する。ここでは、PETフィルム21の全て及びPPEフィルム22の表層を、ビア部3の上面が露出するまで一斉に切削除去する。
【0027】
この切削加工により、図2(e)に示すように、配線2とビア部3とを(ビア部3については上面を露出するように)覆い、表面が均一に平坦化されてなるPPEフィルム22のみからなる層間絶縁膜4が形成される。このとき、基板1上では、層間絶縁膜4内に配線2及びビア部3(ビア部3については上面が露出される)を覆い、表面平坦化されてなる例えば膜厚20μm以下の薄い配線層5が形成されることになる。
【0028】
なお、上述の切削加工を行うに際して、絶縁基体13と共にビア部3の表層も切削し、ビア部3の表面及びPPEフィルム22の表面が連続して平坦となるように平坦化処理しても好適である。
【0029】
[第2の実施形態]
次に、第2の実施形態について説明する。ここでは、第1の実施形態と同様に、各種基板に形成される電子回路装置の製造方法を開示するが、多層配線構造とされている点で相違する。
図3は、本実施形態による電子回路装置の製造方法の主要工程を示す概略断面図である。なお、図1と対応する部材等については同一の符号を記す。
【0030】
本実施形態では、先ず第1の実施形態における図1(a)〜図1(d)の一連工程を経て、図3(a)に示すように、配線2とビア部3とを(ビア部3については上面を露出するように)覆い、表面が均一に平坦化されてなるPPEフィルム12のみからなる層間絶縁膜4を形成する。このとき、基板1上では、層間絶縁膜4内に配線2及びビア部3(ビア部3については上面が露出される)を覆い、表面平坦化されてなる例えば膜厚20μm以下の薄い配線層5が形成されることになる。この配線層5が、本実施形態における多層配線層の1層目を構成する。
【0031】
続いて、図3(b)に示すように、配線層5上に、第1の実施形態における図1(a)〜図1(d)と同様の一連工程を経て、層間絶縁膜4内に配線2及びビア部3(ビア部3については上面が露出される)を覆い、表面平坦化されてなる例えば膜厚20μm以下の薄い配線層31を形成する。ここで、配線層5のビア部3と配線層31の配線2とが電気的に接続されている。
【0032】
続いて、図3(c)に示すように、配線層31上に、第1の実施形態における図1(a)〜図1(d)と同様の一連工程を経て、層間絶縁膜4内に配線2及びビア部3(ビア部3については上面が露出される)を覆い、表面平坦化されてなる例えば膜厚20μm以下の薄い配線層32を形成する。ここで、配線層31のビア部3と配線層32の配線2とが電気的に接続されている。
【0033】
このように、前記一連工程を繰り返し実行することにより、配線層5,31,32が積層されてなる多層配線層41を備える電子回路装置が実現する。なお、本実施形態では、3層の配線層からなる多層配線層を例示したが、2層又は4層以上に形成することも可能である。
【0034】
以上説明したように、本実施形態によれば、強度が脆弱な低誘電絶縁材料であり、単独の成膜が困難なPPEフィルム12を用い、正確な成膜制御を行って層間絶縁膜4を形成することが可能であり、この層間絶縁膜の形成技術を利用して多層配線層を制御性良く確実に形成することができ、伝送信号の伝送速度の更なる高速化を実現する多層配線の電子回路装置が実現する。
【0035】
以下、本発明の諸態様を付記としてまとめて記載する。
【0036】
(付記1)基板の表面に導電体が設けられてなる電子回路装置を製造するに際して、
支持体上に絶縁材料が形成されてなる絶縁基体を用い、前記導電体が前記絶縁材料内に覆われるように前記基板の表面に前記絶縁基体を張り合わせる工程と、バイトを用いた切削加工により、前記導電体の表面が露出するように平坦化処理する工程と
を含むことを特徴とする電子回路装置の製造方法。
【0037】
(付記2)前記絶縁基体は、前記絶縁材料が前記支持体上又は前記支持体を挟んだ上下に形成されてなることを特徴とする付記1に記載の電子回路装置の製造方法。
【0038】
(付記3)前記切削加工の際に、少なくとも前記支持体と前記絶縁材料の表層とを除去し、前記導電体の表面が露出して少なくとも前記絶縁材料の表面が平坦となるように平坦化処理することを特徴とする付記1又は2に記載の電子回路装置の製造方法。
【0039】
(付記4)前記平坦化処理された後の前記絶縁材料の膜厚が20μm以下であることを特徴とする付記3に記載の電子回路装置の製造方法。
【0040】
(付記5)前記切削加工の際に、前記絶縁材料の表層と共に前記導電体の表層を除去し、前記導電体の表面及び前記絶縁材料の表面が連続して平坦となるように平坦化処理することを特徴とする付記3又は4に記載の電子回路装置の製造方法。
【0041】
(付記6)前記絶縁基体は、前記支持体として、ポリテレフタル酸エチレンフィルムを使用し、当該ポリテレフタル酸エチレンフィルム上に前記絶縁材料が形成されてなるか、又はガラスクロスを使用し、当該ガラスクロスに前記絶縁材料が含浸されてなることを特徴とする付記1〜5のいずれか1項に記載の電子回路装置の製造方法。
【0042】
(付記7)前記絶縁材料は、ポリフェニルエーテル樹脂、テフロン(R)系樹脂、及びビスマレイド系樹脂から選ばれた一種であることを特徴とする付記1〜6のいずれか1項に記載の電子回路装置の製造方法。
【0043】
(付記8)一連の前記各工程を複数回実行し、前記絶縁材料内に前記導電体が設けられ表面平坦化されてなる層を複数積層形成することを特徴とする付記1〜7のいずれか1項に記載の電子回路装置の製造方法。
【0044】
(付記9)基板上に設けられた導電体を覆い、単独の成膜が困難である性質を有する絶縁材料からなる絶縁膜を備えた電子回路装置であって、
前記導電体の表面及び前記絶縁膜の表面が連続して平坦となるように平坦化されてなることを特徴とする電子回路装置。
【0045】
(付記10)前記絶縁膜の膜厚が20μm以下であることを特徴とする付記9に記載の電子回路装置。
【0046】
(付記11)前記絶縁膜は、ポリフェニルエーテル樹脂、テフロン(R)系樹脂、及びビスマレイド系樹脂から選ばれた一種からなることを特徴とする付記9又は10に記載の電子回路装置。
【0047】
(付記12)前記絶縁材料内に前記導電体が設けられ表面平坦化されてなる層が複数積層されてなることを特徴とする付記9〜11のいずれか1項に記載の電子回路装置。
【0048】
【発明の効果】
本発明によれば、絶縁材料、特にPPE樹脂などの低誘電材料に代表される単独の成膜が困難な絶縁材料を用い、所望の膜厚の絶縁膜を形成することが可能となる。
【0049】
また、本発明によれば、絶縁材料としての特性を十分に生かすことができ、低誘電材料を半導体部品、プリント基板、パッケージ基板などに適用して、伝送信号の伝送速度の更なる高速化を実現することが可能となる。
【図面の簡単な説明】
【図1】第1の実施形態による電子回路装置の製造方法を工程順に示す概略断面図である。
【図2】第1の実施形態の変形例による電子回路装置の製造方法を工程順に示す概略断面図である。
【図3】第2の実施形態による電子回路装置の製造方法を工程順に示す概略断面図である。
【符号の説明】
1 基板
2 配線
3 ビア部
4 層間絶縁膜
5,31,32 配線層
11 ガラスクロス
12,22 PPEフィルム
13,23 絶縁基体
21 PETフィルム
41 多層配線層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique for forming an electronic device such as an LSI and an interlayer insulating film of a printed board on which the electronic device is mounted.
[0002]
[Prior art]
In recent years, miniaturization of circuit configurations in electronic devices such as LSIs has progressed, and accordingly, low dielectric materials are being used as materials for interlayer insulating films. Examples of suitable low dielectric materials include polyphenyl ether (PPE) resin, Teflon (R) resin, and bismaleide resin. However, these low dielectric materials are weak in strength, and they are insulated alone. Since it is difficult to form a film as a film, it is formed in advance on a support such as a polyterephthalate ethylene (PET) film or a glass cloth to form an insulating substrate. When these low dielectric materials are used as insulating films, they are provided as insulating films in the state of an insulating substrate including a support.
[0003]
[Patent Document 1]
Japanese Patent Laid-Open No. 7-115274
[Problems to be solved by the invention]
As described above, when a low dielectric material is used as an insulating film in the state of an insulating substrate in which a low dielectric material such as PPE resin is formed on the support, the characteristics of the support itself are also included in the characteristics of the insulating film. Due to the presence of the body, the characteristics of the low dielectric material itself cannot be fully utilized. Even if an unnecessary portion such as a support is to be removed, using a chemical or the like as in the prior art requires an enormous amount of time and is not practical.
[0005]
In addition, when a low dielectric material is provided as an insulating film in the state of an insulating substrate without forming a low dielectric material on the support, the low dielectric material such as PPE resin is fragile, so the film thickness of the low dielectric material portion is limited. For example, if it is 20 μm or more, it can be handled, but if it is a thin film having a thickness less than that, handling becomes extremely difficult and it cannot be used in production.
[0006]
In addition, when a low dielectric material is applied in a liquid state (on which wirings or vias are formed) on a substrate, it is difficult to form a film having a thickness of 2 μm to 3 μm or more because it is liquid. As described above, a low dielectric material such as PPE resin is expected to make a great contribution to circuit miniaturization, but it is difficult to actually manufacture the film when a desired film thickness (for example, 10 μm) is formed. Have a problem.
[0007]
The present invention has been made in view of the above-described problems, and uses an insulating material, particularly an insulating material that is difficult to form alone, represented by a low dielectric material such as PPE resin, and has an insulating film with a desired film thickness. It is an object of the present invention to provide a method for manufacturing an electronic circuit device that can form the above.
[0008]
In addition, the present invention can make full use of the characteristics as an insulating material, and realizes a further increase in transmission speed of a transmission signal by applying a low dielectric material to a semiconductor component, a printed board, a package board, and the like. An object of the present invention is to provide a method for manufacturing an electronic circuit device.
[0009]
[Means for Solving the Problems]
The method for manufacturing an electronic circuit device according to the present invention uses an insulating substrate in which an insulating material is formed on a support when manufacturing an electronic circuit device in which a conductor is provided on the surface of a substrate. By attaching the insulating base to the surface of the substrate so as to be covered with the insulating material, and cutting using a cutting tool , all of the support, the surface layer of the insulating material, and the surface layer of the conductor are formed. Cutting at the same time and performing a flattening process so that the surface of the conductor and the surface of the insulating material are continuously flattened .
[0010]
An electronic circuit device of the present invention is an electronic circuit device including an insulating film made of an insulating material that covers a conductor provided on a substrate and has a property that it is difficult to form a single film. The surface and the surface of the insulating film are flattened so as to be flat continuously.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
-Basic outline of the present invention-
First, the basic outline of the present invention will be described.
The present inventor has proposed an insulating material (hereinafter referred to as a composition material) that is difficult to form as a single layer, typically a low dielectric material such as PPE resin, as an interlayer insulating film covering conductors such as wiring and via portions formed on a substrate. Although an insulating substrate formed by forming a support on a support is used, it is preferable to form an interlayer insulating film made of only an insulating material having a low dielectric constant by controlling film formation accurately. We searched for a method.
[0012]
As a result, instead of the CMP method, cutting using a cutting tool, which has been attracting attention as a method for simultaneously flattening the surface of a large number of fine conductors formed on a substrate at a low cost at high speed, is applied. I came up with it. According to this cutting process, even when a conductor is embedded in an insulating film on the substrate, it does not depend on the polishing rate of the metal and the insulator as in the CMP method. In addition, the conductive material and the insulating material are continuously cut, and both can be uniformly flattened without causing dishing or the like. Metals such as copper, aluminum, and nickel, and insulating materials such as polyimide are materials that can be easily cut with a cutting tool. As the conductive material and the insulating material, it is more preferable that the former is, for example, a ductile metal and the latter is, for example, a resin having a rigidity of 200 GPa or more.
[0013]
In the present invention, when an insulating material that is difficult to form is used, it is used in the state of an insulating base formed on a support. Therefore, when an insulating base is attached on a substrate, a conductor is formed in the insulating material that is difficult to form. Is stably embedded. Then, the above-described cutting technique is used to cut and remove all of the support that is unnecessary after the insulating substrate is pasted and the surface layer of the insulating material that is difficult to form. At this time, for example, by cutting until the surface of the conductor as the via portion is exposed, the via portion is covered and the upper surface is exposed, and the surface is uniformly flattened. An interlayer insulating film is formed. This interlayer insulating film can be formed as a thin film having a thickness of 20 μm or less. At this time, it is also preferable to cut the surface layer of the conductor together with the insulating base, and perform a planarization treatment so that the surface of the conductor and the surface of the film-forming insulating material are continuously flattened.
[0014]
Furthermore, the method of the present invention is applied to the multilayer wiring technology, and a series of processes of forming conductors such as wiring and via portions, attaching an insulating base, and cutting are executed a plurality of times to form a film that is difficult to form. It is also preferable to form a plurality of layers in which conductors are provided and the surfaces of which are planarized so that wirings are connected at via portions.
[0015]
-Specific embodiments-
Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings based on the basic outline described above.
[0016]
[First Embodiment]
Here, a case where the present invention is applied to an electronic circuit device formed on a substrate such as a semiconductor component (semiconductor substrate or semiconductor chip), a printed substrate, or a package substrate is disclosed.
FIG. 1 is a schematic cross-sectional view showing the method of manufacturing the electronic circuit device according to the present embodiment in the order of steps.
[0017]
First, as shown in FIG. 1A, various electronic circuits (not shown) and their wiring 2 and the wiring 2 are electrically connected to the substrate 1 such as a semiconductor substrate, a printed circuit board, and a package substrate. A pattern is formed in the connected via portion 3.
[0018]
Subsequently, an interlayer insulating film that covers the wiring 2 and the via portion 3 is formed.
Specifically, as shown in FIG. 1B, an insulating substrate 13 is used in which a PPE film 12 is formed by impregnating a PPE resin on both surfaces of a glass cloth 11 serving as a support. Then, the insulating base 13 is laminated on the substrate 1 with the one PPE film 12 and heat-treated. At this time, as shown in FIG. 1C, the insulating base 13 is in a state where the wiring 2 and the via part 3 are embedded with one PPE film 12.
[0019]
Subsequently, as shown in FIG. 1D, the insulating base 13 is cut using a cutting tool 10 made of a hard material such as diamond. Here, all of the glass cloth 11 and the surface layer of the PPE film 12 are cut and removed all at once until the upper surface of the via part 3 is exposed.
[0020]
By this cutting process, as shown in FIG. 1 (e), the PPE film 12 is formed by covering the wiring 2 and the via part 3 (so that the upper surface of the via part 3 is exposed) and uniformly flattening the surface. An interlayer insulating film 4 made of only is formed. At this time, on the substrate 1, a thin wiring layer having a thickness of, for example, 20 μm or less is formed by covering the wiring 2 and the via portion 3 (the upper surface of the via portion 3 is exposed) in the interlayer insulating film 4 and planarizing the surface. 5 will be formed.
[0021]
When performing the above-described cutting process, it is also preferable to cut the surface layer of the via part 3 together with the insulating base 13 so that the surface of the via part 3 and the surface of the PPE film 12 are continuously flattened. It is.
[0022]
As described above, according to the present embodiment, the interlayer insulating film 4 is formed by performing accurate film formation control using the PPE film 12 which is a low dielectric insulating material having weak strength and difficult to form a single film. Thus, an electronic circuit device that realizes further increase in the transmission speed of the transmission signal is realized.
[0023]
(Modification)
Here, a modification of the first embodiment will be described. In this case, as in the first embodiment, a method of manufacturing an electronic circuit device formed on various substrates is disclosed, but differs in that the configuration of the insulating base is different.
FIG. 2 is a schematic cross-sectional view showing the method of manufacturing the electronic circuit device according to this modification in the order of steps. In addition, the same code | symbol is described about the member etc. corresponding to FIG.
[0024]
First, as shown in FIG. 2A, various electronic circuits (not shown) and their wiring 2 and the wiring 2 are electrically connected to the substrate 1 such as a semiconductor substrate, a printed circuit board, and a package substrate. A pattern is formed in the connected via portion 3.
[0025]
Subsequently, an interlayer insulating film that covers the wiring 2 and the via portion 3 is formed.
Specifically, as shown in FIG. 2B, an insulating substrate 23 in which a PPE film 22 is formed on one side of a PET film 21 that serves as a support is used. Then, the insulating base 23 is laminated on the substrate 1 with the PPE film 22 and heat-treated. At this time, as shown in FIG. 2C, the insulating base 23 is in a state in which the wiring 2 and the via part 3 are embedded with the PPE film 22.
[0026]
Subsequently, as shown in FIG. 2D, the insulating base 23 is cut using a cutting tool 10 made of a hard material such as diamond. Here, all of the PET film 21 and the surface layer of the PPE film 22 are cut and removed all at once until the upper surface of the via portion 3 is exposed.
[0027]
By this cutting process, as shown in FIG. 2E, the PPE film 22 is formed by covering the wiring 2 and the via portion 3 (so that the upper surface of the via portion 3 is exposed) and uniformly flattening the surface. An interlayer insulating film 4 made of only is formed. At this time, on the substrate 1, a thin wiring layer having a thickness of, for example, 20 μm or less is formed by covering the wiring 2 and the via portion 3 (the upper surface of the via portion 3 is exposed) in the interlayer insulating film 4 and planarizing the surface. 5 will be formed.
[0028]
When performing the above-described cutting process, it is also preferable to cut the surface layer of the via part 3 together with the insulating base 13 so that the surface of the via part 3 and the surface of the PPE film 22 are continuously flattened. It is.
[0029]
[Second Embodiment]
Next, a second embodiment will be described. Here, as in the first embodiment, a method of manufacturing an electronic circuit device formed on various substrates is disclosed, but is different in that it has a multilayer wiring structure.
FIG. 3 is a schematic cross-sectional view showing the main steps of the method of manufacturing the electronic circuit device according to the present embodiment. In addition, the same code | symbol is described about the member etc. corresponding to FIG.
[0030]
In the present embodiment, first, through the series of steps of FIG. 1A to FIG. 1D in the first embodiment, as shown in FIG. 3A, the wiring 2 and the via portion 3 are connected (via portion). 3 is formed so that the upper surface is exposed), and the interlayer insulating film 4 made of only the PPE film 12 having the surface uniformly flattened is formed. At this time, on the substrate 1, a thin wiring layer having a thickness of, for example, 20 μm or less is formed by covering the wiring 2 and the via portion 3 (the upper surface of the via portion 3 is exposed) in the interlayer insulating film 4 and planarizing the surface. 5 will be formed. This wiring layer 5 constitutes the first layer of the multilayer wiring layer in the present embodiment.
[0031]
Subsequently, as shown in FIG. 3B, a series of steps similar to those in FIGS. 1A to 1D in the first embodiment are performed on the wiring layer 5 in the interlayer insulating film 4. A thin wiring layer 31 having a thickness of, for example, 20 μm or less is formed by covering the wiring 2 and the via portion 3 (the upper surface of the via portion 3 is exposed) and planarizing the surface. Here, the via portion 3 of the wiring layer 5 and the wiring 2 of the wiring layer 31 are electrically connected.
[0032]
Subsequently, as shown in FIG. 3C, a series of steps similar to those in FIGS. 1A to 1D in the first embodiment are performed on the wiring layer 31 to form the interlayer insulating film 4. A thin wiring layer 32 having a thickness of, for example, 20 μm or less is formed by covering the wiring 2 and the via portion 3 (the upper surface of the via portion 3 is exposed) and planarizing the surface. Here, the via portion 3 of the wiring layer 31 and the wiring 2 of the wiring layer 32 are electrically connected.
[0033]
Thus, an electronic circuit device including the multilayer wiring layer 41 in which the wiring layers 5, 31, and 32 are laminated is realized by repeatedly executing the series of steps. In the present embodiment, a multilayer wiring layer composed of three wiring layers has been illustrated, but it may be formed in two layers or four or more layers.
[0034]
As described above, according to the present embodiment, the interlayer insulating film 4 is formed by performing accurate film formation control using the PPE film 12 which is a low dielectric insulating material having weak strength and difficult to form a single film. The multilayer wiring layer can be formed with good controllability by using this interlayer insulating film formation technology, and the transmission speed of the transmission signal can be further increased. An electronic circuit device is realized.
[0035]
Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.
[0036]
(Appendix 1) When manufacturing an electronic circuit device in which a conductor is provided on the surface of a substrate,
By using an insulating substrate in which an insulating material is formed on a support, the step of attaching the insulating substrate to the surface of the substrate so that the conductor is covered in the insulating material, and cutting using a cutting tool And a flattening process so that the surface of the conductor is exposed.
[0037]
(Supplementary note 2) The method of manufacturing an electronic circuit device according to supplementary note 1, wherein the insulating base is formed by forming the insulating material on or below the support.
[0038]
(Additional remark 3) At the time of the said cutting, at least the said support body and the surface layer of the said insulating material are removed, and the planarization process is carried out so that the surface of the said conductor may be exposed and the surface of the said insulating material may become at least flat The manufacturing method of the electronic circuit device according to appendix 1 or 2, characterized in that:
[0039]
(Additional remark 4) The manufacturing method of the electronic circuit device of Additional remark 3 characterized by the film thickness of the said insulating material after the said planarization process being 20 micrometers or less.
[0040]
(Additional remark 5) In the said cutting process, the surface layer of the said conductor is removed with the surface layer of the said insulating material, and it planarizes so that the surface of the said conductor and the surface of the said insulating material may become flat continuously. The method for manufacturing an electronic circuit device according to appendix 3 or 4, wherein the electronic circuit device is manufactured.
[0041]
(Additional remark 6) The said insulation base | substrate uses a polyterephthalate ethylene film as the said support body, the said insulating material is formed on the said polyterephthalate ethylene film, or uses a glass cloth, the said glass 6. The method of manufacturing an electronic circuit device according to any one of appendices 1 to 5, wherein the cloth is impregnated with the insulating material.
[0042]
(Supplementary note 7) The electron according to any one of supplementary notes 1 to 6, wherein the insulating material is a kind selected from a polyphenyl ether resin, a Teflon (R) resin, and a bismaleide resin. A method of manufacturing a circuit device.
[0043]
(Appendix 8) Any one of Appendices 1 to 7, wherein the series of steps are executed a plurality of times to form a plurality of stacked layers in which the conductor is provided and the surface is flattened in the insulating material. 2. A method for manufacturing an electronic circuit device according to item 1.
[0044]
(Appendix 9) An electronic circuit device including an insulating film made of an insulating material that covers a conductor provided on a substrate and has a property that it is difficult to form a single film,
An electronic circuit device, wherein the surface of the conductor and the surface of the insulating film are flattened so as to be flat continuously.
[0045]
(Supplementary note 10) The electronic circuit device according to supplementary note 9, wherein the thickness of the insulating film is 20 μm or less.
[0046]
(Supplementary note 11) The electronic circuit device according to supplementary note 9 or 10, wherein the insulating film is made of one selected from a polyphenyl ether resin, a Teflon (R) resin, and a bismaleide resin.
[0047]
(Supplementary note 12) The electronic circuit device according to any one of supplementary notes 9 to 11, wherein a plurality of layers in which the conductor is provided and the surface is flattened are stacked in the insulating material.
[0048]
【The invention's effect】
According to the present invention, it is possible to form an insulating film having a desired film thickness using an insulating material, particularly an insulating material that is difficult to form alone, such as a low dielectric material such as PPE resin.
[0049]
In addition, according to the present invention, the characteristics as an insulating material can be fully utilized, and a low dielectric material can be applied to a semiconductor component, a printed circuit board, a package substrate, etc. to further increase the transmission speed of a transmission signal. It can be realized.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing a method of manufacturing an electronic circuit device according to a first embodiment in the order of steps.
FIG. 2 is a schematic cross-sectional view showing a method of manufacturing an electronic circuit device according to a modification of the first embodiment in the order of steps.
FIG. 3 is a schematic cross-sectional view showing a method of manufacturing the electronic circuit device according to the second embodiment in the order of steps.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Wiring 3 Via part 4 Interlayer insulating film 5, 31, 32 Wiring layer 11 Glass cloth 12, 22 PPE film 13, 23 Insulating base 21 PET film 41 Multilayer wiring layer

Claims (5)

基板の表面に導電体が設けられてなる電子回路装置を製造するに際して、
支持体上に絶縁材料が形成されてなる絶縁基体を用い、前記導電体が前記絶縁材料内に覆われるように前記基板の表面に前記絶縁基体を張り合わせる工程と、
バイトを用いた切削加工により、前記支持体の全て、前記絶縁材料の表層、及び前記導電体の表層を同時に切削し、前記導電体の表面及び前記絶縁材料の表面が連続して平坦となるように平坦化処理する工程と
を含むことを特徴とする電子回路装置の製造方法。
When manufacturing an electronic circuit device in which a conductor is provided on the surface of a substrate,
Using an insulating base formed by forming an insulating material on a support, and bonding the insulating base to the surface of the substrate so that the conductor is covered in the insulating material;
By cutting with a cutting tool , all of the support, the surface layer of the insulating material, and the surface layer of the conductor are simultaneously cut so that the surface of the conductor and the surface of the insulating material are continuously flat. And a flattening process. A method for manufacturing an electronic circuit device, comprising:
前記絶縁基体は、前記絶縁材料が前記支持体上又は前記支持体を挟んだ上下に形成されてなることを特徴とする請求項1に記載の電子回路装置の製造方法。  2. The method of manufacturing an electronic circuit device according to claim 1, wherein the insulating base is formed by forming the insulating material on the support body or above and below the support body. 前記絶縁基体は、前記支持体として、ポリテレフタル酸エチレンフィルムを使用し、当該ポリテレフタル酸エチレンフィルム上に前記絶縁材料が形成されてなるか、又はガラスクロスを使用し、当該ガラスクロスに前記絶縁材料が含浸されてなることを特徴とする請求項1又は2に記載の電子回路装置の製造方法。  The insulating substrate uses a polyethylene terephthalate film as the support, and the insulating material is formed on the polyethylene terephthalate ethylene film, or a glass cloth is used, and the glass cloth is insulated with the insulating material. 3. The method of manufacturing an electronic circuit device according to claim 1, wherein the material is impregnated. 前記絶縁材料は、ポリフェニルエーテル樹脂、テフロン(R)系樹脂、及びビスマレイド系樹脂から選ばれた一種であることを特徴とする請求項1〜3のいずれか1項に記載の電子回路装置の製造方法。  4. The electronic circuit device according to claim 1, wherein the insulating material is one selected from a polyphenyl ether resin, a Teflon (R) resin, and a bismaleide resin. 5. Production method. 一連の前記各工程を複数回実行し、前記絶縁材料内に前記導電体が設けられ表面平坦化されてなる層を複数積層形成することを特徴とする請求項1〜4のいずれか1項に記載の電子回路装置の製造方法。  5. The process according to claim 1, wherein the series of steps are performed a plurality of times, and a plurality of layers in which the conductor is provided and the surface is flattened are formed in the insulating material. The manufacturing method of the electronic circuit device of description.
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